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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-LUI-01.S] - Blame information for rev 2

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# RISC-V Compliance Test I-LUI-01
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#
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# Copyright (c) 2017, Codasip Ltd.
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# Copyright (c) 2018, Imperas Software Ltd. Additions
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#      * Redistributions of source code must retain the above copyright
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#        notice, this list of conditions and the following disclaimer.
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#      * Redistributions in binary form must reproduce the above copyright
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#        notice, this list of conditions and the following disclaimer in the
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#        documentation and/or other materials provided with the distribution.
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#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
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#        names of its contributors may be used to endorse or promote products
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#        derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
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# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Specification: RV32I Base Integer Instruction Set, Version 2.0
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# Description: Testing instruction LUI.
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#include "compliance_test.h"
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#include "compliance_io.h"
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#include "test_macros.h"
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# Test Virtual Machine (TVM) used by program.
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RV_COMPLIANCE_RV32M
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# Test code region
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RV_COMPLIANCE_CODE_BEGIN
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    RVTEST_IO_INIT
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    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
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    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part A - general test of LUI\n");
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    # Address for test results
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    la      x15, test_A_res
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    # Test
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    lui     x1, 0x0
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    lui     x3, 0x1
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    lui     x5, 0xFFFFF
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    lui     x29, 0x7FFFF
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    lui     x31, 0x80000
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    # Store results
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    sw      x1, 0(x15)
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    sw      x3, 4(x15)
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    sw      x5, 8(x15)
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    sw      x29, 12(x15)
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    sw      x31, 16(x15)
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    //
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    // Assert
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    //
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    RVTEST_IO_CHECK()
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    RVTEST_IO_ASSERT_GPR_EQ(x1, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x00001000)
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    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x29, 0x7FFFF000)
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    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x80000000)
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    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part B - test LUI overwrites low bits\n");
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    # Addresses for test data and results
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    la      x15, test_B_data
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    la      x16, test_B_res
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    # Load testdata
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    lw      x2, 0(x15)
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    lw      x4, 0(x15)
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    lw      x6, 0(x15)
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    lw      x28, 0(x15)
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    lw      x30, 0(x15)
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    # Test
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    lui     x2, 0x80000
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    lui     x4, 0x7FFFF
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    lui     x6, 0
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    lui     x28, 1
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    lui     x30, 0xFFFFF
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    # Store results
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    sw      x2, 0(x16)
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    sw      x4, 4(x16)
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    sw      x6, 8(x16)
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    sw      x28, 12(x16)
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    sw      x30, 16(x16)
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    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x80000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x7FFFF000)
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    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x28, 0x00001000)
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    RVTEST_IO_ASSERT_GPR_EQ(x30, 0xFFFFF000)
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    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part C - test loading immediate using lui + addi or li alias\n");
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    # Address for results
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    la      x17, test_C_res
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    # Test
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    li      x1,  0x42726E6F
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    li      x15, 0x12345678
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    li      x30, 0x9ABCDEF0
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    lui     x2, 0x42727
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    addi    x2, x2, 0xFFFFFE6F
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    lui     x16, 0x12345
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    addi    x16, x16, 0x678
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    lui     x31, 0x9ABCE
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    addi    x31, x31, 0xFFFFFEF0
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    # Store results
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    sw      x1, 0(x17)
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    sw      x15, 4(x17)
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    sw      x30, 8(x17)
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    sw      x2, 12(x17)
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    sw      x16, 16(x17)
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    sw      x31, 20(x17)
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    #RVTEST_IO_ASSERT_GPR_EQ(x1, 0x8000095C)
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    RVTEST_IO_ASSERT_GPR_EQ(x15, 0x12345678)
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    RVTEST_IO_ASSERT_GPR_EQ(x30, 0x9ABCDEF0)
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    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x42726E6F)
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    RVTEST_IO_ASSERT_GPR_EQ(x16, 0x12345678)
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    RVTEST_IO_ASSERT_GPR_EQ(x31, 0x9ABCDEF0)
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    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
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    RVTEST_IO_WRITE_STR("# Test End\n")
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 # ---------------------------------------------------------------------------------------------
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    # HALT
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    RV_COMPLIANCE_HALT
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RV_COMPLIANCE_CODE_END
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# Input data section.
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    .data
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    .align 4
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test_B_data:
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    .word 0x11111111
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# Output data section.
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RV_COMPLIANCE_DATA_BEGIN
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    .align 4
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test_A_res:
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    .fill 5, 4, -1
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test_B_res:
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    .fill 5, 4, -1
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test_C_res:
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    .fill 6, 4, -1
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RV_COMPLIANCE_DATA_END

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