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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32si/] [rv64si/] [csr.S] - Blame information for rev 2

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1 2 mballance
# See LICENSE for license details.
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#*****************************************************************************
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# csr.S
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#-----------------------------------------------------------------------------
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#
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# Test CSRRx and CSRRxI instructions.
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#
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#include "riscv_test.h"
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#include "compliance_test.h"
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#include "compliance_io.h"
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#include "aw_test_macros.h"
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RVTEST_RV64S
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RVTEST_CODE_BEGIN
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#ifdef __MACHINE_MODE
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  #define sscratch mscratch
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  #define sstatus mstatus
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  #define scause mcause
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  #define sepc mepc
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  #define sret mret
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  #define stvec_handler mtvec_handler
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  #undef SSTATUS_SPP
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  #define SSTATUS_SPP MSTATUS_MPP
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#endif
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  # For RV64, make sure UXL encodes RV64.  (UXL does not exist for RV32.)
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#if __riscv_xlen == 64
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  # If running in M mode, use mstatus.MPP to check existence of U mode.
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  # Otherwise, if in S mode, then U mode must exist and we don't need to check.
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#ifdef __MACHINE_MODE
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  li t0, MSTATUS_MPP
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  csrc mstatus, t0
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  csrr t1, mstatus
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  and t0, t0, t1
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  bnez t0, 1f
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#endif
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  # If U mode is present, UXL should be 2 (XLEN = 64-bit)
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  TEST_CASE(13, a0, SSTATUS_UXL & (SSTATUS_UXL << 1), csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
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#ifdef __MACHINE_MODE
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  j 2f
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1:
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  # If U mode is not present, UXL should be 0
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  TEST_CASE(14, a0, 0, csrr a0, sstatus; li a1, SSTATUS_UXL; and a0, a0, a1)
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2:
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#endif
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#endif
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  csrwi sscratch, 3
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  TEST_CASE( 2, a0,         3, csrr a0, sscratch);
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  TEST_CASE( 3, a1,         3, csrrci a1, sscratch, 1);
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  TEST_CASE( 4, a2,         2, csrrsi a2, sscratch, 4);
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  TEST_CASE( 5, a3,         6, csrrwi a3, sscratch, 2);
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  TEST_CASE( 6, a1,         2, li a0, 0xbad1dea; csrrw a1, sscratch, a0);
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  TEST_CASE( 7, a0, 0xbad1dea, li a0, 0x0001dea; csrrc a0, sscratch, a0);
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  TEST_CASE( 8, a0, 0xbad0000, li a0, 0x000beef; csrrs a0, sscratch, a0);
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  TEST_CASE( 9, a0, 0xbadbeef, csrr a0, sscratch);
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#ifdef __MACHINE_MODE
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  # Is F extension present?
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  csrr a0, misa
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  andi a0, a0, (1 << ('F' - 'A'))
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  beqz a0, 1f
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  # If so, make sure FP stores have no effect when mstatus.FS is off.
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  li a1, MSTATUS_FS
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  csrs mstatus, a1
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#ifdef __riscv_flen
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  fmv.s.x f0, x0
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  csrc mstatus, a1
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  la a1, fsw_data
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  TEST_CASE(10, a0, 1, fsw f0, (a1); lw a0, (a1));
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#else
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  # Fail if this test is compiled without F but executed on a core with F.
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  TEST_CASE(10, zero, 1)
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#endif
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1:
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  # Figure out if 'U' is set in misa
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  csrr a0, misa   # a0 = csr(misa)
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  srli a0, a0, 20 # a0 = a0 >> 20
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  andi a0, a0, 1  # a0 = a0 & 1
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  beqz a0, finish # if no user mode, skip the rest of these checks
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#endif /* __MACHINE_MODE */
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  # jump to user land
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  li t0, SSTATUS_SPP
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  csrc sstatus, t0
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  la t0, 1f
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  csrw sepc, t0
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  sret
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  1:
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  # Make sure writing the cycle counter causes an exception.
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  # Don't run in supervisor, as we don't delegate illegal instruction traps.
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#ifdef __MACHINE_MODE
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  TEST_CASE(11, a0, 255, li a0, 255; csrrw a0, cycle, x0);
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#endif
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  # Make sure reading status in user mode causes an exception.
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  # Don't run in supervisor, as we don't delegate illegal instruction traps.
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#ifdef __MACHINE_MODE
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  TEST_CASE(12, a0, 255, li a0, 255; csrr a0, sstatus)
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#else
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  TEST_CASE(12, x0, 0, nop)
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#endif
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finish:
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  RVTEST_PASS
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  # We should only fall through to this if scall failed.
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  TEST_PASSFAIL
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  .align 2
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  .global stvec_handler
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stvec_handler:
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  # Trapping on tests 10-12 is good news.
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  # Note that since the test didn't complete, TESTNUM is smaller by 1.
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  li t0, 9
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  bltu TESTNUM, t0, 1f
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  li t0, 11
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  bleu TESTNUM, t0, privileged
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1:
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  # catch RVTEST_PASS and kick it up to M-mode
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  csrr t0, scause
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  li t1, CAUSE_USER_ECALL
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  bne t0, t1, fail
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  RVTEST_PASS
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privileged:
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  # Make sure scause indicates a lack of privilege.
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  csrr t0, scause
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  li t1, CAUSE_ILLEGAL_INSTRUCTION
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  bne t0, t1, fail
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  # Return to user mode, but skip the trapping instruction.
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  csrr t0, sepc
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  addi t0, t0, 4
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  csrw sepc, t0
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  sret
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RVTEST_CODE_END
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  .data
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fsw_data: .word 1
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RV_COMPLIANCE_DATA_BEGIN
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test_res:
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    .fill 40, 4, -1
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RV_COMPLIANCE_DATA_END
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