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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32si/] [rv64si/] [scall.S] - Blame information for rev 2

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Line No. Rev Author Line
1 2 mballance
# See LICENSE for license details.
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#*****************************************************************************
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# scall.S
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#-----------------------------------------------------------------------------
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#
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# Test syscall trap.
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#
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#include "riscv_test.h"
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#include "compliance_test.h"
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#include "compliance_io.h"
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#include "aw_test_macros.h"
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RVTEST_RV64S
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RVTEST_CODE_BEGIN
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#ifdef __MACHINE_MODE
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  #define sscratch mscratch
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  #define sstatus mstatus
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  #define scause mcause
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  #define sepc mepc
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  #define sret mret
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  #define stvec_handler mtvec_handler
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  #undef SSTATUS_SPP
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  #define SSTATUS_SPP MSTATUS_MPP
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#endif
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  li TESTNUM, 2
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  SWSIG(2, TESTNUM)
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  # This is the expected trap code.
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  li t1, CAUSE_USER_ECALL
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#ifdef __MACHINE_MODE
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  # If running in M mode, use mstatus.MPP to check existence of U mode.
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  # Otherwise, if in S mode, then U mode must exist and we don't need to check.
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  li t0, MSTATUS_MPP
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  csrc mstatus, t0
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  csrr t2, mstatus
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  and t0, t0, t2
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  beqz t0, 1f
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  # If U mode doesn't exist, mcause should indicate ECALL from M mode.
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  li t1, CAUSE_MACHINE_ECALL
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#endif
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1:
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  li t0, SSTATUS_SPP
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  csrc sstatus, t0
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  la t0, 1f
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  csrw sepc, t0
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  sret
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1:
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  li TESTNUM, 1
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  SWSIG(1, TESTNUM)
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do_scall:
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  scall
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  j fail
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  TEST_PASSFAIL
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  .align 2
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  .global stvec_handler
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stvec_handler:
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  csrr t0, scause
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  bne t0, t1, fail
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  la t2, do_scall
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  csrr t0, sepc
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  bne t0, t2, fail
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  j pass
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RVTEST_CODE_END
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  .data
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RV_COMPLIANCE_DATA_BEGIN
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test_res:
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    .fill 40, 4, -1
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RV_COMPLIANCE_DATA_END
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