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[/] [gecko3/] [trunk/] [GECKO3COM/] [gecko3com-ip/] [core/] [GECKO3COM_simple.vhd] - Blame information for rev 24

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Line No. Rev Author Line
1 22 nussgipfel
--  GECKO3COM IP Core
2
--
3
--  Copyright (C) 2009 by
4
--   ___    ___   _   _
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--  (  _ \ (  __)( ) ( )
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--  | (_) )| (   | |_| |   Bern University of Applied Sciences
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--  |  _ < |  _) |  _  |   School of Engineering and
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--  | (_) )| |   | | | |   Information Technology
9
--  (____/ (_)   (_) (_)
10
--
11
--  This program is free software: you can redistribute it and/or modify
12
--  it under the terms of the GNU General Public License as published by
13
--  the Free Software Foundation, either version 3 of the License, or
14
--  (at your option) any later version.
15
--
16
--  This program is distributed in the hope that it will be useful,
17
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
18
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19
--  GNU General Public License for more details. 
20
--  You should have received a copy of the GNU General Public License
21
--  along with this program.  If not, see <http://www.gnu.org/licenses/>.
22
--
23
--  URL to the project description: 
24
--    http://labs.ti.bfh.ch/gecko/wiki/systems/gecko3com/start
25
--------------------------------------------------------------------------------
26
--
27
--  Author:  Christoph Zimmermann
28
--  Date of creation:  16:52:52 01/28/2010 
29
--  Description:
30
--      This is the top module for the GECKO3com simple IP core.
31
--      Not the one for Xilinx EDK (with PLB bus), for processor less designs.
32
--
33
--      This core provides a simple FIFO and register interface to the
34
--      USB data transfer capabilities of the GECKO3COM/GECKO3main system.
35
--
36 23 nussgipfel
--      Look at GECKO3COM_simple.vhd for an example how to use it.
37 22 nussgipfel
--
38
--  Target Devices:     Xilinx FPGA's Spartan3 and up or Virtex4 and up.
39
--  Tool versions:      11.1
40
--
41
--------------------------------------------------------------------------------
42
 
43
library IEEE;
44
use IEEE.STD_LOGIC_1164.ALL;
45
use IEEE.STD_LOGIC_ARITH.ALL;
46
use IEEE.STD_LOGIC_UNSIGNED.ALL;
47
 
48
library work;
49
use work.GECKO3COM_defines.all;
50
 
51
 
52
entity GECKO3COM_simple is
53
  generic (
54
    BUSWIDTH : integer := 16);          -- vector size of the FIFO databusses
55
  port (
56
    i_nReset : in std_logic;
57
    i_sysclk : in std_logic;            -- FPGA System CLK
58
 
59
    i_receive_fifo_rd_en     : in  std_logic;
60
    o_receive_fifo_empty     : out std_logic;
61
    o_receive_fifo_data      : out std_logic_vector(BUSWIDTH-1 downto 0);
62
    o_receive_transfersize   : out std_logic_vector(31 downto 0);
63
    o_receive_end_of_message : out std_logic;
64
    o_receive_newdata        : out std_logic;
65
 
66
    i_send_fifo_wr_en      : in  std_logic;
67
    o_send_fifo_full       : out std_logic;
68
    i_send_fifo_data       : in  std_logic_vector(BUSWIDTH-1 downto 0);
69
    i_send_transfersize    : in  std_logic_vector(31 downto 0);
70
    i_send_transfersize_en : in  std_logic;
71 23 nussgipfel
    i_send_have_more_data  : in  std_logic;
72 22 nussgipfel
    o_send_data_request    : out std_logic;
73
    o_send_finished        : out std_logic;
74
 
75
    o_rx : out std_logic;               -- receiving data signalisation
76
    o_tx : out std_logic;               -- transmitting data signalisation
77
 
78
    -- Interface signals to the EZ-USB FX2
79
    i_IFCLK    : in    std_logic;  -- GPIF CLK (GPIF is Master and provides the clock)
80
    i_WRU      : in    std_logic;       -- write from GPIF
81
    i_RDYU     : in    std_logic;       -- GPIF is ready
82
    o_WRX      : out   std_logic;       -- To write to GPIF
83
    o_RDYX     : out   std_logic;       -- IP Core is ready
84
    b_gpif_bus : inout std_logic_vector(SIZE_DBUS_GPIF-1 downto 0)  -- bidirect data bus
85
    );
86
end GECKO3COM_simple;
87
 
88
 
89
architecture Behavioral of GECKO3COM_simple is
90
 
91
  -----------------------------------------------------------------------------
92
  -- COMPONENTS
93
  -----------------------------------------------------------------------------
94
 
95
  component gpif_com
96
    port (
97
      i_nReset   : in    std_logic;
98
      i_SYSCLK   : in    std_logic;
99
      o_ABORT    : out   std_logic;
100
      o_RX       : out   std_logic;
101
      o_TX       : out   std_logic;
102
      i_RD_EN    : in    std_logic;
103
      o_EMPTY    : out   std_logic;
104
      o_RX_DATA  : out   std_logic_vector(SIZE_DBUS_GPIF-1 downto 0);
105
      i_EOM      : in    std_logic;
106
      i_WR_EN    : in    std_logic;
107
      o_FULL     : out   std_logic;
108
      i_TX_DATA  : in    std_logic_vector(SIZE_DBUS_GPIF-1 downto 0);
109
      i_IFCLK    : in    std_logic;
110
      i_WRU      : in    std_logic;
111
      i_RDYU     : in    std_logic;
112
      o_WRX      : out   std_logic;
113
      o_RDYX     : out   std_logic;
114
      b_gpif_bus : inout std_logic_vector(SIZE_DBUS_GPIF-1 downto 0));
115
  end component;
116
 
117
  component GECKO3COM_simple_datapath
118
    generic (
119
      BUSWIDTH : integer);
120
    port (
121
      i_nReset                     : in  std_logic;
122
      i_sysclk                     : in  std_logic;
123
      i_rx_data                    : in  std_logic_vector(SIZE_DBUS_GPIF-1 downto 0);
124
      o_tx_data                    : out std_logic_vector(SIZE_DBUS_GPIF-1 downto 0);
125
      i_receive_fifo_rd_en         : in  std_logic;
126
      i_receive_fifo_wr_en         : in  std_logic;
127
      o_receive_fifo_empty         : out std_logic;
128
      o_receive_fifo_full          : out std_logic;
129
      o_receive_fifo_data          : out std_logic_vector(BUSWIDTH-1 downto 0);
130
      i_receive_fifo_reset         : in  std_logic;
131
      o_receive_transfersize       : out std_logic_vector(31 downto 0);
132
      i_receive_transfersize_en    : in  std_logic_vector((32/SIZE_DBUS_GPIF)-1 downto 0);
133
      i_receive_counter_load       : in  std_logic;
134
      i_receive_counter_en         : in  std_logic;
135
      o_receive_counter_zero       : out std_logic;
136
      o_dev_dep_msg_out            : out std_logic;
137
      o_request_dev_dep_msg_in     : out std_logic;
138
      i_btag_reg_en                : in  std_logic;
139
      i_nbtag_reg_en               : in  std_logic;
140
      o_btag_correct               : out std_logic;
141
      o_eom_bit_detected           : out std_logic;
142
      i_send_fifo_rd_en            : in  std_logic;
143
      i_send_fifo_wr_en            : in  std_logic;
144
      o_send_fifo_empty            : out std_logic;
145
      o_send_fifo_full             : out std_logic;
146
      i_send_fifo_data             : in  std_logic_vector(BUSWIDTH-1 downto 0);
147
      i_send_fifo_reset            : in  std_logic;
148
      i_send_transfersize          : in  std_logic_vector(31 downto 0);
149
      i_send_transfersize_en       : in  std_logic;
150 23 nussgipfel
      i_send_have_more_data        : in  std_logic;
151 22 nussgipfel
      i_send_counter_load          : in  std_logic;
152
      i_send_counter_en            : in  std_logic;
153
      o_send_counter_zero          : out std_logic;
154
      i_send_mux_sel               : in  std_logic_vector(2 downto 0);
155
      i_receive_newdata_set        : in  std_logic;
156
      o_receive_newdata            : out std_logic;
157
      i_receive_end_of_message_set : in  std_logic;
158
      o_receive_end_of_message     : out std_logic;
159
      i_send_data_request_set      : in  std_logic;
160
      o_send_data_request          : out std_logic);
161
  end component;
162
 
163
  component GECKO3COM_simple_fsm
164
    port (
165
      i_nReset                     : in  std_logic;
166
      i_sysclk                     : in  std_logic;
167
      o_receive_fifo_wr_en         : out std_logic;
168
      i_receive_fifo_full          : in  std_logic;
169
      o_receive_fifo_reset         : out std_logic;
170
      o_receive_transfersize_en    : out std_logic_vector((32/SIZE_DBUS_GPIF)-1 downto 0);
171
      o_receive_counter_load       : out std_logic;
172
      o_receive_counter_en         : out std_logic;
173
      i_receive_counter_zero       : in  std_logic;
174
      i_dev_dep_msg_out            : in  std_logic;
175
      i_request_dev_dep_msg_in     : in  std_logic;
176
      o_btag_reg_en                : out std_logic;
177
      o_nbtag_reg_en               : out std_logic;
178
      i_btag_correct               : in  std_logic;
179
      i_eom_bit_detected           : in  std_logic;
180
      i_send_transfersize_en       : in  std_logic;
181
      o_send_fifo_rd_en            : out std_logic;
182
      i_send_fifo_empty            : in  std_logic;
183
      o_send_fifo_reset            : out std_logic;
184
      o_send_counter_load          : out std_logic;
185
      o_send_counter_en            : out std_logic;
186
      i_send_counter_zero          : in  std_logic;
187
      o_send_mux_sel               : out std_logic_vector(2 downto 0);
188 24 nussgipfel
      o_send_finished              : out std_logic;
189 22 nussgipfel
      o_receive_newdata_set        : out std_logic;
190
      o_receive_end_of_message_set : out std_logic;
191
      o_send_data_request_set      : out std_logic;
192
      i_gpif_rx                    : in  std_logic;
193
      i_gpif_rx_empty              : in  std_logic;
194
      o_gpif_rx_rd_en              : out std_logic;
195
      i_gpif_tx                    : in  std_logic;
196
      i_gpif_tx_full               : in  std_logic;
197
      o_gpif_tx_wr_en              : out std_logic;
198
      i_gpif_abort                 : in  std_logic;
199
      o_gpif_eom                   : out std_logic);
200
  end component;
201
 
202
  -----------------------------------------------------------------------------
203
  -- interconection signals
204
  -----------------------------------------------------------------------------
205
 
206
  -- gpif_com internal signals
207
  signal s_gpif_abort           : std_logic;
208
  signal s_gpif_rx_rd_en        : std_logic;
209
  signal s_gpif_rx_empty        : std_logic;
210
  signal s_gpif_rx_data         : std_logic_vector(SIZE_DBUS_GPIF-1 downto 0);
211
  signal s_gpif_rx              : std_logic;
212
  signal s_gpif_eom             : std_logic;
213
  signal s_gpif_tx_wr_en        : std_logic;
214
  signal s_gpif_tx_full         : std_logic;
215
  signal s_gpif_tx_data         : std_logic_vector(SIZE_DBUS_GPIF-1 downto 0);
216
  signal s_gpif_tx              : std_logic;
217
 
218
  -- GECKO3COM_simple_datapath internal signals
219
  signal s_receive_fifo_wr_en      : std_logic;
220
  signal s_receive_fifo_empty      : std_logic;
221
  signal s_receive_fifo_full       : std_logic;
222
  signal s_receive_fifo_reset      : std_logic;
223
  signal s_receive_transfersize_en : std_logic_vector((32/SIZE_DBUS_GPIF)-1 downto 0);
224
  signal s_receive_counter_load    : std_logic;
225
  signal s_receive_counter_en      : std_logic;
226
  signal s_receive_counter_zero    : std_logic;
227
 
228
  signal s_dev_dep_msg_out         : std_logic;
229
  signal s_request_dev_dep_msg_in  : std_logic;
230
  signal s_btag_reg_en             : std_logic;
231
  signal s_nbtag_reg_en            : std_logic;
232
  signal s_btag_correct            : std_logic;
233
  signal s_eom_bit_detected        : std_logic;
234
 
235
  signal s_send_fifo_rd_en         : std_logic;
236
  signal s_send_fifo_empty         : std_logic;
237
  signal s_send_fifo_reset         : std_logic;
238
  signal s_send_counter_load       : std_logic;
239
  signal s_send_counter_en         : std_logic;
240
  signal s_send_counter_zero       : std_logic;
241
  signal s_send_mux_sel            : std_logic_vector(2 downto 0);
242
 
243
  signal s_receive_newdata_set        : std_logic;
244
  signal s_receive_end_of_message_set : std_logic;
245
  signal s_send_data_request_set      : std_logic;
246
 
247
begin  -- behaviour
248
 
249
  GPIF_INTERFACE: gpif_com
250
    port map (
251
      i_nReset   => i_nReset,
252
      i_SYSCLK   => i_sysclk,
253
      o_ABORT    => s_gpif_abort,
254
      o_RX       => s_gpif_rx,
255
      o_TX       => s_gpif_tx,
256
      i_RD_EN    => s_gpif_rx_rd_en,
257
      o_EMPTY    => s_gpif_rx_empty,
258
      o_RX_DATA  => s_gpif_rx_data,
259
      i_EOM      => s_gpif_eom,
260
      i_WR_EN    => s_gpif_tx_wr_en,
261
      o_FULL     => s_gpif_tx_full,
262
      i_TX_DATA  => s_gpif_tx_data,
263
      i_IFCLK    => i_IFCLK,
264
      i_WRU      => i_WRU,
265
      i_RDYU     => i_RDYU,
266
      o_WRX      => o_WRX,
267
      o_RDYX     => o_RDYX,
268
      b_gpif_bus => b_gpif_bus);
269
 
270
  o_rx <= s_gpif_rx;
271
  o_tx <= s_gpif_tx;
272
 
273
  GECKO3COM_simple_datapath_1 : GECKO3COM_simple_datapath
274
    generic map (
275
      BUSWIDTH => BUSWIDTH)
276
    port map (
277
      i_nReset                     => i_nReset,
278
      i_sysclk                     => i_sysclk,
279
      i_rx_data                    => s_gpif_rx_data,
280
      o_tx_data                    => s_gpif_tx_data,
281
      i_receive_fifo_rd_en         => i_receive_fifo_rd_en,
282
      i_receive_fifo_wr_en         => s_receive_fifo_wr_en,
283
      o_receive_fifo_empty         => s_receive_fifo_empty,
284
      o_receive_fifo_full          => s_receive_fifo_full,
285
      o_receive_fifo_data          => o_receive_fifo_data,
286
      i_receive_fifo_reset         => s_receive_fifo_reset,
287
      o_receive_transfersize       => o_receive_transfersize,
288
      i_receive_transfersize_en    => s_receive_transfersize_en,
289
      i_receive_counter_load       => s_receive_counter_load,
290
      i_receive_counter_en         => s_receive_counter_en,
291
      o_receive_counter_zero       => s_receive_counter_zero,
292
      o_dev_dep_msg_out            => s_dev_dep_msg_out,
293
      o_request_dev_dep_msg_in     => s_request_dev_dep_msg_in,
294
      i_btag_reg_en                => s_btag_reg_en,
295
      i_nbtag_reg_en               => s_nbtag_reg_en,
296
      o_btag_correct               => s_btag_correct,
297
      o_eom_bit_detected           => s_eom_bit_detected,
298
      i_send_fifo_rd_en            => s_send_fifo_rd_en,
299
      i_send_fifo_wr_en            => i_send_fifo_wr_en,
300
      o_send_fifo_empty            => s_send_fifo_empty,
301
      o_send_fifo_full             => o_send_fifo_full,
302
      i_send_fifo_data             => i_send_fifo_data,
303
      i_send_fifo_reset            => s_send_fifo_reset,
304
      i_send_transfersize          => i_send_transfersize,
305
      i_send_transfersize_en       => i_send_transfersize_en,
306 23 nussgipfel
      i_send_have_more_data        => i_send_have_more_data,
307 22 nussgipfel
      i_send_counter_load          => s_send_counter_load,
308
      i_send_counter_en            => s_send_counter_en,
309
      o_send_counter_zero          => s_send_counter_zero,
310
      i_send_mux_sel               => s_send_mux_sel,
311
      i_receive_newdata_set        => s_receive_newdata_set,
312
      o_receive_newdata            => o_receive_newdata,
313
      i_receive_end_of_message_set => s_receive_end_of_message_set,
314
      o_receive_end_of_message     => o_receive_end_of_message,
315
      i_send_data_request_set      => s_send_data_request_set,
316
      o_send_data_request          => o_send_data_request);
317
 
318
    o_receive_fifo_empty <= s_receive_fifo_empty;
319
 
320
  GECKO3COM_simple_fsm_1: GECKO3COM_simple_fsm
321
    port map (
322
      i_nReset                     => i_nReset,
323
      i_sysclk                     => i_sysclk,
324
      o_receive_fifo_wr_en         => s_receive_fifo_wr_en,
325
      i_receive_fifo_full          => s_receive_fifo_full,
326
      o_receive_fifo_reset         => s_receive_fifo_reset,
327
      o_receive_transfersize_en    => s_receive_transfersize_en,
328
      o_receive_counter_load       => s_receive_counter_load,
329
      o_receive_counter_en         => s_receive_counter_en,
330
      i_receive_counter_zero       => s_receive_counter_zero,
331
      i_dev_dep_msg_out            => s_dev_dep_msg_out,
332
      i_request_dev_dep_msg_in     => s_request_dev_dep_msg_in,
333
      o_btag_reg_en                => s_btag_reg_en,
334
      o_nbtag_reg_en               => s_nbtag_reg_en,
335
      i_btag_correct               => s_btag_correct,
336
      i_eom_bit_detected           => s_eom_bit_detected,
337
      i_send_transfersize_en       => i_send_transfersize_en,
338
      o_send_fifo_rd_en            => s_send_fifo_rd_en,
339
      i_send_fifo_empty            => s_send_fifo_empty,
340
      o_send_fifo_reset            => s_send_fifo_reset,
341
      o_send_counter_load          => s_send_counter_load,
342
      o_send_counter_en            => s_send_counter_en,
343
      i_send_counter_zero          => s_send_counter_zero,
344
      o_send_mux_sel               => s_send_mux_sel,
345 24 nussgipfel
      o_send_finished              => o_send_finished,
346 22 nussgipfel
      o_receive_newdata_set        => s_receive_newdata_set,
347
      o_receive_end_of_message_set => s_receive_end_of_message_set,
348
      o_send_data_request_set      => s_send_data_request_set,
349
      i_gpif_rx                    => s_gpif_rx,
350
      i_gpif_rx_empty              => s_gpif_rx_empty,
351
      o_gpif_rx_rd_en              => s_gpif_rx_rd_en,
352
      i_gpif_tx                    => s_gpif_tx,
353
      i_gpif_tx_full               => s_gpif_tx_full,
354
      o_gpif_tx_wr_en              => s_gpif_tx_wr_en,
355
      i_gpif_abort                 => s_gpif_abort,
356
      o_gpif_eom                   => s_gpif_eom);
357
 
358
end Behavioral;
359
 

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