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[/] [ha1588/] [trunk/] [rtl/] [bus/] [qsys/] [ha1588_avl.v] - Blame information for rev 70

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1 70 ash_riple
/*
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 * ha1588_avl.v
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 *
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 * Copyright (c) 2012, BABY&HW. All rights reserved.
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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 * MA 02110-1301  USA
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 */
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`timescale 1ns/1ns
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module ha1588_avl (
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  input         rst,clk,
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  input         wr_in,rd_in,
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  input  [ 7:0] addr_in,
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  input  [31:0] data_in,
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  output [31:0] data_out,
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  input         rtc_clk,
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  output [31:0] rtc_time_ptp_ns,
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  output [47:0] rtc_time_ptp_sec,
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  output        rtc_time_one_pps,
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  input       rx_gmii_clk,
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  input       rx_gmii_ctrl,
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  input [7:0] rx_gmii_data,
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  input       rx_giga_mode,
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  input       tx_gmii_clk,
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  input       tx_gmii_ctrl,
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  input [7:0] tx_gmii_data,
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  input       tx_giga_mode
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);
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parameter addr_is_in_word = 1;
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ha1588
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#(
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  .addr_is_in_word(addr_is_in_word)
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)
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ha1588_inst (
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  .rst(rst),
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  .clk(clk),
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  .wr_in(wr_in),
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  .rd_in(rd_in),
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  .addr_in(addr_in),
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  .data_in(data_in),
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  .data_out(data_out),
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  .rtc_clk(rtc_clk),
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  .rtc_time_ptp_ns(rtc_time_ptp_ns),
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  .rtc_time_ptp_sec(rtc_time_ptp_sec),
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  .rtc_time_one_pps(rtc_time_one_pps),
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  .rx_gmii_clk(rx_gmii_clk),
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  .rx_gmii_ctrl(rx_gmii_ctrl),
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  .rx_gmii_data(rx_gmii_data),
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  .rx_giga_mode(rx_giga_mode),
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  .tx_gmii_clk(tx_gmii_clk),
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  .tx_gmii_ctrl(tx_gmii_ctrl),
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  .tx_gmii_data(tx_gmii_data),
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  .tx_giga_mode(tx_giga_mode)
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);
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endmodule

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