| 1 |
13 |
serginhofr |
/* FPU control word bits. Mips version.
|
| 2 |
|
|
Copyright (C) 1996, 1997, 1998, 1999, 2000, 2006, 2008
|
| 3 |
|
|
Free Software Foundation, Inc.
|
| 4 |
|
|
This file is part of the GNU C Library.
|
| 5 |
|
|
Contributed by Olaf Flebbe and Ralf Baechle.
|
| 6 |
|
|
|
| 7 |
|
|
The GNU C Library is free software; you can redistribute it and/or
|
| 8 |
|
|
modify it under the terms of the GNU Lesser General Public
|
| 9 |
|
|
License as published by the Free Software Foundation; either
|
| 10 |
|
|
version 2.1 of the License, or (at your option) any later version.
|
| 11 |
|
|
|
| 12 |
|
|
The GNU C Library is distributed in the hope that it will be useful,
|
| 13 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 14 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
| 15 |
|
|
Lesser General Public License for more details.
|
| 16 |
|
|
|
| 17 |
|
|
You should have received a copy of the GNU Lesser General Public
|
| 18 |
|
|
License along with the GNU C Library; if not, write to the Free
|
| 19 |
|
|
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
|
| 20 |
|
|
02111-1307 USA. */
|
| 21 |
|
|
|
| 22 |
|
|
#ifndef _FPU_CONTROL_H
|
| 23 |
|
|
#define _FPU_CONTROL_H
|
| 24 |
|
|
|
| 25 |
|
|
#include <features.h>
|
| 26 |
|
|
|
| 27 |
|
|
#ifdef __riscv_soft_float
|
| 28 |
|
|
|
| 29 |
|
|
#define _FPU_RESERVED 0xffffffff
|
| 30 |
|
|
#define _FPU_DEFAULT 0x00000000
|
| 31 |
|
|
typedef unsigned int fpu_control_t;
|
| 32 |
|
|
#define _FPU_GETCW(cw) (cw) = 0
|
| 33 |
|
|
#define _FPU_GETROUND(cw) (cw) = 0
|
| 34 |
|
|
#define _FPU_GETFLAGS(cw) (cw) = 0
|
| 35 |
|
|
#define _FPU_SETCW(cw) do { } while (0)
|
| 36 |
|
|
#define _FPU_SETROUND(cw) do { } while (0)
|
| 37 |
|
|
#define _FPU_SETFLAGS(cw) do { } while (0)
|
| 38 |
|
|
extern fpu_control_t __fpu_control;
|
| 39 |
|
|
|
| 40 |
|
|
#else /* __riscv_soft_float */
|
| 41 |
|
|
|
| 42 |
|
|
#define _FPU_RESERVED 0
|
| 43 |
|
|
#define _FPU_DEFAULT 0
|
| 44 |
|
|
#define _FPU_IEEE _FPU_DEFAULT
|
| 45 |
|
|
|
| 46 |
|
|
/* Type of the control word. */
|
| 47 |
|
|
typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
|
| 48 |
|
|
|
| 49 |
|
|
/* Macros for accessing the hardware control word. */
|
| 50 |
|
|
#define _FPU_GETCW(cw) __asm__ volatile ("frsr %0" : "=r" (cw))
|
| 51 |
|
|
#define _FPU_GETROUND(cw) __asm__ volatile ("frrm %0" : "=r" (cw))
|
| 52 |
|
|
#define _FPU_GETFLAGS(cw) __asm__ volatile ("frflags %0" : "=r" (cw))
|
| 53 |
|
|
#define _FPU_SETCW(cw) __asm__ volatile ("fssr %z0" : : "rJ" (cw))
|
| 54 |
|
|
#define _FPU_SETROUND(cw) __asm__ volatile ("fsrm %z0" : : "rJ" (cw))
|
| 55 |
|
|
#define _FPU_SETFLAGS(cw) __asm__ volatile ("fsflags %z0" : : "rJ" (cw))
|
| 56 |
|
|
|
| 57 |
|
|
/* Default control word set at startup. */
|
| 58 |
|
|
extern fpu_control_t __fpu_control;
|
| 59 |
|
|
|
| 60 |
|
|
#define _FCLASS(x) ({ int res; \
|
| 61 |
|
|
if (sizeof(x) == 4) asm ("fclass.s %0, %1" : "=r"(res) : "f"(x)); \
|
| 62 |
|
|
else if (sizeof(x) == 8) asm ("fclass.d %0, %1" : "=r"(res) : "f"(x)); \
|
| 63 |
|
|
else abort(); \
|
| 64 |
|
|
res; })
|
| 65 |
|
|
|
| 66 |
|
|
#define _FCLASS_MINF (1<<0)
|
| 67 |
|
|
#define _FCLASS_MNORM (1<<1)
|
| 68 |
|
|
#define _FCLASS_MSUBNORM (1<<2)
|
| 69 |
|
|
#define _FCLASS_MZERO (1<<3)
|
| 70 |
|
|
#define _FCLASS_PZERO (1<<4)
|
| 71 |
|
|
#define _FCLASS_PSUBNORM (1<<5)
|
| 72 |
|
|
#define _FCLASS_PNORM (1<<6)
|
| 73 |
|
|
#define _FCLASS_PINF (1<<7)
|
| 74 |
|
|
#define _FCLASS_SNAN (1<<8)
|
| 75 |
|
|
#define _FCLASS_QNAN (1<<9)
|
| 76 |
|
|
#define _FCLASS_ZERO (_FCLASS_MZERO | _FCLASS_PZERO)
|
| 77 |
|
|
#define _FCLASS_SUBNORM (_FCLASS_MSUBNORM | _FCLASS_PSUBNORM)
|
| 78 |
|
|
#define _FCLASS_NORM (_FCLASS_MNORM | _FCLASS_PNORM)
|
| 79 |
|
|
#define _FCLASS_INF (_FCLASS_MINF | _FCLASS_PINF)
|
| 80 |
|
|
#define _FCLASS_NAN (_FCLASS_SNAN | _FCLASS_QNAN)
|
| 81 |
|
|
|
| 82 |
|
|
#endif /* __riscv_soft_float */
|
| 83 |
|
|
|
| 84 |
|
|
#endif /* fpu_control.h */
|