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[/] [hight/] [trunk/] [testbench/] [tb_RF.v] - Blame information for rev 2

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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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////  Testbench of round function module for HIGHT Crypto Core    ////
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////                                                              ////
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////  This file is part of the HIGHT Crypto Core project          ////
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////  http://github.com/OpenSoCPlus/hight_crypto_core             ////
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////  http://www.opencores.org/project,hight                      ////
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////                                                              ////
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////  Description                                                 ////
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////  __description__                                             ////
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////                                                              ////
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////  Author(s):                                                  ////
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////      - JoonSoo Ha, json.ha@gmail.com                         ////
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////      - Younjoo Kim, younjookim.kr@gmail.com                  ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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////                                                              ////
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//// Copyright (C) 2015 Authors, OpenSoCPlus and OPENCORES.ORG    ////
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////                                                              ////
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//// This source file may be used and distributed without         ////
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//// restriction provided that this copyright statement is not    ////
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//// removed from the file and that any derivative work contains  ////
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//// the original copyright notice and the associated disclaimer. ////
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////                                                              ////
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//// This source file is free software; you can redistribute it   ////
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//// and/or modify it under the terms of the GNU Lesser General   ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any   ////
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//// later version.                                               ////
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////                                                              ////
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//// This source is distributed in the hope that it will be       ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
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//// PURPOSE.  See the GNU Lesser General Public License for more ////
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//// details.                                                     ////
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////                                                              ////
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//// You should have received a copy of the GNU Lesser General    ////
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//// Public License along with this source; if not, download it   ////
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//// from http://www.opencores.org/lgpl.shtml                     ////
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////                                                              ////
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//////////////////////////////////////////////////////////////////////
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`timescale 1ns/1ps
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module tb_RF;
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//=====================================
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//
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//          PARAMETERS 
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//
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//=====================================
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//=====================================
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//
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//          I/O PORTS 
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//
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//=====================================
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reg        i_op           ;
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reg[31:0]  i_rsk          ;
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reg[63:0]  i_rf_in        ;
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reg        i_rf_final     ;
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wire[63:0] o_rf_out       ;
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//=====================================
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//
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//          PORT MAPPING
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//
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//=====================================
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// uud0
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RF uut0_RF(
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   .i_op      (i_op      ),
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   .i_rsk     (i_rsk     ),
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   .i_rf_in   (i_rf_in   ),
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   .i_rf_final(i_rf_final),
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   .o_rf_out  (o_rf_out  )
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);
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//=====================================
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//
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//          STIMULUS
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//
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//=====================================
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// stimulus
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integer i;
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initial begin
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95
 
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        $display("============== TEST VECTORS 1 ==============");
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// encryption & inter 
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        i_op = 1'b0;
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    i_rf_final = 1'b0;
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        i_rf_in = 64'h0000001100220033;
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        i_rsk = 32'he7135b59;
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103
        #50;
104
 
105
        $display("Encryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h00ce1138223f33e7) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
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110
// encryption & final 
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        i_op = 1'b0;
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        i_rf_final = 1'b1;
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        i_rf_in = 64'h5d3846d148a1def3;
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        i_rsk = 32'hd1357c79;
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116
        #50;
117
 
118
        $display("Encryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h003818d1d9a103f3) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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122
        #50;
123
 
124
// decryption & inter 
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        i_op = 1'b1;
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        i_rf_final = 1'b0;
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        i_rf_in = 64'h003818d1d9a103f3;
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        i_rsk = 32'h797c35d1;
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130
        #50;
131
 
132
        $display("decryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'hf35d3846d148a1de)? "Correct" :
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                                                                                     "Wrong", o_rf_out );
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        #50;
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// decryption & final 
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        i_op = 1'b1;
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        i_rf_final = 1'b1;
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        i_rf_in = 64'he700ce1138223f33;
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        i_rsk = 32'h595b13e7;
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143
        #50;
144
 
145
        $display("decryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                                             i_rf_in, i_rsk, (o_rf_out == 64'h0000001100220033) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
149
 
150
        $display("============== TEST VECTORS 2 ==============");
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// encryption & inter 
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        i_op = 1'b0;
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    i_rf_final = 1'b0;
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        i_rf_in = 64'h00ee222144886643;
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        i_rsk = 32'h4e587e5a;
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157
        #50;
158
 
159
        $display("Encryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'hee2d21b1880a435f) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
163
 
164
// encryption & final 
165
        i_op = 1'b0;
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        i_rf_final = 1'b1;
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        i_rf_in = 64'hf7fdf850f8529dd8;
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        i_rsk = 32'he2345934;
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170
        #50;
171
 
172
        $display("Encryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h23fd9f50e552e6d8) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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176
        #50;
177
 
178
// decryption & inter 
179
        i_op = 1'b1;
180
        i_rf_final = 1'b0;
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        i_rf_in = 64'h23fd9f50e552e6d8;
182
        i_rsk = 32'h345934e2;
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184
        #50;
185
 
186
        $display("decryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'hd8f7fdf850f8529d)? "Correct" :
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                                                                                     "Wrong", o_rf_out );
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        #50;
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191
// decryption & final 
192
        i_op = 1'b1;
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        i_rf_final = 1'b1;
194
        i_rf_in = 64'h5fee2d21b1880a43;
195
        i_rsk = 32'h5a7e584e;
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197
        #50;
198
 
199
        $display("decryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                                             i_rf_in, i_rsk, (o_rf_out == 64'h00ee222144886643) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
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204
        $display("============== TEST VECTORS 3 ==============");
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// encryption & inter 
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        i_op = 1'b0;
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    i_rf_final = 1'b0;
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        i_rf_in = 64'h0123456889a9cdf2;
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        i_rsk = 32'h27437b69;
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        #50;
212
 
213
        $display("Encryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h23e16815a93af283) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
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// encryption & final 
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        i_op = 1'b0;
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        i_rf_final = 1'b1;
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        i_rf_in = 64'h21630d95692db157;
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        i_rsk = 32'h61356c59;
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224
        #50;
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226
        $display("Encryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h7a63b2958d2df457) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
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// decryption & inter 
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        i_op = 1'b1;
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        i_rf_final = 1'b0;
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        i_rf_in = 64'h7a63b2958d2df457;
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        i_rsk = 32'h596c3561;
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        #50;
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240
        $display("decryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h5721630d95692db1)? "Correct" :
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                                                                                     "Wrong", o_rf_out );
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        #50;
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// decryption & final 
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        i_op = 1'b1;
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        i_rf_final = 1'b1;
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        i_rf_in = 64'h8323e16815a93af2;
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        i_rsk = 32'h697b4327;
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251
        #50;
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253
        $display("decryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                                             i_rf_in, i_rsk, (o_rf_out == 64'h0123456889a9cdf2) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
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        $display("============== TEST VECTORS 4 ==============");
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// encryption & inter 
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        i_op = 1'b0;
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    i_rf_final = 1'b0;
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        i_rf_in = 64'hb4366bbdeb6b4ad0;
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        i_rsk = 32'h38789841;
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265
        #50;
266
 
267
        $display("Encryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
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                                 i_rf_in, i_rsk, (o_rf_out == 64'h368cbd8d6b48d053) ? "Correct" :
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                                                                                      "Wrong", o_rf_out );
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        #50;
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// encryption & final 
273
        i_op = 1'b0;
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        i_rf_final = 1'b1;
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        i_rf_in = 64'h7d193f3390b731df;
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        i_rsk = 32'hd75d461a;
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278
        #50;
279
 
280
        $display("Encryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
281
                                 i_rf_in, i_rsk, (o_rf_out == 64'hcc197a3320b71fdf) ? "Correct" :
282
                                                                                      "Wrong", o_rf_out );
283
 
284
        #50;
285
 
286
// decryption & inter 
287
        i_op = 1'b1;
288
        i_rf_final = 1'b0;
289
        i_rf_in = 64'hcc197a3320b71fdf;
290
        i_rsk = 32'h1a465dd7;
291
 
292
        #50;
293
 
294
        $display("decryption&inter : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
295
                                 i_rf_in, i_rsk, (o_rf_out == 64'hdf7d193f3390b731)? "Correct" :
296
                                                                                     "Wrong", o_rf_out );
297
        #50;
298
 
299
// decryption & final 
300
        i_op = 1'b1;
301
        i_rf_final = 1'b1;
302
        i_rf_in = 64'h53368cbd8d6b48d0;
303
        i_rsk = 32'h41987838;
304
 
305
        #50;
306
 
307
        $display("decryption&final : i_rf_in = %16h , i_rsk = %8h o_rf_out : (%s) = %16h",
308
                                                             i_rf_in, i_rsk, (o_rf_out == 64'hb4366bbdeb6b4ad0) ? "Correct" :
309
                                                                                      "Wrong", o_rf_out );
310
        #50;
311
 
312
        $finish;
313
 
314
end
315
 
316
 
317
// vcd dump
318
initial begin
319
        $dumpfile("dump/sim_tb_RF.vcd");
320
        $dumpvars(0, tb_RF);
321
end
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endmodule
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