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[/] [hive/] [trunk/] [v04.05/] [boot_code/] [boot_code_v_stacks.h] - Blame information for rev 4

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1 4 ericw 
/*
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--------------------------------------------------------------------------------
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Module : boot_code.h
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--------------------------------------------------------------------------------
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8 
Function:
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- Boot code for a processor core.
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11 
Instantiates:
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- Nothing.
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14 
Notes:
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- For testing (@ core.v):
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  CLR_BASE              = 'h0;
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  CLR_SPAN              = 2;  // gives 4 instructions
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  INTR_BASE             = 'h20;  // 'd32
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  INTR_SPAN             = 2;  // gives 4 instructions
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--------------------------------------------------------------------------------
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*/
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        /*
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        --------------------
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        -- external stuff --
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        --------------------
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        */
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        `include "op_encode.h"
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        `include "reg_set_addr.h"
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        `include "boot_code_defs.h"
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        /*
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        ----------------------------------------
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        -- initialize: fill with default data --
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        ----------------------------------------
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        */
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        integer i;
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        initial begin
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/*      // fill with nop (some compilers need this)
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        for ( i = 0; i < CAPACITY; i = i+1 ) begin
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                ram[i] = { `nop, `__, `__ };
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        end
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*/
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        /*
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        ---------------
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        -- boot code --
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        ---------------
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        */
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        // Thread 0 : test stack 1 for depth and error reporting
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        // All other threads : loop forever
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        ///////////////
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        // clr space //
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        ///////////////
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        // thread 0
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        i='h0;   ram[i] = { `lit_u,            `__, `s2 };  // s2='h0100
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        i=i+1;   ram[i] =                      16'h0100  ;  //
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        i=i+1;   ram[i] = { `gto,              `P2, `__ };  // goto, pop s2 (addr)
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        // and the rest
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        i='h04;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h08;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h0c;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h10;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h14;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h18;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        i='h1c;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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        ////////////////
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        // intr space //
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        ////////////////
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        ///////////////////////
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        // code & data space //
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        ///////////////////////
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        // test s1 for correct stack depth and error reporting, result in s0
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        // Correct functioning is s0 = 'd7 ('h7).
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        //
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        // s0 : final test result
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        // s1 : test stack
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        // s2 : sub addr
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        // s3 : running test result, subroutine return address
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        //
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        // setup running test result:
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        i='h100; ram[i] = { `dat_is,          6'd0, `s7 };  // s7=0
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        // check for no stack errors
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0910  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `jmp_iz,          6'd1, `P4 };  // (s4==0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3-- (Y)
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // fill s1
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0940  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        // check for push error
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0910  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `psu_i,          -6'd8, `P4 };  // s4>>=8
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        i=i+1;   ram[i] = { `jmp_iz,          6'd1, `P4 };  // (s4==0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3--
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // pop&push s/b OK
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        i=i+1;   ram[i] = { `add_is,          6'd0, `P1 };  // s1=s1
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        // check for no stack errors
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0910  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `jmp_iz,          6'd1, `P4 };  // (s4==0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3--
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // s/b one push over the line
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        i=i+1;   ram[i] = { `add_is,          6'd0, `s1 };  // s1=>s1
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        // check for a push error
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0910  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `psu_i,          -6'd8, `P4 };  // s4>>=8
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        i=i+1;   ram[i] = { `jmp_inz,         6'd1, `P4 };  // (s4!=0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3--
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // empty s1
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0950  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        // check for no stack errors
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0910  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `jmp_iz,          6'd1, `P4 };  // (s4==0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3--
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // s/b one pop under the line
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        i=i+1;   ram[i] = { `pop,           8'b00000010 };  // pop s1
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        // check for a pop error
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        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
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        i=i+1;   ram[i] =                      16'h0910  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `shl_is,         6'd24, `P4 };  // s4<<=24
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        i=i+1;   ram[i] = { `jmp_inz,         6'd1, `P4 };  // (s4!=0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3--
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // check for no opcode errors
156 
        i=i+1;   ram[i] = { `lit_u,            `__, `s7 };  // s7=addr
157 
        i=i+1;   ram[i] =                      16'h0900  ;  // addr
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        i=i+1;   ram[i] = { `gsb,              `P7, `s7 };  // gsb, pop s7 (addr), return to s7
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        i=i+1;   ram[i] = { `jmp_iz,          6'd1, `P4 };  // (s4==0) ? skip, pop s4
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        i=i+1;   ram[i] = { `add_is,         -6'd1, `P3 };  // s3--
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        i=i+1;   ram[i] = { `add_is,          6'd1, `P3 };  // s3++
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        // copy result to s0
163 
        i=i+1;   ram[i] = { `cpy,              `P3, `s0 };  // s0=s3, pop s3
164 
        // loop forever
165 
        i=i+1;   ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
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168 
 
169 
        /////////////////
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        // subroutines //
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        /////////////////
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174 
        // sub : read & clear opcode errors for this thread => s4, return to (s7)
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        // avoid the use of s1!
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        i='h900; ram[i] = { `dat_is,      `THRD_ID, `s6 };  // s6=reg addr
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        i=i+1;   ram[i] = { `reg_rs,           `P6, `s5 };  // s5=(s6), pop s6
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        i=i+1;   ram[i] = { `pow,              `P5, `s4 };  // s4=1<<s5, pop s5
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        i=i+1;   ram[i] = { `dat_is,        `OP_ER, `s6 };  // s6=reg addr
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        i=i+1;   ram[i] = { `reg_rs,           `s6, `s5 };  // s5=(s6)
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        i=i+1;   ram[i] = { `and,              `P5, `P4 };  // s4&=s5, pop s5
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        i=i+1;   ram[i] = { `reg_w,            `P6, `s4 };  // (s6)=s4, pop s6
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        i=i+1;   ram[i] = { `gto,              `P7, `__ };  // return to (s7), pop s7
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        // sub : read & clear stack errors for this thread => s4, return to (s7)
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        // avoid the use of s1!
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        i='h910; ram[i] = { `dat_is,      `THRD_ID, `s6 };  // s6=reg addr
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        i=i+1;   ram[i] = { `reg_rs,           `P6, `s5 };  // s5=(s6), pop s6
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        i=i+1;   ram[i] = { `pow,              `P5, `s4 };  // s4=1<<s5, pop s5
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        i=i+1;   ram[i] = { `cpy,              `s4, `s5 };  // s5=s4
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        i=i+1;   ram[i] = { `shl_is,          6'd8, `P5 };  // s5<<=8
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        i=i+1;   ram[i] = { `orr,              `P5, `P4 };  // s4|=s5, pop s5
194 
        i=i+1;   ram[i] = { `dat_is,       `STK_ER, `s6 };  // s6=reg addr
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        i=i+1;   ram[i] = { `reg_rs,           `s6, `s5 };  // s5=(s6)
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        i=i+1;   ram[i] = { `and,              `P5, `P4 };  // s4&=s5, pop s5
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        i=i+1;   ram[i] = { `reg_w,            `P6, `s4 };  // (s6)=s4, pop s6
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        i=i+1;   ram[i] = { `gto,              `P7, `__ };  // return to (s7), pop s7
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201 
        // sub : read 32 bit GPIO => s0, return to (s7)
202 
        i='h920; ram[i] = { `dat_is,        `IO_LO, `s3 };  // s3=reg addr
203 
        i=i+1;   ram[i] = { `reg_rs,           `P3, `s0 };  // s0=(s3), pop s3
204 
        i=i+1;   ram[i] = { `dat_is,        `IO_HI, `s3 };  // s3=reg addr
205 
        i=i+1;   ram[i] = { `reg_rh,           `P3, `P0 };  // s0=(s3), pop both
206 
        i=i+1;   ram[i] = { `gto,              `P7, `__ };  // return, pop s7
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209 
        // sub : write s0 => 32 bit GPIO, return to (s7)
210 
        i='h930; ram[i] = { `dat_is,        `IO_LO, `s3 };  // s3=reg addr
211 
        i=i+1;   ram[i] = { `reg_w,            `P3, `s0 };  // (s3)=s0, pop s3
212 
        i=i+1;   ram[i] = { `dat_is,        `IO_HI, `s3 };  // s3=reg addr
213 
        i=i+1;   ram[i] = { `reg_wh,           `P3, `s0 };  // (s3)=s0, pop s3
214 
        i=i+1;   ram[i] = { `gto,              `P7, `__ };  // return, pop s7
215 
 
216 
 
217 
        // sub : push 32x to s1, return to (s7)
218 
        // loop setup:
219 
        i='h940; ram[i] = { `dat_is,         6'd31, `s1 };  // s1=31  // first push (& loop index)
220 
        // loop
221 
        i=i+1;   ram[i] = { `add_is,         -6'd1, `s1 };  // s1=s1-1
222 
        i=i+1;   ram[i] = { `jmp_inz,        -6'd2, `s1 };  // (s1!=0) ? do again
223 
        i=i+1;   ram[i] = { `gto,              `P7, `__ };  // return, pop s7
224 
 
225 
 
226 
        // sub : pop 32x from s1, return to (s7)
227 
        // loop setup:
228 
        i='h950; ram[i] = { `dat_is,         6'd31, `s2 };  // s2=31
229 
        // loop
230 
        i=i+1;   ram[i] = { `pop,           8'b00000010 };  // pop s1
231 
        i=i+1;   ram[i] = { `add_is,         -6'd1, `P2 };  // s2--
232 
        i=i+1;   ram[i] = { `jmp_inlz,       -6'd3, `s2 };  // (s2>=0) ? do again
233 
        i=i+1;   ram[i] = { `gto,              `P7, `P2 };  // return, pop s7 & s2
234 
 
235 
 
236 
        end

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