OpenCores
URL https://opencores.org/ocsvn/hive/hive/trunk

Subversion Repositories hive

[/] [hive/] [trunk/] [v04.05/] [boot_code.h] - Blame information for rev 4

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 ericw
/*
2
--------------------------------------------------------------------------------
3
 
4
Module : boot_code.h
5
 
6
--------------------------------------------------------------------------------
7
 
8
Function:
9
- Boot code for a processor core.
10
 
11
Instantiates:
12
- Nothing.
13
 
14
Notes:
15
- For testing (@ core.v):
16
  CLR_BASE              = 'h0;
17
  CLR_SPAN              = 2;  // gives 4 instructions
18
  INTR_BASE             = 'h20;  // 'd32
19
  INTR_SPAN             = 2;  // gives 4 instructions
20
 
21
 
22
--------------------------------------------------------------------------------
23
*/
24
 
25
        /*
26
        --------------------
27
        -- external stuff --
28
        --------------------
29
        */
30
        `include "boot_code_defs.h"
31
 
32
        /*
33
        ----------------------------------------
34
        -- initialize: fill with default data --
35
        ----------------------------------------
36
        */
37
        integer i;
38
 
39
        initial begin
40
 
41
/*      // fill with nop (some compilers need this)
42
        for ( i = 0; i < CAPACITY; i = i+1 ) begin
43
                ram[i] = { `nop, `__, `__ };
44
        end
45
*/
46
 
47
        /*
48
        ---------------
49
        -- boot code --
50
        ---------------
51
        */
52
 
53
 
54
        // Thread 0 : do LED PWM action
55
        // All other threads : loop forever
56
 
57
        ///////////////
58
        // clr space //
59
        ///////////////
60
 
61
        // thread 0
62
        i='h00;  ram[i] = { `lit_u,            `__, `s2 };  // s2=dat
63
        i=i+1;   ram[i] =                      16'h0100  ;  // addr
64
        i=i+1;   ram[i] = { `gto,              `P2, `__ };  // goto, pop s2 (addr)
65
        // and the rest
66
        i='h04;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
67
        i='h08;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
68
        i='h0c;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
69
        i='h10;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
70
        i='h14;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
71
        i='h18;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
72
        i='h1c;  ram[i] = { `jmp_ie,    -4'd1, `s0, `s0 };  // loop forever
73
 
74
        ////////////////
75
        // intr space //
76
        ////////////////
77
 
78
        ///////////////////////
79
        // code & data space //
80
        ///////////////////////
81
 
82
/*
83
        // simple binary count LED display
84
        i='h100; ram[i] = { `dat_is,          6'd0, `s0 };  // s0=0
85
        i=i+1;   ram[i] = { `dat_is,        `IO_LO, `s1 };  // s1=reg addr
86
        // loop start
87
        i=i+1;   ram[i] = { `add_is,          6'd1, `P0 };  // s0++
88
        i=i+1;   ram[i] = { `psu_i,         -6'd20, `s0 };  // s0=s0>>20
89
        i=i+1;   ram[i] = { `reg_w,            `s1, `P0 };  // (s1)=s0, pop s0
90
        i=i+1;   ram[i] = { `jmp_ie,    -4'd4, `s0, `s0 };  // loop forever
91
        // loop end
92
*/
93
 
94
/*
95
        // simple sequential LED display
96
        i='h100; ram[i] = { `dat_is,          6'd0, `s0 };  // s0=0
97
        i=i+1;   ram[i] = { `dat_is,        `IO_LO, `s1 };  // s1=reg addr
98
        // loop start
99
        i=i+1;   ram[i] = { `add_is,          6'd1, `P0 };  // s0++
100
        i=i+1;   ram[i] = { `shl_is,         6'd10, `s0 };  // s0=s0<<10
101
        i=i+1;   ram[i] = { `psu_i,         -6'd30, `P0 };  // s0=s0>>30, pop s0
102
        i=i+1;   ram[i] = { `pow,              `P0, `s0 };  // s0=1<<s0, pop s0
103
        i=i+1;   ram[i] = { `reg_w,            `s1, `P0 };  // (s1)=s0, pop s0
104
        i=i+1;   ram[i] = { `jmp_ie,    -4'd6, `s0, `s0 };  // loop forever
105
        // loop end
106
*/
107
 
108
/*
109
        // sequential LED display w/ PWM - moving "dark spot"
110
        i='h100; ram[i] = { `dat_is,          6'd0, `s0 };  // s0=0
111
        i=i+1;   ram[i] = { `dat_is,        `IO_LO, `s1 };  // s1=reg addr
112
        i=i+1;   ram[i] = { `dat_is,          6'd0, `s2 };  // s2=pwm
113
        // loop start
114
        i=i+1;   ram[i] = { `shl_is,         6'd13, `s0 };  // s0=s0<<13 - isolate decimal
115
        i=i+1;   ram[i] = { `add,              `P0, `P2 };  // s2+=s0, pop s0 - add to pwm counter
116
        i=i+1;   ram[i] = { `add_is,          6'd1, `P0 };  // s0++ - get next value
117
        i=i+1;   ram[i] = { `shl_is,         6'd13, `s0 };  // s0=s0<<13 - isolate decimal
118
        i=i+1;   ram[i] = { `add_xu,           `P0, `s2 };  // s2=s2+s0, pop s0 - see if it will cause pwm counter overflow
119
        i=i+1;   ram[i] = { `shl_is,         6'd19, `P2 };  // s2<<=19 - shift up to ones place
120
        i=i+1;   ram[i] = { `add,              `P2, `s0 };  // s0+=s2, pop s2 - add pwm bit
121
        i=i+1;   ram[i] = { `shl_is,         6'd11, `P0 };  // s0<<=11 - isolate integer
122
        i=i+1;   ram[i] = { `psu_i,         -6'd30, `P0 };  // s0>>=30
123
        i=i+1;   ram[i] = { `pow,              `s0, `P0 };  // s0=1<<s0, pop s0 - do one hot
124
        i=i+1;   ram[i] = { `not,              `s0, `P0 };  // s0~=s0 - invert
125
        i=i+1;   ram[i] = { `reg_w,            `s1, `P0 };  // (s1)=s0, pop s0
126
        i=i+1;   ram[i] = { `jmp_inz,       -6'd13, `s1 };  // loop forever
127
        // loop end
128
*/
129
 
130
        // "bouncing ball" 4 LED display w/ PWM
131
        //
132
        // s0 : sin
133
        // s1 : cos
134
        // s2 : alpha (attenuation factor = speed)
135
        // s3 : rectified sin, val, one-hot(val)
136
        // s4 : 
137
        // s5 : pwm counter
138
        // s6 : 
139
        // s7 : i/o register address
140
 
141
        i='h100; ram[i] = { `dat_is,          6'd0, `s0 };  // s0=0  (sin init)
142
        i=i+1;   ram[i] = { `lit_u,            `__, `s1 };  // s1=0x3000,0000 (cos init)
143
        i=i+1;   ram[i] =                      16'h3000  ;  //
144
        i=i+1;   ram[i] = { `shl_is,         6'd16, `P1 };  //
145
        i=i+1;   ram[i] = { `lit_u,            `__, `s2 };  // s2=0x3000 (alpha init)
146
        i=i+1;   ram[i] =                      16'h3000  ;  //
147
        i=i+1;   ram[i] = { `dat_is,          6'd0, `s5 };  // s5=0  (pwm init)
148
        i=i+1;   ram[i] = { `dat_is,        `IO_LO, `s7 };  // s7=reg addr
149
        // loop start
150
        // sin & cos
151
        i=i+1;   ram[i] = { `mul_xs,           `s2, `s0 };  // s0=s0*s2 (sin*alpha)
152
        i=i+1;   ram[i] = { `sub,              `P0, `P1 };  // s1-=s0 (cos-=sin*alpha)
153
        i=i+1;   ram[i] = { `mul_xs,           `s2, `s1 };  // s1=s1*s2 (cos*alpha)
154
        i=i+1;   ram[i] = { `add,              `P1, `P0 };  // s0-=s1 (sin+=cos*alpha)
155
        // |sin|
156
        i=i+1;   ram[i] = { `cpy,              `s0, `s3 };  // s3=s0
157
        i=i+1;   ram[i] = { `jmp_inlz,        6'd1, `s3 };  // (s3!<0) ? jmp +1
158
        i=i+1;   ram[i] = { `not,              `s3, `P3 };  // s3~=s3
159
        // decimal( |sin| ) + pwm to update, + pwm to get ofl
160
        i=i+1;   ram[i] = { `shl_is,          6'd4, `s3 };  // s3=s3<<4
161
        i=i+1;   ram[i] = { `add,              `s3, `P5 };  // s5+=s3 (update pwm count)
162
        i=i+1;   ram[i] = { `add_xu,           `P3, `s5 };  // s5=s5+s3, pop s3 (get pwm ofl)
163
        // one-hot( int( |sin| ) + pwm ofl )
164
        i=i+1;   ram[i] = { `shl_is,        -6'd28, `P3 };  // s3>>=28
165
        i=i+1;   ram[i] = { `add,              `P5, `P3 };  // s3+=s5, pop s5 (add pwm ofl)
166
        i=i+1;   ram[i] = { `pow,              `s3, `P3 };  // s3=1<<s3, pop s3 (one-hot)
167
        // output
168
        i=i+1;   ram[i] = { `reg_w,            `s7, `P3 };  // (s7)=s3, pop s3
169
        i=i+1;   ram[i] = { `jmp_inz,       -6'd15, `s7 };  // loop forever
170
        // loop end
171
 
172
        end

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.