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[/] [hssdrc/] [trunk/] [readme.txt] - Blame information for rev 3

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Logical project decsription
 
core      - external not under development IP cores
doc       - project documentation
include   - common rtl, testbench header files
rtl       - rtl models of project units
sim       - simulation scripts for verivication
testbench - verification enviroment for project

Line No.	Rev	Author	Line
1	2	des00	`Logical project decsription`
2
3			`core - external not under development IP cores`
4			`doc - project documentation`
5			`include - common rtl, testbench header files`
6			`rtl - rtl models of project units`
7			`sim - simulation scripts for verivication`
8			`testbench - verification enviroment for project`

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[/] [hssdrc/] [trunk/] [readme.txt] - Blame information for rev 3