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[/] [ic6821/] [web_uploads/] [VHDL6821.vhd] - Blame information for rev 6

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1 6 root 
Library ieee;
2 
use ieee.std_logic_1164.all;
3 
 
4 
 
5 
ENTITY IC6821 IS
6 
--      GENERIC ();
7 
        PORT
8 
        (
9 
                r_w: in std_logic;
10 
                e: in std_logic;
11 
--              dbg: out std_logic_vector(7 downto 0);
12 
 
13 
                cs0: in std_logic;
14 
                cs1: in std_logic;
15 
                cs2: in std_logic;  -- active low
16 
                reset: in std_logic;  -- active low
17 
                RS0: in std_logic;
18 
                RS1: in std_logic;
19 
                CA1: in std_logic;
20 
                CA2: inout std_logic;
21 
                CB1: in std_logic;
22 
                CB2: inout std_logic;
23 
                DB: inout std_logic_vector(7 downto 0);
24 
                PA: inout std_logic_vector(7 downto 0);
25 
                PB: inout std_logic_vector(7 downto 0);
26 
                irqa: out std_logic;  -- active low
27 
                irqb: out std_logic   -- active low
28 
        );
29 
END IC6821;
30 
 
31 
-------------------------------------------------
32 
-------------------------------------------------
33 
 
34 
ARCHITECTURE bhv1 OF IC6821 IS
35 
------------------------
36 
COMPONENT DFF
37 
   PORT (d   : IN STD_LOGIC;
38 
        clk  : IN STD_LOGIC;
39 
        clrn : IN STD_LOGIC;
40 
        prn  : IN STD_LOGIC;
41 
        q    : OUT STD_LOGIC );
42 
END COMPONENT;
43 
COMPONENT LATCH
44 
   PORT (d  : IN STD_LOGIC;
45 
      ena: IN STD_LOGIC;
46 
      q  : OUT STD_LOGIC);
47 
END COMPONENT;
48 
COMPONENT TFF
49 
   PORT (t   : IN STD_LOGIC;
50 
      clk : IN STD_LOGIC;
51 
      clrn: IN STD_LOGIC;
52 
      prn : IN STD_LOGIC;
53 
      q   : OUT STD_LOGIC);
54 
END COMPONENT;
55 
 
56 
 
57 
-----------------------
58 
        SIGNAL bufPA,DDRAbits,CRA : STD_LOGIC_VECTOR(7 downto 0);
59 
        SIGNAL bufPB,DDRBbits,CRB : STD_LOGIC_VECTOR(7 downto 0);
60 
        SIGNAL CRA2, CRB2, iCS: STD_LOGIC;
61 
        SIGNAL irqaf1_1, irqaf1_2, irqaf2_1, irqaf2_2,
62 
                   irqbf1_1, irqbf1_2, irqbf2_1, irqbf2_2,
63 
                   prev_readA, mpu_readA,
64 
                   prev_writeB, mpu_readB: STD_LOGIC;
65 
        SIGNAL disbla1, disbla2: std_logic;
66 
        SIGNAL disblb1, disblb2: std_logic;
67 
 
68 
        SIGNAL edly: std_logic_vector(7 downto 0);
69 
 
70 
        SIGNAL DB_PA,DB_DDRA,DB_CRA, DB_PB,DB_DDRB,DB_CRB: std_logic_vector(7 downto 0);
71 
BEGIN
72 
  iCS<= CS0 and CS1 and (not CS2);
73 
---------  peripheral register A
74 
bufPAprcs:
75 
PROCESS (E, RS0, RS1, CRA2, CRB2, DDRAbits,reset,iCS, DB, PA,r_w)
76 
BEGIN
77 
        if reset='0' then bufPA<=(others=>'0');
78 
        elsif RS0='0' and RS1='0' and CRA2='1' and r_w='0' and iCS='1' then
79 
        FOR i IN 0 to 7 LOOP
80 
     if DDRAbits(i)='1' then   --- the pin acts like an output
81 
                if e'event and  e='0' then       bufPA(i)<=DB(i); end if;
82 
     elsif DDRAbits(i)='0' then   --- the pin acts like an input
83 
                if e'event and  e='0' then       bufPA(i)<=bufPA(i); end if;
84 
         end if;
85 
        END LOOP;
86 
 
87 
        elsif RS0='0' and RS1='0' and CRA2='1' and r_w='1' and iCS='1' then
88 
        FOR i IN 0 to 7 LOOP
89 
     if DDRAbits(i)='1' then   --- the pin acts like an output
90 
                if e'event and  e='1' then      DB_PA(i)<=bufPA(i);  end if;
91 
     elsif DDRAbits(i)='0' then   --- the pin acts like an input
92 
                if e'event and  e='1' then      bufPA(i)<=PA(i); DB_PA(i)<=PA(i); end if;
93 
         end if;
94 
        END LOOP;
95 
        end if;
96 
END PROCESS;
97 
 
98 
PAprcs:
99 
PROCESS (DDRAbits, bufPA)
100 
BEGIN
101 
         FOR i IN 0 to 7 LOOP
102 
      if DDRAbits(i)='1' then   --- the pin acts like an output
103 
                PA(i)<=bufPA(i);
104 
          else  PA(i)<='Z';  end if;
105 
        END LOOP;
106 
END PROCESS;
107 
 
108 
DDRAprcs:
109 
PROCESS (E, RS0, RS1, CRA2, reset,iCS,r_w)
110 
BEGIN
111 
        if reset='0' then DDRAbits<=(others=>'0');
112 
        elsif RS0='0' and RS1='0' and CRA2='0' and r_w ='0' and iCS='1' then
113 
                if e'event and  e='0' then       DDRAbits<=DB; end if;
114 
        elsif RS0='0' and RS1='0' and CRA2='0' and r_w ='1' and iCS='1' then
115 
                if e'event and  e='1' then      DB_DDRA<=DDRAbits; end if;
116 
        end if;
117 
END PROCESS;
118 
 
119 
CRAprcs:
120 
PROCESS (E, RS0, RS1, reset,iCS,CRA,r_w)
121 
BEGIN
122 
        if reset='0' then CRA(5 downto 0)<=(others=>'0');
123 
        elsif RS0='1' and RS1='0' and r_w='0' and iCS='1' then
124 
                if e'event and  e='0' then       CRA(5 downto 0)<=DB(5 downto 0);  end if;
125 
        elsif RS0='1' and RS1='0' and r_w='1' and iCS='1' then
126 
                if e'event and  e='1' then      DB_CRA(5 downto 0)<=CRA(5 downto 0);      end if;
127 
        end if;
128 
        CRA2<=CRA(2);
129 
END PROCESS;
130 
---------  peripheral register B
131 
bufPBprcs:
132 
PROCESS (E, RS0, RS1, CRA2, CRB2, DDRBbits,reset,iCS, DB, PB,r_w)
133 
BEGIN
134 
        if reset='0' then bufPB<=(others=>'0');
135 
        elsif RS0='0' and RS1='1' and CRB2='1' and r_w='0' and iCS='1' then
136 
        FOR i IN 0 to 7 LOOP
137 
     if DDRBbits(i)='1' then   --- the pin acts like an output
138 
                if e'event and  e='0' then       bufPB(i)<=DB(i); end if;
139 
     elsif DDRBbits(i)='0' then   --- the pin acts like an input
140 
                if e'event and  e='0' then       bufPB(i)<=bufPB(i); end if;
141 
         end if;
142 
        END LOOP;
143 
 
144 
        elsif RS0='0' and RS1='1' and CRB2='1' and r_w='1' and iCS='1' then
145 
        FOR i IN 0 to 7 LOOP
146 
     if DDRBbits(i)='1' then   --- the pin acts like an output
147 
                if e'event and  e='1' then      DB_PB(i)<=bufPB(i); end if;
148 
     elsif DDRBbits(i)='0' then   --- the pin acts like an input
149 
                if e'event and  e='1' then      bufPB(i)<=PB(i); DB_PB(i)<=PB(i); end if;
150 
         end if;
151 
        END LOOP;
152 
        end if;
153 
END PROCESS;
154 
 
155 
PBprcs:
156 
PROCESS (DDRBbits, bufPB)
157 
BEGIN
158 
         FOR i IN 0 to 7 LOOP
159 
      if DDRBbits(i)='1' then   --- the pin acts like an output
160 
                PB(i)<=bufPB(i);
161 
          else  PB(i)<='Z';  end if;
162 
        END LOOP;
163 
END PROCESS;
164 
 
165 
DDRBprcs:
166 
PROCESS (E, RS0, RS1, CRA2, CRB2,reset,iCS,r_w)
167 
BEGIN
168 
        if reset='0' then DDRBbits<=(others=>'0');
169 
        elsif RS0='0' and RS1='1' and CRB2='0' and r_w ='0' and iCS='1' then
170 
                if e'event and  e='0' then       DDRBbits<=DB; end if;
171 
        elsif RS0='0' and RS1='1' and CRB2='0' and r_w ='1' and iCS='1' then
172 
                if e'event and  e='1' then      DB_DDRB<=DDRBbits; end if;
173 
        end if;
174 
 
175 
END PROCESS;
176 
 
177 
CRBprcs:
178 
PROCESS (E, RS0, RS1, reset,iCS,CRB,r_w)
179 
BEGIN
180 
        if reset='0' then CRB(5 downto 0)<=(others=>'0');
181 
        elsif RS0='1' and RS1='1' and r_w='0' and iCS='1' then
182 
                if e'event and  e='0' then       CRB(5 downto 0)<=DB(5 downto 0);  end if;
183 
        elsif RS0='1' and RS1='1' and r_w='1' and iCS='1' then
184 
                if e'event and  e='1' then      DB_CRB(5 downto 0)<=CRB(5 downto 0);      end if;
185 
        end if;
186 
        CRB2<=CRB(2);
187 
END PROCESS;
188 
 
189 
-------------------------------------------------------
190 
-------------  spooling with the data bus
191 
dbspoller:
192 
PROCESS (RS0, RS1, CRA2, CRB2, r_w, iCS,
193 
                 DB_PA, DB_DDRA, DB_CRA,
194 
                 DB_PB, DB_DDRB, DB_CRB)
195 
BEGIN
196 
        if RS0='0' and RS1='0' and CRA2='1' and r_w='1' and iCS='1' then
197 
                DB<=DB_PA;
198 
        elsif RS0='0' and RS1='0' and CRA2='0' and r_w ='1' and iCS='1' then
199 
                DB<=DB_DDRA;
200 
        elsif RS0='1' and RS1='0' and r_w='1' and iCS='1' then
201 
                DB<=DB_CRA;
202 
        elsif RS0='0' and RS1='1' and CRB2='1' and r_w='1' and iCS='1' then
203 
                DB<=DB_PB;
204 
        elsif RS0='0' and RS1='1' and CRB2='0' and r_w ='1' and iCS='1' then
205 
                DB<=DB_DDRB;
206 
        elsif RS0='1' and RS1='1' and r_w='1' and iCS='1' then
207 
                DB<=DB_CRB;
208 
        ELSE
209 
                DB<=(OTHERS=>'Z');
210 
        END IF;
211 
END PROCESS;
212 
 
213 
----------------------------------------------------
214 
----------  captures interrupts
215 
          mpu_readA<=(not RS0) and (not RS1) and CRA2 and r_w and iCS;
216 
          mpu_readB<=(not RS0) and RS1 and CRB2 and r_w and iCS;
217 
 
218 
prvsread:  -- this is the last read
219 
PROCESS (E, RS0, RS1, reset, r_w, iCS,CRA,CRB)
220 
BEGIN
221 
        if reset='0' then prev_readA<='0';
222 
        elsif e'event and e='1' then
223 
                if RS0='0' and RS1='0' and CRA2='1' and r_w='1' and iCS='1' then
224 
                        prev_readA<='1';
225 
                else prev_readA<='0';
226 
                end if;
227 
        end if;
228 
 
229 
        if reset='0' then prev_writeB<='0';
230 
        elsif e'event and e='0' then
231 
                if RS0='0' and RS1='1' and CRB2='1' and r_w='0' and iCS='1' then
232 
                        prev_writeB<='1';
233 
                else prev_writeB<='0';
234 
                end if;
235 
        end if;
236 
END PROCESS;
237 
 
238 
 
239 
intrptsA:
240 
PROCESS (E, RS0, RS1, reset, r_w, CRA,CRB,mpu_readA,mpu_readB,
241 
                 prev_readA, prev_writeB,CA1,CB1,CA2,CB2,
242 
                 irqaf1_1,irqaf1_2,irqaf2_1,irqaf2_2,
243 
                 irqbf1_1, irqbf1_2,irqbf2_1,irqbf2_2,
244 
                 iCS,disbla1,disbla2,
245 
                 disblb1,disblb2)
246 
BEGIN
247 
        disbla1<= (not CRA(0));
248 
        disbla2<= (not CRA(5)) and (not CRA(3));
249 
        ------------------------------------------
250 
        ---- CA1 line
251 
        if (reset='0') or (mpu_readA='1') then irqaf1_1<='0'; irqaf1_2<='0';
252 
        elsif CRA(1)='0' then   -- the latch for the CA1 is from high to low
253 
                if CA1'event and CA1='0' then irqaf1_1<='1'; end if;
254 
        elsif CRA(1)='1' then   -- the latch for the CA1 is from low to high
255 
                if CA1'event and CA1='1' then irqaf1_2<='1'; end if;
256 
        end if;
257 
        CRA(7)<=irqaf1_1 or irqaf1_2; -- flag bit
258 
        if (disbla1='1') and CRA(7)='1' then irqa<='0';
259 
        elsif (disbla2='1') and CRA(6)='1' then irqa<='0';
260 
        else irqa<='Z'; end if;
261 
        ---- CA2 line
262 
        if (reset='0') then
263 
 
264 
        elsif CRA(5)='1' and CRA(4)='0' and CRA(3)='0' then  -- the CA2 is output
265 
                                                                                                        -- read Strobe with CA1 restore
266 
                if (irqaf1_1='1') or (irqaf1_2='1') then CA2<='1';
267 
                elsif prev_readA='1' then
268 
                        if e'event and e='0' then        CA2<='0';        end if;
269 
                end if;
270 
        elsif CRA(5)='1' and CRA(4)='0' and CRA(3)='1' then  -- the CA2 is output
271 
                                                                                                        -- read Strobe with E restore
272 
                if e'event and e='0' then
273 
                        if prev_readA='1' then  CA2<='0';
274 
                        elsif  ics='0' then  CA2<='1'; end if;
275 
                end if;
276 
        elsif CRA(5)='1' and CRA(4)='1' then  -- the CA2 is output
277 
                CA2<=CRA(3);
278 
        else
279 
                CA2<='Z';
280 
        end if;
281 
--------------------
282 
        if (reset='0') or (mpu_readA='1') then irqaf1_1<='0'; irqaf1_2<='0';
283 
        elsif CRA(5)='0' and CRA(4)='0' then   -- the latch for the CA2 is from high to low
284 
                if CA2'event and CA2='0' then irqaf2_1<='1'; end if;
285 
        elsif CRA(5)='0' and CRA(4)='1' then   -- the latch for the CA2 is from low to high
286 
                if CA2'event and CA2='1' then irqaf2_2<='1'; end if;
287 
        end if;
288 
        CRA(6)<=irqaf2_1 or irqaf2_2; -- flag bit
289 
---------------------------------------
290 
---------------------------------------
291 
        disblb1<= (not CRB(0));
292 
        disblb2<= (not CRB(5)) and (not CRB(3));
293 
        ---- CB1 line
294 
        if (reset='0') or (mpu_readB='1') then irqbf1_1<='0'; irqbf1_2<='0';
295 
        elsif CRB(1)='0' then   -- the latch for the CB1 is from high to low
296 
                if CB1'event and CB1='0' then irqbf1_1<='1'; end if;
297 
        elsif CRB(1)='1' then   -- the latch for the CB1 is from low to high
298 
                if CB1'event and CB1='1' then irqbf1_2<='1'; end if;
299 
        end if;
300 
        CRB(7)<=irqbf1_1 or irqbf1_2; -- flag bit
301 
        if (disblb1='1') and CRB(7)='1' then irqb<='0';
302 
        elsif (disblb2='1') and CRB(6)='1' then irqb<='0';
303 
        else irqb<='Z'; end if;
304 
        ---- CB2 line
305 
        if (reset='0') then
306 
 
307 
        elsif CRB(5)='1' and CRB(4)='0' and CRB(3)='0' then  -- the CB2 is output
308 
                                                                                                        -- read Strobe with CA1 restore
309 
                if (irqbf1_1='1') or (irqbf1_2='1') then CB2<='1';
310 
                elsif prev_writeB='1' then
311 
                        if e'event and e='1' then CB2<='0';      end if;
312 
                end if;
313 
        elsif CRB(5)='1' and CRB(4)='0' and CRB(3)='1' then  -- the CB2 is output
314 
                                                                                                        -- read Strobe with E restore
315 
                if e'event and e='1' then
316 
                        if prev_writeB='1' then  CB2<='0';
317 
                        elsif  ics='0' then  CB2<='1'; end if;
318 
                end if;
319 
        elsif CRB(5)='1' and CRB(4)='1' then  -- the CB2 is output
320 
                CB2<=CRB(3);
321 
        else
322 
                CB2<='Z';
323 
        end if;
324 
--------------------
325 
        if (reset='0') or (mpu_readB='1') then irqbf1_1<='0'; irqbf1_2<='0';
326 
        elsif CRB(5)='0' and CRB(4)='0' then   -- the latch for the CB2 is from high to low
327 
                if CB2'event and CB2='0' then irqbf2_1<='1'; end if;
328 
        elsif CRB(5)='0' and CRB(4)='1' then   -- the latch for the CB2 is from low to high
329 
                if CB2'event and CB2='1' then irqbf2_2<='1'; end if;
330 
        end if;
331 
        CRB(6)<=irqbf2_1 or irqbf2_2; -- flag bit
332 
-------------------
333 
END PROCESS;
334 
 
335 
END bhv1;
336 
 

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