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[/] [igor/] [trunk/] [avr/] [bus-master/] [busmaster.h] - Blame information for rev 4

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#ifndef _BUSMASTER_H_
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#define _BUSMASTER_H_
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#include <avr/io.h>
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#include <stdint.h>
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/* Read Write port and flags */
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#define RDWRPORT        PORTF
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#define RDWRPIN         PINF
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#define RDWRDDR         DDRF
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/* Pin values that indicate different operations
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 * using (2**pinnumber) for easier code
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 */
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#define RD      0x04
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#define WR      0x08
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#define RDYPORT         PORTF
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#define RDYPIN          PINF
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#define RDYDDR          DDRF
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#define RDY     0
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#define ADDRLPIN        PINF
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#define ADDRLPORT       PORTF   
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#define ADDRLDDR        DDRF
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#define ADDRHPIN        PINE
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#define ADDRHPORT       PORTE
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#define ADDRHDDR        DDRE
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#define DATA0PIN        PINA
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#define DATA0PORT       PORTA
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#define DATA0DDR        DDRA
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#define DATA1PIN        PIND
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#define DATA1PORT       PORTD
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#define DATA1DDR        DDRD
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#define DATA2PIN        PINB
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#define DATA2PORT       PORTB
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#define DATA2DDR        DDRB
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#define DATA3PIN        PINC
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#define DATA3PORT       PORTC
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#define DATA3DDR        DDRC
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#define INTDDR          DDRF
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#define INTPORT         PORTF
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#define INT                     1
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int32_t fpga_delayed_write(void);
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void fpga_finish_read(uint32_t data);
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void init_fpgabus(void);
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uint32_t bus_read(uint8_t addr);
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void bus_write(uint8_t addr, uint32_t data);
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#endif /* !_BUSMASTER_H_ */

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