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[/] [igor/] [trunk/] [avr/] [eth-test/] [testbus.h] - Blame information for rev 4

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1 4 atypic
#ifndef _BUS_H_
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#define _BUS_H_
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#include <stdint.h>
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/* Read Write port and flags */
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#define RDWRPORT        PORTE
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#define RDWRPIN         PINE
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#define RDWRDDR         DDRE
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/* Pin values that indicate different operations
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 * using (2**pinnumber) for easier code
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 */
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#define RD      0x02    
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#define WR      0x04
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#define RDYPORT         PORTB
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#define RDYPIN          PINB
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#define RDYDDR          DDRB
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#define RDY     0
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#define ADDRLPIN        PIND
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#define ADDRLPORT       PORTD   
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#define ADDRLDDR        DDRD
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#define ADDRHPIN        PINE
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#define ADDRHPORT       PORTE
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#define ADDRHDDR        DDRE
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#define DATA0PIN        PINH
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#define DATA0PORT       PORTH
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#define DATA0DDR        DDRH
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#define DATA1PIN        PINJ
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#define DATA1PORT       PORTJ
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#define DATA1DDR        DDRJ
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#define DATA2PIN        PINK
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#define DATA2PORT       PORTK
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#define DATA2DDR        DDRK
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#define DATA3PIN        PINL
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#define DATA3PORT       PORTL
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#define DATA3DDR        DDRL
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#define INTDDR          DDRD
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#define INTPORT         PORTD
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void fpga_finish_read(uint32_t data);
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uint32_t fpga_delayed_write(void);
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void init_fpgabus(void);
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#endif /* !_BUS_H_ */

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