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atypic |
library ieee;
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use ieee.std_logic_1164.all;
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package leval2_constants is
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constant SCRATCH_MEM_INIT : string := "scratch";
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constant INSTR_MEM_INIT : string := "instrmem";
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constant WORD_BITS : integer := 32;
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constant ADDR_BITS : integer := 26;
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constant INSTR_MEM_SIZE : integer := 2048;
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constant REGS_SIZE : integer := 1024;
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constant REGS_ADDR_BITS : integer := 10;
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constant MC_ADDR_BITS : integer := 13;
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constant STATUS_REG_BITS : integer := 8;
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constant MC_INSTR_BITS : integer := 48;
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constant BUS_BITS : integer := 32;
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constant INSTR_OPCODE_BITS : integer := 6;
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constant INSTR_TYPE_BITS : integer := 5;
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constant INSTR_REG1_START : integer := 39;
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constant INSTR_REG1_END : integer := 29;
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constant INSTR_REG2_START : integer := 28;
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constant INSTR_REG2_END : integer := 18;
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constant INSTR_REG3_START : integer := 17;
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constant INSTR_IMM_START : integer := 17;
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constant INSTR_REG3_END : integer := 7;
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constant INSTR_REG1_INDIR : integer := 39;
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constant INSTR_REG2_INDIR : integer := 28;
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constant INSTR_OPCODE_START : integer := 45;
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constant INSTR_OPCODE_END : integer := 40;
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-- Status flags
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constant ZERO : integer := 3;
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constant TYP : integer := 4;
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constant OVERFLOW : integer := 0;
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constant NEG : integer := 2;
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constant IO : integer := 5;
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-- ALU operations
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constant ALU_PASS : std_logic_vector(5 downto 0) := "000000";
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constant ALU_ADD : std_logic_vector(5 downto 0) := "000001";
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constant ALU_GET_TYPE : std_logic_vector(5 downto 0) := "000010";
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constant ALU_SET_TYPE : std_logic_vector(5 downto 0) := "000011";
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constant ALU_SET_DATUM : std_logic_vector(5 downto 0) := "000100";
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constant ALU_GET_DATUM : std_logic_vector(5 downto 0) := "000101";
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constant ALU_SET_GC : std_logic_vector(5 downto 0) := "001110";
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constant ALU_GET_GC : std_logic_vector(5 downto 0) := "000110";
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constant ALU_SUB : std_logic_vector(5 downto 0) := "000111";
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constant ALU_CMP_TYPE : std_logic_vector(5 downto 0) := "001000";
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constant ALU_AND : std_logic_vector(5 downto 0) := "001001";
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constant ALU_OR : std_logic_vector(5 downto 0) := "001010";
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constant ALU_XOR : std_logic_vector(5 downto 0) := "001011";
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constant ALU_MUL : std_logic_vector(5 downto 0) := "001100";
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constant ALU_DIV : std_logic_vector(5 downto 0) := "001101";
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constant ALU_MOD : std_logic_vector(5 downto 0) := "001111";
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constant ALU_SL : std_logic_Vector(5 downto 0) := "010000";
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constant ALU_SR : std_logic_Vector(5 downto 0) := "010001";
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constant ALU_SETLED : std_logic_Vector(5 downto 0) := "010010";
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-- opcodes
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-- compare operations
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constant ALU_CMP_DATUM : std_logic_vector(5 downto 0) := "010111";
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constant ALU_CMP_GC : std_logic_vector(5 downto 0) := "011111";
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constant ALU_CMP : std_logic_vector(5 downto 0) := "100000";
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constant ALU_CMP_TYPE_IMM : std_logic_vector(5 downto 0) := "010010";
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constant ALU_CMP_DATUM_IMM : std_logic_vector(5 downto 0) := "010011";
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constant ALU_CMP_GC_IMM : std_logic_vector(5 downto 0) := "010100";
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-- set operation
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constant ALU_CPY : std_logic_vector(5 downto 0) := "010101";
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-- system operations
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constant NOP : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000000";
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constant HALT : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000001";
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-- integer instructions
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constant ADD : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000010";
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constant SUBB : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000011";
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constant MUL : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000100";
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constant DIV : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000101";
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constant MODULO : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "001011";
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constant SHIFT_L : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "001010";
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constant SHIFT_R : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "001100";
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-- logical instructions
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constant LAND : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000110";
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constant LOR : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "000111";
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constant LXOR : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "001000";
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-- memory instructions
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constant LOAD : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "010000";
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constant STORE : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "010001";
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-- branch instructions
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constant BIDX : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "010110";
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-- data manipulation
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constant GET_TYPE : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100000";
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constant SET_TYPE : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100001";
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constant SET_DATUM : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100011";
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constant GET_GC : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100101";
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constant SET_GC : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100110";
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constant CPY : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101000";
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constant SET_TYPE_IMM : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100010";
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constant SET_DATUM_IMM: std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100100";
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constant SET_GC_IMM : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "100111";
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-- compare functions
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constant CMP_TYPE : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101001";
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constant CMP_TYPE_IMM: std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101010";
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constant CMP_DATUM : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101011";
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constant CMP_DATUM_IMM: std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101100";
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constant CMP_GC : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101101";
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constant CMP_GC_IMM : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101110";
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constant CMP : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "101111";
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constant SETLED : std_logic_vector(INSTR_OPCODE_BITS-1 downto 0) := "111111";
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-- status masks
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constant SM_INT : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "11110110";
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constant SM_LOG : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "11000110";
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constant SM_FPO : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "11111110";
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constant SM_SYS : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "00000000";
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constant SM_MEM : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "00000110";
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constant SM_BR : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "00000000";
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constant SM_SGO : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "00000000"; -- set get operations
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--constant SM_CMP : std_logic_vector(STATUS_REG_BITS-1 downto 0) := "11111110";
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-- data types
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constant DT_NONE : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00000";
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constant DT_INT : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00001";
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constant DT_FLOAT : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00010";
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constant DT_CONS : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00011";
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constant DT_SNOC : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00100";
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constant DT_PTR : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00101";
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constant DT_ARRAY : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00110";
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constant DT_NIL : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "00111";
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constant DT_T : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "01000";
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constant DT_CHAR : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "01001";
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constant DT_SYMBOL : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "01010";
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constant DT_FUNCTION : std_logic_vector(INSTR_TYPE_BITS-1 downto 0) := "01011";
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constant IMM_SIZE : integer :=18;
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-- Constants for internal typing
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constant OBJECT_SIZE : integer := 32;
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constant DATUM_SIZE : integer := 26;
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constant GC_SIZE : integer := 1;
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constant TYPE_START : integer := OBJECT_SIZE - INSTR_TYPE_BITS;
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constant GC_BIT : integer := 26;
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-- Typing ... types, uhrm.
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subtype object is std_logic_vector(OBJECT_SIZE - 1 downto 0);
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subtype object_type is std_logic_vector(INSTR_TYPE_BITS - 1 downto 0);
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subtype object_datum is std_logic_vector(DATUM_SIZE - 1 downto 0);
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subtype object_gc is std_logic_vector(GC_SIZE - 1 downto 0);
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-- Type constants
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constant TYPE_INT : object_type := "00010";
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-- Garbage collection constants
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constant GC_TRUE : object_gc := "1";
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constant GC_FALSE : object_gc := "0";
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-- General constants
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constant GENERATE_TRACE : boolean := false;
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constant MC_ROM_SIZE : integer := 16384; -- instruction mem
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constant SCRATCH_MEM_SIZE : integer := 1024; -- size of scratch
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-- Instruction word constants
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constant IN_OP_SIZE : integer := 6;
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constant ALU_FUNCT_SIZE : integer :=6; -- Size of function word for ALU
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constant BUS_SIZE : integer := 32;
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constant SCRATCH_DEPTH : integer := 10;
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-- Clock freq in MHz
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constant LEVAL_FREQ : std_logic_vector(7 downto 0) := X"40";
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-- Control signal constants
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constant PCMUX_NOBRANCH : std_logic_vector(1 downto 0) := "00";
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constant PCMUX_STALL : std_logic_vector(1 downto 0) := "01";
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constant PCMUX_BRANCH : std_logic_vector(1 downto 0) := "10";
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-- constants for CACHE
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constant CACHE_LINES : integer := 1024;
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constant CACHE_INDEX_BITS : integer := 10;
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constant CACHE_TAG_BITS : integer := ADDR_BITS - CACHE_INDEX_BITS;
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constant CACHE_DATA_BITS : integer := WORD_BITS;
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constant CACHE_INDEX_POS : integer := 9;
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constant CACHE_TAG_POS : integer := ADDR_BITS - 1;
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end package;
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