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URL https://opencores.org/ocsvn/ima_adpcm_enc_dec/ima_adpcm_enc_dec/trunk

Subversion Repositories ima_adpcm_enc_dec

[/] [ima_adpcm_enc_dec/] [trunk/] [verilog/] [sim/] [icarus/] [test.sav] - Blame information for rev 2

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Line No. Rev Author Line
1 2 motilito
[timestart] 245407
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[size] 1440 848
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[pos] 7 21
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*-6.233498 245600 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[treeopen] test.
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@28
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test.clock
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test.reset
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@24
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test.sampCount[31:0]
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@420
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test.inSamp[15:0]
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@28
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test.inValid
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test.inReady
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@24
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test.encCount[31:0]
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test.encExpVal[3:0]
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test.encPcm[3:0]
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@28
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test.encValid
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@24
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test.decCount[31:0]
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@420
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test.decExpVal[15:0]
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@28
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test.decReady
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@420
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test.decSamp[15:0]
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@28
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test.decValid
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@200
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-adpcm_enc
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@420
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test.enc.inSamp[15:0]
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@28
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test.enc.inValid
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@421
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test.enc.sampDiff[19:0]
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@24
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test.enc.stepIndex[6:0]
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test.enc.stepSize[14:0]
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@420
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test.enc.prePredSamp[19:0]
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test.enc.predictorSamp[18:0]
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@24
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test.enc.preStepIndex[7:0]
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@420
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test.enc.stepDelta[4:0]
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@24
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test.enc.stepIndex[6:0]
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test.enc.stepSize[14:0]
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@200
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-adpcm_dec
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@28
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test.dec.clock
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@420
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test.dec.dequantSamp[18:0]
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@22
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test.dec.inPCM[3:0]
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@28
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test.dec.inReady
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test.dec.inValid
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@420
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test.dec.outSamp[15:0]
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@28
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test.dec.outValid
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@420
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test.dec.prePredSamp[19:0]
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@24
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test.dec.preStepIndex[7:0]
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@28
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test.dec.predValid
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@420
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test.dec.predictorSamp[18:0]
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@28
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test.dec.reset
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@420
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test.dec.stepDelta[4:0]
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@24
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test.dec.stepIndex[6:0]
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test.dec.stepSize[14:0]

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