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[/] [layer2/] [trunk/] [xilinx/] [layer2.ucf] - Blame information for rev 2

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1 2 idiolatrie 
# Primary Clock
2 
NET "CLK_I" LOC = C9 | IOSTANDARD = "LVCMOS33" | TNM_NET = CLK_I;
3 
TIMESPEC TS_CLK_I = PERIOD "CLK_I" 20 ns HIGH 50%;
4 
 
5 
# VGA Connections
6 
NET "VGA_RED"   LOC = H14 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
7 
NET "VGA_GREEN" LOC = H15 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
8 
NET "VGA_BLUE"  LOC = G15 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
9 
NET "VGA_HSYNC" LOC = F15 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
10 
NET "VGA_VSYNC" LOC = F14 |IOSTANDARD = "LVTTL" |DRIVE = 8 |SLEW = FAST;
11 
 
12 
# Keyboard
13 
NET "PS2_CLK"  LOC = G14 |IOSTANDARD = "LVCMOS33" |DRIVE = 8 |SLEW = SLOW;
14 
NET "PS2_DATA" LOC = G13 |IOSTANDARD = "LVCMOS33" |DRIVE = 8 |SLEW = SLOW;
15 
 
16 
# RS232 DCE Connections
17 
NET "RS232_DCE_RXD" LOC = "R7"  |IOSTANDARD = LVTTL;
18 
NET "RS232_DCE_TXD" LOC = "M14" |IOSTANDARD = LVTTL |DRIVE = 8 |SLEW = SLOW ;
19 
 
20 
# LEDS
21 
NET "LED<7>" LOC = "F9"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
22 
NET "LED<6>" LOC = "E9"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
23 
NET "LED<5>" LOC = "D11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
24 
NET "LED<4>" LOC = "C11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
25 
NET "LED<3>" LOC = "F11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
26 
NET "LED<2>" LOC = "E11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
27 
NET "LED<1>" LOC = "E12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
28 
NET "LED<0>" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
29 
 
30 
# StrataFlash
31 
NET "SF_OE"    LOC = "C18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
32 
NET "SF_CE"    LOC = "D16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
33 
NET "SF_WE"    LOC = "D17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
34 
NET "SF_BYTE"  LOC = "C17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
35 
#NET "SF_STS"  LOC = "B18" | IOSTANDARD = LVCMOS33 | PULLUP;
36 
 
37 
NET "SF_A<0>"  LOC = "H17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
38 
NET "SF_A<1>"  LOC = "J13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
39 
NET "SF_A<2>"  LOC = "J12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
40 
NET "SF_A<3>"  LOC = "J14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
41 
NET "SF_A<4>"  LOC = "J15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
42 
NET "SF_A<5>"  LOC = "J16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
43 
NET "SF_A<6>"  LOC = "J17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
44 
NET "SF_A<7>"  LOC = "K14" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
45 
NET "SF_A<8>"  LOC = "K15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
46 
NET "SF_A<9>"  LOC = "K12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
47 
NET "SF_A<10>" LOC = "K13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
48 
NET "SF_A<11>" LOC = "L15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
49 
NET "SF_A<12>" LOC = "L16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
50 
NET "SF_A<13>" LOC = "T18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
51 
NET "SF_A<14>" LOC = "R18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
52 
NET "SF_A<15>" LOC = "T17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
53 
NET "SF_A<16>" LOC = "U18" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
54 
NET "SF_A<17>" LOC = "T16" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
55 
NET "SF_A<18>" LOC = "U15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
56 
NET "SF_A<19>" LOC = "V15" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
57 
NET "SF_A<20>" LOC = "T12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
58 
NET "SF_A<21>" LOC = "V13" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
59 
NET "SF_A<22>" LOC = "V12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
60 
NET "SF_A<23>" LOC = "N11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
61 
 
62 
NET "SF_D<0>"  LOC = "N10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
63 
NET "SF_D<1>"  LOC = "P10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
64 
NET "SF_D<2>"  LOC = "R10" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
65 
NET "SF_D<3>"  LOC = "V9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
66 
NET "SF_D<4>"  LOC = "U9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
67 
NET "SF_D<5>"  LOC = "R9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
68 
NET "SF_D<6>"  LOC = "M9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
69 
NET "SF_D<7>"  LOC = "N9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;
70 
 
71 
NET "LCD_RW"       LOC = "L17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
72 
NET "LCD_E"        LOC = "M18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
73 
NET "SPI_ROM_CS"   LOC = "U3"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
74 
NET "SPI_ADC_CONV" LOC = "P11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
75 
NET "SPI_DAC_CS"   LOC = "N8"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
76 
NET "PF_OE"        LOC = "T3"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;
77 
 
78 
# DDR2
79 
NET "SD_A<12>" LOC = "P2" | IOSTANDARD = SSTL2_I;
80 
NET "SD_A<11>" LOC = "N5" | IOSTANDARD = SSTL2_I;
81 
NET "SD_A<10>" LOC = "T2" | IOSTANDARD = SSTL2_I;
82 
NET "SD_A<9>"  LOC = "N4" | IOSTANDARD = SSTL2_I;
83 
NET "SD_A<8>"  LOC = "H2" | IOSTANDARD = SSTL2_I;
84 
NET "SD_A<7>"  LOC = "H1" | IOSTANDARD = SSTL2_I;
85 
NET "SD_A<6>"  LOC = "H3" | IOSTANDARD = SSTL2_I;
86 
NET "SD_A<5>"  LOC = "H4" | IOSTANDARD = SSTL2_I;
87 
NET "SD_A<4>"  LOC = "F4" | IOSTANDARD = SSTL2_I;
88 
NET "SD_A<3>"  LOC = "P1" | IOSTANDARD = SSTL2_I;
89 
NET "SD_A<2>"  LOC = "R2" | IOSTANDARD = SSTL2_I;
90 
NET "SD_A<1>"  LOC = "R3" | IOSTANDARD = SSTL2_I;
91 
NET "SD_A<0>"  LOC = "T1" | IOSTANDARD = SSTL2_I;
92 
 
93 
NET "SD_DQ<15>" LOC = "H5" | IOSTANDARD = SSTL2_I;
94 
NET "SD_DQ<14>" LOC = "H6" | IOSTANDARD = SSTL2_I;
95 
NET "SD_DQ<13>" LOC = "G5" | IOSTANDARD = SSTL2_I;
96 
NET "SD_DQ<12>" LOC = "G6" | IOSTANDARD = SSTL2_I;
97 
NET "SD_DQ<11>" LOC = "F2" | IOSTANDARD = SSTL2_I;
98 
NET "SD_DQ<10>" LOC = "F1" | IOSTANDARD = SSTL2_I;
99 
NET "SD_DQ<9>"  LOC = "E1" | IOSTANDARD = SSTL2_I;
100 
NET "SD_DQ<8>"  LOC = "E2" | IOSTANDARD = SSTL2_I;
101 
NET "SD_DQ<7>"  LOC = "M6" | IOSTANDARD = SSTL2_I;
102 
NET "SD_DQ<6>"  LOC = "M5" | IOSTANDARD = SSTL2_I;
103 
NET "SD_DQ<5>"  LOC = "M4" | IOSTANDARD = SSTL2_I;
104 
NET "SD_DQ<4>"  LOC = "M3" | IOSTANDARD = SSTL2_I;
105 
NET "SD_DQ<3>"  LOC = "L4" | IOSTANDARD = SSTL2_I;
106 
NET "SD_DQ<2>"  LOC = "L3" | IOSTANDARD = SSTL2_I;
107 
NET "SD_DQ<1>"  LOC = "L1" | IOSTANDARD = SSTL2_I;
108 
NET "SD_DQ<0>"  LOC = "L2" | IOSTANDARD = SSTL2_I;
109 
 
110 
NET "SD_BA<0>" LOC = "K5" | IOSTANDARD = SSTL2_I ;
111 
NET "SD_BA<1>" LOC = "K6" | IOSTANDARD = SSTL2_I ;
112 
 
113 
NET "SD_CK_N" LOC = "J4" | IOSTANDARD = SSTL2_I ;
114 
NET "SD_CK_P" LOC = "J5" | IOSTANDARD = SSTL2_I ;
115 
NET "SD_CKE"  LOC = "K3" | IOSTANDARD = SSTL2_I ;
116 
 
117 
NET "SD_CMD<3>" LOC = "K4" | IOSTANDARD = SSTL2_I;    # SD_CS
118 
NET "SD_CMD<2>" LOC = "C1" | IOSTANDARD = SSTL2_I;    # SC_RAS
119 
NET "SD_CMD<1>" LOC = "C2" | IOSTANDARD = SSTL2_I;    # SD_CAS
120 
NET "SD_CMD<0>" LOC = "D1" | IOSTANDARD = SSTL2_I;    # SD_WE
121 
 
122 
NET "SD_DM<1>" LOC = "J1" | IOSTANDARD = SSTL2_I;     # SD_UDM
123 
NET "SD_DM<0>" LOC = "J2" | IOSTANDARD = SSTL2_I;     # SD_LDM
124 
 
125 
NET "SD_DQS<1>" LOC = "G3" | IOSTANDARD = SSTL2_I;    # SD_UDQS
126 
NET "SD_DQS<0>" LOC = "L6" | IOSTANDARD = SSTL2_I;    # SD_LDQS
127 
 
128 
# Path to allow connection to top DCM connection
129 
#NET "SD_CK_FB" LOC = "B9" | IOSTANDARD = LVCMOS33;
130 
 
131 
# Prohibit VREF pins
132 
CONFIG PROHIBIT = D2;
133 
CONFIG PROHIBIT = G4;
134 
CONFIG PROHIBIT = J6;
135 
CONFIG PROHIBIT = L5;
136 
CONFIG PROHIBIT = R4;

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