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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<meta http-equiv="CONTENT-TYPE" content="text/html; charset=iso-8859-1"><title>LEON3MP Reference Design</title>
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<meta name="GENERATOR" content="OpenOffice.org 1.1.0 (Linux)">
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<meta name="CHANGED" content="20040426;16351800"></head>
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<body dir="ltr" lang="en-US">
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<table border="0" cellpadding="2" cellspacing="2" width="750">
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<tbody>
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<h3><span style="font-family: helvetica,arial,sans-serif;">LEON3MP for the Avnet Spartan3-1500 evaluation board<br>
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</span></h3>
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<h4 style="font-family: helvetica,arial,sans-serif;">Introduction</h4>
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<small><span style="font-family: helvetica,arial,sans-serif;">The
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LEON3MP provides a reference
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design for LEON3-based systems. This version is specifically tailored
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for the <a href="http://www.em.avnet.com/evk/home/0,4534,CID%253D7816%2526CCD%253DUSA%2526SID%253DNoNav%2526DID%253DDF2%2526LID%253DNoNav%25255F%2526BID%253DDF2%2526CTP%253DEVK,00.html">Avnet Spartan3-1500 evaluation board</a>. It can be configured
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with the following blocks:<br>
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<br>
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</span></small>
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<table cellpadding="2" cellspacing="2" width="700">
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<tbody>
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<tr>
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<td valign="top">
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<ul><li><small><span style="font-family: helvetica,arial,sans-serif;">1 -
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4 LEON3 processor
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cores with MP support</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Multi-processor
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debug support unit (DSU) for LEON3</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">On-chip boot-prom<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit SRAM controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Round-robin
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AHB arbiter and controller with plug&play support</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">AHB/APB bridge with
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plug&play support<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Multi-processor
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interrupt controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit modular timer
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unit</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">UART with FIFO<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">10/100 ethernet MAC</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit, 33 MHz PCI interface (master/target, FIFO, DMA)<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">JTAG debug communication link<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Serial debug
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communication link</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Etherner debug
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communication link</span></small></li></ul>
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</td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"><img alt="" src="../../boards/avnet-xc3s1500/Xilinx-Spartan3-Eval_Kit.jpg" align="right" height="167" width="252"></span></small></td>
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</tr>
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</tbody>
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</table>
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<small><span style="font-family: helvetica,arial,sans-serif;"><br>
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</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
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The LEON3 MP design is provided together with GRLIB, and is
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located in grlib/designs/leon3-avnet-3s1500<br>
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</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
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</span></small>
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<h4><span style="font-family: helvetica,arial,sans-serif;">Reference
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architecture</span></h4>
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<small><span style="font-family: helvetica,arial,sans-serif;">The
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LEON3MP is made up by cores from the GRLIB IP library, which are
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connected together via the AMBA AHB and APB buses. The plug&play
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configuration method of GRLIB makes it possible to assign any
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combination of addresses and interrupts to the cores. However, to be
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software compatible with simple operating systems such as the LEON
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Bare-C cross-compiler, some of the vital cores must be assigned to
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predefined addresses and interrupts. The table below shows the
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reference assigment in the LEON3MP design:<br>
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<br>
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</span></small>
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<table style="width: 100%; text-align: left;" border="1" cellpadding="2" cellspacing="2">
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<tbody>
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<tr>
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<th style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Core</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory area<br>
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</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt</span></small></th>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">On-chip boot-prom<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x00000000 -
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0x20000000 : PROM<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">SRAM Controller</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">
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0x40000000 - 0x80000000 : 1 Mbyte SRAM</span></small></td>
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<td valign="top"><br>
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</td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">APB bridge<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000000 -
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0x80100000 : APB bus<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">UART</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000100 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000200 : UART
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registers</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">2</span></small><br>
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</td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt controller</span></small><br>
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</td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000200 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000300 : IRQ
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registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Timer unit<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000300</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0x80000400 : timer
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registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">8, 9<br>
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</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">LEON3 debug support
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unit (DSU)<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x90000000 -
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0xA0000000 : DSU registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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</tbody>
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</table>
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<small><span style="font-family: helvetica,arial,sans-serif;"><br>
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Additional (optional) IP cores are assigned addresses and interrupts as
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desribed in the table below. These assignments are LEON3MP specific and
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can be changed without impact on software compatibility.<br>
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<br>
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</span></small>
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<table style="width: 100%; text-align: left;" border="1" cellpadding="2" cellspacing="2">
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<tbody>
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<tr>
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<th style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Core</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory area<br>
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</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt</span></small></th>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Serial debug
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communication link<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000700 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000800 : AHB UART
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registers</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small> </td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Ethernet debug
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communication link</span></small><br>
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</td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small> </td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">JTAG debug
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communication link</span></small></td>
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<td valign="top">-<br>
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</td>
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<td valign="top"><br>
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</td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">10/100 Mbit ethernet MAC<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xFFFB0000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0xFFFB1000 :
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ethernet
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control registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">12</span></small></td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">PCI interface</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xE0000000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0x00000000 : PCI bus<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">13</span></small></td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">On-chip RAM<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xA0000000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0xA0100000 : On-chip
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RAM<br>
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</span></small></td>
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<td valign="top"><br>
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</td>
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</tr>
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</tbody>
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</table>
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<br>
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<h4><small><span style="font-family: helvetica,arial,sans-serif;">
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</span></small></h4>
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<h4><span style="font-family: helvetica,arial,sans-serif;">Configuration</span></h4>
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<div style="text-align: left;"><small><span style="font-family: helvetica,arial,sans-serif;">The configuartion of
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the LEON3MP design is defined through the config package located <a href="config.vhd">config.vhd</a>.
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This file can be automatically generated using a GUI based on tkconfig.
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To launch the GUI, do 'make xconfig'. After the configuration is
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completed, save and
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exit the tool and config.vhd will be created automatically.
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<br>
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<br>
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<br>
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<img alt="" src="../share/gui.gif" height="148" width="561"><br>
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<br>
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<i>Figure 1. LEON3MP configuration GUI<br>
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<br>
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</i></span></small><small><span style="font-family: helvetica,arial,sans-serif;">The
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design is pre-configured in a suitable manner for the Avnet board. The
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32-bit SRAM is used to access the on-board 1 Mbyte SRAM. The PCI and
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ethernet interface can also be enabled and are fully functional. The 66
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MHz board oscillator is multiplied with 3/5 by
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an on-chip DCM to generate 40 MHz frequency.</span></small><br style="font-family: helvetica,arial,sans-serif;">
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<small>
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</small></div>
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<h4><span style="font-family: helvetica,arial,sans-serif;">Simulation</span></h4>
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<small><span style="font-family: helvetica,arial,sans-serif;">To
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simulate the testbench, first compile the model for simulation. This
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can be done automatically for three different simulators. Execute one
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of the following commands:</span><br style="font-family: helvetica,arial,sans-serif;">
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</small>
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<ul style="font-family: helvetica,arial,sans-serif;">
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<li><small>make vsim</small></li><li><small>make ncsim</small></li><li><small>make ghdl</small></li>
|
249 |
|
|
</ul>
|
250 |
|
|
|
251 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">For vsim,
|
252 |
|
|
start the simulation with 'vsim testbench' and do 'run 100'. This
|
253 |
|
|
should print the current LEON3MP configuration:</span><br style="font-family: helvetica,arial,sans-serif;">
|
254 |
|
|
</small><br>
|
255 |
|
|
|
256 |
|
|
<small><span style="font-family: courier new,courier,monospace;">$ vsim
|
257 |
|
|
-c -quiet testbench</span><br style="font-family: courier new,courier,monospace;">
|
258 |
|
|
<span style="font-family: courier new,courier,monospace;">Reading
|
259 |
|
|
/usr/local/model58/tcl/vsim/pref.tcl</span><br style="font-family: courier new,courier,monospace;">
|
260 |
|
|
<span style="font-family: courier new,courier,monospace;">Reading
|
261 |
|
|
/home/jiri/modelsim.tcl</span><br style="font-family: courier new,courier,monospace;">
|
262 |
|
|
</small><small><span style="font-family: courier new,courier,monospace;"></span></small><br style="font-family: courier new,courier,monospace;">
|
263 |
|
|
|
264 |
|
|
<small><span style="font-family: courier new,courier,monospace;"># 5.8</span><br style="font-family: courier new,courier,monospace;">
|
265 |
|
|
</small><small><span style="font-family: courier new,courier,monospace;"></span><big><tt>#
|
266 |
|
|
VSIM 1> run<br>
|
267 |
|
|
# LEON3 Demonstration design<br>
|
268 |
|
|
# GRLIB Version 0.13<br>
|
269 |
|
|
# Target technology: virtex2 , memory library: virtex2<br>
|
270 |
|
|
# ahbctrl: mst0: Gaisler
|
271 |
|
|
Research Leon3 SPARC V8
|
272 |
|
|
Processor<br>
|
273 |
|
|
# ahbctrl: mst1: Gaisler
|
274 |
|
|
Research AHB Debug UART<br>
|
275 |
|
|
# ahbctrl: mst2: Gaisler
|
276 |
|
|
Research Fast 32-bit PCI
|
277 |
|
|
Bridge<br>
|
278 |
|
|
# ahbctrl: mst3: Gaisler
|
279 |
|
|
Research AMBA DMA controller<br>
|
280 |
|
|
# ahbctrl: mst5: Gaisler
|
281 |
|
|
Research OC ethernet AHB
|
282 |
|
|
interface<br>
|
283 |
|
|
# ahbctrl: slv0: Gaisler
|
284 |
|
|
Research Simple SRAM
|
285 |
|
|
Controller<br>
|
286 |
|
|
# ahbctrl: memory at 0x00000000,
|
287 |
|
|
size 16 Mbyte, cacheable, prefetch<br>
|
288 |
|
|
# ahbctrl: memory at 0x40000000,
|
289 |
|
|
size 16 Mbyte, cacheable, prefetch<br>
|
290 |
|
|
# ahbctrl: slv1: Gaisler
|
291 |
|
|
Research AHB/APB Bridge<br>
|
292 |
|
|
# ahbctrl: memory at 0x80000000,
|
293 |
|
|
size 1 Mbyte<br>
|
294 |
|
|
# ahbctrl: slv2: Gaisler
|
295 |
|
|
Research Leon3 Debug Support
|
296 |
|
|
Unit<br>
|
297 |
|
|
# ahbctrl: memory at 0x90000000,
|
298 |
|
|
size 256 Mbyte<br>
|
299 |
|
|
# ahbctrl: slv4: Gaisler
|
300 |
|
|
Research Fast 32-bit PCI
|
301 |
|
|
Bridge<br>
|
302 |
|
|
# ahbctrl: memory at 0xe0000000,
|
303 |
|
|
size 256 Mbyte<br>
|
304 |
|
|
# ahbctrl: I/O port at 0xfff80000,
|
305 |
|
|
size 128kbyte<br>
|
306 |
|
|
# ahbctrl: slv5: Gaisler
|
307 |
|
|
Research OC ethernet AHB
|
308 |
|
|
interface<br>
|
309 |
|
|
# ahbctrl: I/O port at 0xfffb0000,
|
310 |
|
|
size 4kbyte<br>
|
311 |
|
|
# ahbctrl: slv6: Gaisler
|
312 |
|
|
Research OC CAN AHB interface<br>
|
313 |
|
|
# ahbctrl: I/O port at 0xfffc0000,
|
314 |
|
|
size 4kbyte<br>
|
315 |
|
|
# ahbctrl: slv7: Gaisler
|
316 |
|
|
Research Generic AHB SRAM
|
317 |
|
|
module<br>
|
318 |
|
|
# ahbctrl: memory at 0xa0000000,
|
319 |
|
|
size 1 Mbyte, cacheable, prefetch<br>
|
320 |
|
|
# ahbctrl: AHB arbiter/multiplexer rev 1<br>
|
321 |
|
|
# ahbctrl: Common I/O area at 0xfff00000, 1 Mbyte<br>
|
322 |
|
|
# ahbctrl: Configuration area at 0xfffff000, 4 kbyte<br>
|
323 |
|
|
# apbctrl: APB Bridge at 0x80000000 rev 1<br>
|
324 |
|
|
# apbctrl: slv1: Gaisler
|
325 |
|
|
Research Generic UART<br>
|
326 |
|
|
# apbctrl: I/O ports at 0x80000100,
|
327 |
|
|
size 256 byte<br>
|
328 |
|
|
# apbctrl: slv2: Gaisler
|
329 |
|
|
Research Multi-processor
|
330 |
|
|
Interrupt Ctrl.<br>
|
331 |
|
|
# apbctrl: I/O ports at 0x80000200,
|
332 |
|
|
size 256 byte<br>
|
333 |
|
|
# apbctrl: slv3: Gaisler
|
334 |
|
|
Research Modular Timer Unit<br>
|
335 |
|
|
# apbctrl: I/O ports at 0x80000300,
|
336 |
|
|
size 256 byte<br>
|
337 |
|
|
# apbctrl: slv4: Gaisler
|
338 |
|
|
Research Fast 32-bit PCI
|
339 |
|
|
Bridge<br>
|
340 |
|
|
# apbctrl: I/O ports at 0x80000400,
|
341 |
|
|
size 256 byte<br>
|
342 |
|
|
# apbctrl: slv5: Gaisler
|
343 |
|
|
Research AMBA DMA controller<br>
|
344 |
|
|
# apbctrl: I/O ports at 0x80000500,
|
345 |
|
|
size 256 byte<br>
|
346 |
|
|
# apbctrl: slv7: Gaisler
|
347 |
|
|
Research AHB Debug UART<br>
|
348 |
|
|
# apbctrl: I/O ports at 0x80000700,
|
349 |
|
|
size 256 byte<br>
|
350 |
|
|
# ahbram7: AHB SRAM Module rev 1, 2 kbytes<br>
|
351 |
|
|
# can_oc6: Opencores CAN MAC, rev 0, irq 13<br>
|
352 |
|
|
# eth_oc5: Wishbone/AHB interface for OC ethernet MAC, irq 12<br>
|
353 |
|
|
# eth_oc5: Opencores 10/100 Mbit ethernet MAC, rev 0<br>
|
354 |
|
|
# pci_mtf4: 32-bit PCI/AHB bridge rev 0, 2 Mbyte PCI memory BAR,
|
355 |
|
|
8-word FIFOs<br>
|
356 |
|
|
# dmactrl5: 32-bit DMA controller & AHB/AHB bridge rev 0<br>
|
357 |
|
|
# gptimer3: GR Timer Unit rev 0, 16-bit scaler, 1 32-bit timers, irq 8<br>
|
358 |
|
|
# irqmp: Multi-processor Interrupt Controller rev 1, #cpu 1<br>
|
359 |
|
|
# apbuart1: Generic UART rev 1, irq 2<br>
|
360 |
|
|
# srctrl0: 32-bit PROM/SRAM controller rev 0<br>
|
361 |
|
|
# ahbuart7: AHB Debug UART rev 0<br>
|
362 |
|
|
# dsu3_2: LEON3 Debug support unit<br>
|
363 |
|
|
# leon3_0: LEON3 SPARC V8 processor rev 0<br>
|
364 |
|
|
# leon3_0: icache 1*4 kbyte, dcache 1*4 kbyte</tt></big><br style="font-family: courier new,courier,monospace;">
|
365 |
|
|
<span style="font-family: courier new,courier,monospace;"></span><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
|
366 |
|
|
<span style="font-family: courier new,courier,monospace;">VSIM 2>
|
367 |
|
|
run -all<br>
|
368 |
|
|
##<br>
|
369 |
|
|
# **** GRLIB system test starting ****<br>
|
370 |
|
|
# Leon3 SPARC V8 Processor<br>
|
371 |
|
|
# register file<br>
|
372 |
|
|
# multiplier<br>
|
373 |
|
|
# radix-2 divider<br>
|
374 |
|
|
# cache system<br>
|
375 |
|
|
# Multi-processor Interrupt Ctrl.<br>
|
376 |
|
|
# Generic UART<br>
|
377 |
|
|
# Modular Timer Unit<br>
|
378 |
|
|
# Test passed, halting with IU error mode<br>
|
379 |
|
|
#<br>
|
380 |
|
|
# ** Failure: *** IU in error mode, simulation halted ***<br>
|
381 |
|
|
VSIM 2></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
|
382 |
|
|
</span></small>
|
383 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;">Synthesis<br>
|
384 |
|
|
</span></small></h4>
|
385 |
|
|
|
386 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
|
387 |
|
|
|
388 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">To
|
389 |
|
|
synthesize and place&route, use the make utility and issue either 'make ise' or 'make ise-synp' to<br>
|
390 |
|
|
use the XST or Synplify tools respectively.<br>
|
391 |
|
|
<br>
|
392 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;">Alternatively, the design can be implemented using
|
393 |
|
|
the graphical XGrlib tool, which is started with 'make xgrlib'.</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
|
394 |
|
|
<br>
|
395 |
|
|
<br>
|
396 |
|
|
<img alt="" src="../../doc/grlib/xgrlib.gif" height="537" width="619"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> </span></small><br>
|
397 |
|
|
|
398 |
|
|
<div style="text-align: justify;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></div>
|
399 |
|
|
|
400 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">
|
401 |
|
|
<br>
|
402 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><i>Figure 2. XGrlib
|
403 |
|
|
implementation tool</i></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
|
404 |
|
|
<br>
|
405 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;">To program the fpga, issue 'make ise-prog-fpga'. To re-program the configuration proms, do 'make ise-prog-prom'.<br>
|
406 |
|
|
After programming the proms, power-cycle the board to re-load the fpga.<br>
|
407 |
|
|
<br>
|
408 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;">To get
|
409 |
|
|
started quicker, suitable leon3mp.bit and leon3mp.msk files are provided in the <i>bitfiles</i>
|
410 |
|
|
directory. The fpga or
|
411 |
|
|
configuration proms can be programmed directly with this configuration,
|
412 |
|
|
using the following commands: 'make ise-prog-fpga-ref' or <br>
|
413 |
|
|
'make
|
414 |
|
|
ise-prog-prom-ref '.</span></small>
|
415 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;">Software
|
416 |
|
|
development</span></small></h4>
|
417 |
|
|
|
418 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
|
419 |
|
|
|
420 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">To
|
421 |
|
|
develop RTEMS applications, download and install the <a href="http://www.gaisler.se/bin/linux/rcc-1.0.0.pdf">LEON3 RTEMS
|
422 |
|
|
Cross-compiler</a> from gaisler.com. The LEON3 bsp automatically
|
423 |
|
|
detects
|
424 |
|
|
the location of UARTs, timers, interrupt controller and ethernet core
|
425 |
|
|
using the plug&play information. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">
|
426 |
|
|
A <a href="http://www.gaisler.com/doc/bcc.html">LEON3 bare-C compiler</a>
|
427 |
|
|
is also available for download from gaisler.com. Both the RTEMS
|
428 |
|
|
and the bare-C compilers now come with full source code for both the
|
429 |
|
|
low-level I/O routines as well as the mkprom prom builder. This should
|
430 |
|
|
allow users to adapt the run-time to their own needs. All sources are
|
431 |
|
|
provided under GNU GPL, contact <a href="mailto:sales@gaisler.com">Gaisler
|
432 |
|
|
Research</a> for commercial licenses of this software.<br>
|
433 |
|
|
<br>
|
434 |
|
|
A Leon3 port of uClinux and linux-2.6.11 is available in the <a href="http://www.gaisler.com/products/linux.html">snapgear
|
435 |
|
|
linux distribution</a>.<br>
|
436 |
|
|
</span></small>
|
437 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;">Debugging<br>
|
438 |
|
|
</span></small></h4>
|
439 |
|
|
|
440 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">The
|
441 |
|
|
on-chip debug support unit (DSU) makes debugging of target hardware
|
442 |
|
|
relatively easy. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">The
|
443 |
|
|
design support both serial, ethernet and JTAG debug interface, and the </span></small><small><span style="font-family: helvetica,arial,sans-serif;"> <a href="http://www.gaisler.com/products/grmon/grmon.html">GRMON debug
|
444 |
|
|
monitor</a></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> can be attached with a serial cable, over a LAN, or using the Xilinx JTAG programming cable. </span></small><small><span style="font-family: helvetica,arial,sans-serif;"> Note that when you use the ethernet or the JTAG
|
445 |
|
|
interface, you need specify the frequency of the AHB clock since it is
|
446 |
|
|
not auto-detected. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">Below
|
447 |
|
|
is a log from a debug session.<br>
|
448 |
|
|
<br>
|
449 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">
|
450 |
|
|
<span style="font-family: courier new,courier,monospace;"><br>
|
451 |
|
|
$ grmon -u -grlib -jtag -freq 40<br>
|
452 |
|
|
<br>
|
453 |
|
|
GRMON - The LEON multi purpose monitor v1.0.9<br>
|
454 |
|
|
<br>
|
455 |
|
|
Copyright (C) 2004, Gaisler Research - all rights reserved.<br>
|
456 |
|
|
For latest updates, go to http://www.gaisler.com/<br>
|
457 |
|
|
Comments or bug-reports to grmon@gaisler.com<br>
|
458 |
|
|
<br>
|
459 |
|
|
<br>
|
460 |
|
|
GRLIB DSU Monitor backend 1.0.2 (professional version)<br>
|
461 |
|
|
<br>
|
462 |
|
|
using JTAG cable on parallel port<br>
|
463 |
|
|
<br>
|
464 |
|
|
initialising ...........<br>
|
465 |
|
|
<br> Component
|
466 |
|
|
Vendor<br>
|
467 |
|
|
Leon3 SPARC V8 Processor Gaisler Research<br>
|
468 |
|
|
AHB Debug JTAG
|
469 |
|
|
TAP
|
470 |
|
|
Gaisler Research<br>
|
471 |
|
|
Simple 32-bit PCI Target Gaisler Research<br>
|
472 |
|
|
AHB interface for 10/100 Mbit MA Gaisler Research<br>
|
473 |
|
|
Simple SRAM
|
474 |
|
|
Controller
|
475 |
|
|
Gaisler Research<br>
|
476 |
|
|
AHB/APB
|
477 |
|
|
Bridge
|
478 |
|
|
Gaisler Research<br>
|
479 |
|
|
Leon3 Debug Support Unit Gaisler Research<br>
|
480 |
|
|
AHB interface for 10/100 Mbit MA Gaisler Research<br>
|
481 |
|
|
Generic APB
|
482 |
|
|
UART
|
483 |
|
|
Gaisler Research<br>
|
484 |
|
|
Multi-processor Interrupt Ctrl Gaisler Research<br>
|
485 |
|
|
Modular Timer
|
486 |
|
|
Unit
|
487 |
|
|
Gaisler Research<br>
|
488 |
|
|
<br>
|
489 |
|
|
Use command 'info sys' to print a detailed report of attached cores<br>
|
490 |
|
|
<br>
|
491 |
|
|
grmon[grlib]> inf sys<br>
|
492 |
|
|
00.01:003 Gaisler Research Leon3 SPARC V8 Processor (ver 0)<br>
|
493 |
|
|
ahb master 0<br>
|
494 |
|
|
01.01:01c Gaisler Research AHB Debug JTAG TAP (ver 0)<br>
|
495 |
|
|
ahb master 1<br>
|
496 |
|
|
02.01:012 Gaisler Research Simple 32-bit PCI Target (ver 0)<br>
|
497 |
|
|
ahb master 2<br>
|
498 |
|
|
03.01:005 Gaisler Research AHB interface for 10/100 Mbit MA (ver 0)<br>
|
499 |
|
|
ahb master 3<br>
|
500 |
|
|
00.01:008 Gaisler Research Simple SRAM Controller (ver 0)<br>
|
501 |
|
|
ahb: 00000000 - 01000000<br>
|
502 |
|
|
ahb: 40000000 - 41000000<br>
|
503 |
|
|
1024 kbyte static ram @ 0x40000000<br>
|
504 |
|
|
01.01:006 Gaisler Research AHB/APB Bridge (ver 0)<br>
|
505 |
|
|
ahb: 80000000 - 80100000<br>
|
506 |
|
|
02.01:004 Gaisler Research Leon3 Debug Support Unit (ver 0)<br>
|
507 |
|
|
ahb: 90000000 - a0000000<br>
|
508 |
|
|
AHB trace 64 lines, stack pointer 0x400fffe0<br>
|
509 |
|
|
CPU#0 win 8, hwbp 2, itrace 64, V8 mul/div, lddel 1<br>
|
510 |
|
|
|
511 |
|
|
icache 2 * 4 kbyte, 32 byte/line lru<br>
|
512 |
|
|
|
513 |
|
|
dcache 2 * 4 kbyte, 32 byte/line lru<br>
|
514 |
|
|
05.01:005 Gaisler Research AHB interface for 10/100 Mbit MA (ver 0)<br>
|
515 |
|
|
irq 12<br>
|
516 |
|
|
ahb: fffb0000 - fffb1000<br>
|
517 |
|
|
01.01:00c Gaisler Research Generic APB UART (ver 1)<br>
|
518 |
|
|
irq 2<br>
|
519 |
|
|
apb: 80000100 - 80000200<br>
|
520 |
|
|
baud rate 38400, DSU mode<br>
|
521 |
|
|
02.01:00d Gaisler Research Multi-processor Interrupt Ctrl (ver 2)<br>
|
522 |
|
|
apb: 80000200 - 80000300<br>
|
523 |
|
|
03.01:011 Gaisler Research Modular Timer Unit (ver 0)<br>
|
524 |
|
|
irq 8<br>
|
525 |
|
|
apb: 80000300 - 80000400<br>
|
526 |
|
|
8-bit scaler, 2 * 32-bit timers, divisor 40<br>
|
527 |
|
|
<br>
|
528 |
|
|
grmon[grlib]> lo /opt/sparc-elf/src/examples/stanford<br>
|
529 |
|
|
section: .text at 0x40000000, size 61200 bytes<br>
|
530 |
|
|
section: .data at 0x4000ef10, size 2080 bytes<br>
|
531 |
|
|
total size: 63280 bytes (316.8 kbit/s)<br>
|
532 |
|
|
read 197 symbols<br>
|
533 |
|
|
entry point: 0x40000000<br>
|
534 |
|
|
grmon[grlib]> run<br>
|
535 |
|
|
Starting<br>
|
536 |
|
|
Perm Towers Queens
|
537 |
|
|
Intmm Mm Puzzle
|
538 |
|
|
Quick Bubble Tree FFT<br>
|
539 |
|
|
33
|
540 |
|
|
50 33
|
541 |
|
|
34 883
|
542 |
|
|
283 33
|
543 |
|
|
50 216 1084<br>
|
544 |
|
|
<br>
|
545 |
|
|
Nonfloating point composite is 111<br>
|
546 |
|
|
<br>
|
547 |
|
|
Floating point composite is 850<br>
|
548 |
|
|
<br>
|
549 |
|
|
Program exited normally.<br>
|
550 |
|
|
grmon[grlib]><br>
|
551 |
|
|
</span></span></small>
|
552 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">
|
553 |
|
|
<br>
|
554 |
|
|
The LEON3MP test bench includes memory models of both boot-prom, sram
|
555 |
|
|
and sdram. To build memory images for these models, do 'make soft' .
|
556 |
|
|
Note: this will require that the bare-C compiler for LEON3 is
|
557 |
|
|
installed,
|
558 |
|
|
and /opt/sparc-elf/bin is added to the PATH.<br>
|
559 |
|
|
<br>
|
560 |
|
|
<br>
|
561 |
|
|
</span></small></td>
|
562 |
|
|
</tr>
|
563 |
|
|
<tr>
|
564 |
|
|
<td valign="top"><br>
|
565 |
|
|
</td>
|
566 |
|
|
</tr>
|
567 |
|
|
</tbody>
|
568 |
|
|
</table>
|
569 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">
|
570 |
|
|
</span></small>
|
571 |
|
|
</body></html>
|