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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [tech/] [unisim/] [vcomponents/] [xilinx_vcomponents.vhd] - Blame information for rev 2

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1 2 dimamali 
------------------------------------------------------------------------------
2 
--  This file is a part of the GRLIB VHDL IP LIBRARY
3 
--  Copyright (C) 2003, Gaisler Research
4 
--
5 
--  This program is free software; you can redistribute it and/or modify
6 
--  it under the terms of the GNU General Public License as published by
7 
--  the Free Software Foundation; either version 2 of the License, or
8 
--  (at your option) any later version.
9 
--
10 
--  This program is distributed in the hope that it will be useful,
11 
--  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 
--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 
--  GNU General Public License for more details.
14 
--
15 
--  You should have received a copy of the GNU General Public License
16 
--  along with this program; if not, write to the Free Software
17 
--  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
18 
-----------------------------------------------------------------------------
19 
-- Package:     vcomponents
20 
-- File:        vcomponents.vhd
21 
-- Author:      Jiri Gaisler, Gaisler Research
22 
-- Description: Component declartions of some XILINX primitives
23 
-----------------------------------------------------------------------------
24 
 
25 
library ieee;
26 
use ieee.std_logic_1164.all;
27 
 
28 
package vcomponents is
29 
  component ramb4_s16 port (
30 
    do   : out std_logic_vector (15 downto 0);
31 
    addr : in  std_logic_vector (7 downto 0);
32 
    clk  : in  std_ulogic;
33 
    di   : in  std_logic_vector (15 downto 0);
34 
    en, rst, we : in std_ulogic);
35 
  end component;
36 
  component RAMB4_S8
37 
  port (do   : out std_logic_vector (7 downto 0);
38 
        addr : in  std_logic_vector (8 downto 0);
39 
        clk  : in  std_ulogic;
40 
        di   : in  std_logic_vector (7 downto 0);
41 
        en, rst, we : in std_ulogic);
42 
  end component;
43 
  component RAMB4_S4
44 
  port (do   : out std_logic_vector (3 downto 0);
45 
        addr : in  std_logic_vector (9 downto 0);
46 
        clk  : in  std_ulogic;
47 
        di   : in  std_logic_vector (3 downto 0);
48 
        en, rst, we : in std_ulogic);
49 
  end component;
50 
  component RAMB4_S2
51 
  port (do   : out std_logic_vector (1 downto 0);
52 
        addr : in  std_logic_vector (10 downto 0);
53 
        clk  : in  std_ulogic;
54 
        di   : in  std_logic_vector (1 downto 0);
55 
        en, rst, we : in std_ulogic);
56 
  end component;
57 
  component RAMB4_S1
58 
  port (do   : out std_logic_vector (0 downto 0);
59 
        addr : in  std_logic_vector (11 downto 0);
60 
        clk  : in  std_ulogic;
61 
        di   : in  std_logic_vector (0 downto 0);
62 
        en, rst, we : in std_ulogic);
63 
  end component;
64 
  component RAMB4_S1_S1
65 
  port (
66 
        doa    : out std_logic_vector (0 downto 0);
67 
        dob    : out std_logic_vector (0 downto 0);
68 
        addra  : in  std_logic_vector (11 downto 0);
69 
        addrb  : in  std_logic_vector (11 downto 0);
70 
        clka   : in  std_ulogic;
71 
        clkb   : in  std_ulogic;
72 
        dia    : in  std_logic_vector (0 downto 0);
73 
        dib    : in  std_logic_vector (0 downto 0);
74 
        ena    : in  std_ulogic;
75 
        enb    : in  std_ulogic;
76 
        rsta   : in  std_ulogic;
77 
        rstb   : in  std_ulogic;
78 
        wea    : in  std_ulogic;
79 
        web    : in  std_ulogic
80 
       );
81 
  end component;
82 
  component RAMB4_S2_S2
83 
  port (
84 
        doa    : out std_logic_vector (1 downto 0);
85 
        dob    : out std_logic_vector (1 downto 0);
86 
        addra  : in  std_logic_vector (10 downto 0);
87 
        addrb  : in  std_logic_vector (10 downto 0);
88 
        clka   : in  std_ulogic;
89 
        clkb   : in  std_ulogic;
90 
        dia    : in  std_logic_vector (1 downto 0);
91 
        dib    : in  std_logic_vector (1 downto 0);
92 
        ena    : in  std_ulogic;
93 
        enb    : in  std_ulogic;
94 
        rsta   : in  std_ulogic;
95 
        rstb   : in  std_ulogic;
96 
        wea    : in  std_ulogic;
97 
        web    : in  std_ulogic
98 
       );
99 
  end component;
100 
  component RAMB4_S4_S4
101 
  port (
102 
        doa    : out std_logic_vector (3 downto 0);
103 
        dob    : out std_logic_vector (3 downto 0);
104 
        addra  : in  std_logic_vector (9 downto 0);
105 
        addrb  : in  std_logic_vector (9 downto 0);
106 
        clka   : in  std_ulogic;
107 
        clkb   : in  std_ulogic;
108 
        dia    : in  std_logic_vector (3 downto 0);
109 
        dib    : in  std_logic_vector (3 downto 0);
110 
        ena    : in  std_ulogic;
111 
        enb    : in  std_ulogic;
112 
        rsta   : in  std_ulogic;
113 
        rstb   : in  std_ulogic;
114 
        wea    : in  std_ulogic;
115 
        web    : in  std_ulogic
116 
       );
117 
  end component;
118 
  component RAMB4_S8_S8
119 
  port (
120 
        doa    : out std_logic_vector (7 downto 0);
121 
        dob    : out std_logic_vector (7 downto 0);
122 
        addra  : in  std_logic_vector (8 downto 0);
123 
        addrb  : in  std_logic_vector (8 downto 0);
124 
        clka   : in  std_ulogic;
125 
        clkb   : in  std_ulogic;
126 
        dia    : in  std_logic_vector (7 downto 0);
127 
        dib    : in  std_logic_vector (7 downto 0);
128 
        ena    : in  std_ulogic;
129 
        enb    : in  std_ulogic;
130 
        rsta   : in  std_ulogic;
131 
        rstb   : in  std_ulogic;
132 
        wea    : in  std_ulogic;
133 
        web    : in  std_ulogic
134 
       );
135 
  end component;
136 
  component RAMB4_S16_S16
137 
  port (
138 
        doa    : out std_logic_vector (15 downto 0);
139 
        dob    : out std_logic_vector (15 downto 0);
140 
        addra  : in  std_logic_vector (7 downto 0);
141 
        addrb  : in  std_logic_vector (7 downto 0);
142 
        clka   : in  std_ulogic;
143 
        clkb   : in  std_ulogic;
144 
        dia    : in  std_logic_vector (15 downto 0);
145 
        dib    : in  std_logic_vector (15 downto 0);
146 
        ena    : in  std_ulogic;
147 
        enb    : in  std_ulogic;
148 
        rsta   : in  std_ulogic;
149 
        rstb   : in  std_ulogic;
150 
        wea    : in  std_ulogic;
151 
        web    : in  std_ulogic
152 
       );
153 
  end component;
154 
 
155 
  component RAMB16_S1
156 
-- pragma translate_off
157 
        generic
158 
        (
159 
                INIT : bit_vector := X"0";
160 
                SRVAL : bit_vector := X"0";
161 
                WRITE_MODE : string := "WRITE_FIRST";
162 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
163 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
164 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
165 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
166 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
167 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
168 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
169 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
170 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
171 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
172 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
173 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
174 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
175 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
176 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
177 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
178 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
179 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
180 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
181 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
182 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
183 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
184 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
185 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
186 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
187 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
188 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
189 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
190 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
191 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
192 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
193 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
194 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
195 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
196 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
197 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
198 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
199 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
200 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
201 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
202 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
203 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
204 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
205 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
206 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
207 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
208 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
209 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
210 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
211 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
212 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
213 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
214 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
215 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
216 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
217 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
218 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
219 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
220 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
221 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
222 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
223 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
224 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
225 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
226 
        );
227 
-- pragma translate_on
228 
  port (
229 
    DO : out std_logic_vector (0 downto 0);
230 
    ADDR : in std_logic_vector (13 downto 0);
231 
    CLK : in std_ulogic;
232 
    DI : in std_logic_vector (0 downto 0);
233 
    EN : in std_ulogic;
234 
    SSR : in std_ulogic;
235 
    WE : in std_ulogic
236 
  );
237 
end component;
238 
 
239 
  component RAMB16_S2
240 
-- pragma translate_off
241 
        generic
242 
        (
243 
                INIT : bit_vector := X"0";
244 
                SRVAL : bit_vector := X"0";
245 
                WRITE_MODE : string := "WRITE_FIRST";
246 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
247 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
248 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
249 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
250 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
251 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
252 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
253 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
254 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
255 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
256 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
257 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
258 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
259 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
260 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
261 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
262 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
263 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
264 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
265 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
266 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
267 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
268 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
269 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
270 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
271 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
272 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
273 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
274 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
275 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
276 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
277 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
278 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
279 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
280 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
281 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
282 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
283 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
284 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
285 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
286 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
287 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
288 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
289 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
290 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
291 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
292 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
293 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
294 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
295 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
296 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
297 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
298 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
299 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
300 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
301 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
302 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
303 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
304 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
305 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
306 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
307 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
308 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
309 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
310 
        );
311 
-- pragma translate_on
312 
  port (
313 
   DO : out std_logic_vector (1 downto 0);
314 
   ADDR : in std_logic_vector (12 downto 0);
315 
   CLK : in std_ulogic;
316 
   DI : in std_logic_vector (1 downto 0);
317 
   EN : in std_ulogic;
318 
   SSR : in std_ulogic;
319 
   WE : in std_ulogic
320 
 );
321 
  end component;
322 
 
323 
  component RAMB16_S4
324 
-- pragma translate_off
325 
        generic
326 
        (
327 
                INIT : bit_vector := X"0";
328 
                SRVAL : bit_vector := X"0";
329 
                WRITE_MODE : string := "WRITE_FIRST";
330 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
331 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
332 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
333 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
334 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
335 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
336 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
337 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
338 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
339 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
340 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
341 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
342 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
343 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
344 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
345 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
346 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
347 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
348 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
349 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
350 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
351 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
352 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
353 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
354 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
355 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
356 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
357 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
358 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
359 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
360 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
361 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
362 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
363 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
364 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
365 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
366 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
367 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
368 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
369 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
370 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
371 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
372 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
373 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
374 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
375 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
376 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
377 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
378 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
379 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
380 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
381 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
382 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
383 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
384 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
385 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
386 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
387 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
388 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
389 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
390 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
391 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
392 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
393 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
394 
        );
395 
-- pragma translate_on
396 
  port (
397 
   DO : out std_logic_vector (3 downto 0);
398 
   ADDR : in std_logic_vector (11 downto 0);
399 
   CLK : in std_ulogic;
400 
   DI : in std_logic_vector (3 downto 0);
401 
   EN : in std_ulogic;
402 
   SSR : in std_ulogic;
403 
   WE : in std_ulogic
404 
 );
405 
  end component;
406 
 
407 
  component RAMB16_S9
408 
-- pragma translate_off
409 
        generic
410 
        (
411 
                INIT : bit_vector := X"000";
412 
                SRVAL : bit_vector := X"000";
413 
                WRITE_MODE : string := "WRITE_FIRST";
414 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
415 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
416 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
417 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
418 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
419 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
420 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
421 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
422 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
423 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
424 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
425 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
426 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
427 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
428 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
429 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
430 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
431 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
432 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
433 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
434 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
435 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
436 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
437 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
438 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
439 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
440 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
441 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
442 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
443 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
444 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
445 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
446 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
447 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
448 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
449 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
450 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
451 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
452 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
453 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
454 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
455 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
456 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
457 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
458 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
459 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
460 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
461 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
462 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
463 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
464 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
465 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
466 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
467 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
468 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
469 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
470 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
471 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
472 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
473 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
474 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
475 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
476 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
477 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
478 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
479 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
480 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
481 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
482 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
483 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
484 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
485 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
486 
        );
487 
-- pragma translate_on
488 
  port (
489 
   DO : out std_logic_vector (7 downto 0);
490 
   DOP : out std_logic_vector (0 downto 0);
491 
   ADDR : in std_logic_vector (10 downto 0);
492 
   CLK : in std_ulogic;
493 
   DI : in std_logic_vector (7 downto 0);
494 
   DIP : in std_logic_vector (0 downto 0);
495 
   EN : in std_ulogic;
496 
   SSR : in std_ulogic;
497 
   WE : in std_ulogic
498 
 );
499 
  end component;
500 
 
501 
  component RAMB16_S18
502 
-- pragma translate_off
503 
        generic
504 
        (
505 
                INIT : bit_vector := X"00000";
506 
                SRVAL : bit_vector := X"00000";
507 
                write_mode : string := "WRITE_FIRST";
508 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
509 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
510 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
511 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
512 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
513 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
514 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
515 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
516 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
517 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
518 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
519 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
520 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
521 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
522 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
523 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
524 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
525 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
526 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
527 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
528 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
529 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
530 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
531 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
532 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
533 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
534 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
535 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
536 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
537 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
538 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
539 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
540 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
541 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
542 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
543 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
544 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
545 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
546 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
547 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
548 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
549 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
550 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
551 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
552 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
553 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
554 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
555 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
556 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
557 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
558 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
559 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
560 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
561 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
562 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
563 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
564 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
565 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
566 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
567 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
568 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
569 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
570 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
571 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
572 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
573 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
574 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
575 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
576 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
577 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
578 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
579 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
580 
        );
581 
-- pragma translate_on
582 
  port (
583 
    DO : out std_logic_vector (15 downto 0);
584 
    DOP : out std_logic_vector (1 downto 0);
585 
    ADDR : in std_logic_vector (9 downto 0);
586 
    CLK : in std_ulogic;
587 
    DI : in std_logic_vector (15 downto 0);
588 
    DIP : in std_logic_vector (1 downto 0);
589 
    EN : in std_ulogic;
590 
    SSR : in std_ulogic;
591 
    WE : in std_ulogic
592 
  );
593 
  end component;
594 
 
595 
  component RAMB16_S36
596 
-- pragma translate_off
597 
        generic
598 
        (
599 
                INIT : bit_vector := X"000000000";
600 
                SRVAL : bit_vector := X"000000000";
601 
                WRITE_MODE : string := "WRITE_FIRST";
602 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
603 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
604 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
605 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
606 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
607 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
608 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
609 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
610 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
611 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
612 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
613 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
614 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
615 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
616 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
617 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
618 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
619 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
620 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
621 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
622 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
623 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
624 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
625 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
626 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
627 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
628 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
629 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
630 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
631 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
632 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
633 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
634 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
635 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
636 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
637 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
638 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
639 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
640 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
641 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
642 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
643 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
644 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
645 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
646 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
647 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
648 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
649 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
650 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
651 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
652 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
653 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
654 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
655 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
656 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
657 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
658 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
659 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
660 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
661 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
662 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
663 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
664 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
665 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
666 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
667 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
668 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
669 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
670 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
671 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
672 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
673 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
674 
        );
675 
-- pragma translate_on
676 
  port (
677 
   DO : out std_logic_vector (31 downto 0);
678 
   DOP : out std_logic_vector (3 downto 0);
679 
   ADDR : in std_logic_vector (8 downto 0);
680 
   CLK : in std_ulogic;
681 
   DI : in std_logic_vector (31 downto 0);
682 
   DIP : in std_logic_vector (3 downto 0);
683 
   EN : in std_ulogic;
684 
   SSR : in std_ulogic;
685 
   WE : in std_ulogic
686 
 );
687 
end component;
688 
 
689 
  component RAMB16_S4_S4
690 
-- pragma translate_off
691 
        generic
692 
        (
693 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
694 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
695 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
696 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
697 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
698 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
699 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
700 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
701 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
702 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
703 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
704 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
705 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
706 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
707 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
708 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
709 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
710 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
711 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
712 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
713 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
714 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
715 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
716 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
717 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
718 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
719 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
720 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
721 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
722 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
723 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
724 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
725 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
726 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
727 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
728 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
729 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
730 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
731 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
732 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
733 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
734 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
735 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
736 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
737 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
738 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
739 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
740 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
741 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
742 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
743 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
744 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
745 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
746 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
747 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
748 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
749 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
750 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
751 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
752 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
753 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
754 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
755 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
756 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
757 
                INIT_A : bit_vector := X"0";
758 
                INIT_B : bit_vector := X"0";
759 
                SIM_COLLISION_CHECK : string := "ALL";
760 
                SRVAL_A : bit_vector := X"0";
761 
                SRVAL_B : bit_vector := X"0";
762 
                WRITE_MODE_A : string := "WRITE_FIRST";
763 
                WRITE_MODE_B : string := "WRITE_FIRST"
764 
        );
765 
-- pragma translate_on
766 
  port (
767 
   DOA : out std_logic_vector (3 downto 0);
768 
   DOB : out std_logic_vector (3 downto 0);
769 
   ADDRA : in std_logic_vector (11 downto 0);
770 
   ADDRB : in std_logic_vector (11 downto 0);
771 
   CLKA : in std_ulogic;
772 
   CLKB : in std_ulogic;
773 
   DIA : in std_logic_vector (3 downto 0);
774 
   DIB : in std_logic_vector (3 downto 0);
775 
   ENA : in std_ulogic;
776 
   ENB : in std_ulogic;
777 
   SSRA : in std_ulogic;
778 
   SSRB : in std_ulogic;
779 
   WEA : in std_ulogic;
780 
   WEB : in std_ulogic
781 
 );
782 
  end component;
783 
 
784 
  component RAMB16_S1_S1
785 
-- pragma translate_off
786 
        generic
787 
        (
788 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
789 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
790 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
791 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
792 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
793 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
794 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
795 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
796 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
797 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
798 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
799 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
800 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
801 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
802 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
803 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
804 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
805 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
806 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
807 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
808 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
809 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
810 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
811 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
812 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
813 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
814 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
815 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
816 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
817 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
818 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
819 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
820 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
821 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
822 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
823 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
824 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
825 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
826 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
827 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
828 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
829 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
830 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
831 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
832 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
833 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
834 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
835 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
836 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
837 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
838 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
839 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
840 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
841 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
842 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
843 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
844 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
845 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
846 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
847 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
848 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
849 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
850 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
851 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
852 
                INIT_A : bit_vector := X"0";
853 
                INIT_B : bit_vector := X"0";
854 
                SIM_COLLISION_CHECK : string := "ALL";
855 
                SRVAL_A : bit_vector := X"0";
856 
                SRVAL_B : bit_vector := X"0";
857 
                WRITE_MODE_A : string := "WRITE_FIRST";
858 
                WRITE_MODE_B : string := "WRITE_FIRST"
859 
        );
860 
-- pragma translate_on
861 
  port (
862 
   DOA : out std_logic_vector (0 downto 0);
863 
   DOB : out std_logic_vector (0 downto 0);
864 
   ADDRA : in std_logic_vector (13 downto 0);
865 
   ADDRB : in std_logic_vector (13 downto 0);
866 
   CLKA : in std_ulogic;
867 
   CLKB : in std_ulogic;
868 
   DIA : in std_logic_vector (0 downto 0);
869 
   DIB : in std_logic_vector (0 downto 0);
870 
   ENA : in std_ulogic;
871 
   ENB : in std_ulogic;
872 
   SSRA : in std_ulogic;
873 
   SSRB : in std_ulogic;
874 
   WEA : in std_ulogic;
875 
   WEB : in std_ulogic
876 
 );
877 
  end component;
878 
 
879 
  component RAMB16_S2_S2
880 
-- pragma translate_off
881 
        generic
882 
        (
883 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
884 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
885 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
886 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
887 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
888 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
889 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
890 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
891 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
892 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
893 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
894 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
895 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
896 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
897 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
898 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
899 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
900 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
901 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
902 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
903 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
904 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
905 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
906 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
907 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
908 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
909 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
910 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
911 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
912 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
913 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
914 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
915 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
916 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
917 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
918 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
919 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
920 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
921 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
922 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
923 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
924 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
925 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
926 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
927 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
928 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
929 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
930 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
931 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
932 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
933 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
934 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
935 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
936 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
937 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
938 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
939 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
940 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
941 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
942 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
943 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
944 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
945 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
946 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
947 
                INIT_A : bit_vector := X"0";
948 
                INIT_B : bit_vector := X"0";
949 
                SIM_COLLISION_CHECK : string := "ALL";
950 
                SRVAL_A : bit_vector := X"0";
951 
                SRVAL_B : bit_vector := X"0";
952 
                WRITE_MODE_A : string := "WRITE_FIRST";
953 
                WRITE_MODE_B : string := "WRITE_FIRST"
954 
        );
955 
-- pragma translate_on
956 
  port (
957 
   DOA : out std_logic_vector (1 downto 0);
958 
   DOB : out std_logic_vector (1 downto 0);
959 
   ADDRA : in std_logic_vector (12 downto 0);
960 
   ADDRB : in std_logic_vector (12 downto 0);
961 
   CLKA : in std_ulogic;
962 
   CLKB : in std_ulogic;
963 
   DIA : in std_logic_vector (1 downto 0);
964 
   DIB : in std_logic_vector (1 downto 0);
965 
   ENA : in std_ulogic;
966 
   ENB : in std_ulogic;
967 
   SSRA : in std_ulogic;
968 
   SSRB : in std_ulogic;
969 
   WEA : in std_ulogic;
970 
   WEB : in std_ulogic
971 
 );
972 
  end component;
973 
 
974 
  component RAMB16_S9_S9
975 
-- pragma translate_off
976 
        generic
977 
        (
978 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
979 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
980 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
981 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
982 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
983 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
984 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
985 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
986 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
987 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
988 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
989 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
990 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
991 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
992 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
993 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
994 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
995 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
996 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
997 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
998 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
999 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1000 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1001 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1002 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1003 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1004 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1005 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1006 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1007 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1008 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1009 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1010 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1011 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1012 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1013 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1014 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1015 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1016 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1017 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1018 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1019 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1020 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1021 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1022 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1023 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1024 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1025 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1026 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1027 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1028 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1029 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1030 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1031 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1032 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1033 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1034 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1035 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1036 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1037 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1038 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1039 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1040 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1041 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1042 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1043 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1044 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1045 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1046 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1047 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1048 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1049 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1050 
                INIT_A : bit_vector := X"000";
1051 
                INIT_B : bit_vector := X"000";
1052 
                SIM_COLLISION_CHECK : string := "ALL";
1053 
                SRVAL_A : bit_vector := X"000";
1054 
                SRVAL_B : bit_vector := X"000";
1055 
                WRITE_MODE_A : string := "WRITE_FIRST";
1056 
                WRITE_MODE_B : string := "WRITE_FIRST"
1057 
        );
1058 
-- pragma translate_on
1059 
  port (
1060 
   DOA : out std_logic_vector (7 downto 0);
1061 
   DOB : out std_logic_vector (7 downto 0);
1062 
   DOPA : out std_logic_vector (0 downto 0);
1063 
   DOPB : out std_logic_vector (0 downto 0);
1064 
   ADDRA : in std_logic_vector (10 downto 0);
1065 
   ADDRB : in std_logic_vector (10 downto 0);
1066 
   CLKA : in std_ulogic;
1067 
   CLKB : in std_ulogic;
1068 
   DIA : in std_logic_vector (7 downto 0);
1069 
   DIB : in std_logic_vector (7 downto 0);
1070 
   DIPA : in std_logic_vector (0 downto 0);
1071 
   DIPB : in std_logic_vector (0 downto 0);
1072 
   ENA : in std_ulogic;
1073 
   ENB : in std_ulogic;
1074 
   SSRA : in std_ulogic;
1075 
   SSRB : in std_ulogic;
1076 
   WEA : in std_ulogic;
1077 
   WEB : in std_ulogic
1078 
 );
1079 
end component;
1080 
 
1081 
  component RAMB16_S18_S18
1082 
-- pragma translate_off
1083 
        generic
1084 
        (
1085 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1086 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1087 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1088 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1089 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1090 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1091 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1092 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1093 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1094 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1095 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1096 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1097 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1098 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1099 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1100 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1101 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1102 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1103 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1104 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1105 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1106 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1107 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1108 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1109 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1110 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1111 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1112 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1113 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1114 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1115 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1116 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1117 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1118 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1119 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1120 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1121 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1122 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1123 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1124 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1125 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1126 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1127 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1128 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1129 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1130 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1131 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1132 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1133 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1134 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1135 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1136 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1137 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1138 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1139 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1140 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1141 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1142 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1143 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1144 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1145 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1146 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1147 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1148 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1149 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1150 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1151 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1152 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1153 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1154 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1155 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1156 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1157 
                INIT_A : bit_vector := X"00000";
1158 
                INIT_B : bit_vector := X"00000";
1159 
                SIM_COLLISION_CHECK : string := "ALL";
1160 
                SRVAL_A : bit_vector := X"00000";
1161 
                SRVAL_B : bit_vector := X"00000";
1162 
                WRITE_MODE_A : string := "WRITE_FIRST";
1163 
                WRITE_MODE_B : string := "WRITE_FIRST"
1164 
        );
1165 
-- pragma translate_on
1166 
  port (
1167 
    DOA : out std_logic_vector (15 downto 0);
1168 
    DOB : out std_logic_vector (15 downto 0);
1169 
    DOPA : out std_logic_vector (1 downto 0);
1170 
    DOPB : out std_logic_vector (1 downto 0);
1171 
    ADDRA : in std_logic_vector (9 downto 0);
1172 
    ADDRB : in std_logic_vector (9 downto 0);
1173 
    CLKA : in std_ulogic;
1174 
    CLKB : in std_ulogic;
1175 
    DIA : in std_logic_vector (15 downto 0);
1176 
    DIB : in std_logic_vector (15 downto 0);
1177 
    DIPA : in std_logic_vector (1 downto 0);
1178 
    DIPB : in std_logic_vector (1 downto 0);
1179 
    ENA : in std_ulogic;
1180 
    ENB : in std_ulogic;
1181 
    SSRA : in std_ulogic;
1182 
    SSRB : in std_ulogic;
1183 
    WEA : in std_ulogic;
1184 
    WEB : in std_ulogic);
1185 
  end component;
1186 
 
1187 
  component RAMB16_S36_S36
1188 
-- pragma translate_off
1189 
        generic
1190 
        (
1191 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1192 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1193 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1194 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1195 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1196 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1197 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1198 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1199 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1200 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1201 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1202 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1203 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1204 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1205 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1206 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1207 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1208 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1209 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1210 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1211 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1212 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1213 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1214 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1215 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1216 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1217 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1218 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1219 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1220 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1221 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1222 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1223 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1224 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1225 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1226 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1227 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1228 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1229 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1230 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1231 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1232 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1233 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1234 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1235 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1236 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1237 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1238 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1239 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1240 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1241 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1242 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1243 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1244 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1245 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1246 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1247 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1248 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1249 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1250 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1251 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1252 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1253 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1254 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1255 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1256 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1257 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1258 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1259 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1260 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1261 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1262 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
1263 
                INIT_A : bit_vector := X"000000000";
1264 
                INIT_B : bit_vector := X"000000000";
1265 
                SIM_COLLISION_CHECK : string := "ALL";
1266 
                SRVAL_A : bit_vector := X"000000000";
1267 
                SRVAL_B : bit_vector := X"000000000";
1268 
                WRITE_MODE_A : string := "WRITE_FIRST";
1269 
                WRITE_MODE_B : string := "WRITE_FIRST"
1270 
        );
1271 
-- pragma translate_on
1272 
  port (
1273 
    DOA : out std_logic_vector (31 downto 0);
1274 
    DOB : out std_logic_vector (31 downto 0);
1275 
    DOPA : out std_logic_vector (3 downto 0);
1276 
    DOPB : out std_logic_vector (3 downto 0);
1277 
    ADDRA : in std_logic_vector (8 downto 0);
1278 
    ADDRB : in std_logic_vector (8 downto 0);
1279 
    CLKA : in std_ulogic;
1280 
    CLKB : in std_ulogic;
1281 
    DIA : in std_logic_vector (31 downto 0);
1282 
    DIB : in std_logic_vector (31 downto 0);
1283 
    DIPA : in std_logic_vector (3 downto 0);
1284 
    DIPB : in std_logic_vector (3 downto 0);
1285 
    ENA : in std_ulogic;
1286 
    ENB : in std_ulogic;
1287 
    SSRA : in std_ulogic;
1288 
    SSRB : in std_ulogic;
1289 
    WEA : in std_ulogic;
1290 
    WEB : in std_ulogic);
1291 
  end component;
1292 
 
1293 
  component DCM
1294 
    generic (
1295 
      CLKDV_DIVIDE : real := 2.0;
1296 
      CLKFX_DIVIDE : integer := 1;
1297 
      CLKFX_MULTIPLY : integer := 4;
1298 
      CLKIN_DIVIDE_BY_2 : boolean := false;
1299 
      CLKIN_PERIOD : real := 10.0;
1300 
      CLKOUT_PHASE_SHIFT : string := "NONE";
1301 
      CLK_FEEDBACK : string := "1X";
1302 
      DESKEW_ADJUST : string := "SYSTEM_SYNCHRONOUS";
1303 
      DFS_FREQUENCY_MODE : string := "LOW";
1304 
      DLL_FREQUENCY_MODE : string := "LOW";
1305 
      DSS_MODE : string := "NONE";
1306 
      DUTY_CYCLE_CORRECTION : boolean := true;
1307 
      FACTORY_JF : bit_vector := X"C080";
1308 
      PHASE_SHIFT : integer := 0;
1309 
      STARTUP_WAIT : boolean := false
1310 
    );
1311 
    port (
1312 
      CLKFB    : in  std_logic;
1313 
      CLKIN    : in  std_logic;
1314 
      DSSEN    : in  std_logic;
1315 
      PSCLK    : in  std_logic;
1316 
      PSEN     : in  std_logic;
1317 
      PSINCDEC : in  std_logic;
1318 
      RST      : in  std_logic;
1319 
      CLK0     : out std_logic;
1320 
      CLK90    : out std_logic;
1321 
      CLK180   : out std_logic;
1322 
      CLK270   : out std_logic;
1323 
      CLK2X    : out std_logic;
1324 
      CLK2X180 : out std_logic;
1325 
      CLKDV    : out std_logic;
1326 
      CLKFX    : out std_logic;
1327 
      CLKFX180 : out std_logic;
1328 
      LOCKED   : out std_logic;
1329 
      PSDONE   : out std_logic;
1330 
      STATUS   : out std_logic_vector (7 downto 0));
1331 
  end component;
1332 
 
1333 
  component DCM_SP
1334 
  generic (
1335 
    TimingChecksOn : boolean := true;
1336 
    InstancePath : string := "*";
1337 
    Xon : boolean := true;
1338 
    MsgOn : boolean := false;
1339 
    CLKDV_DIVIDE : real := 2.0;
1340 
    CLKFX_DIVIDE : integer := 1;
1341 
    CLKFX_MULTIPLY : integer := 4;
1342 
    CLKIN_DIVIDE_BY_2 : boolean := false;
1343 
    CLKIN_PERIOD : real := 10.0;                         --non-simulatable
1344 
    CLKOUT_PHASE_SHIFT : string := "NONE";
1345 
    CLK_FEEDBACK : string := "1X";
1346 
    DESKEW_ADJUST : string := "SYSTEM_SYNCHRONOUS";     --non-simulatable
1347 
    DFS_FREQUENCY_MODE : string := "LOW";
1348 
    DLL_FREQUENCY_MODE : string := "LOW";
1349 
    DSS_MODE : string := "NONE";                        --non-simulatable
1350 
    DUTY_CYCLE_CORRECTION : boolean := true;
1351 
    FACTORY_JF : bit_vector := X"C080";                 --non-simulatable
1352 
    PHASE_SHIFT : integer := 0;
1353 
    STARTUP_WAIT : boolean := false                     --non-simulatable
1354 
    );
1355 
 
1356 
  port (
1357 
    CLK0 : out std_ulogic := '0';
1358 
    CLK180 : out std_ulogic := '0';
1359 
    CLK270 : out std_ulogic := '0';
1360 
    CLK2X : out std_ulogic := '0';
1361 
    CLK2X180 : out std_ulogic := '0';
1362 
    CLK90 : out std_ulogic := '0';
1363 
    CLKDV : out std_ulogic := '0';
1364 
    CLKFX : out std_ulogic := '0';
1365 
    CLKFX180 : out std_ulogic := '0';
1366 
    LOCKED : out std_ulogic := '0';
1367 
    PSDONE : out std_ulogic := '0';
1368 
    STATUS : out std_logic_vector(7 downto 0) := "00000000";
1369 
 
1370 
    CLKFB : in std_ulogic := '0';
1371 
    CLKIN : in std_ulogic := '0';
1372 
    DSSEN : in std_ulogic := '0';
1373 
    PSCLK : in std_ulogic := '0';
1374 
    PSEN : in std_ulogic := '0';
1375 
    PSINCDEC : in std_ulogic := '0';
1376 
    RST : in std_ulogic := '0'
1377 
    );
1378 
  end component;
1379 
 
1380 
  component BUFGMUX port (O : out std_logic; I0, I1, S : in std_logic); end component;
1381 
  component BUFG port (O : out std_logic; I : in std_logic); end component;
1382 
  component BUFGP port (O : out std_logic; I : in std_logic); end component;
1383 
  component BUFGDLL port (O : out std_logic; I : in std_logic); end component;
1384 
 
1385 
  component IBUFG  generic(
1386 
      CAPACITANCE : string := "DONT_CARE"; IOSTANDARD : string := "LVCMOS25");
1387 
    port (O : out std_logic; I : in std_logic); end component;
1388 
  component IBUF generic(
1389 
      CAPACITANCE : string := "DONT_CARE"; IOSTANDARD : string := "LVCMOS25");
1390 
    port (O : out std_ulogic; I : in std_ulogic); end component;
1391 
  component IOBUF generic (
1392 
      CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1393 
      IOSTANDARD  : string := "LVCMOS25"; SLEW : string := "SLOW");
1394 
    port (O : out std_ulogic; IO : inout std_logic; I, T : in std_ulogic); end component;
1395 
  component OBUF generic (
1396 
      CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1397 
      IOSTANDARD  : string := "LVCMOS25"; SLEW : string := "SLOW");
1398 
    port (O : out std_ulogic; I : in std_ulogic); end component;
1399 
  component OBUFT generic (
1400 
      CAPACITANCE : string := "DONT_CARE"; DRIVE : integer := 12;
1401 
      IOSTANDARD  : string := "LVCMOS25"; SLEW : string := "SLOW");
1402 
    port (O : out std_ulogic; I, T : in std_ulogic); end component;
1403 
 
1404 
  component CLKDLL
1405 
    port (
1406 
      CLK0    : out std_ulogic;
1407 
      CLK180  : out std_ulogic;
1408 
      CLK270  : out std_ulogic;
1409 
      CLK2X   : out std_ulogic;
1410 
      CLK90   : out std_ulogic;
1411 
      CLKDV   : out std_ulogic;
1412 
      LOCKED  : out std_ulogic;
1413 
      CLKFB   : in  std_ulogic;
1414 
      CLKIN   : in  std_ulogic;
1415 
      RST     : in  std_ulogic);
1416 
  end component;
1417 
 
1418 
  component CLKDLLHF
1419 
    port (
1420 
      CLK0   : out std_ulogic := '0';
1421 
      CLK180 : out std_ulogic := '0';
1422 
      CLKDV  : out std_ulogic := '0';
1423 
      LOCKED : out std_ulogic := '0';
1424 
      CLKFB  : in std_ulogic := '0';
1425 
      CLKIN  : in std_ulogic := '0';
1426 
      RST    : in std_ulogic := '0');
1427 
  end component;
1428 
 
1429 
  component BSCAN_VIRTEX
1430 
      port (CAPTURE : out STD_ULOGIC;
1431 
            DRCK1 : out STD_ULOGIC;
1432 
            DRCK2 : out STD_ULOGIC;
1433 
            RESET : out STD_ULOGIC;
1434 
            SEL1 : out STD_ULOGIC;
1435 
            SEL2 : out STD_ULOGIC;
1436 
            SHIFT : out STD_ULOGIC;
1437 
            TDI : out STD_ULOGIC;
1438 
            UPDATE : out STD_ULOGIC;
1439 
            TDO1 : in STD_ULOGIC;
1440 
            TDO2 : in STD_ULOGIC);
1441 
  end component;
1442 
 
1443 
  component BSCAN_VIRTEX2
1444 
      port (CAPTURE : out STD_ULOGIC;
1445 
            DRCK1 : out STD_ULOGIC;
1446 
            DRCK2 : out STD_ULOGIC;
1447 
            RESET : out STD_ULOGIC;
1448 
            SEL1 : out STD_ULOGIC;
1449 
            SEL2 : out STD_ULOGIC;
1450 
            SHIFT : out STD_ULOGIC;
1451 
            TDI : out STD_ULOGIC;
1452 
            UPDATE : out STD_ULOGIC;
1453 
            TDO1 : in STD_ULOGIC;
1454 
            TDO2 : in STD_ULOGIC);
1455 
  end component;
1456 
 
1457 
  component BSCAN_SPARTAN3
1458 
     port (CAPTURE : out STD_ULOGIC;
1459 
           DRCK1 : out STD_ULOGIC;
1460 
           DRCK2 : out STD_ULOGIC;
1461 
           RESET : out STD_ULOGIC;
1462 
           SEL1 : out STD_ULOGIC;
1463 
           SEL2 : out STD_ULOGIC;
1464 
           SHIFT : out STD_ULOGIC;
1465 
           TDI : out STD_ULOGIC;
1466 
           UPDATE : out STD_ULOGIC;
1467 
           TDO1 : in STD_ULOGIC;
1468 
           TDO2 : in STD_ULOGIC);
1469 
  end component;
1470 
 
1471 
  component BSCAN_VIRTEX4 generic ( JTAG_CHAIN : integer := 1);
1472 
     port ( CAPTURE : out std_ulogic;
1473 
            DRCK : out std_ulogic;
1474 
            RESET : out std_ulogic;
1475 
            SEL : out std_ulogic;
1476 
            SHIFT : out std_ulogic;
1477 
            TDI : out std_ulogic;
1478 
            UPDATE : out std_ulogic;
1479 
            TDO : in std_ulogic);
1480 
  end component;
1481 
 
1482 
  component BSCAN_VIRTEX5 generic ( JTAG_CHAIN : integer := 1);
1483 
     port ( CAPTURE : out std_ulogic;
1484 
            DRCK : out std_ulogic;
1485 
            RESET : out std_ulogic;
1486 
            SEL : out std_ulogic;
1487 
            SHIFT : out std_ulogic;
1488 
            TDI : out std_ulogic;
1489 
            UPDATE : out std_ulogic;
1490 
            TDO : in std_ulogic);
1491 
  end component;
1492 
 
1493 
  component IBUFDS
1494 
        generic (
1495 
          CAPACITANCE : string := "DONT_CARE";
1496 
          DIFF_TERM : boolean := FALSE;
1497 
          IBUF_DELAY_VALUE : string := "0";
1498 
          IFD_DELAY_VALUE : string := "AUTO";
1499 
          IOSTANDARD : string := "DEFAULT");
1500 
        port (
1501 
          O : out std_ulogic;
1502 
          I : in std_ulogic;
1503 
          IB : in std_ulogic
1504 
        );
1505 
  end component;
1506 
 
1507 
  component IBUFDS_LVDS_25
1508 
     port ( O : out std_ulogic;
1509 
            I : in std_ulogic;
1510 
            IB : in std_ulogic);
1511 
  end component;
1512 
 
1513 
  component IBUFGDS_LVDS_25
1514 
     port ( O : out std_ulogic;
1515 
            I : in std_ulogic;
1516 
            IB : in std_ulogic);
1517 
  end component;
1518 
 
1519 
  component IOBUFDS
1520 
        generic(
1521 
          CAPACITANCE : string := "DONT_CARE";
1522 
          IBUF_DELAY_VALUE : string := "0";
1523 
          IFD_DELAY_VALUE : string := "AUTO";
1524 
          IOSTANDARD : string := "DEFAULT");
1525 
        port (
1526 
          O : out std_ulogic;
1527 
          IO : inout std_ulogic;
1528 
          IOB : inout std_ulogic;
1529 
          I : in std_ulogic;
1530 
          T : in std_ulogic
1531 
        );
1532 
  end component;
1533 
 
1534 
  component OBUFDS
1535 
        generic(
1536 
                CAPACITANCE : string := "DONT_CARE";
1537 
                IOSTANDARD : string := "DEFAULT"
1538 
        );
1539 
        port(
1540 
                O : out std_ulogic;
1541 
                OB : out std_ulogic;
1542 
                I : in std_ulogic
1543 
        );
1544 
  end component;
1545 
 
1546 
  component OBUFDS_LVDS_25
1547 
     port ( O : out std_ulogic;
1548 
            OB : out std_ulogic;
1549 
            I : in std_ulogic);
1550 
  end component;
1551 
 
1552 
  component OBUFTDS_LVDS_25
1553 
     port ( O : out std_ulogic;
1554 
            OB : out std_ulogic;
1555 
            I : in std_ulogic;
1556 
            T : in std_ulogic);
1557 
  end component;
1558 
 
1559 
  component IBUFGDS is
1560 
    generic( CAPACITANCE : string  := "DONT_CARE";
1561 
      DIFF_TERM   : boolean :=  FALSE; IBUF_DELAY_VALUE : string := "0";
1562 
      IOSTANDARD  : string  := "DEFAULT");
1563 
    port (O : out std_logic; I, IB : in std_logic);
1564 
  end component;
1565 
 
1566 
  component IBUFDS_LVDS_33
1567 
     port ( O : out std_ulogic;
1568 
            I : in std_ulogic;
1569 
            IB : in std_ulogic);
1570 
  end component;
1571 
 
1572 
  component IBUFGDS_LVDS_33
1573 
     port ( O : out std_ulogic;
1574 
            I : in std_ulogic;
1575 
            IB : in std_ulogic);
1576 
  end component;
1577 
 
1578 
  component OBUFDS_LVDS_33
1579 
     port ( O : out std_ulogic;
1580 
            OB : out std_ulogic;
1581 
            I : in std_ulogic);
1582 
  end component;
1583 
 
1584 
  component OBUFTDS_LVDS_33
1585 
     port ( O : out std_ulogic;
1586 
            OB : out std_ulogic;
1587 
            I : in std_ulogic;
1588 
            T : in std_ulogic);
1589 
  end component;
1590 
 
1591 
  component FDCPE
1592 
        generic ( INIT : bit := '0');
1593 
        port (
1594 
                Q : out std_ulogic;
1595 
                C : in std_ulogic;
1596 
                CE : in std_ulogic;
1597 
                CLR : in std_ulogic;
1598 
                D : in std_ulogic;
1599 
                PRE : in std_ulogic);
1600 
  end component;
1601 
 
1602 
  component IDDR
1603 
        generic (
1604 
                DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
1605 
                INIT_Q1 : bit := '0';
1606 
                INIT_Q2 : bit := '0';
1607 
                SRTYPE : string := "SYNC");
1608 
        port
1609 
        (
1610 
                Q1 : out std_ulogic;
1611 
                Q2 : out std_ulogic;
1612 
                C : in std_ulogic;
1613 
                CE : in std_ulogic;
1614 
                D : in std_ulogic;
1615 
                R : in std_ulogic;
1616 
                S : in std_ulogic);
1617 
  end component;
1618 
 
1619 
  component ODDR
1620 
        generic (
1621 
                DDR_CLK_EDGE : string := "OPPOSITE_EDGE";
1622 
                INIT : bit := '0';
1623 
                SRTYPE : string := "SYNC");
1624 
        port (
1625 
                Q : out std_ulogic;
1626 
                C : in std_ulogic;
1627 
                CE : in std_ulogic;
1628 
                D1 : in std_ulogic;
1629 
                D2 : in std_ulogic;
1630 
                R : in std_ulogic;
1631 
                S : in std_ulogic);
1632 
  end component;
1633 
 
1634 
  component IFDDRRSE
1635 
        port (
1636 
                Q0 : out std_ulogic;
1637 
                Q1 : out std_ulogic;
1638 
                C0 : in std_ulogic;
1639 
                C1 : in std_ulogic;
1640 
                CE : in std_ulogic;
1641 
                D : in std_ulogic;
1642 
                R : in std_ulogic;
1643 
                S : in std_ulogic);
1644 
  end component;
1645 
 
1646 
  component OFDDRRSE
1647 
        port (
1648 
                Q : out std_ulogic;
1649 
                C0 : in std_ulogic;
1650 
                C1 : in std_ulogic;
1651 
                CE : in std_ulogic;
1652 
                D0 : in std_ulogic;
1653 
                D1 : in std_ulogic;
1654 
                R : in std_ulogic;
1655 
                S : in std_ulogic);
1656 
  end component;
1657 
 
1658 
  component FDDRRSE
1659 
        generic ( INIT : bit := '0');
1660 
        port (  Q : out std_ulogic;
1661 
                C0 : in std_ulogic;
1662 
                C1 : in std_ulogic;
1663 
                CE : in std_ulogic;
1664 
                D0 : in std_ulogic;
1665 
                D1 : in std_ulogic;
1666 
                R : in std_ulogic;
1667 
                S : in std_ulogic);
1668 
  end component;
1669 
 
1670 
 
1671 
  component IDELAY
1672 
        generic ( IOBDELAY_TYPE : string := "DEFAULT";
1673 
                  IOBDELAY_VALUE : integer := 0);
1674 
        port (  O : out std_ulogic;
1675 
                C : in std_ulogic;
1676 
                CE : in std_ulogic;
1677 
                I : in std_ulogic;
1678 
                INC : in std_ulogic;
1679 
                RST : in std_ulogic);
1680 
  end component;
1681 
 
1682 
  component IDELAYCTRL
1683 
        port (  RDY : out std_ulogic;
1684 
                REFCLK : in std_ulogic;
1685 
                RST : in std_ulogic);
1686 
  end component;
1687 
 
1688 
  component BUFIO
1689 
        port (  O : out std_ulogic;
1690 
                I : in std_ulogic);
1691 
  end component;
1692 
 
1693 
  component BUFR
1694 
        generic ( BUFR_DIVIDE : string := "BYPASS";
1695 
                 SIM_DEVICE : string := "VIRTEX4");
1696 
        port (  O : out std_ulogic;
1697 
                CE : in std_ulogic;
1698 
                CLR : in std_ulogic;
1699 
                I : in std_ulogic);
1700 
  end component;
1701 
 
1702 
component ODDR2
1703 
        generic
1704 
        (
1705 
                DDR_ALIGNMENT : string := "NONE";
1706 
                INIT : bit := '0';
1707 
                SRTYPE : string := "SYNC"
1708 
        );
1709 
        port
1710 
        (
1711 
                Q : out std_ulogic;
1712 
                C0 : in std_ulogic;
1713 
                C1 : in std_ulogic;
1714 
                CE : in std_ulogic;
1715 
                D0 : in std_ulogic;
1716 
                D1 : in std_ulogic;
1717 
                R : in std_ulogic;
1718 
                S : in std_ulogic
1719 
        );
1720 
end component;
1721 
 
1722 
component IDDR2
1723 
        generic
1724 
        (
1725 
                DDR_ALIGNMENT : string := "NONE";
1726 
                INIT_Q0 : bit := '0';
1727 
                INIT_Q1 : bit := '0';
1728 
                SRTYPE : string := "SYNC"
1729 
        );
1730 
        port
1731 
        (
1732 
                Q0 : out std_ulogic;
1733 
                Q1 : out std_ulogic;
1734 
                C0 : in std_ulogic;
1735 
                C1 : in std_ulogic;
1736 
                CE : in std_ulogic;
1737 
                D : in std_ulogic;
1738 
                R : in std_ulogic;
1739 
                S : in std_ulogic
1740 
        );
1741 
end component;
1742 
 
1743 
component SYSMON
1744 
        generic
1745 
        (
1746 
                INIT_40 : bit_vector := X"0000";
1747 
                INIT_41 : bit_vector := X"0000";
1748 
                INIT_42 : bit_vector := X"0800";
1749 
                INIT_43 : bit_vector := X"0000";
1750 
                INIT_44 : bit_vector := X"0000";
1751 
                INIT_45 : bit_vector := X"0000";
1752 
                INIT_46 : bit_vector := X"0000";
1753 
                INIT_47 : bit_vector := X"0000";
1754 
                INIT_48 : bit_vector := X"0000";
1755 
                INIT_49 : bit_vector := X"0000";
1756 
                INIT_4A : bit_vector := X"0000";
1757 
                INIT_4B : bit_vector := X"0000";
1758 
                INIT_4C : bit_vector := X"0000";
1759 
                INIT_4D : bit_vector := X"0000";
1760 
                INIT_4E : bit_vector := X"0000";
1761 
                INIT_4F : bit_vector := X"0000";
1762 
                INIT_50 : bit_vector := X"0000";
1763 
                INIT_51 : bit_vector := X"0000";
1764 
                INIT_52 : bit_vector := X"0000";
1765 
                INIT_53 : bit_vector := X"0000";
1766 
                INIT_54 : bit_vector := X"0000";
1767 
                INIT_55 : bit_vector := X"0000";
1768 
                INIT_56 : bit_vector := X"0000";
1769 
                INIT_57 : bit_vector := X"0000";
1770 
                SIM_MONITOR_FILE : string := "design.txt"
1771 
        );
1772 
        port
1773 
        (
1774 
                ALM : out std_logic_vector(2 downto 0);
1775 
                BUSY : out std_ulogic;
1776 
                CHANNEL : out std_logic_vector(4 downto 0);
1777 
                DO : out std_logic_vector(15 downto 0);
1778 
                DRDY : out std_ulogic;
1779 
                EOC : out std_ulogic;
1780 
                EOS : out std_ulogic;
1781 
                JTAGBUSY : out std_ulogic;
1782 
                JTAGLOCKED : out std_ulogic;
1783 
                JTAGMODIFIED : out std_ulogic;
1784 
                OT : out std_ulogic;
1785 
                CONVST : in std_ulogic;
1786 
                CONVSTCLK : in std_ulogic;
1787 
                DADDR : in std_logic_vector(6 downto 0);
1788 
                DCLK : in std_ulogic;
1789 
                DEN : in std_ulogic;
1790 
                DI : in std_logic_vector(15 downto 0);
1791 
                DWE : in std_ulogic;
1792 
                RESET : in std_ulogic;
1793 
                VAUXN : in std_logic_vector(15 downto 0);
1794 
                VAUXP : in std_logic_vector(15 downto 0);
1795 
                VN : in std_ulogic;
1796 
                VP : in std_ulogic
1797 
        );
1798 
end component;
1799 
 
1800 
  component FDRSE
1801 
        generic ( INIT : bit := '0');
1802 
        port (  Q : out std_ulogic;
1803 
                C : in std_ulogic;
1804 
                CE : in std_ulogic;
1805 
                D : in std_ulogic;
1806 
                R : in std_ulogic;
1807 
                S : in std_ulogic);
1808 
  end component;
1809 
 
1810 
  component FDR
1811 
        generic ( INIT : bit := '0');
1812 
        port (  Q : out std_ulogic;
1813 
                C : in std_ulogic;
1814 
                D : in std_ulogic;
1815 
                R : in std_ulogic);
1816 
  end component;
1817 
 
1818 
  component FDRE
1819 
        generic ( INIT : bit := '0');
1820 
        port (  Q : out std_ulogic;
1821 
                C : in std_ulogic;
1822 
                CE : in std_ulogic;
1823 
                D : in std_ulogic;
1824 
                R : in std_ulogic);
1825 
  end component;
1826 
 
1827 
  component FD
1828 
        generic ( INIT : bit := '0');
1829 
        port (  Q : out std_ulogic;
1830 
                C : in std_ulogic;
1831 
                D : in std_ulogic);
1832 
  end component;
1833 
 
1834 
  component FDRS
1835 
        generic ( INIT : bit := '0');
1836 
        port (  Q : out std_ulogic;
1837 
                C : in std_ulogic;
1838 
                D : in std_ulogic;
1839 
                R : in std_ulogic;
1840 
                S : in std_ulogic);
1841 
  end component;
1842 
 
1843 
  component FDE
1844 
        generic ( INIT : bit := '0');
1845 
        port (  Q : out std_ulogic;
1846 
                C : in std_ulogic;
1847 
                CE : in std_ulogic;
1848 
                D : in std_ulogic);
1849 
  end component;
1850 
 
1851 
  component MUXF5
1852 
        port (  O : out std_ulogic;
1853 
                I0 : in std_ulogic;
1854 
                I1 : in std_ulogic;
1855 
                S : in std_ulogic);
1856 
  end component;
1857 
 
1858 
  component VCC
1859 
        port ( P : out std_ulogic := '1');
1860 
  end component;
1861 
 
1862 
  component GND
1863 
        port ( G : out std_ulogic := '0');
1864 
  end component;
1865 
 
1866 
component INV
1867 
        port
1868 
        (
1869 
                O : out std_ulogic;
1870 
                I : in std_ulogic
1871 
        );
1872 
end component;
1873 
component LUT2_L
1874 
        generic
1875 
        (
1876 
                INIT : bit_vector := X"0"
1877 
        );
1878 
        port
1879 
        (
1880 
                LO : out std_ulogic;
1881 
                I0 : in std_ulogic;
1882 
                I1 : in std_ulogic
1883 
        );
1884 
end component;
1885 
component LUT4
1886 
        generic
1887 
        (
1888 
                INIT : bit_vector := X"0000"
1889 
        );
1890 
        port
1891 
        (
1892 
                O : out std_ulogic;
1893 
                I0 : in std_ulogic;
1894 
                I1 : in std_ulogic;
1895 
                I2 : in std_ulogic;
1896 
                I3 : in std_ulogic
1897 
        );
1898 
end component;
1899 
component LUT3
1900 
        generic
1901 
        (
1902 
                INIT : bit_vector := X"00"
1903 
        );
1904 
        port
1905 
        (
1906 
                O : out std_ulogic;
1907 
                I0 : in std_ulogic;
1908 
                I1 : in std_ulogic;
1909 
                I2 : in std_ulogic
1910 
        );
1911 
end component;
1912 
component LUT2
1913 
        generic
1914 
        (
1915 
                INIT : bit_vector := X"0"
1916 
        );
1917 
        port
1918 
        (
1919 
                O : out std_ulogic;
1920 
                I0 : in std_ulogic;
1921 
                I1 : in std_ulogic
1922 
        );
1923 
end component;
1924 
component FDC
1925 
        generic
1926 
        (
1927 
                INIT : bit := '0'
1928 
        );
1929 
        port
1930 
        (
1931 
                Q : out std_ulogic;
1932 
                C : in std_ulogic;
1933 
                CLR : in std_ulogic;
1934 
                D : in std_ulogic
1935 
        );
1936 
end component;
1937 
component LUT3_L
1938 
        generic
1939 
        (
1940 
                INIT : bit_vector := X"00"
1941 
        );
1942 
        port
1943 
        (
1944 
                LO : out std_ulogic;
1945 
                I0 : in std_ulogic;
1946 
                I1 : in std_ulogic;
1947 
                I2 : in std_ulogic
1948 
        );
1949 
end component;
1950 
component LUT1
1951 
        generic
1952 
        (
1953 
                INIT : bit_vector := X"0"
1954 
        );
1955 
        port
1956 
        (
1957 
                O : out std_ulogic;
1958 
                I0 : in std_ulogic
1959 
        );
1960 
end component;
1961 
component LUT4_L
1962 
        generic
1963 
        (
1964 
                INIT : bit_vector := X"0000"
1965 
        );
1966 
        port
1967 
        (
1968 
                LO : out std_ulogic;
1969 
                I0 : in std_ulogic;
1970 
                I1 : in std_ulogic;
1971 
                I2 : in std_ulogic;
1972 
                I3 : in std_ulogic
1973 
        );
1974 
end component;
1975 
component FDCE
1976 
        generic
1977 
        (
1978 
                INIT : bit := '0'
1979 
        );
1980 
        port
1981 
        (
1982 
                Q : out std_ulogic;
1983 
                C : in std_ulogic;
1984 
                CE : in std_ulogic;
1985 
                CLR : in std_ulogic;
1986 
                D : in std_ulogic
1987 
        );
1988 
end component;
1989 
component FDC_1
1990 
        generic
1991 
        (
1992 
                INIT : bit := '0'
1993 
        );
1994 
        port
1995 
        (
1996 
                Q : out std_ulogic;
1997 
                C : in std_ulogic;
1998 
                CLR : in std_ulogic;
1999 
                D : in std_ulogic
2000 
        );
2001 
end component;
2002 
component FDP
2003 
        generic
2004 
        (
2005 
                INIT : bit := '1'
2006 
        );
2007 
        port
2008 
        (
2009 
                Q : out std_ulogic;
2010 
                C : in std_ulogic;
2011 
                D : in std_ulogic;
2012 
                PRE : in std_ulogic
2013 
        );
2014 
end component;
2015 
component FDS
2016 
        generic
2017 
        (
2018 
                INIT : bit := '1'
2019 
        );
2020 
        port
2021 
        (
2022 
                Q : out std_ulogic;
2023 
                C : in std_ulogic;
2024 
                D : in std_ulogic;
2025 
                S : in std_ulogic
2026 
        );
2027 
end component;
2028 
component MUXCY
2029 
        port
2030 
        (
2031 
                O : out std_ulogic;
2032 
                CI : in std_ulogic;
2033 
                DI : in std_ulogic;
2034 
                S : in std_ulogic
2035 
        );
2036 
end component;
2037 
component LUT1_L
2038 
        generic
2039 
        (
2040 
                INIT : bit_vector := X"0"
2041 
        );
2042 
        port
2043 
        (
2044 
                LO : out std_ulogic;
2045 
                I0 : in std_ulogic
2046 
        );
2047 
end component;
2048 
component MUXF6
2049 
        port
2050 
        (
2051 
                O : out std_ulogic;
2052 
                I0 : in std_ulogic;
2053 
                I1 : in std_ulogic;
2054 
                S : in std_ulogic
2055 
        );
2056 
end component;
2057 
component MUXF5_D
2058 
        port
2059 
        (
2060 
                LO : out std_ulogic;
2061 
                O : out std_ulogic;
2062 
                I0 : in std_ulogic;
2063 
                I1 : in std_ulogic;
2064 
                S : in std_ulogic
2065 
        );
2066 
end component;
2067 
component XORCY
2068 
        port
2069 
        (
2070 
                O : out std_ulogic;
2071 
                CI : in std_ulogic;
2072 
                LI : in std_ulogic
2073 
        );
2074 
end component;
2075 
component MUXCY_L
2076 
        port
2077 
        (
2078 
                LO : out std_ulogic;
2079 
                CI : in std_ulogic;
2080 
                DI : in std_ulogic;
2081 
                S : in std_ulogic
2082 
        );
2083 
end component;
2084 
component FDSE
2085 
        generic
2086 
        (
2087 
                INIT : bit := '1'
2088 
        );
2089 
        port
2090 
        (
2091 
                Q : out std_ulogic;
2092 
                C : in std_ulogic;
2093 
                CE : in std_ulogic;
2094 
                D : in std_ulogic;
2095 
                S : in std_ulogic
2096 
        );
2097 
end component;
2098 
component MULT_AND
2099 
        port
2100 
        (
2101 
                LO : out std_ulogic;
2102 
                I0 : in std_ulogic;
2103 
                I1 : in std_ulogic
2104 
        );
2105 
end component;
2106 
 
2107 
component SRL16E
2108 
        generic
2109 
        (
2110 
                INIT : bit_vector := X"0000"
2111 
        );
2112 
        port
2113 
        (
2114 
                Q : out STD_ULOGIC;
2115 
                A0 : in STD_ULOGIC;
2116 
                A1 : in STD_ULOGIC;
2117 
                A2 : in STD_ULOGIC;
2118 
                A3 : in STD_ULOGIC;
2119 
                CE : in STD_ULOGIC;
2120 
                CLK : in STD_ULOGIC;
2121 
                D : in STD_ULOGIC
2122 
        );
2123 
end component;
2124 
 
2125 
component ROM256X1
2126 
        generic
2127 
        (
2128 
                INIT : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000"
2129 
        );
2130 
        port
2131 
        (
2132 
                O : out std_ulogic;
2133 
                A0 : in std_ulogic;
2134 
                A1 : in std_ulogic;
2135 
                A2 : in std_ulogic;
2136 
                A3 : in std_ulogic;
2137 
                A4 : in std_ulogic;
2138 
                A5 : in std_ulogic;
2139 
                A6 : in std_ulogic;
2140 
                A7 : in std_ulogic
2141 
        );
2142 
end component;
2143 
 
2144 
component FDPE
2145 
        generic
2146 
        (
2147 
                INIT : bit := '1'
2148 
        );
2149 
        port
2150 
        (
2151 
                Q : out std_ulogic;
2152 
                C : in std_ulogic;
2153 
                CE : in std_ulogic;
2154 
                D : in std_ulogic;
2155 
                PRE : in std_ulogic
2156 
        );
2157 
end component;
2158 
 
2159 
component MULT18X18
2160 
        port
2161 
        (
2162 
                P : out std_logic_vector (35 downto 0);
2163 
                A : in std_logic_vector (17 downto 0);
2164 
                B : in std_logic_vector (17 downto 0)
2165 
        );
2166 
end component;
2167 
 
2168 
component MULT18X18S
2169 
        port
2170 
        (
2171 
                P : out std_logic_vector (35 downto 0);
2172 
                A : in std_logic_vector (17 downto 0);
2173 
                B : in std_logic_vector (17 downto 0);
2174 
                C : in std_ulogic;
2175 
                CE : in std_ulogic;
2176 
                R : in std_ulogic
2177 
        );
2178 
end component;
2179 
 
2180 
component MUXF7
2181 
        port
2182 
        (
2183 
                O : out std_ulogic;
2184 
                I0 : in std_ulogic;
2185 
                I1 : in std_ulogic;
2186 
                S : in std_ulogic
2187 
        );
2188 
end component;
2189 
 
2190 
component IODELAY
2191 
        generic
2192 
        (
2193 
                DELAY_SRC : string := "I";
2194 
                HIGH_PERFORMANCE_MODE : boolean := true;
2195 
                IDELAY_TYPE : string := "DEFAULT";
2196 
                IDELAY_VALUE : integer := 0;
2197 
                ODELAY_VALUE : integer := 0;
2198 
                REFCLK_FREQUENCY : real := 200.0;
2199 
                SIGNAL_PATTERN : string := "DATA"
2200 
        );
2201 
        port
2202 
        (
2203 
                DATAOUT : out std_ulogic;
2204 
                C : in std_ulogic;
2205 
                CE : in std_ulogic;
2206 
                DATAIN : in std_ulogic;
2207 
                IDATAIN : in std_ulogic;
2208 
                INC : in std_ulogic;
2209 
                ODATAIN : in std_ulogic;
2210 
                RST : in std_ulogic;
2211 
                T : in std_ulogic
2212 
        );
2213 
end component;
2214 
 
2215 
component ISERDES
2216 
        generic
2217 
        (
2218 
                BITSLIP_ENABLE : boolean := false;
2219 
                DATA_RATE : string := "DDR";
2220 
                DATA_WIDTH : integer := 4;
2221 
                INIT_Q1 : bit := '0';
2222 
                INIT_Q2 : bit := '0';
2223 
                INIT_Q3 : bit := '0';
2224 
                INIT_Q4 : bit := '0';
2225 
                INTERFACE_TYPE : string := "MEMORY";
2226 
                IOBDELAY : string := "NONE";
2227 
                IOBDELAY_TYPE : string := "DEFAULT";
2228 
                IOBDELAY_VALUE : integer := 0;
2229 
                NUM_CE : integer := 2;
2230 
                SERDES_MODE : string := "MASTER";
2231 
                SRVAL_Q1 : bit := '0';
2232 
                SRVAL_Q2 : bit := '0';
2233 
                SRVAL_Q3 : bit := '0';
2234 
                SRVAL_Q4 : bit := '0'
2235 
        );
2236 
        port
2237 
        (
2238 
                O : out std_ulogic;
2239 
                Q1 : out std_ulogic;
2240 
                Q2 : out std_ulogic;
2241 
                Q3 : out std_ulogic;
2242 
                Q4 : out std_ulogic;
2243 
                Q5 : out std_ulogic;
2244 
                Q6 : out std_ulogic;
2245 
                SHIFTOUT1 : out std_ulogic;
2246 
                SHIFTOUT2 : out std_ulogic;
2247 
                BITSLIP : in std_ulogic;
2248 
                CE1 : in std_ulogic;
2249 
                CE2 : in std_ulogic;
2250 
                CLK : in std_ulogic;
2251 
                CLKDIV : in std_ulogic;
2252 
                D : in std_ulogic;
2253 
                DLYCE : in std_ulogic;
2254 
                DLYINC : in std_ulogic;
2255 
                DLYRST : in std_ulogic;
2256 
                OCLK : in std_ulogic;
2257 
                REV : in std_ulogic;
2258 
                SHIFTIN1 : in std_ulogic;
2259 
                SHIFTIN2 : in std_ulogic;
2260 
                SR : in std_ulogic
2261 
        );
2262 
end component;
2263 
 
2264 
component RAM16X1S
2265 
        generic
2266 
        (
2267 
                INIT : bit_vector(15 downto 0) := X"0000"
2268 
        );
2269 
        port
2270 
        (
2271 
                O : out std_ulogic;
2272 
                A0 : in std_ulogic;
2273 
                A1 : in std_ulogic;
2274 
                A2 : in std_ulogic;
2275 
                A3 : in std_ulogic;
2276 
                D : in std_ulogic;
2277 
                WCLK : in std_ulogic;
2278 
                WE : in std_ulogic
2279 
        );
2280 
end component;
2281 
 
2282 
component RAM16X1D
2283 
        generic
2284 
        (
2285 
                INIT : bit_vector(15 downto 0) := X"0000"
2286 
        );
2287 
        port
2288 
        (
2289 
                DPO : out std_ulogic;
2290 
                SPO : out std_ulogic;
2291 
                A0 : in std_ulogic;
2292 
                A1 : in std_ulogic;
2293 
                A2 : in std_ulogic;
2294 
                A3 : in std_ulogic;
2295 
                D : in std_ulogic;
2296 
                DPRA0 : in std_ulogic;
2297 
                DPRA1 : in std_ulogic;
2298 
                DPRA2 : in std_ulogic;
2299 
                DPRA3 : in std_ulogic;
2300 
                WCLK : in std_ulogic;
2301 
                WE : in std_ulogic
2302 
        );
2303 
end component;
2304 
 
2305 
component ROM32X1
2306 
        generic
2307 
        (
2308 
                INIT : bit_vector := X"00000000"
2309 
        );
2310 
        port
2311 
        (
2312 
                O : out std_ulogic;
2313 
                A0 : in std_ulogic;
2314 
                A1 : in std_ulogic;
2315 
                A2 : in std_ulogic;
2316 
                A3 : in std_ulogic;
2317 
                A4 : in std_ulogic
2318 
        );
2319 
end component;
2320 
 
2321 
component DSP48
2322 
        generic
2323 
        (
2324 
                AREG : integer := 1;
2325 
                B_INPUT : string := "DIRECT";
2326 
                BREG : integer := 1;
2327 
                CARRYINREG : integer := 1;
2328 
                CARRYINSELREG : integer := 1;
2329 
                CREG : integer := 1;
2330 
                LEGACY_MODE : string := "MULT18X18S";
2331 
                MREG : integer := 1;
2332 
                OPMODEREG : integer := 1;
2333 
                PREG : integer := 1;
2334 
                SUBTRACTREG : integer := 1
2335 
        );
2336 
        port
2337 
        (
2338 
                BCOUT : out std_logic_vector(17 downto 0);
2339 
                P : out std_logic_vector(47 downto 0);
2340 
                PCOUT : out std_logic_vector(47 downto 0);
2341 
                A : in std_logic_vector(17 downto 0);
2342 
                B : in std_logic_vector(17 downto 0);
2343 
                BCIN : in std_logic_vector(17 downto 0);
2344 
                C : in std_logic_vector(47 downto 0);
2345 
                CARRYIN : in std_ulogic;
2346 
                CARRYINSEL : in std_logic_vector(1 downto 0);
2347 
                CEA : in std_ulogic;
2348 
                CEB : in std_ulogic;
2349 
                CEC : in std_ulogic;
2350 
                CECARRYIN : in std_ulogic;
2351 
                CECINSUB : in std_ulogic;
2352 
                CECTRL : in std_ulogic;
2353 
                CEM : in std_ulogic;
2354 
                CEP : in std_ulogic;
2355 
                CLK : in std_ulogic;
2356 
                OPMODE : in std_logic_vector(6 downto 0);
2357 
                PCIN : in std_logic_vector(47 downto 0);
2358 
                RSTA : in std_ulogic;
2359 
                RSTB : in std_ulogic;
2360 
                RSTC : in std_ulogic;
2361 
                RSTCARRYIN : in std_ulogic;
2362 
                RSTCTRL : in std_ulogic;
2363 
                RSTM : in std_ulogic;
2364 
                RSTP : in std_ulogic;
2365 
                SUBTRACT : in std_ulogic
2366 
        );
2367 
end component;
2368 
 
2369 
component RAMB16
2370 
        generic
2371 
        (
2372 
                DOA_REG : integer := 0;
2373 
                DOB_REG : integer := 0;
2374 
                INIT_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2375 
                INIT_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2376 
                INIT_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2377 
                INIT_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2378 
                INIT_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2379 
                INIT_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2380 
                INIT_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2381 
                INIT_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2382 
                INIT_08 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2383 
                INIT_09 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2384 
                INIT_0A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2385 
                INIT_0B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2386 
                INIT_0C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2387 
                INIT_0D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2388 
                INIT_0E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2389 
                INIT_0F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2390 
                INIT_10 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2391 
                INIT_11 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2392 
                INIT_12 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2393 
                INIT_13 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2394 
                INIT_14 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2395 
                INIT_15 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2396 
                INIT_16 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2397 
                INIT_17 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2398 
                INIT_18 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2399 
                INIT_19 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2400 
                INIT_1A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2401 
                INIT_1B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2402 
                INIT_1C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2403 
                INIT_1D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2404 
                INIT_1E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2405 
                INIT_1F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2406 
                INIT_20 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2407 
                INIT_21 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2408 
                INIT_22 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2409 
                INIT_23 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2410 
                INIT_24 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2411 
                INIT_25 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2412 
                INIT_26 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2413 
                INIT_27 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2414 
                INIT_28 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2415 
                INIT_29 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2416 
                INIT_2A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2417 
                INIT_2B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2418 
                INIT_2C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2419 
                INIT_2D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2420 
                INIT_2E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2421 
                INIT_2F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2422 
                INIT_30 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2423 
                INIT_31 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2424 
                INIT_32 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2425 
                INIT_33 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2426 
                INIT_34 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2427 
                INIT_35 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2428 
                INIT_36 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2429 
                INIT_37 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2430 
                INIT_38 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2431 
                INIT_39 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2432 
                INIT_3A : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2433 
                INIT_3B : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2434 
                INIT_3C : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2435 
                INIT_3D : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2436 
                INIT_3E : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2437 
                INIT_3F : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2438 
                INIT_A : bit_vector := X"000000000";
2439 
                INIT_B : bit_vector := X"000000000";
2440 
                INITP_00 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2441 
                INITP_01 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2442 
                INITP_02 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2443 
                INITP_03 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2444 
                INITP_04 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2445 
                INITP_05 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2446 
                INITP_06 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2447 
                INITP_07 : bit_vector := X"0000000000000000000000000000000000000000000000000000000000000000";
2448 
                INVERT_CLK_DOA_REG : boolean := false;
2449 
                INVERT_CLK_DOB_REG : boolean := false;
2450 
                RAM_EXTENSION_A : string := "NONE";
2451 
                RAM_EXTENSION_B : string := "NONE";
2452 
                READ_WIDTH_A : integer := 0;
2453 
                READ_WIDTH_B : integer := 0;
2454 
                SIM_COLLISION_CHECK : string := "ALL";
2455 
                SRVAL_A : bit_vector := X"000000000";
2456 
                SRVAL_B : bit_vector := X"000000000";
2457 
                WRITE_MODE_A : string := "WRITE_FIRST";
2458 
                WRITE_MODE_B : string := "WRITE_FIRST";
2459 
                WRITE_WIDTH_A : integer := 0;
2460 
                WRITE_WIDTH_B : integer := 0
2461 
        );
2462 
        port
2463 
        (
2464 
                CASCADEOUTA : out std_ulogic;
2465 
                CASCADEOUTB : out std_ulogic;
2466 
                DOA : out std_logic_vector (31 downto 0);
2467 
                DOB : out std_logic_vector (31 downto 0);
2468 
                DOPA : out std_logic_vector (3 downto 0);
2469 
                DOPB : out std_logic_vector (3 downto 0);
2470 
                ADDRA : in std_logic_vector (14 downto 0);
2471 
                ADDRB : in std_logic_vector (14 downto 0);
2472 
                CASCADEINA : in std_ulogic;
2473 
                CASCADEINB : in std_ulogic;
2474 
                CLKA : in std_ulogic;
2475 
                CLKB : in std_ulogic;
2476 
                DIA : in std_logic_vector (31 downto 0);
2477 
                DIB : in std_logic_vector (31 downto 0);
2478 
                DIPA : in std_logic_vector (3 downto 0);
2479 
                DIPB : in std_logic_vector (3 downto 0);
2480 
                ENA : in std_ulogic;
2481 
                ENB : in std_ulogic;
2482 
                REGCEA : in std_ulogic;
2483 
                REGCEB : in std_ulogic;
2484 
                SSRA : in std_ulogic;
2485 
                SSRB : in std_ulogic;
2486 
                WEA : in std_logic_vector (3 downto 0);
2487 
                WEB : in std_logic_vector (3 downto 0)
2488 
        );
2489 
end component;
2490 
 
2491 
component MUXF8
2492 
        port
2493 
        (
2494 
                O : out std_ulogic;
2495 
                I0 : in std_ulogic;
2496 
                I1 : in std_ulogic;
2497 
                S : in std_ulogic
2498 
        );
2499 
end component;
2500 
 
2501 
  component RAM64X1D
2502 
        generic ( INIT : bit_vector(63 downto 0) := X"0000000000000000");
2503 
        port
2504 
        (
2505 
                DPO : out std_ulogic;
2506 
                SPO : out std_ulogic;
2507 
                A0 : in std_ulogic;
2508 
                A1 : in std_ulogic;
2509 
                A2 : in std_ulogic;
2510 
                A3 : in std_ulogic;
2511 
                A4 : in std_ulogic;
2512 
                A5 : in std_ulogic;
2513 
                D : in std_ulogic;
2514 
                DPRA0 : in std_ulogic;
2515 
                DPRA1 : in std_ulogic;
2516 
                DPRA2 : in std_ulogic;
2517 
                DPRA3 : in std_ulogic;
2518 
                DPRA4 : in std_ulogic;
2519 
                DPRA5 : in std_ulogic;
2520 
                WCLK : in std_ulogic;
2521 
                WE : in std_ulogic
2522 
        );
2523 
  end component;
2524 
 
2525 
 
2526 
component BUF
2527 
        port
2528 
        (
2529 
                O : out std_ulogic;
2530 
                I : in std_ulogic
2531 
        );
2532 
end component;
2533 
component LUT5
2534 
        generic
2535 
        (
2536 
                INIT : bit_vector := X"00000000"
2537 
        );
2538 
        port
2539 
        (
2540 
                O : out std_ulogic;
2541 
                I0 : in std_ulogic;
2542 
                I1 : in std_ulogic;
2543 
                I2 : in std_ulogic;
2544 
                I3 : in std_ulogic;
2545 
                I4 : in std_ulogic
2546 
        );
2547 
end component;
2548 
component LUT5_L
2549 
        generic
2550 
        (
2551 
                INIT : bit_vector := X"00000000"
2552 
        );
2553 
        port
2554 
        (
2555 
                LO : out std_ulogic;
2556 
                I0 : in std_ulogic;
2557 
                I1 : in std_ulogic;
2558 
                I2 : in std_ulogic;
2559 
                I3 : in std_ulogic;
2560 
                I4 : in std_ulogic
2561 
        );
2562 
end component;
2563 
component LUT6
2564 
        generic
2565 
        (
2566 
                INIT : bit_vector := X"0000000000000000"
2567 
        );
2568 
        port
2569 
        (
2570 
                O : out std_ulogic;
2571 
                I0 : in std_ulogic;
2572 
                I1 : in std_ulogic;
2573 
                I2 : in std_ulogic;
2574 
                I3 : in std_ulogic;
2575 
                I4 : in std_ulogic;
2576 
                I5 : in std_ulogic
2577 
        );
2578 
end component;
2579 
component LUT6_L
2580 
        generic
2581 
        (
2582 
                INIT : bit_vector := X"0000000000000000"
2583 
        );
2584 
        port
2585 
        (
2586 
                LO : out std_ulogic;
2587 
                I0 : in std_ulogic;
2588 
                I1 : in std_ulogic;
2589 
                I2 : in std_ulogic;
2590 
                I3 : in std_ulogic;
2591 
                I4 : in std_ulogic;
2592 
                I5 : in std_ulogic
2593 
        );
2594 
end component;
2595 
 
2596 
component RAM128X1S
2597 
 
2598 
  generic (
2599 
    INIT : bit_vector(127 downto 0) := X"00000000000000000000000000000000"
2600 
    );
2601 
 
2602 
  port (
2603 
    O : out std_ulogic;
2604 
 
2605 
    A0   : in std_ulogic;
2606 
    A1   : in std_ulogic;
2607 
    A2   : in std_ulogic;
2608 
    A3   : in std_ulogic;
2609 
    A4   : in std_ulogic;
2610 
    A5   : in std_ulogic;
2611 
    A6   : in std_ulogic;
2612 
    D    : in std_ulogic;
2613 
    WCLK : in std_ulogic;
2614 
    WE   : in std_ulogic
2615 
    );
2616 
end component;
2617 
 
2618 
component SRLC16E
2619 
 
2620 
  generic (
2621 
       INIT : bit_vector := X"0000"
2622 
  );
2623 
 
2624 
  port (
2625 
        Q   : out STD_ULOGIC;
2626 
        Q15 : out STD_ULOGIC;
2627 
 
2628 
        A0  : in STD_ULOGIC;
2629 
        A1  : in STD_ULOGIC;
2630 
        A2  : in STD_ULOGIC;
2631 
        A3  : in STD_ULOGIC;
2632 
        CE  : in STD_ULOGIC;
2633 
        CLK : in STD_ULOGIC;
2634 
        D   : in STD_ULOGIC
2635 
       );
2636 
end component;
2637 
 
2638 
component LD_1
2639 
  generic(
2640 
    INIT : bit := '0'
2641 
    );
2642 
 
2643 
  port(
2644 
    Q : out std_ulogic := '0';
2645 
 
2646 
    D : in std_ulogic;
2647 
    G : in std_ulogic
2648 
    );
2649 
end component;
2650 
 
2651 
end;
2652 
 

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