| 1 |
61 |
budinero |
KEY LIBERO "8.5"
|
| 2 |
|
|
KEY CAPTURE "8.5.0.34"
|
| 3 |
|
|
KEY DEFAULT_IMPORT_LOC "\..\..\..\hdl\memory\A3PE1500"
|
| 4 |
|
|
KEY DEFAULT_OPEN_LOC ""
|
| 5 |
|
|
KEY HDLTechnology "VHDL"
|
| 6 |
|
|
KEY VendorTechnology_Family "ProASIC3E"
|
| 7 |
|
|
KEY VendorTechnology_Die "IT10X10M3"
|
| 8 |
|
|
KEY VendorTechnology_Package "fg484"
|
| 9 |
|
|
KEY ProjectLocation "D:\Facu\TFuni2\test_modular_oscilloscope"
|
| 10 |
|
|
KEY SimulationType "VHDL"
|
| 11 |
|
|
KEY Vendor "Actel"
|
| 12 |
|
|
KEY ActiveRoot "modular_oscilloscope::work"
|
| 13 |
|
|
LIST REVISIONS
|
| 14 |
|
|
VALUE="Impl1",NUM=1
|
| 15 |
|
|
VALUE="Impl2",NUM=2
|
| 16 |
|
|
VALUE="Impl3",NUM=3
|
| 17 |
|
|
CURREV=3
|
| 18 |
|
|
ENDLIST
|
| 19 |
|
|
LIST FileManager
|
| 20 |
|
|
VALUE "\..\..\..\hdl\ctrl\address_allocation.vhd,hdl"
|
| 21 |
|
|
STATE="utd"
|
| 22 |
|
|
TIME="1256306294"
|
| 23 |
|
|
SIZE="12072"
|
| 24 |
|
|
IS_READONLY="TRUE"
|
| 25 |
|
|
ENDFILE
|
| 26 |
|
|
VALUE "\..\..\..\hdl\ctrl\channel_selector.vhd,hdl"
|
| 27 |
|
|
STATE="utd"
|
| 28 |
|
|
TIME="1254348574"
|
| 29 |
|
|
SIZE="6229"
|
| 30 |
|
|
IS_READONLY="TRUE"
|
| 31 |
|
|
ENDFILE
|
| 32 |
|
|
VALUE "\..\..\..\hdl\ctrl\ctrl.vhd,hdl"
|
| 33 |
|
|
STATE="utd"
|
| 34 |
|
|
TIME="1256305960"
|
| 35 |
|
|
SIZE="18618"
|
| 36 |
|
|
IS_READONLY="TRUE"
|
| 37 |
|
|
ENDFILE
|
| 38 |
|
|
VALUE "\..\..\..\hdl\ctrl\ctrl_pkg.vhd,hdl"
|
| 39 |
|
|
STATE="utd"
|
| 40 |
|
|
TIME="1254348574"
|
| 41 |
|
|
SIZE="12752"
|
| 42 |
|
|
IS_READONLY="TRUE"
|
| 43 |
|
|
ENDFILE
|
| 44 |
|
|
VALUE "\..\..\..\hdl\ctrl\data_skipper.vhd,hdl"
|
| 45 |
|
|
STATE="utd"
|
| 46 |
|
|
TIME="1254348574"
|
| 47 |
|
|
SIZE="3845"
|
| 48 |
|
|
IS_READONLY="TRUE"
|
| 49 |
|
|
ENDFILE
|
| 50 |
|
|
VALUE "\..\..\..\hdl\ctrl\generic_counter.vhd,hdl"
|
| 51 |
|
|
STATE="utd"
|
| 52 |
|
|
TIME="1254348574"
|
| 53 |
|
|
SIZE="18970"
|
| 54 |
|
|
IS_READONLY="TRUE"
|
| 55 |
|
|
ENDFILE
|
| 56 |
|
|
VALUE "\..\..\..\hdl\ctrl\generic_decoder.vhd,hdl"
|
| 57 |
|
|
STATE="utd"
|
| 58 |
|
|
TIME="1254348576"
|
| 59 |
|
|
SIZE="11217"
|
| 60 |
|
|
IS_READONLY="TRUE"
|
| 61 |
|
|
ENDFILE
|
| 62 |
|
|
VALUE "\..\..\..\hdl\ctrl\memory_writer.vhd,hdl"
|
| 63 |
|
|
STATE="utd"
|
| 64 |
|
|
TIME="1254348576"
|
| 65 |
|
|
SIZE="7600"
|
| 66 |
|
|
IS_READONLY="TRUE"
|
| 67 |
|
|
ENDFILE
|
| 68 |
|
|
VALUE "\..\..\..\hdl\ctrl\output_manager.vhd,hdl"
|
| 69 |
|
|
STATE="utd"
|
| 70 |
|
|
TIME="1254348514"
|
| 71 |
|
|
SIZE="7275"
|
| 72 |
|
|
IS_READONLY="TRUE"
|
| 73 |
|
|
ENDFILE
|
| 74 |
|
|
VALUE "\..\..\..\hdl\ctrl\trigger_manager.vhd,hdl"
|
| 75 |
|
|
STATE="utd"
|
| 76 |
|
|
TIME="1256305812"
|
| 77 |
|
|
SIZE="8010"
|
| 78 |
|
|
IS_READONLY="TRUE"
|
| 79 |
|
|
ENDFILE
|
| 80 |
|
|
VALUE "\..\..\..\hdl\daq\daq.vhd,hdl"
|
| 81 |
|
|
STATE="utd"
|
| 82 |
|
|
TIME="1255647766"
|
| 83 |
|
|
SIZE="9754"
|
| 84 |
|
|
IS_READONLY="TRUE"
|
| 85 |
|
|
ENDFILE
|
| 86 |
|
|
VALUE "\..\..\..\hdl\daq\daq_pkg.vhd,hdl"
|
| 87 |
|
|
STATE="utd"
|
| 88 |
|
|
TIME="1250627614"
|
| 89 |
|
|
SIZE="2618"
|
| 90 |
|
|
IS_READONLY="TRUE"
|
| 91 |
|
|
ENDFILE
|
| 92 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn.vhd,hdl"
|
| 93 |
|
|
STATE="utd"
|
| 94 |
|
|
TIME="1254348458"
|
| 95 |
|
|
SIZE="4506"
|
| 96 |
|
|
IS_READONLY="TRUE"
|
| 97 |
|
|
ENDFILE
|
| 98 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn_16bit.vhd,hdl"
|
| 99 |
|
|
STATE="utd"
|
| 100 |
|
|
TIME="1256302788"
|
| 101 |
|
|
SIZE="4070"
|
| 102 |
|
|
IS_READONLY="TRUE"
|
| 103 |
|
|
ENDFILE
|
| 104 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn_ctrl.vhd,hdl"
|
| 105 |
|
|
STATE="utd"
|
| 106 |
|
|
TIME="1252974110"
|
| 107 |
|
|
SIZE="7688"
|
| 108 |
|
|
IS_READONLY="TRUE"
|
| 109 |
|
|
ENDFILE
|
| 110 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn_epp_side.vhd,hdl"
|
| 111 |
|
|
STATE="utd"
|
| 112 |
|
|
TIME="1244331728"
|
| 113 |
|
|
SIZE="4294"
|
| 114 |
|
|
IS_READONLY="TRUE"
|
| 115 |
|
|
ENDFILE
|
| 116 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn_pkg.vhd,hdl"
|
| 117 |
|
|
STATE="utd"
|
| 118 |
|
|
TIME="1254348436"
|
| 119 |
|
|
SIZE="10399"
|
| 120 |
|
|
IS_READONLY="TRUE"
|
| 121 |
|
|
ENDFILE
|
| 122 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn_wbn_side.vhd,hdl"
|
| 123 |
|
|
STATE="utd"
|
| 124 |
|
|
TIME="1256308820"
|
| 125 |
|
|
SIZE="8125"
|
| 126 |
|
|
IS_READONLY="TRUE"
|
| 127 |
|
|
ENDFILE
|
| 128 |
|
|
VALUE "\..\..\..\hdl\epp\eppwbn_width_extension.vhd,hdl"
|
| 129 |
|
|
STATE="utd"
|
| 130 |
|
|
TIME="1256258670"
|
| 131 |
|
|
SIZE="5941"
|
| 132 |
|
|
IS_READONLY="TRUE"
|
| 133 |
|
|
ENDFILE
|
| 134 |
|
|
VALUE "\..\..\..\hdl\memory\A3PE1500\dual_port_memory.vhd,hdl"
|
| 135 |
|
|
STATE="utd"
|
| 136 |
|
|
TIME="1251749986"
|
| 137 |
|
|
SIZE="199398"
|
| 138 |
|
|
IS_READONLY="TRUE"
|
| 139 |
|
|
ENDFILE
|
| 140 |
|
|
VALUE "\..\..\..\hdl\memory\dual_port_memory_wb.vhd,hdl"
|
| 141 |
|
|
STATE="utd"
|
| 142 |
|
|
TIME="1254348492"
|
| 143 |
|
|
SIZE="5285"
|
| 144 |
|
|
IS_READONLY="TRUE"
|
| 145 |
|
|
ENDFILE
|
| 146 |
|
|
VALUE "\..\..\..\hdl\memory\memory_pkg.vhd,hdl"
|
| 147 |
|
|
STATE="utd"
|
| 148 |
|
|
TIME="1254348468"
|
| 149 |
|
|
SIZE="2212"
|
| 150 |
|
|
IS_READONLY="TRUE"
|
| 151 |
|
|
ENDFILE
|
| 152 |
|
|
VALUE "\..\..\..\hdl\modular_oscilloscope.vhd,hdl"
|
| 153 |
|
|
STATE="utd"
|
| 154 |
|
|
TIME="1256306516"
|
| 155 |
|
|
SIZE="10072"
|
| 156 |
|
|
IS_READONLY="TRUE"
|
| 157 |
|
|
ENDFILE
|
| 158 |
|
|
VALUE "\..\..\..\hdl\tbench\modullar_oscilloscope_tbench_text.vhd,tb_hdl"
|
| 159 |
|
|
STATE="utd"
|
| 160 |
|
|
TIME="1256243688"
|
| 161 |
|
|
SIZE="30811"
|
| 162 |
|
|
IS_READONLY="TRUE"
|
| 163 |
|
|
ENDFILE
|
| 164 |
|
|
VALUE "\constraint\modular_oscilloscope_test.pdc,pdc"
|
| 165 |
|
|
STATE="utd"
|
| 166 |
|
|
TIME="1254958644"
|
| 167 |
|
|
SIZE="3987"
|
| 168 |
|
|
ENDFILE
|
| 169 |
|
|
VALUE "\designer\impl3\modular_oscilloscope-05.pdb,pdb"
|
| 170 |
|
|
STATE="utd"
|
| 171 |
|
|
TIME="1254953876"
|
| 172 |
|
|
SIZE="289280"
|
| 173 |
|
|
ENDFILE
|
| 174 |
|
|
VALUE "\designer\impl3\modular_oscilloscope.adb,adb"
|
| 175 |
|
|
STATE="utd"
|
| 176 |
|
|
TIME="1256259156"
|
| 177 |
|
|
SIZE="3326464"
|
| 178 |
|
|
ENDFILE
|
| 179 |
|
|
VALUE "\designer\impl3\modular_oscilloscope.pdb,pdb"
|
| 180 |
|
|
STATE="ood"
|
| 181 |
|
|
TIME="1253061552"
|
| 182 |
|
|
SIZE="287232"
|
| 183 |
|
|
ENDFILE
|
| 184 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_06.pdb,pdb"
|
| 185 |
|
|
STATE="utd"
|
| 186 |
|
|
TIME="1255124478"
|
| 187 |
|
|
SIZE="294400"
|
| 188 |
|
|
ENDFILE
|
| 189 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_08.pdb,pdb"
|
| 190 |
|
|
STATE="utd"
|
| 191 |
|
|
TIME="1256246254"
|
| 192 |
|
|
SIZE="290304"
|
| 193 |
|
|
ENDFILE
|
| 194 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_09.pdb,pdb"
|
| 195 |
|
|
STATE="utd"
|
| 196 |
|
|
TIME="1256254802"
|
| 197 |
|
|
SIZE="294400"
|
| 198 |
|
|
ENDFILE
|
| 199 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_10.pdb,pdb"
|
| 200 |
|
|
STATE="utd"
|
| 201 |
|
|
TIME="1256258516"
|
| 202 |
|
|
SIZE="287232"
|
| 203 |
|
|
ENDFILE
|
| 204 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_11.pdb,pdb"
|
| 205 |
|
|
STATE="utd"
|
| 206 |
|
|
TIME="1256304832"
|
| 207 |
|
|
SIZE="16384"
|
| 208 |
|
|
ENDFILE
|
| 209 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_12.pdb,pdb"
|
| 210 |
|
|
STATE="utd"
|
| 211 |
|
|
TIME="1256308072"
|
| 212 |
|
|
SIZE="16384"
|
| 213 |
|
|
ENDFILE
|
| 214 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_13.pdb,pdb"
|
| 215 |
|
|
STATE="utd"
|
| 216 |
|
|
TIME="1256310384"
|
| 217 |
|
|
SIZE="16384"
|
| 218 |
|
|
ENDFILE
|
| 219 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp\modular_oscilloscope.pro,pro"
|
| 220 |
|
|
STATE="utd"
|
| 221 |
|
|
TIME="1254173240"
|
| 222 |
|
|
SIZE="1730"
|
| 223 |
|
|
ENDFILE
|
| 224 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_10\modular_oscilloscope.pro,pro"
|
| 225 |
|
|
STATE="utd"
|
| 226 |
|
|
TIME="1254955580"
|
| 227 |
|
|
SIZE="1734"
|
| 228 |
|
|
ENDFILE
|
| 229 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_11\modular_oscilloscope.pro,pro"
|
| 230 |
|
|
STATE="utd"
|
| 231 |
|
|
TIME="1255126674"
|
| 232 |
|
|
SIZE="1734"
|
| 233 |
|
|
ENDFILE
|
| 234 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_12\modular_oscilloscope.pro,pro"
|
| 235 |
|
|
STATE="utd"
|
| 236 |
|
|
TIME="1255729298"
|
| 237 |
|
|
SIZE="1734"
|
| 238 |
|
|
ENDFILE
|
| 239 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_13\modular_oscilloscope.pro,pro"
|
| 240 |
|
|
STATE="utd"
|
| 241 |
|
|
TIME="1255988894"
|
| 242 |
|
|
SIZE="1734"
|
| 243 |
|
|
ENDFILE
|
| 244 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_14\modular_oscilloscope.pro,pro"
|
| 245 |
|
|
STATE="utd"
|
| 246 |
|
|
TIME="1255990810"
|
| 247 |
|
|
SIZE="1540"
|
| 248 |
|
|
ENDFILE
|
| 249 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_15\modular_oscilloscope.pro,pro"
|
| 250 |
|
|
STATE="utd"
|
| 251 |
|
|
TIME="1256164540"
|
| 252 |
|
|
SIZE="1734"
|
| 253 |
|
|
ENDFILE
|
| 254 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_16\modular_oscilloscope.pro,pro"
|
| 255 |
|
|
STATE="utd"
|
| 256 |
|
|
TIME="1256228322"
|
| 257 |
|
|
SIZE="1734"
|
| 258 |
|
|
ENDFILE
|
| 259 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_17\modular_oscilloscope.pro,pro"
|
| 260 |
|
|
STATE="utd"
|
| 261 |
|
|
TIME="1256248220"
|
| 262 |
|
|
SIZE="1734"
|
| 263 |
|
|
ENDFILE
|
| 264 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_18\modular_oscilloscope.pro,pro"
|
| 265 |
|
|
STATE="utd"
|
| 266 |
|
|
TIME="1256254626"
|
| 267 |
|
|
SIZE="1734"
|
| 268 |
|
|
ENDFILE
|
| 269 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_19\modular_oscilloscope.pro,pro"
|
| 270 |
|
|
STATE="utd"
|
| 271 |
|
|
TIME="1256257352"
|
| 272 |
|
|
SIZE="1734"
|
| 273 |
|
|
ENDFILE
|
| 274 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_1\modular_oscilloscope.pro,pro"
|
| 275 |
|
|
STATE="utd"
|
| 276 |
|
|
TIME="1254173240"
|
| 277 |
|
|
SIZE="1744"
|
| 278 |
|
|
ENDFILE
|
| 279 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_20\modular_oscilloscope.pro,pro"
|
| 280 |
|
|
STATE="utd"
|
| 281 |
|
|
TIME="1256258972"
|
| 282 |
|
|
SIZE="1734"
|
| 283 |
|
|
ENDFILE
|
| 284 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_21\modular_oscilloscope.pro,pro"
|
| 285 |
|
|
STATE="utd"
|
| 286 |
|
|
TIME="1256305190"
|
| 287 |
|
|
SIZE="1540"
|
| 288 |
|
|
ENDFILE
|
| 289 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_22\modular_oscilloscope.pro,pro"
|
| 290 |
|
|
STATE="utd"
|
| 291 |
|
|
TIME="1256308520"
|
| 292 |
|
|
SIZE="1540"
|
| 293 |
|
|
ENDFILE
|
| 294 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_23\modular_oscilloscope.pro,pro"
|
| 295 |
|
|
STATE="utd"
|
| 296 |
|
|
TIME="1256310490"
|
| 297 |
|
|
SIZE="1540"
|
| 298 |
|
|
ENDFILE
|
| 299 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_2\modular_oscilloscope.pro,pro"
|
| 300 |
|
|
STATE="utd"
|
| 301 |
|
|
TIME="1254173240"
|
| 302 |
|
|
SIZE="1328"
|
| 303 |
|
|
ENDFILE
|
| 304 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_3\modular_oscilloscope.pro,pro"
|
| 305 |
|
|
STATE="utd"
|
| 306 |
|
|
TIME="1254174984"
|
| 307 |
|
|
SIZE="1738"
|
| 308 |
|
|
ENDFILE
|
| 309 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_4\modular_oscilloscope.pro,pro"
|
| 310 |
|
|
STATE="utd"
|
| 311 |
|
|
TIME="1254182278"
|
| 312 |
|
|
SIZE="1754"
|
| 313 |
|
|
ENDFILE
|
| 314 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_5\modular_oscilloscope.pro,pro"
|
| 315 |
|
|
STATE="utd"
|
| 316 |
|
|
TIME="1254353302"
|
| 317 |
|
|
SIZE="1754"
|
| 318 |
|
|
ENDFILE
|
| 319 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_6\modular_oscilloscope.pro,pro"
|
| 320 |
|
|
STATE="utd"
|
| 321 |
|
|
TIME="1254436920"
|
| 322 |
|
|
SIZE="1738"
|
| 323 |
|
|
ENDFILE
|
| 324 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_7\modular_oscilloscope.pro,pro"
|
| 325 |
|
|
STATE="utd"
|
| 326 |
|
|
TIME="1254438552"
|
| 327 |
|
|
SIZE="1538"
|
| 328 |
|
|
ENDFILE
|
| 329 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_8\modular_oscilloscope.pro,pro"
|
| 330 |
|
|
STATE="utd"
|
| 331 |
|
|
TIME="1254438624"
|
| 332 |
|
|
SIZE="1538"
|
| 333 |
|
|
ENDFILE
|
| 334 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_1_fp_9\modular_oscilloscope.pro,pro"
|
| 335 |
|
|
STATE="utd"
|
| 336 |
|
|
TIME="1254438812"
|
| 337 |
|
|
SIZE="1738"
|
| 338 |
|
|
ENDFILE
|
| 339 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_4fifo_01.pdb,pdb"
|
| 340 |
|
|
STATE="utd"
|
| 341 |
|
|
TIME="1253201184"
|
| 342 |
|
|
SIZE="294400"
|
| 343 |
|
|
ENDFILE
|
| 344 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_ba.sdf,ba_sdf"
|
| 345 |
|
|
STATE="ood"
|
| 346 |
|
|
TIME="1252707118"
|
| 347 |
|
|
SIZE="1401674"
|
| 348 |
|
|
ENDFILE
|
| 349 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_ba.vhd,ba_hdl"
|
| 350 |
|
|
STATE="ood"
|
| 351 |
|
|
TIME="1252707118"
|
| 352 |
|
|
SIZE="705896"
|
| 353 |
|
|
ENDFILE
|
| 354 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_fp\modular_oscilloscope.pro,pro"
|
| 355 |
|
|
STATE="utd"
|
| 356 |
|
|
TIME="1254173240"
|
| 357 |
|
|
SIZE="1726"
|
| 358 |
|
|
ENDFILE
|
| 359 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_new01.pdb,pdb"
|
| 360 |
|
|
STATE="utd"
|
| 361 |
|
|
TIME="1253654446"
|
| 362 |
|
|
SIZE="296448"
|
| 363 |
|
|
ENDFILE
|
| 364 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_new02_monitor.pdb,pdb"
|
| 365 |
|
|
STATE="utd"
|
| 366 |
|
|
TIME="1254176518"
|
| 367 |
|
|
SIZE="284160"
|
| 368 |
|
|
ENDFILE
|
| 369 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_new03_CtrlMon.pdb,pdb"
|
| 370 |
|
|
STATE="utd"
|
| 371 |
|
|
TIME="1254351276"
|
| 372 |
|
|
SIZE="290816"
|
| 373 |
|
|
ENDFILE
|
| 374 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_new04.pdb,pdb"
|
| 375 |
|
|
STATE="utd"
|
| 376 |
|
|
TIME="1254438482"
|
| 377 |
|
|
SIZE="286208"
|
| 378 |
|
|
ENDFILE
|
| 379 |
|
|
VALUE "\designer\impl3\modular_oscilloscope_new07.pdb,pdb"
|
| 380 |
|
|
STATE="utd"
|
| 381 |
|
|
TIME="1255725328"
|
| 382 |
|
|
SIZE="290304"
|
| 383 |
|
|
ENDFILE
|
| 384 |
|
|
VALUE "\simulation\run.do,do"
|
| 385 |
|
|
STATE="utd"
|
| 386 |
|
|
TIME="1256243546"
|
| 387 |
|
|
SIZE="3026"
|
| 388 |
|
|
ENDFILE
|
| 389 |
|
|
VALUE "\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.cxf,actgen_cxf"
|
| 390 |
|
|
STATE="utd"
|
| 391 |
|
|
TIME="1253050176"
|
| 392 |
|
|
SIZE="1637"
|
| 393 |
|
|
ENDFILE
|
| 394 |
|
|
VALUE "\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.gen,gen"
|
| 395 |
|
|
STATE="utd"
|
| 396 |
|
|
TIME="1253050172"
|
| 397 |
|
|
SIZE="628"
|
| 398 |
|
|
PARENT="\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.cxf"
|
| 399 |
|
|
IS_READONLY="TRUE"
|
| 400 |
|
|
ENDFILE
|
| 401 |
|
|
VALUE "\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.log,log"
|
| 402 |
|
|
STATE="utd"
|
| 403 |
|
|
TIME="1253050176"
|
| 404 |
|
|
SIZE="2875"
|
| 405 |
|
|
PARENT="\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.cxf"
|
| 406 |
|
|
IS_READONLY="TRUE"
|
| 407 |
|
|
ENDFILE
|
| 408 |
|
|
VALUE "\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.vhd,hdl"
|
| 409 |
|
|
STATE="utd"
|
| 410 |
|
|
TIME="1253050176"
|
| 411 |
|
|
SIZE="4056"
|
| 412 |
|
|
PARENT="\smartgen\A3PE_pll_2clk\A3PE_pll_2clk.cxf"
|
| 413 |
|
|
IS_READONLY="TRUE"
|
| 414 |
|
|
ENDFILE
|
| 415 |
|
|
VALUE "\synthesis\modular_oscilloscope.edn,syn_edn"
|
| 416 |
|
|
STATE="utd"
|
| 417 |
|
|
TIME="1256259070"
|
| 418 |
|
|
SIZE="1463337"
|
| 419 |
|
|
ENDFILE
|
| 420 |
|
|
VALUE "\synthesis\modular_oscilloscope.vhd,syn_hdl"
|
| 421 |
|
|
STATE="ood"
|
| 422 |
|
|
TIME="1252720064"
|
| 423 |
|
|
SIZE="721989"
|
| 424 |
|
|
ENDFILE
|
| 425 |
|
|
VALUE "\synthesis\modular_oscilloscope_sdc.sdc,syn_sdc"
|
| 426 |
|
|
STATE="utd"
|
| 427 |
|
|
TIME="1256259070"
|
| 428 |
|
|
SIZE="310"
|
| 429 |
|
|
ENDFILE
|
| 430 |
|
|
ENDLIST
|
| 431 |
|
|
LIST UsedFile
|
| 432 |
|
|
ENDLIST
|
| 433 |
|
|
LIST NewModulesInfo
|
| 434 |
|
|
LIST "modular_oscilloscope::work"
|
| 435 |
|
|
FILE "\..\..\..\hdl\modular_oscilloscope.vhd,hdl"
|
| 436 |
|
|
LIST AssociatedStimulus
|
| 437 |
|
|
VALUE "\..\..\..\hdl\tbench\modullar_oscilloscope_tbench_text.vhd,tb_hdl"
|
| 438 |
|
|
ENDLIST
|
| 439 |
|
|
LIST ProjectState5.1
|
| 440 |
|
|
LIST Impl1
|
| 441 |
|
|
LiberoState=Post_Synthesis
|
| 442 |
|
|
ideSTIMULUS=StateSuccess
|
| 443 |
|
|
ideSYNTHESIS(\synthesis\modular_oscilloscope.edn,syn_edn)=StateSuccess
|
| 444 |
|
|
LIST FlowOptions
|
| 445 |
|
|
UsePhySynth=FALSE
|
| 446 |
|
|
UseSynth=TRUE
|
| 447 |
|
|
ENDLIST
|
| 448 |
|
|
Used_File_List
|
| 449 |
|
|
ENDUsed_File_List
|
| 450 |
|
|
ENDLIST
|
| 451 |
|
|
LIST Impl2
|
| 452 |
|
|
LiberoState=Post_Synthesis
|
| 453 |
|
|
ideSTIMULUS=StateSuccess
|
| 454 |
|
|
ideSYNTHESIS(\synthesis\modular_oscilloscope.edn,syn_edn)=StateSuccess
|
| 455 |
|
|
LIST FlowOptions
|
| 456 |
|
|
UsePhySynth=FALSE
|
| 457 |
|
|
UseSynth=TRUE
|
| 458 |
|
|
ENDLIST
|
| 459 |
|
|
Used_File_List
|
| 460 |
|
|
ENDUsed_File_List
|
| 461 |
|
|
ENDLIST
|
| 462 |
|
|
LIST Impl3
|
| 463 |
|
|
LiberoState=Post_Layout
|
| 464 |
|
|
ideSTIMULUS=StateSuccess
|
| 465 |
|
|
ideSYNTHESIS(\synthesis\modular_oscilloscope.edn,syn_edn)=StateSuccess
|
| 466 |
|
|
ideDESIGNER(\designer\impl3\modular_oscilloscope.adb,adb)=StateSuccess
|
| 467 |
|
|
LIST FlowOptions
|
| 468 |
|
|
UsePhySynth=FALSE
|
| 469 |
|
|
UseSynth=TRUE
|
| 470 |
|
|
ENDLIST
|
| 471 |
|
|
Used_File_List
|
| 472 |
|
|
ENDUsed_File_List
|
| 473 |
|
|
ENDLIST
|
| 474 |
|
|
ENDLIST
|
| 475 |
|
|
ENDLIST
|
| 476 |
|
|
ENDLIST
|
| 477 |
|
|
LIST AssociatedStimulus
|
| 478 |
|
|
LIST modular_oscilloscope
|
| 479 |
|
|
VALUE "\..\..\..\hdl\tbench\modullar_oscilloscope_tbench_text.vhd,tb_hdl"
|
| 480 |
|
|
ENDLIST
|
| 481 |
|
|
ENDLIST
|
| 482 |
|
|
LIST Other_Association
|
| 483 |
|
|
ENDLIST
|
| 484 |
|
|
LIST SimulationOptions
|
| 485 |
|
|
UseAutomaticDoFile=true
|
| 486 |
|
|
IncludeWaveDo=false
|
| 487 |
|
|
Type=max
|
| 488 |
|
|
RunTime=-all
|
| 489 |
|
|
Resolution=1ps
|
| 490 |
|
|
VsimOpt=
|
| 491 |
|
|
EntityName=testbench
|
| 492 |
|
|
TopInstanceName=_0
|
| 493 |
|
|
DoFileName=
|
| 494 |
|
|
DoFileName2=wave.do
|
| 495 |
|
|
DoFileParams=
|
| 496 |
|
|
DisplayDUTWave=false
|
| 497 |
|
|
LogAllSignals=false
|
| 498 |
|
|
DumpVCD=false
|
| 499 |
|
|
VCDFileName=power.vcd
|
| 500 |
|
|
ENDLIST
|
| 501 |
|
|
LIST ModelSimLibPath
|
| 502 |
|
|
UseCustomPath=FALSE
|
| 503 |
|
|
LibraryPath=C:/Actel/LIBERO~1.5/Designer/lib/modelsim/precompiled/vhdl/proasic3e
|
| 504 |
|
|
ENDLIST
|
| 505 |
|
|
LIST GlobalFlowOptions
|
| 506 |
|
|
GenerateHDLAfterSynthesis=FALSE
|
| 507 |
|
|
GenerateHDLAfterPhySynthesis=FALSE
|
| 508 |
|
|
RunDRCAfterSynthesis=FALSE
|
| 509 |
|
|
AutoCheckConstraints=TRUE
|
| 510 |
|
|
UpdateViewDrawIni=TRUE
|
| 511 |
|
|
UpdateModelSimIni=TRUE
|
| 512 |
|
|
NoIOMode=FALSE
|
| 513 |
|
|
GenerateHDLFromSchematic=TRUE
|
| 514 |
|
|
FlashProInputFile=pdb
|
| 515 |
|
|
SmartGenCompileReport=T
|
| 516 |
|
|
ENDLIST
|
| 517 |
|
|
LIST PhySynthesisOptions
|
| 518 |
|
|
ENDLIST
|
| 519 |
|
|
LIST Profiles
|
| 520 |
|
|
NAME="Synplify Pro AE"
|
| 521 |
|
|
FUNCTION="Synthesis"
|
| 522 |
|
|
TOOL="Synplify"
|
| 523 |
|
|
LOCATION="C:\Actel\Libero_v8.5\Synplify\synplify_96A\bin\synplify_pro.exe"
|
| 524 |
|
|
PARAM=""
|
| 525 |
|
|
BATCH=0
|
| 526 |
|
|
EndProfile
|
| 527 |
|
|
NAME="ModelSim AE"
|
| 528 |
|
|
FUNCTION="Simulation"
|
| 529 |
|
|
TOOL="ModelSim"
|
| 530 |
|
|
LOCATION="C:\Actel\Libero_v8.5\Model\win32acoem\modelsim.exe"
|
| 531 |
|
|
PARAM=""
|
| 532 |
|
|
BATCH=0
|
| 533 |
|
|
EndProfile
|
| 534 |
|
|
NAME="WFL"
|
| 535 |
|
|
FUNCTION="Stimulus"
|
| 536 |
|
|
TOOL="WFL"
|
| 537 |
|
|
LOCATION="C:\Actel\Libero_v8.5\WFL\bin\syncad.exe"
|
| 538 |
|
|
PARAM="-pwflite"
|
| 539 |
|
|
BATCH=0
|
| 540 |
|
|
EndProfile
|
| 541 |
|
|
NAME="FlashPro"
|
| 542 |
|
|
FUNCTION="Program"
|
| 543 |
|
|
TOOL="FlashPro"
|
| 544 |
|
|
LOCATION="C:\Actel\Libero_v8.5\FlashPro\bin\FlashPro.exe"
|
| 545 |
|
|
PARAM=""
|
| 546 |
|
|
BATCH=0
|
| 547 |
|
|
EndProfile
|
| 548 |
|
|
ENDLIST
|
| 549 |
|
|
LIST ProjectState5.1
|
| 550 |
|
|
LIST "modular_oscilloscope::work"
|
| 551 |
|
|
LIST Impl1
|
| 552 |
|
|
LiberoState=Post_Synthesis
|
| 553 |
|
|
ideSTIMULUS=StateSuccess
|
| 554 |
|
|
ideSYNTHESIS(\synthesis\modular_oscilloscope.edn,syn_edn)=StateSuccess
|
| 555 |
|
|
LIST FlowOptions
|
| 556 |
|
|
UsePhySynth=FALSE
|
| 557 |
|
|
UseSynth=TRUE
|
| 558 |
|
|
ENDLIST
|
| 559 |
|
|
Used_File_List
|
| 560 |
|
|
ENDUsed_File_List
|
| 561 |
|
|
ENDLIST
|
| 562 |
|
|
LIST Impl2
|
| 563 |
|
|
LiberoState=Post_Synthesis
|
| 564 |
|
|
ideSTIMULUS=StateSuccess
|
| 565 |
|
|
ideSYNTHESIS(\synthesis\modular_oscilloscope.edn,syn_edn)=StateSuccess
|
| 566 |
|
|
LIST FlowOptions
|
| 567 |
|
|
UsePhySynth=FALSE
|
| 568 |
|
|
UseSynth=TRUE
|
| 569 |
|
|
ENDLIST
|
| 570 |
|
|
Used_File_List
|
| 571 |
|
|
ENDUsed_File_List
|
| 572 |
|
|
ENDLIST
|
| 573 |
|
|
LIST Impl3
|
| 574 |
|
|
LiberoState=Post_Layout
|
| 575 |
|
|
ideSTIMULUS=StateSuccess
|
| 576 |
|
|
ideSYNTHESIS(\synthesis\modular_oscilloscope.edn,syn_edn)=StateSuccess
|
| 577 |
|
|
ideDESIGNER(\designer\impl3\modular_oscilloscope.adb,adb)=StateSuccess
|
| 578 |
|
|
LIST FlowOptions
|
| 579 |
|
|
UsePhySynth=FALSE
|
| 580 |
|
|
UseSynth=TRUE
|
| 581 |
|
|
ENDLIST
|
| 582 |
|
|
Used_File_List
|
| 583 |
|
|
ENDUsed_File_List
|
| 584 |
|
|
ENDLIST
|
| 585 |
|
|
ENDLIST
|
| 586 |
|
|
ENDLIST
|
| 587 |
|
|
LIST ExcludePackageForSimulation
|
| 588 |
|
|
ENDLIST
|
| 589 |
|
|
LIST ExcludePackageForSynthesis
|
| 590 |
|
|
ENDLIST
|
| 591 |
|
|
LIST IncludeModuleForSimulation
|
| 592 |
|
|
ENDLIST
|
| 593 |
|
|
LIST CDBOrder
|
| 594 |
|
|
ENDLIST
|
| 595 |
|
|
LIST UserCustomizedFileList
|
| 596 |
|
|
ENDLIST
|
| 597 |
|
|
LIST OpenedFileList
|
| 598 |
|
|
DESIGNFLOW:
|
| 599 |
|
|
ACTIVE_VIEW:0
|
| 600 |
|
|
ENDLIST
|
