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URL https://opencores.org/ocsvn/myblaze/myblaze/trunk

Subversion Repositories myblaze

[/] [myblaze/] [trunk/] [rtl/] [test] - Blame information for rev 2

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Line No. Rev Author Line
1 2 rockee 
#! /usr/bin/vvp
2 
:ivl_version "0.9.1" "(v0_9_1)";
3 
:vpi_time_precision - 11;
4 
:vpi_module "system";
5 
:vpi_module "v2005_math";
6 
:vpi_module "va_math";
7 
S_0x8ca510 .scope module, "TopBench" "TopBench" 2 7;
8 
 .timescale -9 -11;
9 
L_0x93f920 .functor BUFZ 1, v0x93cd90_0, C4<0>, C4<0>, C4<0>;
10 
L_0x93fa70 .functor BUFZ 32, v0x93b620_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
11 
L_0x93fb30 .functor BUFZ 4, L_0x943970, C4<0000>, C4<0000>, C4<0000>;
12 
L_0x93fc20 .functor BUFZ 1, L_0x943c40, C4<0>, C4<0>, C4<0>;
13 
L_0x93fce0 .functor BUFZ 32, L_0x943600, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
14 
L_0x93ec50 .functor BUFZ 1, L_0x9436b0, C4<0>, C4<0>, C4<0>;
15 
L_0x940a70 .functor BUFZ 1, C4<0>, C4<0>, C4<0>, C4<0>;
16 
L_0x940950 .functor BUFZ 16, v0x93aca0_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
17 
L_0x940ba0 .functor BUFZ 1, C4<1>, C4<0>, C4<0>, C4<0>;
18 
L_0x940d00 .functor BUFZ 1, L_0x9411c0, C4<0>, C4<0>, C4<0>;
19 
L_0x9411c0 .functor BUFZ 1, v0x93cd90_0, C4<0>, C4<0>, C4<0>;
20 
L_0x9412c0 .functor BUFZ 16, v0x93ad40_0, C4<0000000000000000>, C4<0000000000000000>, C4<0000000000000000>;
21 
L_0x941870 .functor BUFZ 1, v0x9395e0_0, C4<0>, C4<0>, C4<0>;
22 
L_0x9419f0 .functor BUFZ 32, v0x9392e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
23 
L_0x941c90 .functor BUFZ 1, v0x939380_0, C4<0>, C4<0>, C4<0>;
24 
L_0x941f80 .functor BUFZ 5, v0x9394c0_0, C4<00000>, C4<00000>, C4<00000>;
25 
L_0x942850 .functor BUFZ 32, v0x93a9d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
26 
L_0x942910 .functor BUFZ 5, v0x93b0f0_0, C4<00000>, C4<00000>, C4<00000>;
27 
L_0x9426c0 .functor BUFZ 1, v0x93ac00_0, C4<0>, C4<0>, C4<0>;
28 
L_0x9429d0 .functor BUFZ 1, v0x939ad0_0, C4<0>, C4<0>, C4<0>;
29 
L_0x942a60 .functor BUFZ 1, v0x939b70_0, C4<0>, C4<0>, C4<0>;
30 
L_0x942f30 .functor BUFZ 2, v0x939f70_0, C4<00>, C4<00>, C4<00>;
31 
L_0x943c40 .functor BUFZ 1, v0x939b70_0, C4<0>, C4<0>, C4<0>;
32 
L_0x943600 .functor BUFZ 32, v0x93a9d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>;
33 
L_0x9436b0 .functor OR 1, v0x939b70_0, v0x939ad0_0, C4<0>, C4<0>;
34 
v0x935270_0 .net *"_s151", 1 0, L_0x943880; 1 drivers
35 
v0x935330_0 .net *"_s156", 29 0, C4<000000000000000000000000000000>; 1 drivers
36 
v0x9353d0_0 .net *"_s157", 31 0, L_0x943ab0; 1 drivers
37 
v0x935470_0 .net *"_s170", 15 0, C4<0000000000000000>; 1 drivers
38 
v0x935520_0 .net *"_s172", 0 0, L_0x943e80; 1 drivers
39 
v0x9355c0_0 .net *"_s178", 15 0, C4<0000000000000000>; 1 drivers
40 
v0x9356a0_0 .net *"_s180", 0 0, L_0x943ff0; 1 drivers
41 
v0x935740_0 .var "clock", 0 0;
42 
v0x935830_0 .net "debug_dmem_addr_out", 31 0, L_0x93fce0; 1 drivers
43 
v0x9358d0_0 .net "debug_dmem_data_in", 31 0, v0x93cbb0_0; 1 drivers
44 
v0x9359d0_0 .net "debug_dmem_data_out", 31 0, L_0x93fa70; 1 drivers
45 
v0x935a70_0 .net "debug_dmem_ena", 0 0, v0x93ccf0_0; 1 drivers
46 
v0x935b80_0 .net "debug_dmem_ena_in", 0 0, L_0x93f920; 1 drivers
47 
v0x935c20_0 .net "debug_dmem_ena_out", 0 0, L_0x93ec50; 1 drivers
48 
v0x935d40_0 .net "debug_dmem_sel_out", 3 0, L_0x93fb30; 1 drivers
49 
v0x935de0_0 .net "debug_dmem_we_out", 0 0, L_0x93fc20; 1 drivers
50 
v0x935ca0_0 .net "debug_ex_alu_result", 31 0, L_0x942850; 1 drivers
51 
v0x935f30_0 .net "debug_ex_branch", 0 0, v0x939700_0; 1 drivers
52 
v0x936070_0 .net "debug_ex_dat_a", 31 0, v0x9397a0_0; 1 drivers
53 
v0x936110_0 .net "debug_ex_dat_b", 31 0, v0x939840_0; 1 drivers
54 
v0x935fd0_0 .net "debug_ex_dat_d", 31 0, v0x9398e0_0; 1 drivers
55 
v0x936260_0 .net "debug_ex_flush_id", 0 0, v0x939db0_0; 1 drivers
56 
v0x9361b0_0 .net "debug_ex_instruction", 31 0, v0x939a30_0; 1 drivers
57 
v0x9363c0_0 .net "debug_ex_mem_read", 0 0, L_0x9429d0; 1 drivers
58 
v0x936300_0 .net "debug_ex_mem_write", 0 0, L_0x942a60; 1 drivers
59 
v0x936510_0 .net "debug_ex_program_counter", 15 0, v0x939c10_0; 1 drivers
60 
v0x936460_0 .net "debug_ex_reg_a", 4 0, v0x939cb0_0; 1 drivers
61 
v0x936670_0 .net "debug_ex_reg_b", 4 0, v0x93a1e0_0; 1 drivers
62 
v0x9365b0_0 .net "debug_ex_reg_d", 4 0, L_0x942910; 1 drivers
63 
v0x9367e0_0 .net "debug_ex_reg_write", 0 0, L_0x9426c0; 1 drivers
64 
v0x9366f0_0 .net "debug_ex_transfer_size", 1 0, L_0x942f30; 1 drivers
65 
v0x936960_0 .net "debug_gprf_dat_a", 31 0, v0x93ade0_0; 1 drivers
66 
v0x936860_0 .net "debug_gprf_dat_b", 31 0, v0x93ae80_0; 1 drivers
67 
v0x936af0_0 .net "debug_gprf_dat_d", 31 0, v0x93af20_0; 1 drivers
68 
v0x9369e0_0 .net "debug_if_program_counter", 15 0, L_0x9412c0; 1 drivers
69 
v0x936c90_0 .net "debug_imem_addr_out", 15 0, L_0x940950; 1 drivers
70 
v0x936b70_0 .net "debug_imem_data_in", 31 0, v0x93dd00_0; 1 drivers
71 
v0x936c10_0 .net "debug_imem_data_out", 31 0, v0x93d5f0_0; 1 drivers
72 
v0x936e50_0 .net "debug_imem_ena", 0 0, L_0x940ba0; 1 drivers
73 
v0x936ed0_0 .net "debug_imem_ena_out", 0 0, L_0x940d00; 1 drivers
74 
v0x936d10_0 .net "debug_imem_sel_out", 3 0, v0x93d7d0_0; 1 drivers
75 
v0x936db0_0 .net "debug_imem_we_out", 0 0, L_0x940a70; 1 drivers
76 
v0x9370b0_0 .net "debug_mm_alu_result", 31 0, v0x93b490_0; 1 drivers
77 
v0x937130_0 .net "debug_mm_mem_read", 0 0, v0x93b530_0; 1 drivers
78 
v0x936f50_0 .net "debug_mm_reg_d", 4 0, v0x93bb90_0; 1 drivers
79 
v0x936ff0_0 .net "debug_mm_reg_write", 0 0, v0x93b6a0_0; 1 drivers
80 
v0x937330_0 .net "debug_mm_transfer_size", 1 0, v0x93b740_0; 1 drivers
81 
v0x9373b0_0 .net "debug_of_alu_op", 3 0, v0x93b7e0_0; 1 drivers
82 
v0x9371d0_0 .net "debug_of_alu_src_a", 1 0, v0x93b880_0; 1 drivers
83 
v0x937270_0 .net "debug_of_alu_src_b", 1 0, v0x93b920_0; 1 drivers
84 
v0x9375d0_0 .net "debug_of_branch_cond", 2 0, v0x93b9c0_0; 1 drivers
85 
v0x937650_0 .net "debug_of_carry", 1 0, v0x93ba60_0; 1 drivers
86 
v0x937450_0 .net "debug_of_carry_keep", 0 0, v0x93bb00_0; 1 drivers
87 
v0x9374f0_0 .net "debug_of_delay", 0 0, v0x93c150_0; 1 drivers
88 
v0x937890_0 .net "debug_of_fwd_mem_result", 31 0, v0x93c1d0_0; 1 drivers
89 
v0x937910_0 .net "debug_of_fwd_reg_d", 4 0, v0x93bc10_0; 1 drivers
90 
v0x9376d0_0 .net "debug_of_fwd_reg_write", 0 0, v0x93bc90_0; 1 drivers
91 
v0x937770_0 .net "debug_of_hazard", 0 0, L_0x941870; 1 drivers
92 
v0x937810_0 .net "debug_of_immediate", 31 0, v0x93bdd0_0; 1 drivers
93 
v0x937b90_0 .net "debug_of_instruction", 31 0, L_0x9419f0; 1 drivers
94 
v0x9379b0_0 .net "debug_of_mem_read", 0 0, L_0x941c90; 1 drivers
95 
v0x937a50_0 .net "debug_of_mem_write", 0 0, v0x93bfb0_0; 1 drivers
96 
v0x937af0_0 .net "debug_of_operation", 0 0, v0x93c050_0; 1 drivers
97 
v0x937e30_0 .net "debug_of_program_counter", 15 0, v0x93c7e0_0; 1 drivers
98 
v0x937c30_0 .net "debug_of_reg_a", 4 0, v0x93c860_0; 1 drivers
99 
v0x937cd0_0 .net "debug_of_reg_b", 4 0, v0x93c250_0; 1 drivers
100 
v0x937d70_0 .net "debug_of_reg_d", 4 0, L_0x941f80; 1 drivers
101 
v0x9380d0_0 .net "debug_of_reg_write", 0 0, v0x93c370_0; 1 drivers
102 
v0x937ed0_0 .net "debug_of_transfer_size", 1 0, v0x93c410_0; 1 drivers
103 
v0x937f70_0 .var "leds", 7 0;
104 
v0x938010_0 .var "reset", 0 0;
105 
v0x938390_0 .net "rxd_line", 0 0, C4<0>; 1 drivers
106 
v0x938150_0 .net "rxd_line2", 0 0, C4<0>; 1 drivers
107 
v0x9381f0 .array "top_core_deco_gprf_a_ram", 31 0, 31 0;
108 
v0x938270 .array "top_core_deco_gprf_b_ram", 31 0, 31 0;
109 
v0x9382f0 .array "top_core_deco_gprf_d_ram", 31 0, 31 0;
110 
v0x938680_0 .var "top_core_deco_of_comb_alu_op", 3 0;
111 
v0x938700_0 .var "top_core_deco_of_comb_alu_src_a", 1 0;
112 
v0x938430_0 .var "top_core_deco_of_comb_alu_src_b", 1 0;
113 
v0x9384d0_0 .var "top_core_deco_of_comb_branch_cond", 2 0;
114 
v0x938570_0 .var "top_core_deco_of_comb_carry", 1 0;
115 
v0x938a10_0 .var "top_core_deco_of_comb_carry_keep", 0 0;
116 
v0x938780_0 .var "top_core_deco_of_comb_delay", 0 0;
117 
v0x938820_0 .var "top_core_deco_of_comb_immediate", 31 0;
118 
v0x9388c0_0 .var "top_core_deco_of_comb_mem_write", 0 0;
119 
v0x938960_0 .var "top_core_deco_of_comb_operation", 0 0;
120 
v0x938d50_0 .var "top_core_deco_of_comb_program_counter", 15 0;
121 
v0x938dd0_0 .var "top_core_deco_of_comb_r_has_imm_high", 0 0;
122 
v0x938a90_0 .var "top_core_deco_of_comb_r_hazard", 0 0;
123 
v0x938b30_0 .var "top_core_deco_of_comb_r_immediate_high", 15 0;
124 
v0x938bd0_0 .var "top_core_deco_of_comb_r_instruction", 31 0;
125 
v0x938c70_0 .var "top_core_deco_of_comb_r_mem_read", 0 0;
126 
v0x939140_0 .var "top_core_deco_of_comb_r_program_counter", 15 0;
127 
v0x9391c0_0 .var "top_core_deco_of_comb_r_reg_d", 4 0;
128 
v0x938e50_0 .var "top_core_deco_of_comb_reg_a", 4 0;
129 
v0x938ef0_0 .var "top_core_deco_of_comb_reg_b", 4 0;
130 
v0x938f90_0 .var "top_core_deco_of_comb_reg_write", 0 0;
131 
v0x939030_0 .var "top_core_deco_of_comb_transfer_size", 1 0;
132 
v0x939560_0 .var "top_core_deco_of_r_has_imm_high", 0 0;
133 
v0x9395e0_0 .var "top_core_deco_of_r_hazard", 0 0;
134 
v0x939240_0 .var "top_core_deco_of_r_immediate_high", 15 0;
135 
v0x9392e0_0 .var "top_core_deco_of_r_instruction", 31 0;
136 
v0x939380_0 .var "top_core_deco_of_r_mem_read", 0 0;
137 
v0x939420_0 .var "top_core_deco_of_r_program_counter", 15 0;
138 
v0x9394c0_0 .var "top_core_deco_of_r_reg_d", 4 0;
139 
v0x9399b0_0 .var "top_core_deco_wb_dat_d", 31 0;
140 
v0x939660_0 .net "top_core_ex_alu_result", 31 0, v0x93a9d0_0; 1 drivers
141 
v0x939700_0 .var "top_core_ex_branch", 0 0;
142 
v0x9397a0_0 .var "top_core_ex_dat_a", 31 0;
143 
v0x939840_0 .var "top_core_ex_dat_b", 31 0;
144 
v0x9398e0_0 .var "top_core_ex_dat_d", 31 0;
145 
v0x939db0_0 .var "top_core_ex_flush_id", 0 0;
146 
v0x939a30_0 .var "top_core_ex_instruction", 31 0;
147 
v0x939ad0_0 .var "top_core_ex_mem_read", 0 0;
148 
v0x939b70_0 .var "top_core_ex_mem_write", 0 0;
149 
v0x939c10_0 .var "top_core_ex_program_counter", 15 0;
150 
v0x939cb0_0 .var "top_core_ex_reg_a", 4 0;
151 
v0x93a1e0_0 .var "top_core_ex_reg_b", 4 0;
152 
v0x939e30_0 .net "top_core_ex_reg_d", 4 0, v0x93b0f0_0; 1 drivers
153 
v0x939ed0_0 .net "top_core_ex_reg_write", 0 0, v0x93ac00_0; 1 drivers
154 
v0x939f70_0 .var "top_core_ex_transfer_size", 1 0;
155 
v0x93a010_0 .var "top_core_exeu_ex_comb_branch", 0 0;
156 
v0x93a0b0_0 .var "top_core_exeu_ex_comb_dat_a", 31 0;
157 
v0x93a150_0 .var "top_core_exeu_ex_comb_dat_b", 31 0;
158 
v0x93a650_0 .var "top_core_exeu_ex_comb_dat_d", 31 0;
159 
v0x93a6d0_0 .var "top_core_exeu_ex_comb_flush_id", 0 0;
160 
v0x935e60_0 .var "top_core_exeu_ex_comb_instruction", 31 0;
161 
v0x93a260_0 .var "top_core_exeu_ex_comb_mem_read", 0 0;
162 
v0x93a2e0_0 .var "top_core_exeu_ex_comb_mem_write", 0 0;
163 
v0x93a380_0 .var "top_core_exeu_ex_comb_program_counter", 15 0;
164 
v0x93a420_0 .var "top_core_exeu_ex_comb_r_alu_result", 31 0;
165 
v0x93a4c0_0 .var "top_core_exeu_ex_comb_r_carry", 0 0;
166 
v0x93a560_0 .var "top_core_exeu_ex_comb_r_flush_ex", 0 0;
167 
v0x93ab80_0 .var "top_core_exeu_ex_comb_r_reg_d", 4 0;
168 
v0x93a750_0 .var "top_core_exeu_ex_comb_r_reg_write", 0 0;
169 
v0x93a7f0_0 .var "top_core_exeu_ex_comb_reg_a", 4 0;
170 
v0x93a890_0 .var "top_core_exeu_ex_comb_reg_b", 4 0;
171 
v0x93a930_0 .var "top_core_exeu_ex_comb_transfer_size", 1 0;
172 
v0x93a9d0_0 .var "top_core_exeu_ex_r_alu_result", 31 0;
173 
v0x93aa70_0 .var "top_core_exeu_ex_r_carry", 0 0;
174 
v0x93b070_0 .var "top_core_exeu_ex_r_flush_ex", 0 0;
175 
v0x93b0f0_0 .var "top_core_exeu_ex_r_reg_d", 4 0;
176 
v0x93ac00_0 .var "top_core_exeu_ex_r_reg_write", 0 0;
177 
v0x93aca0_0 .var "top_core_ftch_if_comb_r_program_counter", 15 0;
178 
v0x93ad40_0 .var "top_core_ftch_if_r_program_counter", 15 0;
179 
v0x93ade0_0 .var "top_core_gprf_dat_a", 31 0;
180 
v0x93ae80_0 .var "top_core_gprf_dat_b", 31 0;
181 
v0x93af20_0 .var "top_core_gprf_dat_d", 31 0;
182 
v0x93afc0_0 .net "top_core_if_program_counter", 15 0, v0x93ad40_0; 1 drivers
183 
v0x93b620_0 .var "top_core_memu_mem_result", 31 0;
184 
v0x93b170_0 .var "top_core_memu_mm_comb_alu_result", 31 0;
185 
v0x93b210_0 .var "top_core_memu_mm_comb_mem_read", 0 0;
186 
v0x93b2b0_0 .var "top_core_memu_mm_comb_reg_d", 4 0;
187 
v0x93b350_0 .var "top_core_memu_mm_comb_reg_write", 0 0;
188 
v0x93b3f0_0 .var "top_core_memu_mm_comb_transfer_size", 1 0;
189 
v0x93b490_0 .var "top_core_mm_alu_result", 31 0;
190 
v0x93b530_0 .var "top_core_mm_mem_read", 0 0;
191 
v0x93bb90_0 .var "top_core_mm_reg_d", 4 0;
192 
v0x93b6a0_0 .var "top_core_mm_reg_write", 0 0;
193 
v0x93b740_0 .var "top_core_mm_transfer_size", 1 0;
194 
v0x93b7e0_0 .var "top_core_of_alu_op", 3 0;
195 
v0x93b880_0 .var "top_core_of_alu_src_a", 1 0;
196 
v0x93b920_0 .var "top_core_of_alu_src_b", 1 0;
197 
v0x93b9c0_0 .var "top_core_of_branch_cond", 2 0;
198 
v0x93ba60_0 .var "top_core_of_carry", 1 0;
199 
v0x93bb00_0 .var "top_core_of_carry_keep", 0 0;
200 
v0x93c150_0 .var "top_core_of_delay", 0 0;
201 
v0x93c1d0_0 .var "top_core_of_fwd_mem_result", 31 0;
202 
v0x93bc10_0 .var "top_core_of_fwd_reg_d", 4 0;
203 
v0x93bc90_0 .var "top_core_of_fwd_reg_write", 0 0;
204 
v0x93bd30_0 .net "top_core_of_hazard", 0 0, v0x9395e0_0; 1 drivers
205 
v0x93bdd0_0 .var "top_core_of_immediate", 31 0;
206 
v0x93be70_0 .net "top_core_of_instruction", 31 0, v0x9392e0_0; 1 drivers
207 
v0x93bf10_0 .net "top_core_of_mem_read", 0 0, v0x939380_0; 1 drivers
208 
v0x93bfb0_0 .var "top_core_of_mem_write", 0 0;
209 
v0x93c050_0 .var "top_core_of_operation", 0 0;
210 
v0x93c7e0_0 .var "top_core_of_program_counter", 15 0;
211 
v0x93c860_0 .var "top_core_of_reg_a", 4 0;
212 
v0x93c250_0 .var "top_core_of_reg_b", 4 0;
213 
v0x93c2d0_0 .net "top_core_of_reg_d", 4 0, v0x9394c0_0; 1 drivers
214 
v0x93c370_0 .var "top_core_of_reg_write", 0 0;
215 
v0x93c410_0 .var "top_core_of_transfer_size", 1 0;
216 
v0x93c4b0_0 .var "top_count", 19 0;
217 
v0x93c550_0 .net "top_dmem_addr_out", 31 0, L_0x943600; 1 drivers
218 
v0x93c5f0 .array "top_dmem_bank_0_ram", 2047 0, 7 0;
219 
v0x93c670 .array "top_dmem_bank_1_ram", 2047 0, 7 0;
220 
v0x93c6f0 .array "top_dmem_bank_2_ram", 2047 0, 7 0;
221 
v0x93cec0 .array "top_dmem_bank_3_ram", 2047 0, 7 0;
222 
v0x93c8e0_0 .var "top_dmem_bank_addr", 29 0;
223 
v0x93c980 .array "top_dmem_bank_in", 3 0, 7 0;
224 
v0x93ca00 .array "top_dmem_bank_out", 3 0, 7 0;
225 
v0x93cb30 .array "top_dmem_bank_wre", 3 0, 0 0;
226 
v0x93cbb0_0 .var "top_dmem_data_in", 31 0;
227 
v0x93cc50_0 .net "top_dmem_data_out", 31 0, v0x93b620_0; 1 drivers
228 
v0x93ccf0_0 .var "top_dmem_ena", 0 0;
229 
v0x93cd90_0 .var "top_dmem_ena_in", 0 0;
230 
v0x93ce30_0 .net "top_dmem_ena_out", 0 0, L_0x9436b0; 1 drivers
231 
v0x93d570_0 .var "top_dmem_sel", 3 0;
232 
v0x93cf40_0 .net "top_dmem_sel_out", 3 0, L_0x943970; 1 drivers
233 
v0x93cfe0_0 .net "top_dmem_we_out", 0 0, L_0x943c40; 1 drivers
234 
v0x93d080_0 .net "top_imem_addr_out", 15 0, v0x93aca0_0; 1 drivers
235 
v0x93d120 .array "top_imem_bank_0_ram", 2047 0, 7 0;
236 
v0x93d1a0 .array "top_imem_bank_1_ram", 2047 0, 7 0;
237 
v0x93d220 .array "top_imem_bank_2_ram", 2047 0, 7 0;
238 
v0x93d2a0 .array "top_imem_bank_3_ram", 2047 0, 7 0;
239 
v0x93d320_0 .var "top_imem_bank_addr", 13 0;
240 
v0x93d3c0 .array "top_imem_bank_in", 3 0, 7 0;
241 
v0x93d440 .array "top_imem_bank_out", 3 0, 7 0;
242 
v0x93dc80 .array "top_imem_bank_wre", 3 0, 0 0;
243 
v0x93dd00_0 .var "top_imem_data_in", 31 0;
244 
v0x93d5f0_0 .var "top_imem_data_out", 31 0;
245 
v0x93d690_0 .net "top_imem_ena", 0 0, C4<1>; 1 drivers
246 
v0x93d730_0 .net "top_imem_ena_out", 0 0, L_0x9411c0; 1 drivers
247 
v0x93d7d0_0 .var "top_imem_sel_out", 3 0;
248 
v0x93d870_0 .net "top_imem_we_out", 0 0, C4<0>; 1 drivers
249 
v0x93d910_0 .var "top_led_low", 31 0;
250 
v0x93d9b0_0 .var "top_led_reg", 31 0;
251 
v0x93da50_0 .var "top_read_en", 0 0;
252 
v0x93daf0_0 .var "top_read_en2", 0 0;
253 
v0x93db90_0 .var "top_rx_avail", 0 0;
254 
v0x93e470_0 .var "top_rx_avail2", 0 0;
255 
v0x93e4f0_0 .var "top_rx_data", 31 0;
256 
v0x93dd80_0 .var "top_rx_data2", 31 0;
257 
v0x93de20_0 .var "top_rx_error", 0 0;
258 
v0x93dec0_0 .var "top_rx_error2", 0 0;
259 
v0x93df60_0 .net "top_tx_busy", 0 0, v0x93f060_0; 1 drivers
260 
v0x93e000_0 .net "top_tx_busy2", 0 0, v0x93e750_0; 1 drivers
261 
v0x93e0a0_0 .var "top_tx_data", 31 0;
262 
v0x93e140_0 .net "top_tx_data2", 31 0, C4<00000000000000000000000000000000>; 1 drivers
263 
v0x93e1e0_0 .net "top_uart2_enable16", 0 0, L_0x944120; 1 drivers
264 
v0x93e280_0 .var "top_uart2_enable16_counter", 15 0;
265 
v0x93e320_0 .var "top_uart2_rx_bitcount", 3 0;
266 
v0x93e3c0_0 .var "top_uart2_rx_count16", 3 0;
267 
v0x93ecc0_0 .var "top_uart2_rx_is_busy", 0 0;
268 
v0x93e570_0 .var "top_uart2_rxd_reg", 7 0;
269 
v0x93e610_0 .var "top_uart2_tx_bitcount", 3 0;
270 
v0x93e6b0_0 .var "top_uart2_tx_count16", 3 0;
271 
v0x93e750_0 .var "top_uart2_tx_is_busy", 0 0;
272 
v0x93e7f0_0 .var "top_uart2_txd_reg", 8 0;
273 
v0x93e890_0 .var "top_uart2_uart_rxd1", 0 0;
274 
v0x93e930_0 .var "top_uart2_uart_rxd2", 0 0;
275 
v0x93e9d0_0 .net "top_uart_enable16", 0 0, L_0x944250; 1 drivers
276 
v0x93ea70_0 .var "top_uart_enable16_counter", 15 0;
277 
v0x93eb10_0 .var "top_uart_rx_bitcount", 3 0;
278 
v0x93ebb0_0 .var "top_uart_rx_count16", 3 0;
279 
v0x93f4f0_0 .var "top_uart_rx_is_busy", 0 0;
280 
v0x93ed40_0 .var "top_uart_rxd", 0 0;
281 
v0x93ede0_0 .var "top_uart_rxd2", 0 0;
282 
v0x93ee80_0 .var "top_uart_rxd_reg", 7 0;
283 
v0x93ef20_0 .var "top_uart_tx_bitcount", 3 0;
284 
v0x93efc0_0 .var "top_uart_tx_count16", 3 0;
285 
v0x93f060_0 .var "top_uart_tx_is_busy", 0 0;
286 
v0x93f100_0 .var "top_uart_txd", 0 0;
287 
v0x93f1a0_0 .var "top_uart_txd2", 0 0;
288 
v0x93f240_0 .var "top_uart_txd_reg", 8 0;
289 
v0x93f2e0_0 .var "top_uart_uart_rxd1", 0 0;
290 
v0x93f380_0 .var "top_uart_uart_rxd2", 0 0;
291 
v0x93f420_0 .var "top_write_en", 0 0;
292 
v0x93fd90_0 .net "top_write_en2", 0 0, C4<0>; 1 drivers
293 
v0x93fe10_0 .var "txd_line", 0 0;
294 
v0x93f570_0 .var "txd_line2", 0 0;
295 
E_0x8dad90 .event posedge, v0x935740_0;
296 
v0x93ca00_3 .array/port v0x93ca00, 3;
297 
v0x93ca00_2 .array/port v0x93ca00, 2;
298 
E_0x8dcf40/0 .event edge, v0x93c550_0, v0x93cc50_0, v0x93ca00_3, v0x93ca00_2;
299 
v0x93ca00_1 .array/port v0x93ca00, 1;
300 
v0x93ca00_0 .array/port v0x93ca00, 0;
301 
E_0x8dcf40/1 .event edge, v0x93ca00_1, v0x93ca00_0, v0x93d570_0;
302 
E_0x8dcf40 .event/or E_0x8dcf40/0, E_0x8dcf40/1;
303 
E_0x8dcfb0/0 .event edge, v0x93bb00_0, v0x93b7e0_0, v0x93b9c0_0, v0x93b6a0_0;
304 
E_0x8dcfb0/1 .event edge, v0x93bfb0_0, v0x93aa70_0, v0x93bdd0_0, v0x93b0f0_0;
305 
E_0x8dcfb0/2 .event edge, v0x93a9d0_0, v0x93c050_0, v0x93c250_0, v0x93c860_0;
306 
E_0x8dcfb0/3 .event edge, v0x93c2d0_0, v0x93bb90_0, v0x93bf10_0, v0x93b490_0;
307 
E_0x8dcfb0/4 .event edge, v0x93c1d0_0, v0x93c150_0, v0x93b920_0, v0x93b530_0;
308 
E_0x8dcfb0/5 .event edge, v0x93ac00_0, v0x93b880_0, v0x93bc90_0, v0x93b740_0;
309 
E_0x8dcfb0/6 .event edge, v0x93c7e0_0, v0x93ba60_0, v0x93b070_0, v0x93bc10_0;
310 
E_0x8dcfb0/7 .event edge, v0x93be70_0, v0x93c410_0, v0x93ae80_0, v0x93ade0_0;
311 
E_0x8dcfb0/8 .event edge, v0x93cbb0_0, v0x93c370_0, v0x93af20_0;
312 
E_0x8dcfb0 .event/or E_0x8dcfb0/0, E_0x8dcfb0/1, E_0x8dcfb0/2, E_0x8dcfb0/3, E_0x8dcfb0/4, E_0x8dcfb0/5, E_0x8dcfb0/6, E_0x8dcfb0/7, E_0x8dcfb0/8;
313 
E_0x8de000/0 .event edge, v0x939f70_0, v0x939ed0_0, v0x939ad0_0, v0x939660_0;
314 
E_0x8de000/1 .event edge, v0x939c10_0, v0x939e30_0, v0x939700_0, v0x9398e0_0;
315 
E_0x8de000 .event/or E_0x8de000/0, E_0x8de000/1;
316 
E_0x8e1620/0 .event edge, v0x93bd30_0, v0x93ad40_0, v0x939700_0, v0x939660_0;
317 
E_0x8e1620/1 .event edge, v0x938010_0;
318 
E_0x8e1620 .event/or E_0x8e1620/0, E_0x8e1620/1;
319 
E_0x8e2160/0 .event edge, v0x93b740_0, v0x93b530_0, v0x93afc0_0, v0x9395e0_0;
320 
E_0x8e2160/1 .event edge, v0x939420_0, v0x939560_0, v0x93b490_0, v0x93dd00_0;
321 
E_0x8e2160/2 .event edge, v0x9392e0_0, v0x93cbb0_0, v0x939db0_0, v0x939240_0;
322 
E_0x8e2160/3 .event edge, v0x9394c0_0, v0x939380_0;
323 
E_0x8e2160 .event/or E_0x8e2160/0, E_0x8e2160/1, E_0x8e2160/2, E_0x8e2160/3;
324 
v0x93d440_3 .array/port v0x93d440, 3;
325 
v0x93d440_2 .array/port v0x93d440, 2;
326 
E_0x8e14f0/0 .event edge, v0x93d080_0, v0x93d5f0_0, v0x93d440_3, v0x93d440_2;
327 
v0x93d440_1 .array/port v0x93d440, 1;
328 
v0x93d440_0 .array/port v0x93d440, 0;
329 
E_0x8e14f0/1 .event edge, v0x93d440_1, v0x93d440_0, v0x93d7d0_0;
330 
E_0x8e14f0 .event/or E_0x8e14f0/0, E_0x8e14f0/1;
331 
E_0x8f3e00/0 .event edge, v0x93c550_0, v0x93cf40_0, v0x93cc50_0, v0x93ce30_0;
332 
E_0x8f3e00/1 .event edge, v0x93cfe0_0, v0x93d9b0_0;
333 
E_0x8f3e00 .event/or E_0x8f3e00/0, E_0x8f3e00/1;
334 
L_0x943880 .part v0x93a9d0_0, 0, 2;
335 
L_0x943970 .ufunc TD_TopBench.MYHDL33_decode_mem_store, 4, L_0x943ab0, v0x939f70_0 (v0x9345b0_0, v0x9346f0_0) v0x9344f0_0 S_0x934330;
336 
L_0x943ab0 .concat [ 2 30 0 0], L_0x943880, C4<000000000000000000000000000000>;
337 
L_0x943e80 .cmp/ne 16, v0x93ea70_0, C4<0000000000000000>;
338 
L_0x944250 .reduce/nor L_0x943e80;
339 
L_0x943ff0 .cmp/ne 16, v0x93e280_0, C4<0000000000000000>;
340 
L_0x944120 .reduce/nor L_0x943ff0;
341 
S_0x934d90 .scope function, "MYHDL22_align_mem_load" "MYHDL22_align_mem_load" 2 275, 2 275, S_0x8ca510;
342 
 .timescale -9 -11;
343 
v0x934f50_0 .var "MYHDL22_align_mem_load", 31 0;
344 
v0x935010_0 .var "address", 31 0;
345 
v0x9350b0_0 .var "data", 31 0;
346 
v0x935150_0 .var "result", 31 0;
347 
v0x9351d0_0 .var "size", 1 0;
348 
TD_TopBench.MYHDL22_align_mem_load ;
349 
    %fork t_1, S_0x934e70;
350 
    %jmp t_0;
351 
t_1 ;
352 
    %set/v v0x935150_0, 0, 32;
353 
    %load/v 8, v0x9351d0_0, 2;
354 
    %movi 10, 2, 2;
355 
    %cmp/z 8, 10, 2;
356 
    %jmp/1 T_0.0, 4;
357 
    %movi 10, 1, 2;
358 
    %cmp/z 8, 10, 2;
359 
    %jmp/1 T_0.1, 4;
360 
    %load/v 8, v0x9350b0_0, 32;
361 
    %set/v v0x935150_0, 8, 32;
362 
    %jmp T_0.3;
363 
T_0.0 ;
364 
    %ix/load 1, 1, 0;
365 
    %mov 4, 0, 1;
366 
    %load/x1p 8, v0x935010_0, 1;
367 
; Save base=8 wid=1 in lookaside.
368 
    %cmpi/u 8, 0, 1;
369 
    %jmp/0xz  T_0.4, 4;
370 
    %load/v 8, v0x935010_0, 1; Only need 1 of 32 bits
371 
; Save base=8 wid=1 in lookaside.
372 
    %cmpi/u 8, 0, 1;
373 
    %jmp/0xz  T_0.6, 4;
374 
    %ix/load 1, 24, 0;
375 
    %mov 4, 0, 1;
376 
    %load/x1p 40, v0x9350b0_0, 8;
377 
    %mov 8, 40, 8; Move signal select into place
378 
    %mov 16, 0, 24;
379 
    %set/v v0x935150_0, 8, 32;
380 
    %jmp T_0.7;
381 
T_0.6 ;
382 
    %ix/load 1, 16, 0;
383 
    %mov 4, 0, 1;
384 
    %load/x1p 40, v0x9350b0_0, 8;
385 
    %mov 8, 40, 8; Move signal select into place
386 
    %mov 16, 0, 24;
387 
    %set/v v0x935150_0, 8, 32;
388 
T_0.7 ;
389 
    %jmp T_0.5;
390 
T_0.4 ;
391 
    %load/v 8, v0x935010_0, 1; Only need 1 of 32 bits
392 
; Save base=8 wid=1 in lookaside.
393 
    %cmpi/u 8, 0, 1;
394 
    %jmp/0xz  T_0.8, 4;
395 
    %ix/load 1, 8, 0;
396 
    %mov 4, 0, 1;
397 
    %load/x1p 40, v0x9350b0_0, 8;
398 
    %mov 8, 40, 8; Move signal select into place
399 
    %mov 16, 0, 24;
400 
    %set/v v0x935150_0, 8, 32;
401 
    %jmp T_0.9;
402 
T_0.8 ;
403 
    %load/v 8, v0x9350b0_0, 8; Select 8 out of 32 bits
404 
    %mov 16, 0, 24;
405 
    %set/v v0x935150_0, 8, 32;
406 
T_0.9 ;
407 
T_0.5 ;
408 
    %jmp T_0.3;
409 
T_0.1 ;
410 
    %ix/load 1, 1, 0;
411 
    %mov 4, 0, 1;
412 
    %load/x1p 8, v0x935010_0, 1;
413 
; Save base=8 wid=1 in lookaside.
414 
    %cmpi/u 8, 0, 1;
415 
    %jmp/0xz  T_0.10, 4;
416 
    %ix/load 1, 16, 0;
417 
    %mov 4, 0, 1;
418 
    %load/x1p 40, v0x9350b0_0, 16;
419 
    %mov 8, 40, 16; Move signal select into place
420 
    %mov 24, 0, 16;
421 
    %set/v v0x935150_0, 8, 32;
422 
    %jmp T_0.11;
423 
T_0.10 ;
424 
    %load/v 8, v0x9350b0_0, 16; Select 16 out of 32 bits
425 
    %mov 24, 0, 16;
426 
    %set/v v0x935150_0, 8, 32;
427 
T_0.11 ;
428 
    %jmp T_0.3;
429 
T_0.3 ;
430 
    %load/v 8, v0x935150_0, 32;
431 
    %set/v v0x934f50_0, 8, 32;
432 
    %disable S_0x934e70;
433 
    %end;
434 
t_0 %join;
435 
    %end;
436 
S_0x934e70 .scope begin, "MYHDL91_RETURN" "MYHDL91_RETURN" 2 280, 2 280, S_0x934d90;
437 
 .timescale -9 -11;
438 
S_0x9347a0 .scope function, "MYHDL23_sign_extend16" "MYHDL23_sign_extend16" 2 319, 2 319, S_0x8ca510;
439 
 .timescale -9 -11;
440 
v0x934960_0 .var "MYHDL23_sign_extend16", 31 0;
441 
v0x934a20_0 .var "fill", 0 0;
442 
v0x934ac0_0 .var/i "i", 31 0;
443 
v0x934b60_0 .var/i "size", 31 0;
444 
v0x934c10_0 .var "tmp", 31 0;
445 
v0x934cb0_0 .var "value", 15 0;
446 
TD_TopBench.MYHDL23_sign_extend16 ;
447 
    %fork t_3, S_0x934880;
448 
    %jmp t_2;
449 
t_3 ;
450 
    %set/v v0x934c10_0, 0, 32;
451 
    %movi 8, 16, 32;
452 
    %set/v v0x934b60_0, 8, 32;
453 
    %set/v v0x934ac0_0, 0, 32;
454 
T_1.12 ;
455 
    %load/v 8, v0x934ac0_0, 32;
456 
    %load/v 40, v0x934b60_0, 32;
457 
    %cmp/s 8, 40, 32;
458 
    %jmp/0xz T_1.13, 5;
459 
    %load/v 8, v0x934a20_0, 1;
460 
    %movi 9, 31, 32;
461 
    %load/v 41, v0x934ac0_0, 32;
462 
    %sub 9, 41, 32;
463 
    %ix/get 0, 9, 32;
464 
    %jmp/1 t_4, 4;
465 
    %set/x0 v0x934c10_0, 8, 1;
466 
t_4 ;
467 
    %ix/load 0, 1, 0;
468 
    %load/vp0/s 8, v0x934ac0_0, 32;
469 
    %set/v v0x934ac0_0, 8, 32;
470 
    %jmp T_1.12;
471 
T_1.13 ;
472 
    %load/v 8, v0x934cb0_0, 16;
473 
    %ix/load 0, 0, 0;
474 
    %set/x0 v0x934c10_0, 8, 16;
475 
    %load/v 8, v0x934c10_0, 32;
476 
    %set/v v0x934960_0, 8, 32;
477 
    %disable S_0x934880;
478 
    %end;
479 
t_2 %join;
480 
    %end;
481 
S_0x934880 .scope begin, "MYHDL92_RETURN" "MYHDL92_RETURN" 2 325, 2 325, S_0x9347a0;
482 
 .timescale -9 -11;
483 
S_0x934330 .scope function, "MYHDL33_decode_mem_store" "MYHDL33_decode_mem_store" 2 337, 2 337, S_0x8ca510;
484 
 .timescale -9 -11;
485 
v0x9344f0_0 .var "MYHDL33_decode_mem_store", 3 0;
486 
v0x9345b0_0 .var "address", 31 0;
487 
v0x934650_0 .var "result", 3 0;
488 
v0x9346f0_0 .var "size", 1 0;
489 
TD_TopBench.MYHDL33_decode_mem_store ;
490 
    %fork t_6, S_0x934410;
491 
    %jmp t_5;
492 
t_6 ;
493 
    %set/v v0x934650_0, 0, 4;
494 
    %load/v 8, v0x9346f0_0, 2;
495 
    %movi 10, 2, 2;
496 
    %cmp/z 8, 10, 2;
497 
    %jmp/1 T_2.14, 4;
498 
    %movi 10, 1, 2;
499 
    %cmp/z 8, 10, 2;
500 
    %jmp/1 T_2.15, 4;
501 
    %set/v v0x934650_0, 1, 4;
502 
    %jmp T_2.17;
503 
T_2.14 ;
504 
    %ix/load 1, 1, 0;
505 
    %mov 4, 0, 1;
506 
    %load/x1p 8, v0x9345b0_0, 1;
507 
; Save base=8 wid=1 in lookaside.
508 
    %cmpi/u 8, 0, 1;
509 
    %jmp/0xz  T_2.18, 4;
510 
    %load/v 8, v0x9345b0_0, 1; Only need 1 of 32 bits
511 
; Save base=8 wid=1 in lookaside.
512 
    %cmpi/u 8, 0, 1;
513 
    %jmp/0xz  T_2.20, 4;
514 
    %movi 8, 8, 4;
515 
    %set/v v0x934650_0, 8, 4;
516 
    %jmp T_2.21;
517 
T_2.20 ;
518 
    %movi 8, 4, 4;
519 
    %set/v v0x934650_0, 8, 4;
520 
T_2.21 ;
521 
    %jmp T_2.19;
522 
T_2.18 ;
523 
    %load/v 8, v0x9345b0_0, 1; Only need 1 of 32 bits
524 
; Save base=8 wid=1 in lookaside.
525 
    %cmpi/u 8, 0, 1;
526 
    %jmp/0xz  T_2.22, 4;
527 
    %movi 8, 2, 4;
528 
    %set/v v0x934650_0, 8, 4;
529 
    %jmp T_2.23;
530 
T_2.22 ;
531 
    %movi 8, 1, 4;
532 
    %set/v v0x934650_0, 8, 4;
533 
T_2.23 ;
534 
T_2.19 ;
535 
    %jmp T_2.17;
536 
T_2.15 ;
537 
    %ix/load 1, 1, 0;
538 
    %mov 4, 0, 1;
539 
    %load/x1p 8, v0x9345b0_0, 1;
540 
; Save base=8 wid=1 in lookaside.
541 
    %cmpi/u 8, 0, 1;
542 
    %jmp/0xz  T_2.24, 4;
543 
    %movi 8, 12, 4;
544 
    %set/v v0x934650_0, 8, 4;
545 
    %jmp T_2.25;
546 
T_2.24 ;
547 
    %movi 8, 3, 4;
548 
    %set/v v0x934650_0, 8, 4;
549 
T_2.25 ;
550 
    %jmp T_2.17;
551 
T_2.17 ;
552 
    %load/v 8, v0x934650_0, 4;
553 
    %set/v v0x9344f0_0, 8, 4;
554 
    %disable S_0x934410;
555 
    %end;
556 
t_5 %join;
557 
    %end;
558 
S_0x934410 .scope begin, "MYHDL93_RETURN" "MYHDL93_RETURN" 2 341, 2 341, S_0x934330;
559 
 .timescale -9 -11;
560 
S_0x933e50 .scope function, "MYHDL35_forward_condition" "MYHDL35_forward_condition" 2 380, 2 380, S_0x8ca510;
561 
 .timescale -9 -11;
562 
v0x934010_0 .var "MYHDL35_forward_condition", 0 0;
563 
v0x9340d0_0 .var "reg_a", 4 0;
564 
v0x934170_0 .var "reg_d", 4 0;
565 
v0x934210_0 .var "reg_write", 0 0;
566 
v0x934290_0 .var "result", 0 0;
567 
TD_TopBench.MYHDL35_forward_condition ;
568 
    %fork t_8, S_0x933f30;
569 
    %jmp t_7;
570 
t_8 ;
571 
    %load/v 8, v0x934210_0, 1;
572 
    %load/v 9, v0x9340d0_0, 5;
573 
    %load/v 14, v0x934170_0, 5;
574 
    %cmp/u 9, 14, 5;
575 
    %mov 9, 4, 1;
576 
    %and 8, 9, 1;
577 
    %set/v v0x934290_0, 8, 1;
578 
    %load/v 8, v0x934290_0, 1;
579 
    %set/v v0x934010_0, 8, 1;
580 
    %disable S_0x933f30;
581 
    %end;
582 
t_7 %join;
583 
    %end;
584 
S_0x933f30 .scope begin, "MYHDL94_RETURN" "MYHDL94_RETURN" 2 385, 2 385, S_0x933e50;
585 
 .timescale -9 -11;
586 
S_0x933860 .scope function, "MYHDL36_select_register_data" "MYHDL36_select_register_data" 2 392, 2 392, S_0x8ca510;
587 
 .timescale -9 -11;
588 
v0x933a20_0 .var "MYHDL36_select_register_data", 31 0;
589 
v0x933ae0_0 .var "reg_dat", 31 0;
590 
v0x933b80_0 .var "reg_x", 4 0;
591 
v0x933c20_0 .var "tmp", 31 0;
592 
v0x933cd0_0 .var "wb_dat", 31 0;
593 
v0x933d70_0 .var "write", 0 0;
594 
TD_TopBench.MYHDL36_select_register_data ;
595 
    %fork t_10, S_0x933940;
596 
    %jmp t_9;
597 
t_10 ;
598 
    %set/v v0x933c20_0, 0, 32;
599 
    %load/v 8, v0x933b80_0, 5;
600 
    %cmpi/u 8, 0, 5;
601 
    %jmp/0xz  T_4.26, 4;
602 
    %set/v v0x933c20_0, 0, 32;
603 
    %jmp T_4.27;
604 
T_4.26 ;
605 
    %load/v 8, v0x933d70_0, 1;
606 
    %jmp/0xz  T_4.28, 8;
607 
    %load/v 8, v0x933cd0_0, 32;
608 
    %set/v v0x933c20_0, 8, 32;
609 
    %jmp T_4.29;
610 
T_4.28 ;
611 
    %load/v 8, v0x933ae0_0, 32;
612 
    %set/v v0x933c20_0, 8, 32;
613 
T_4.29 ;
614 
T_4.27 ;
615 
    %load/v 8, v0x933c20_0, 32;
616 
    %set/v v0x933a20_0, 8, 32;
617 
    %disable S_0x933940;
618 
    %end;
619 
t_9 %join;
620 
    %end;
621 
S_0x933940 .scope begin, "MYHDL95_RETURN" "MYHDL95_RETURN" 2 398, 2 398, S_0x933860;
622 
 .timescale -9 -11;
623 
S_0x933380 .scope function, "MYHDL37_forward_condition" "MYHDL37_forward_condition" 2 414, 2 414, S_0x8ca510;
624 
 .timescale -9 -11;
625 
v0x933540_0 .var "MYHDL37_forward_condition", 0 0;
626 
v0x933600_0 .var "reg_a", 4 0;
627 
v0x9336a0_0 .var "reg_d", 4 0;
628 
v0x933740_0 .var "reg_write", 0 0;
629 
v0x9337c0_0 .var "result", 0 0;
630 
TD_TopBench.MYHDL37_forward_condition ;
631 
    %fork t_12, S_0x933460;
632 
    %jmp t_11;
633 
t_12 ;
634 
    %load/v 8, v0x933740_0, 1;
635 
    %load/v 9, v0x933600_0, 5;
636 
    %load/v 14, v0x9336a0_0, 5;
637 
    %cmp/u 9, 14, 5;
638 
    %mov 9, 4, 1;
639 
    %and 8, 9, 1;
640 
    %set/v v0x9337c0_0, 8, 1;
641 
    %load/v 8, v0x9337c0_0, 1;
642 
    %set/v v0x933540_0, 8, 1;
643 
    %disable S_0x933460;
644 
    %end;
645 
t_11 %join;
646 
    %end;
647 
S_0x933460 .scope begin, "MYHDL96_RETURN" "MYHDL96_RETURN" 2 419, 2 419, S_0x933380;
648 
 .timescale -9 -11;
649 
S_0x932d90 .scope function, "MYHDL38_select_register_data" "MYHDL38_select_register_data" 2 426, 2 426, S_0x8ca510;
650 
 .timescale -9 -11;
651 
v0x932f50_0 .var "MYHDL38_select_register_data", 31 0;
652 
v0x933010_0 .var "reg_dat", 31 0;
653 
v0x9330b0_0 .var "reg_x", 4 0;
654 
v0x933150_0 .var "tmp", 31 0;
655 
v0x933200_0 .var "wb_dat", 31 0;
656 
v0x9332a0_0 .var "write", 0 0;
657 
TD_TopBench.MYHDL38_select_register_data ;
658 
    %fork t_14, S_0x932e70;
659 
    %jmp t_13;
660 
t_14 ;
661 
    %set/v v0x933150_0, 0, 32;
662 
    %load/v 8, v0x9330b0_0, 5;
663 
    %cmpi/u 8, 0, 5;
664 
    %jmp/0xz  T_6.30, 4;
665 
    %set/v v0x933150_0, 0, 32;
666 
    %jmp T_6.31;
667 
T_6.30 ;
668 
    %load/v 8, v0x9332a0_0, 1;
669 
    %jmp/0xz  T_6.32, 8;
670 
    %load/v 8, v0x933200_0, 32;
671 
    %set/v v0x933150_0, 8, 32;
672 
    %jmp T_6.33;
673 
T_6.32 ;
674 
    %load/v 8, v0x933010_0, 32;
675 
    %set/v v0x933150_0, 8, 32;
676 
T_6.33 ;
677 
T_6.31 ;
678 
    %load/v 8, v0x933150_0, 32;
679 
    %set/v v0x932f50_0, 8, 32;
680 
    %disable S_0x932e70;
681 
    %end;
682 
t_13 %join;
683 
    %end;
684 
S_0x932e70 .scope begin, "MYHDL97_RETURN" "MYHDL97_RETURN" 2 432, 2 432, S_0x932d90;
685 
 .timescale -9 -11;
686 
S_0x9328b0 .scope function, "MYHDL39_forward_condition" "MYHDL39_forward_condition" 2 448, 2 448, S_0x8ca510;
687 
 .timescale -9 -11;
688 
v0x932a70_0 .var "MYHDL39_forward_condition", 0 0;
689 
v0x932b30_0 .var "reg_a", 4 0;
690 
v0x932bd0_0 .var "reg_d", 4 0;
691 
v0x932c70_0 .var "reg_write", 0 0;
692 
v0x932cf0_0 .var "result", 0 0;
693 
TD_TopBench.MYHDL39_forward_condition ;
694 
    %fork t_16, S_0x932990;
695 
    %jmp t_15;
696 
t_16 ;
697 
    %load/v 8, v0x932c70_0, 1;
698 
    %load/v 9, v0x932b30_0, 5;
699 
    %load/v 14, v0x932bd0_0, 5;
700 
    %cmp/u 9, 14, 5;
701 
    %mov 9, 4, 1;
702 
    %and 8, 9, 1;
703 
    %set/v v0x932cf0_0, 8, 1;
704 
    %load/v 8, v0x932cf0_0, 1;
705 
    %set/v v0x932a70_0, 8, 1;
706 
    %disable S_0x932990;
707 
    %end;
708 
t_15 %join;
709 
    %end;
710 
S_0x932990 .scope begin, "MYHDL98_RETURN" "MYHDL98_RETURN" 2 453, 2 453, S_0x9328b0;
711 
 .timescale -9 -11;
712 
S_0x932300 .scope function, "MYHDL40_select_register_data" "MYHDL40_select_register_data" 2 460, 2 460, S_0x8ca510;
713 
 .timescale -9 -11;
714 
v0x9324c0_0 .var "MYHDL40_select_register_data", 31 0;
715 
v0x932580_0 .var "reg_dat", 31 0;
716 
v0x932620_0 .var "reg_x", 4 0;
717 
v0x9326c0_0 .var "tmp", 31 0;
718 
v0x932770_0 .var "wb_dat", 31 0;
719 
v0x932810_0 .var "write", 0 0;
720 
TD_TopBench.MYHDL40_select_register_data ;
721 
    %fork t_18, S_0x9323e0;
722 
    %jmp t_17;
723 
t_18 ;
724 
    %set/v v0x9326c0_0, 0, 32;
725 
    %load/v 8, v0x932620_0, 5;
726 
    %cmpi/u 8, 0, 5;
727 
    %jmp/0xz  T_8.34, 4;
728 
    %set/v v0x9326c0_0, 0, 32;
729 
    %jmp T_8.35;
730 
T_8.34 ;
731 
    %load/v 8, v0x932810_0, 1;
732 
    %jmp/0xz  T_8.36, 8;
733 
    %load/v 8, v0x932770_0, 32;
734 
    %set/v v0x9326c0_0, 8, 32;
735 
    %jmp T_8.37;
736 
T_8.36 ;
737 
    %load/v 8, v0x932580_0, 32;
738 
    %set/v v0x9326c0_0, 8, 32;
739 
T_8.37 ;
740 
T_8.35 ;
741 
    %load/v 8, v0x9326c0_0, 32;
742 
    %set/v v0x9324c0_0, 8, 32;
743 
    %disable S_0x9323e0;
744 
    %end;
745 
t_17 %join;
746 
    %end;
747 
S_0x9323e0 .scope begin, "MYHDL99_RETURN" "MYHDL99_RETURN" 2 466, 2 466, S_0x932300;
748 
 .timescale -9 -11;
749 
S_0x931df0 .scope function, "MYHDL41_align_mem_load" "MYHDL41_align_mem_load" 2 482, 2 482, S_0x8ca510;
750 
 .timescale -9 -11;
751 
v0x931fb0_0 .var "MYHDL41_align_mem_load", 31 0;
752 
v0x932070_0 .var "address", 31 0;
753 
v0x932110_0 .var "data", 31 0;
754 
v0x9321b0_0 .var "result", 31 0;
755 
v0x932260_0 .var "size", 1 0;
756 
TD_TopBench.MYHDL41_align_mem_load ;
757 
    %fork t_20, S_0x931ed0;
758 
    %jmp t_19;
759 
t_20 ;
760 
    %set/v v0x9321b0_0, 0, 32;
761 
    %load/v 8, v0x932260_0, 2;
762 
    %movi 10, 2, 2;
763 
    %cmp/z 8, 10, 2;
764 
    %jmp/1 T_9.38, 4;
765 
    %movi 10, 1, 2;
766 
    %cmp/z 8, 10, 2;
767 
    %jmp/1 T_9.39, 4;
768 
    %load/v 8, v0x932110_0, 32;
769 
    %set/v v0x9321b0_0, 8, 32;
770 
    %jmp T_9.41;
771 
T_9.38 ;
772 
    %ix/load 1, 1, 0;
773 
    %mov 4, 0, 1;
774 
    %load/x1p 8, v0x932070_0, 1;
775 
; Save base=8 wid=1 in lookaside.
776 
    %cmpi/u 8, 0, 1;
777 
    %jmp/0xz  T_9.42, 4;
778 
    %load/v 8, v0x932070_0, 1; Only need 1 of 32 bits
779 
; Save base=8 wid=1 in lookaside.
780 
    %cmpi/u 8, 0, 1;
781 
    %jmp/0xz  T_9.44, 4;
782 
    %ix/load 1, 24, 0;
783 
    %mov 4, 0, 1;
784 
    %load/x1p 40, v0x932110_0, 8;
785 
    %mov 8, 40, 8; Move signal select into place
786 
    %mov 16, 0, 24;
787 
    %set/v v0x9321b0_0, 8, 32;
788 
    %jmp T_9.45;
789 
T_9.44 ;
790 
    %ix/load 1, 16, 0;
791 
    %mov 4, 0, 1;
792 
    %load/x1p 40, v0x932110_0, 8;
793 
    %mov 8, 40, 8; Move signal select into place
794 
    %mov 16, 0, 24;
795 
    %set/v v0x9321b0_0, 8, 32;
796 
T_9.45 ;
797 
    %jmp T_9.43;
798 
T_9.42 ;
799 
    %load/v 8, v0x932070_0, 1; Only need 1 of 32 bits
800 
; Save base=8 wid=1 in lookaside.
801 
    %cmpi/u 8, 0, 1;
802 
    %jmp/0xz  T_9.46, 4;
803 
    %ix/load 1, 8, 0;
804 
    %mov 4, 0, 1;
805 
    %load/x1p 40, v0x932110_0, 8;
806 
    %mov 8, 40, 8; Move signal select into place
807 
    %mov 16, 0, 24;
808 
    %set/v v0x9321b0_0, 8, 32;
809 
    %jmp T_9.47;
810 
T_9.46 ;
811 
    %load/v 8, v0x932110_0, 8; Select 8 out of 32 bits
812 
    %mov 16, 0, 24;
813 
    %set/v v0x9321b0_0, 8, 32;
814 
T_9.47 ;
815 
T_9.43 ;
816 
    %jmp T_9.41;
817 
T_9.39 ;
818 
    %ix/load 1, 1, 0;
819 
    %mov 4, 0, 1;
820 
    %load/x1p 8, v0x932070_0, 1;
821 
; Save base=8 wid=1 in lookaside.
822 
    %cmpi/u 8, 0, 1;
823 
    %jmp/0xz  T_9.48, 4;
824 
    %ix/load 1, 16, 0;
825 
    %mov 4, 0, 1;
826 
    %load/x1p 40, v0x932110_0, 16;
827 
    %mov 8, 40, 16; Move signal select into place
828 
    %mov 24, 0, 16;
829 
    %set/v v0x9321b0_0, 8, 32;
830 
    %jmp T_9.49;
831 
T_9.48 ;
832 
    %load/v 8, v0x932110_0, 16; Select 16 out of 32 bits
833 
    %mov 24, 0, 16;
834 
    %set/v v0x9321b0_0, 8, 32;
835 
T_9.49 ;
836 
    %jmp T_9.41;
837 
T_9.41 ;
838 
    %load/v 8, v0x9321b0_0, 32;
839 
    %set/v v0x931fb0_0, 8, 32;
840 
    %disable S_0x931ed0;
841 
    %end;
842 
t_19 %join;
843 
    %end;
844 
S_0x931ed0 .scope begin, "MYHDL100_RETURN" "MYHDL100_RETURN" 2 487, 2 487, S_0x931df0;
845 
 .timescale -9 -11;
846 
S_0x9318e0 .scope function, "MYHDL42_forward_condition" "MYHDL42_forward_condition" 2 526, 2 526, S_0x8ca510;
847 
 .timescale -9 -11;
848 
v0x931aa0_0 .var "MYHDL42_forward_condition", 0 0;
849 
v0x931b60_0 .var "reg_a", 4 0;
850 
v0x931c00_0 .var "reg_d", 4 0;
851 
v0x931ca0_0 .var "reg_write", 0 0;
852 
v0x931d50_0 .var "result", 0 0;
853 
TD_TopBench.MYHDL42_forward_condition ;
854 
    %fork t_22, S_0x9319c0;
855 
    %jmp t_21;
856 
t_22 ;
857 
    %load/v 8, v0x931ca0_0, 1;
858 
    %load/v 9, v0x931b60_0, 5;
859 
    %load/v 14, v0x931c00_0, 5;
860 
    %cmp/u 9, 14, 5;
861 
    %mov 9, 4, 1;
862 
    %and 8, 9, 1;
863 
    %set/v v0x931d50_0, 8, 1;
864 
    %load/v 8, v0x931d50_0, 1;
865 
    %set/v v0x931aa0_0, 8, 1;
866 
    %disable S_0x9319c0;
867 
    %end;
868 
t_21 %join;
869 
    %end;
870 
S_0x9319c0 .scope begin, "MYHDL101_RETURN" "MYHDL101_RETURN" 2 531, 2 531, S_0x9318e0;
871 
 .timescale -9 -11;
872 
S_0x9313d0 .scope function, "MYHDL43_forward_condition" "MYHDL43_forward_condition" 2 538, 2 538, S_0x8ca510;
873 
 .timescale -9 -11;
874 
v0x931590_0 .var "MYHDL43_forward_condition", 0 0;
875 
v0x931650_0 .var "reg_a", 4 0;
876 
v0x9316f0_0 .var "reg_d", 4 0;
877 
v0x931790_0 .var "reg_write", 0 0;
878 
v0x931840_0 .var "result", 0 0;
879 
TD_TopBench.MYHDL43_forward_condition ;
880 
    %fork t_24, S_0x9314b0;
881 
    %jmp t_23;
882 
t_24 ;
883 
    %load/v 8, v0x931790_0, 1;
884 
    %load/v 9, v0x931650_0, 5;
885 
    %load/v 14, v0x9316f0_0, 5;
886 
    %cmp/u 9, 14, 5;
887 
    %mov 9, 4, 1;
888 
    %and 8, 9, 1;
889 
    %set/v v0x931840_0, 8, 1;
890 
    %load/v 8, v0x931840_0, 1;
891 
    %set/v v0x931590_0, 8, 1;
892 
    %disable S_0x9314b0;
893 
    %end;
894 
t_23 %join;
895 
    %end;
896 
S_0x9314b0 .scope begin, "MYHDL102_RETURN" "MYHDL102_RETURN" 2 543, 2 543, S_0x9313d0;
897 
 .timescale -9 -11;
898 
S_0x930ec0 .scope function, "MYHDL44_forward_condition" "MYHDL44_forward_condition" 2 550, 2 550, S_0x8ca510;
899 
 .timescale -9 -11;
900 
v0x931080_0 .var "MYHDL44_forward_condition", 0 0;
901 
v0x931140_0 .var "reg_a", 4 0;
902 
v0x9311e0_0 .var "reg_d", 4 0;
903 
v0x931280_0 .var "reg_write", 0 0;
904 
v0x931330_0 .var "result", 0 0;
905 
TD_TopBench.MYHDL44_forward_condition ;
906 
    %fork t_26, S_0x930fa0;
907 
    %jmp t_25;
908 
t_26 ;
909 
    %load/v 8, v0x931280_0, 1;
910 
    %load/v 9, v0x931140_0, 5;
911 
    %load/v 14, v0x9311e0_0, 5;
912 
    %cmp/u 9, 14, 5;
913 
    %mov 9, 4, 1;
914 
    %and 8, 9, 1;
915 
    %set/v v0x931330_0, 8, 1;
916 
    %load/v 8, v0x931330_0, 1;
917 
    %set/v v0x931080_0, 8, 1;
918 
    %disable S_0x930fa0;
919 
    %end;
920 
t_25 %join;
921 
    %end;
922 
S_0x930fa0 .scope begin, "MYHDL103_RETURN" "MYHDL103_RETURN" 2 555, 2 555, S_0x930ec0;
923 
 .timescale -9 -11;
924 
S_0x9309b0 .scope function, "MYHDL45_forward_condition" "MYHDL45_forward_condition" 2 562, 2 562, S_0x8ca510;
925 
 .timescale -9 -11;
926 
v0x930b70_0 .var "MYHDL45_forward_condition", 0 0;
927 
v0x930c30_0 .var "reg_a", 4 0;
928 
v0x930cd0_0 .var "reg_d", 4 0;
929 
v0x930d70_0 .var "reg_write", 0 0;
930 
v0x930e20_0 .var "result", 0 0;
931 
TD_TopBench.MYHDL45_forward_condition ;
932 
    %fork t_28, S_0x930a90;
933 
    %jmp t_27;
934 
t_28 ;
935 
    %load/v 8, v0x930d70_0, 1;
936 
    %load/v 9, v0x930c30_0, 5;
937 
    %load/v 14, v0x930cd0_0, 5;
938 
    %cmp/u 9, 14, 5;
939 
    %mov 9, 4, 1;
940 
    %and 8, 9, 1;
941 
    %set/v v0x930e20_0, 8, 1;
942 
    %load/v 8, v0x930e20_0, 1;
943 
    %set/v v0x930b70_0, 8, 1;
944 
    %disable S_0x930a90;
945 
    %end;
946 
t_27 %join;
947 
    %end;
948 
S_0x930a90 .scope begin, "MYHDL104_RETURN" "MYHDL104_RETURN" 2 567, 2 567, S_0x9309b0;
949 
 .timescale -9 -11;
950 
S_0x9304a0 .scope function, "MYHDL46_forward_condition" "MYHDL46_forward_condition" 2 574, 2 574, S_0x8ca510;
951 
 .timescale -9 -11;
952 
v0x930660_0 .var "MYHDL46_forward_condition", 0 0;
953 
v0x930720_0 .var "reg_a", 4 0;
954 
v0x9307c0_0 .var "reg_d", 4 0;
955 
v0x930860_0 .var "reg_write", 0 0;
956 
v0x930910_0 .var "result", 0 0;
957 
TD_TopBench.MYHDL46_forward_condition ;
958 
    %fork t_30, S_0x930580;
959 
    %jmp t_29;
960 
t_30 ;
961 
    %load/v 8, v0x930860_0, 1;
962 
    %load/v 9, v0x930720_0, 5;
963 
    %load/v 14, v0x9307c0_0, 5;
964 
    %cmp/u 9, 14, 5;
965 
    %mov 9, 4, 1;
966 
    %and 8, 9, 1;
967 
    %set/v v0x930910_0, 8, 1;
968 
    %load/v 8, v0x930910_0, 1;
969 
    %set/v v0x930660_0, 8, 1;
970 
    %disable S_0x930580;
971 
    %end;
972 
t_29 %join;
973 
    %end;
974 
S_0x930580 .scope begin, "MYHDL105_RETURN" "MYHDL105_RETURN" 2 579, 2 579, S_0x9304a0;
975 
 .timescale -9 -11;
976 
S_0x930030 .scope function, "MYHDL47_align_mem_store" "MYHDL47_align_mem_store" 2 586, 2 586, S_0x8ca510;
977 
 .timescale -9 -11;
978 
v0x9301f0_0 .var "MYHDL47_align_mem_store", 31 0;
979 
v0x9302b0_0 .var "data", 31 0;
980 
v0x930350_0 .var "result", 31 0;
981 
v0x9303f0_0 .var "size", 1 0;
982 
TD_TopBench.MYHDL47_align_mem_store ;
983 
    %fork t_32, S_0x930110;
984 
    %jmp t_31;
985 
t_32 ;
986 
    %set/v v0x930350_0, 0, 32;
987 
    %load/v 8, v0x9303f0_0, 2;
988 
    %movi 10, 2, 2;
989 
    %cmp/z 8, 10, 2;
990 
    %jmp/1 T_15.50, 4;
991 
    %movi 10, 1, 2;
992 
    %cmp/z 8, 10, 2;
993 
    %jmp/1 T_15.51, 4;
994 
    %load/v 8, v0x9302b0_0, 32;
995 
    %set/v v0x930350_0, 8, 32;
996 
    %jmp T_15.53;
997 
T_15.50 ;
998 
    %load/v 8, v0x9302b0_0, 8; Select 8 out of 32 bits
999 
    %load/v 16, v0x9302b0_0, 8; Select 8 out of 32 bits
1000 
    %load/v 24, v0x9302b0_0, 8; Select 8 out of 32 bits
1001 
    %load/v 32, v0x9302b0_0, 8; Select 8 out of 32 bits
1002 
    %set/v v0x930350_0, 8, 32;
1003 
    %jmp T_15.53;
1004 
T_15.51 ;
1005 
    %load/v 8, v0x9302b0_0, 16; Select 16 out of 32 bits
1006 
    %load/v 24, v0x9302b0_0, 16; Select 16 out of 32 bits
1007 
    %set/v v0x930350_0, 8, 32;
1008 
    %jmp T_15.53;
1009 
T_15.53 ;
1010 
    %load/v 8, v0x930350_0, 32;
1011 
    %set/v v0x9301f0_0, 8, 32;
1012 
    %disable S_0x930110;
1013 
    %end;
1014 
t_31 %join;
1015 
    %end;
1016 
S_0x930110 .scope begin, "MYHDL106_RETURN" "MYHDL106_RETURN" 2 590, 2 590, S_0x930030;
1017 
 .timescale -9 -11;
1018 
S_0x92fb20 .scope function, "MYHDL48_forward_condition" "MYHDL48_forward_condition" 2 609, 2 609, S_0x8ca510;
1019 
 .timescale -9 -11;
1020 
v0x92fce0_0 .var "MYHDL48_forward_condition", 0 0;
1021 
v0x92fda0_0 .var "reg_a", 4 0;
1022 
v0x92fe40_0 .var "reg_d", 4 0;
1023 
v0x92fee0_0 .var "reg_write", 0 0;
1024 
v0x92ff90_0 .var "result", 0 0;
1025 
TD_TopBench.MYHDL48_forward_condition ;
1026 
    %fork t_34, S_0x92fc00;
1027 
    %jmp t_33;
1028 
t_34 ;
1029 
    %load/v 8, v0x92fee0_0, 1;
1030 
    %load/v 9, v0x92fda0_0, 5;
1031 
    %load/v 14, v0x92fe40_0, 5;
1032 
    %cmp/u 9, 14, 5;
1033 
    %mov 9, 4, 1;
1034 
    %and 8, 9, 1;
1035 
    %set/v v0x92ff90_0, 8, 1;
1036 
    %load/v 8, v0x92ff90_0, 1;
1037 
    %set/v v0x92fce0_0, 8, 1;
1038 
    %disable S_0x92fc00;
1039 
    %end;
1040 
t_33 %join;
1041 
    %end;
1042 
S_0x92fc00 .scope begin, "MYHDL107_RETURN" "MYHDL107_RETURN" 2 614, 2 614, S_0x92fb20;
1043 
 .timescale -9 -11;
1044 
S_0x92f6b0 .scope function, "MYHDL49_align_mem_store" "MYHDL49_align_mem_store" 2 621, 2 621, S_0x8ca510;
1045 
 .timescale -9 -11;
1046 
v0x92f870_0 .var "MYHDL49_align_mem_store", 31 0;
1047 
v0x92f930_0 .var "data", 31 0;
1048 
v0x92f9d0_0 .var "result", 31 0;
1049 
v0x92fa70_0 .var "size", 1 0;
1050 
TD_TopBench.MYHDL49_align_mem_store ;
1051 
    %fork t_36, S_0x92f790;
1052 
    %jmp t_35;
1053 
t_36 ;
1054 
    %set/v v0x92f9d0_0, 0, 32;
1055 
    %load/v 8, v0x92fa70_0, 2;
1056 
    %movi 10, 2, 2;
1057 
    %cmp/z 8, 10, 2;
1058 
    %jmp/1 T_17.54, 4;
1059 
    %movi 10, 1, 2;
1060 
    %cmp/z 8, 10, 2;
1061 
    %jmp/1 T_17.55, 4;
1062 
    %load/v 8, v0x92f930_0, 32;
1063 
    %set/v v0x92f9d0_0, 8, 32;
1064 
    %jmp T_17.57;
1065 
T_17.54 ;
1066 
    %load/v 8, v0x92f930_0, 8; Select 8 out of 32 bits
1067 
    %load/v 16, v0x92f930_0, 8; Select 8 out of 32 bits
1068 
    %load/v 24, v0x92f930_0, 8; Select 8 out of 32 bits
1069 
    %load/v 32, v0x92f930_0, 8; Select 8 out of 32 bits
1070 
    %set/v v0x92f9d0_0, 8, 32;
1071 
    %jmp T_17.57;
1072 
T_17.55 ;
1073 
    %load/v 8, v0x92f930_0, 16; Select 16 out of 32 bits
1074 
    %load/v 24, v0x92f930_0, 16; Select 16 out of 32 bits
1075 
    %set/v v0x92f9d0_0, 8, 32;
1076 
    %jmp T_17.57;
1077 
T_17.57 ;
1078 
    %load/v 8, v0x92f9d0_0, 32;
1079 
    %set/v v0x92f870_0, 8, 32;
1080 
    %disable S_0x92f790;
1081 
    %end;
1082 
t_35 %join;
1083 
    %end;
1084 
S_0x92f790 .scope begin, "MYHDL108_RETURN" "MYHDL108_RETURN" 2 625, 2 625, S_0x92f6b0;
1085 
 .timescale -9 -11;
1086 
S_0x92f270 .scope function, "MYHDL50_align_mem_store" "MYHDL50_align_mem_store" 2 644, 2 644, S_0x8ca510;
1087 
 .timescale -9 -11;
1088 
v0x92f430_0 .var "MYHDL50_align_mem_store", 31 0;
1089 
v0x92f4f0_0 .var "data", 31 0;
1090 
v0x92f590_0 .var "result", 31 0;
1091 
v0x92f630_0 .var "size", 1 0;
1092 
TD_TopBench.MYHDL50_align_mem_store ;
1093 
    %fork t_38, S_0x92f350;
1094 
    %jmp t_37;
1095 
t_38 ;
1096 
    %set/v v0x92f590_0, 0, 32;
1097 
    %load/v 8, v0x92f630_0, 2;
1098 
    %movi 10, 2, 2;
1099 
    %cmp/z 8, 10, 2;
1100 
    %jmp/1 T_18.58, 4;
1101 
    %movi 10, 1, 2;
1102 
    %cmp/z 8, 10, 2;
1103 
    %jmp/1 T_18.59, 4;
1104 
    %load/v 8, v0x92f4f0_0, 32;
1105 
    %set/v v0x92f590_0, 8, 32;
1106 
    %jmp T_18.61;
1107 
T_18.58 ;
1108 
    %load/v 8, v0x92f4f0_0, 8; Select 8 out of 32 bits
1109 
    %load/v 16, v0x92f4f0_0, 8; Select 8 out of 32 bits
1110 
    %load/v 24, v0x92f4f0_0, 8; Select 8 out of 32 bits
1111 
    %load/v 32, v0x92f4f0_0, 8; Select 8 out of 32 bits
1112 
    %set/v v0x92f590_0, 8, 32;
1113 
    %jmp T_18.61;
1114 
T_18.59 ;
1115 
    %load/v 8, v0x92f4f0_0, 16; Select 16 out of 32 bits
1116 
    %load/v 24, v0x92f4f0_0, 16; Select 16 out of 32 bits
1117 
    %set/v v0x92f590_0, 8, 32;
1118 
    %jmp T_18.61;
1119 
T_18.61 ;
1120 
    %load/v 8, v0x92f590_0, 32;
1121 
    %set/v v0x92f430_0, 8, 32;
1122 
    %disable S_0x92f350;
1123 
    %end;
1124 
t_37 %join;
1125 
    %end;
1126 
S_0x92f350 .scope begin, "MYHDL109_RETURN" "MYHDL109_RETURN" 2 648, 2 648, S_0x92f270;
1127 
 .timescale -9 -11;
1128 
S_0x92eb20 .scope function, "MYHDL51_add" "MYHDL51_add" 2 667, 2 667, S_0x8ca510;
1129 
 .timescale -9 -11;
1130 
v0x92ece0_0 .var "MYHDL51_add", 32 0;
1131 
v0x92eda0_0 .var "a", 31 0;
1132 
v0x92ee40_0 .var "aa", 33 0;
1133 
v0x92eee0_0 .var "b", 31 0;
1134 
v0x92ef60_0 .var "bb", 33 0;
1135 
v0x92f000_0 .var "cc", 33 0;
1136 
v0x92f0e0_0 .var "ci", 0 0;
1137 
v0x92f180_0 .var "result", 32 0;
1138 
TD_TopBench.MYHDL51_add ;
1139 
    %fork t_40, S_0x92ec00;
1140 
    %jmp t_39;
1141 
t_40 ;
1142 
    %set/v v0x92ee40_0, 0, 34;
1143 
    %set/v v0x92ef60_0, 0, 34;
1144 
    %set/v v0x92f000_0, 0, 34;
1145 
    %set/v v0x92f180_0, 0, 33;
1146 
    %mov 8, 1, 1;
1147 
    %load/v 9, v0x92eda0_0, 32;
1148 
    %mov 41, 0, 1;
1149 
    %set/v v0x92ee40_0, 8, 34;
1150 
    %load/v 8, v0x92f0e0_0, 1;
1151 
    %load/v 9, v0x92eee0_0, 32;
1152 
    %mov 41, 0, 1;
1153 
    %set/v v0x92ef60_0, 8, 34;
1154 
    %load/v 8, v0x92ee40_0, 34;
1155 
    %load/v 42, v0x92ef60_0, 34;
1156 
    %add 8, 42, 34;
1157 
    %set/v v0x92f000_0, 8, 34;
1158 
    %ix/load 1, 1, 0;
1159 
    %mov 4, 0, 1;
1160 
    %load/x1p 8, v0x92f000_0, 33;
1161 
; Save base=8 wid=33 in lookaside.
1162 
    %set/v v0x92f180_0, 8, 33;
1163 
    %load/v 8, v0x92f180_0, 33;
1164 
    %set/v v0x92ece0_0, 8, 33;
1165 
    %disable S_0x92ec00;
1166 
    %end;
1167 
t_39 %join;
1168 
    %end;
1169 
S_0x92ec00 .scope begin, "MYHDL110_RETURN" "MYHDL110_RETURN" 2 675, 2 675, S_0x92eb20;
1170 
 .timescale -9 -11;
1171 
S_0x92e560 .scope function, "MYHDL55_sign_extend8" "MYHDL55_sign_extend8" 2 689, 2 689, S_0x8ca510;
1172 
 .timescale -9 -11;
1173 
v0x92e720_0 .var "MYHDL55_sign_extend8", 31 0;
1174 
v0x92e7e0_0 .var "fill", 0 0;
1175 
v0x92e880_0 .var/i "i", 31 0;
1176 
v0x92e920_0 .var/i "size", 31 0;
1177 
v0x92e9a0_0 .var "tmp", 31 0;
1178 
v0x92ea40_0 .var "value", 31 0;
1179 
TD_TopBench.MYHDL55_sign_extend8 ;
1180 
    %fork t_42, S_0x92e640;
1181 
    %jmp t_41;
1182 
t_42 ;
1183 
    %set/v v0x92e9a0_0, 0, 32;
1184 
    %movi 8, 24, 32;
1185 
    %set/v v0x92e920_0, 8, 32;
1186 
    %set/v v0x92e880_0, 0, 32;
1187 
T_20.62 ;
1188 
    %load/v 8, v0x92e880_0, 32;
1189 
    %load/v 40, v0x92e920_0, 32;
1190 
    %cmp/s 8, 40, 32;
1191 
    %jmp/0xz T_20.63, 5;
1192 
    %load/v 8, v0x92e7e0_0, 1;
1193 
    %movi 9, 31, 32;
1194 
    %load/v 41, v0x92e880_0, 32;
1195 
    %sub 9, 41, 32;
1196 
    %ix/get 0, 9, 32;
1197 
    %jmp/1 t_43, 4;
1198 
    %set/x0 v0x92e9a0_0, 8, 1;
1199 
t_43 ;
1200 
    %ix/load 0, 1, 0;
1201 
    %load/vp0/s 8, v0x92e880_0, 32;
1202 
    %set/v v0x92e880_0, 8, 32;
1203 
    %jmp T_20.62;
1204 
T_20.63 ;
1205 
    %load/v 8, v0x92ea40_0, 8; Only need 8 of 32 bits
1206 
; Save base=8 wid=8 in lookaside.
1207 
    %ix/load 0, 0, 0;
1208 
    %set/x0 v0x92e9a0_0, 8, 8;
1209 
    %load/v 8, v0x92e9a0_0, 32;
1210 
    %set/v v0x92e720_0, 8, 32;
1211 
    %disable S_0x92e640;
1212 
    %end;
1213 
t_41 %join;
1214 
    %end;
1215 
S_0x92e640 .scope begin, "MYHDL111_RETURN" "MYHDL111_RETURN" 2 695, 2 695, S_0x92e560;
1216 
 .timescale -9 -11;
1217 
S_0x92e020 .scope function, "MYHDL61_sign_extend16" "MYHDL61_sign_extend16" 2 707, 2 707, S_0x8ca510;
1218 
 .timescale -9 -11;
1219 
v0x92e1e0_0 .var "MYHDL61_sign_extend16", 31 0;
1220 
v0x92e260_0 .var "fill", 0 0;
1221 
v0x92e2e0_0 .var/i "i", 31 0;
1222 
v0x92e360_0 .var/i "size", 31 0;
1223 
v0x92e3e0_0 .var "tmp", 31 0;
1224 
v0x92e480_0 .var "value", 31 0;
1225 
TD_TopBench.MYHDL61_sign_extend16 ;
1226 
    %fork t_45, S_0x92e100;
1227 
    %jmp t_44;
1228 
t_45 ;
1229 
    %set/v v0x92e3e0_0, 0, 32;
1230 
    %movi 8, 16, 32;
1231 
    %set/v v0x92e360_0, 8, 32;
1232 
    %set/v v0x92e2e0_0, 0, 32;
1233 
T_21.64 ;
1234 
    %load/v 8, v0x92e2e0_0, 32;
1235 
    %load/v 40, v0x92e360_0, 32;
1236 
    %cmp/s 8, 40, 32;
1237 
    %jmp/0xz T_21.65, 5;
1238 
    %load/v 8, v0x92e260_0, 1;
1239 
    %movi 9, 31, 32;
1240 
    %load/v 41, v0x92e2e0_0, 32;
1241 
    %sub 9, 41, 32;
1242 
    %ix/get 0, 9, 32;
1243 
    %jmp/1 t_46, 4;
1244 
    %set/x0 v0x92e3e0_0, 8, 1;
1245 
t_46 ;
1246 
    %ix/load 0, 1, 0;
1247 
    %load/vp0/s 8, v0x92e2e0_0, 32;
1248 
    %set/v v0x92e2e0_0, 8, 32;
1249 
    %jmp T_21.64;
1250 
T_21.65 ;
1251 
    %load/v 8, v0x92e480_0, 16; Only need 16 of 32 bits
1252 
; Save base=8 wid=16 in lookaside.
1253 
    %ix/load 0, 0, 0;
1254 
    %set/x0 v0x92e3e0_0, 8, 16;
1255 
    %load/v 8, v0x92e3e0_0, 32;
1256 
    %set/v v0x92e1e0_0, 8, 32;
1257 
    %disable S_0x92e100;
1258 
    %end;
1259 
t_44 %join;
1260 
    %end;
1261 
S_0x92e100 .scope begin, "MYHDL112_RETURN" "MYHDL112_RETURN" 2 713, 2 713, S_0x92e020;
1262 
 .timescale -9 -11;
1263 
S_0x92df40 .scope begin, "TOPBENCH_CLOCKGEN" "TOPBENCH_CLOCKGEN" 2 725, 2 725, S_0x8ca510;
1264 
 .timescale -9 -11;
1265 
S_0x92de60 .scope begin, "TOPBENCH_MONITOR" "TOPBENCH_MONITOR" 2 734, 2 734, S_0x8ca510;
1266 
 .timescale -9 -11;
1267 
S_0x92dd80 .scope begin, "TOPBENCH_TOP_GLUE" "TOPBENCH_TOP_GLUE" 2 742, 2 742, S_0x8ca510;
1268 
 .timescale -9 -11;
1269 
S_0x92dca0 .scope begin, "TOPBENCH_TOP_IMEM_BANK_0_LOGIC" "TOPBENCH_TOP_IMEM_BANK_0_LOGIC" 2 766, 2 766, S_0x8ca510;
1270 
 .timescale -9 -11;
1271 
S_0x92dbc0 .scope begin, "TOPBENCH_TOP_IMEM_BANK_1_LOGIC" "TOPBENCH_TOP_IMEM_BANK_1_LOGIC" 2 779, 2 779, S_0x8ca510;
1272 
 .timescale -9 -11;
1273 
S_0x92dae0 .scope begin, "TOPBENCH_TOP_IMEM_BANK_2_LOGIC" "TOPBENCH_TOP_IMEM_BANK_2_LOGIC" 2 792, 2 792, S_0x8ca510;
1274 
 .timescale -9 -11;
1275 
S_0x92da00 .scope begin, "TOPBENCH_TOP_IMEM_BANK_3_LOGIC" "TOPBENCH_TOP_IMEM_BANK_3_LOGIC" 2 805, 2 805, S_0x8ca510;
1276 
 .timescale -9 -11;
1277 
S_0x92d8a0 .scope begin, "TOPBENCH_TOP_IMEM_DUMBASS_REASSEMBLE" "TOPBENCH_TOP_IMEM_DUMBASS_REASSEMBLE" 2 818, 2 818, S_0x8ca510;
1278 
 .timescale -9 -11;
1279 
v0x92d980_0 .var/i "i", 31 0;
1280 
S_0x92d7c0 .scope begin, "TOPBENCH_TOP_CORE_DECO_GPRF_A_LOGIC" "TOPBENCH_TOP_CORE_DECO_GPRF_A_LOGIC" 2 848, 2 848, S_0x8ca510;
1281 
 .timescale -9 -11;
1282 
S_0x92d6e0 .scope begin, "TOPBENCH_TOP_CORE_DECO_GPRF_D_LOGIC" "TOPBENCH_TOP_CORE_DECO_GPRF_D_LOGIC" 2 857, 2 857, S_0x8ca510;
1283 
 .timescale -9 -11;
1284 
S_0x92d600 .scope begin, "TOPBENCH_TOP_CORE_DECO_GPRF_B_LOGIC" "TOPBENCH_TOP_CORE_DECO_GPRF_B_LOGIC" 2 866, 2 866, S_0x8ca510;
1285 
 .timescale -9 -11;
1286 
S_0x92d3b0 .scope begin, "TOPBENCH_TOP_CORE_DECO_DECODE" "TOPBENCH_TOP_CORE_DECO_DECODE" 2 881, 2 881, S_0x8ca510;
1287 
 .timescale -9 -11;
1288 
S_0x92c2b0 .scope begin, "TOPBENCH_TOP_CORE_DECO_COMB" "TOPBENCH_TOP_CORE_DECO_COMB" 2 938, 2 938, S_0x8ca510;
1289 
 .timescale -9 -11;
1290 
v0x92c390_0 .var "alu_op", 3 0;
1291 
v0x92c450_0 .var "alu_src_a", 1 0;
1292 
v0x92c4f0_0 .var "alu_src_b", 1 0;
1293 
v0x92c590_0 .var "branch_cond", 2 0;
1294 
v0x92c610_0 .var "carry", 1 0;
1295 
v0x92c6b0_0 .var "carry_keep", 0 0;
1296 
v0x92c750_0 .var "delay", 0 0;
1297 
v0x92c7f0_0 .var "has_imm", 0 0;
1298 
v0x92c890_0 .var "immediate", 31 0;
1299 
v0x92c930_0 .var "immediate_low", 15 0;
1300 
v0x92c9d0_0 .var "instruction", 31 0;
1301 
v0x92ca70_0 .var "mem_result", 31 0;
1302 
v0x92cb10_0 .var "mem_write", 0 0;
1303 
v0x92cbb0_0 .var "opcode", 5 0;
1304 
v0x92ccd0_0 .var "operation", 0 0;
1305 
v0x92cd70_0 .var "opgroup", 4 0;
1306 
v0x92cc30_0 .var "program_counter", 15 0;
1307 
v0x92ce30_0 .var "r_has_imm_high", 0 0;
1308 
v0x92cf70_0 .var "r_hazard", 0 0;
1309 
v0x92b450_0 .var "r_immediate_high", 15 0;
1310 
v0x92ceb0_0 .var "r_instruction", 31 0;
1311 
v0x92d0a0_0 .var "r_mem_read", 0 0;
1312 
v0x92cff0_0 .var "r_program_counter", 15 0;
1313 
v0x92d1e0_0 .var "r_reg_d", 4 0;
1314 
v0x92d120_0 .var "reg_a", 4 0;
1315 
v0x92d330_0 .var "reg_b", 4 0;
1316 
v0x92d260_0 .var "reg_write", 0 0;
1317 
v0x92d490_0 .var "transfer_size", 1 0;
1318 
S_0x92c1d0 .scope begin, "TOPBENCH_TOP_CORE_FTCH_SEQ" "TOPBENCH_TOP_CORE_FTCH_SEQ" 2 1228, 2 1228, S_0x8ca510;
1319 
 .timescale -9 -11;
1320 
S_0x92c030 .scope begin, "TOPBENCH_TOP_CORE_FTCH_COMB" "TOPBENCH_TOP_CORE_FTCH_COMB" 2 1242, 2 1242, S_0x8ca510;
1321 
 .timescale -9 -11;
1322 
v0x92c110_0 .var "program_counter", 15 0;
1323 
S_0x92bf50 .scope begin, "TOPBENCH_TOP_CORE_MEMU_SEQ" "TOPBENCH_TOP_CORE_MEMU_SEQ" 2 1308, 2 1308, S_0x8ca510;
1324 
 .timescale -9 -11;
1325 
S_0x92bdd0 .scope begin, "TOPBENCH_TOP_CORE_MEMU_COMB" "TOPBENCH_TOP_CORE_MEMU_COMB" 2 1325, 2 1325, S_0x8ca510;
1326 
 .timescale -9 -11;
1327 
v0x92beb0_0 .var "alu_result", 31 0;
1328 
S_0x92a780 .scope begin, "TOPBENCH_TOP_CORE_EXEU_COMB" "TOPBENCH_TOP_CORE_EXEU_COMB" 2 1349, 2 1349, S_0x8ca510;
1329 
 .timescale -9 -11;
1330 
v0x92a860_0 .var "alu_src_a", 31 0;
1331 
v0x92a920_0 .var "alu_src_b", 31 0;
1332 
v0x92a9c0_0 .var "and_rslt", 31 0;
1333 
v0x92aa60_0 .var "branch", 0 0;
1334 
v0x92ab10_0 .var "carry", 0 0;
1335 
v0x92abb0_0 .var "cmp_cond", 0 0;
1336 
v0x92ac90_0 .var "dat_a", 31 0;
1337 
v0x92ad30_0 .var "dat_b", 31 0;
1338 
v0x92ae20_0 .var "dat_d", 31 0;
1339 
v0x92aec0_0 .var "flush_id", 0 0;
1340 
v0x92afc0_0 .var "mem_read", 0 0;
1341 
v0x92b060_0 .var "mem_result", 31 0;
1342 
v0x92b170_0 .var "mem_write", 0 0;
1343 
v0x92b210_0 .var "msb", 0 0;
1344 
v0x92b330_0 .var "or_rslt", 31 0;
1345 
v0x92b3d0_0 .var "program_counter", 15 0;
1346 
v0x92b290_0 .var "r_alu_result", 31 0;
1347 
v0x92b520_0 .var "r_carry", 0 0;
1348 
v0x92b660_0 .var "r_flush_ex", 0 0;
1349 
v0x92b700_0 .var "r_reg_d", 4 0;
1350 
v0x92b5c0_0 .var "r_reg_write", 0 0;
1351 
v0x92b850_0 .var "result", 32 0;
1352 
v0x92b7a0_0 .var "result_add", 32 0;
1353 
v0x92b9b0_0 .var "sel_dat_a", 31 0;
1354 
v0x92b8f0_0 .var "sel_dat_b", 31 0;
1355 
v0x92bb00_0 .var "sel_dat_d", 31 0;
1356 
v0x92ba50_0 .var "transfer_size", 1 0;
1357 
v0x92bc60_0 .var "xor_rslt", 31 0;
1358 
v0x92bba0_0 .var "zero", 0 0;
1359 
S_0x92a6a0 .scope begin, "TOPBENCH_TOP_CORE_EXEU_SEQ" "TOPBENCH_TOP_CORE_EXEU_SEQ" 2 1591, 2 1591, S_0x8ca510;
1360 
 .timescale -9 -11;
1361 
S_0x92a5c0 .scope begin, "TOPBENCH_TOP_RUN" "TOPBENCH_TOP_RUN" 2 1632, 2 1632, S_0x8ca510;
1362 
 .timescale -9 -11;
1363 
S_0x92a4e0 .scope begin, "TOPBENCH_TOP_UART_RXD_SYNC" "TOPBENCH_TOP_UART_RXD_SYNC" 2 1662, 2 1662, S_0x8ca510;
1364 
 .timescale -9 -11;
1365 
S_0x92a400 .scope begin, "TOPBENCH_TOP_UART_ENABLE16_TICK" "TOPBENCH_TOP_UART_ENABLE16_TICK" 2 1673, 2 1673, S_0x8ca510;
1366 
 .timescale -9 -11;
1367 
S_0x92a320 .scope begin, "TOPBENCH_TOP_UART_RECV" "TOPBENCH_TOP_UART_RECV" 2 1682, 2 1682, S_0x8ca510;
1368 
 .timescale -9 -11;
1369 
S_0x92a240 .scope begin, "TOPBENCH_TOP_UART_TRANS" "TOPBENCH_TOP_UART_TRANS" 2 1731, 2 1731, S_0x8ca510;
1370 
 .timescale -9 -11;
1371 
S_0x92a160 .scope begin, "TOPBENCH_TOP_DMEM_BANK_0_LOGIC" "TOPBENCH_TOP_DMEM_BANK_0_LOGIC" 2 1760, 2 1760, S_0x8ca510;
1372 
 .timescale -9 -11;
1373 
S_0x92a080 .scope begin, "TOPBENCH_TOP_DMEM_BANK_1_LOGIC" "TOPBENCH_TOP_DMEM_BANK_1_LOGIC" 2 1773, 2 1773, S_0x8ca510;
1374 
 .timescale -9 -11;
1375 
S_0x929fa0 .scope begin, "TOPBENCH_TOP_DMEM_BANK_2_LOGIC" "TOPBENCH_TOP_DMEM_BANK_2_LOGIC" 2 1786, 2 1786, S_0x8ca510;
1376 
 .timescale -9 -11;
1377 
S_0x929ec0 .scope begin, "TOPBENCH_TOP_DMEM_BANK_3_LOGIC" "TOPBENCH_TOP_DMEM_BANK_3_LOGIC" 2 1799, 2 1799, S_0x8ca510;
1378 
 .timescale -9 -11;
1379 
S_0x929d20 .scope begin, "TOPBENCH_TOP_DMEM_DUMBASS_REASSEMBLE" "TOPBENCH_TOP_DMEM_DUMBASS_REASSEMBLE" 2 1812, 2 1812, S_0x8ca510;
1380 
 .timescale -9 -11;
1381 
v0x929e00_0 .var/i "i", 31 0;
1382 
S_0x929c40 .scope begin, "TOPBENCH_TOP_UART2_RXD_SYNC" "TOPBENCH_TOP_UART2_RXD_SYNC" 2 1825, 2 1825, S_0x8ca510;
1383 
 .timescale -9 -11;
1384 
S_0x929b60 .scope begin, "TOPBENCH_TOP_UART2_ENABLE16_TICK" "TOPBENCH_TOP_UART2_ENABLE16_TICK" 2 1836, 2 1836, S_0x8ca510;
1385 
 .timescale -9 -11;
1386 
S_0x929a80 .scope begin, "TOPBENCH_TOP_UART2_RECV" "TOPBENCH_TOP_UART2_RECV" 2 1845, 2 1845, S_0x8ca510;
1387 
 .timescale -9 -11;
1388 
S_0x9299a0 .scope begin, "TOPBENCH_TOP_UART2_TRANS" "TOPBENCH_TOP_UART2_TRANS" 2 1894, 2 1894, S_0x8ca510;
1389 
 .timescale -9 -11;
1390 
S_0x910750 .scope begin, "TOPBENCH_STIMULUS" "TOPBENCH_STIMULUS" 2 1923, 2 1923, S_0x8ca510;
1391 
 .timescale -9 -11;
1392 
v0x9161b0_0 .var/i "i", 31 0;
1393 
E_0x904600 .event negedge, v0x935740_0;
1394 
    .scope S_0x8ca510;
1395 
T_22 ;
1396 
    %fork t_48, S_0x92df40;
1397 
    %jmp t_47;
1398 
t_48 ;
1399 
    %delay 1000, 0;
1400 
    %ix/load 0, 1, 0;
1401 
    %assign/v0 v0x935740_0, 0, 0;
1402 
T_22.0 ;
1403 
    %movi 8, 1, 2;
1404 
    %or/r 8, 8, 2;
1405 
    %jmp/0xz T_22.1, 8;
1406 
    %delay 1000, 0;
1407 
    %load/v 8, v0x935740_0, 1;
1408 
    %inv 8, 1;
1409 
    %ix/load 0, 1, 0;
1410 
    %assign/v0 v0x935740_0, 0, 8;
1411 
    %jmp T_22.0;
1412 
T_22.1 ;
1413 
    %end;
1414 
t_47 %join;
1415 
    %end;
1416 
    .thread T_22;
1417 
    .scope S_0x8ca510;
1418 
T_23 ;
1419 
    %wait E_0x8dad90;
1420 
    %fork t_50, S_0x92de60;
1421 
    %jmp t_49;
1422 
t_50 ;
1423 
    %load/v 8, v0x935830_0, 32;
1424 
    %mov 40, 0, 1;
1425 
    %movi 41, 4294967232, 33;
1426 
    %cmp/u 8, 41, 33;
1427 
    %jmp/0xz  T_23.0, 4;
1428 
    %load/v 8, v0x935de0_0, 1;
1429 
    %jmp/0xz  T_23.2, 8;
1430 
    %vpi_call 2 737 "$write", "%0c", &PV;
1431 
T_23.2 ;
1432 
T_23.0 ;
1433 
    %end;
1434 
t_49 %join;
1435 
    %jmp T_23;
1436 
    .thread T_23;
1437 
    .scope S_0x8ca510;
1438 
T_24 ;
1439 
    %wait E_0x8f3e00;
1440 
    %fork t_52, S_0x92dd80;
1441 
    %jmp t_51;
1442 
t_52 ;
1443 
    %ix/load 0, 1, 0;
1444 
    %assign/v0 v0x93cd90_0, 0, 1;
1445 
    %load/v 8, v0x93cfe0_0, 1;
1446 
    %jmp/0xz  T_24.0, 8;
1447 
    %load/v 8, v0x93cf40_0, 4;
1448 
    %ix/load 0, 4, 0;
1449 
    %assign/v0 v0x93d570_0, 0, 8;
1450 
    %jmp T_24.1;
1451 
T_24.0 ;
1452 
    %ix/load 0, 4, 0;
1453 
    %assign/v0 v0x93d570_0, 0, 0;
1454 
T_24.1 ;
1455 
    %load/v 8, v0x93cc50_0, 32;
1456 
    %ix/load 0, 32, 0;
1457 
    %assign/v0 v0x93e0a0_0, 0, 8;
1458 
    %load/v 8, v0x93c550_0, 32;
1459 
   %cmpi/u 8, 8192, 32;
1460 
    %jmp/0xz  T_24.2, 5;
1461 
    %load/v 8, v0x93ce30_0, 1;
1462 
    %ix/load 0, 1, 0;
1463 
    %assign/v0 v0x93ccf0_0, 0, 8;
1464 
    %ix/load 0, 1, 0;
1465 
    %assign/v0 v0x93f420_0, 0, 0;
1466 
    %jmp T_24.3;
1467 
T_24.2 ;
1468 
    %load/v 8, v0x93cfe0_0, 1;
1469 
    %movi 9, 268435376, 29;
1470 
    %load/v 38, v0x93c550_0, 28; Select 28 out of 32 bits
1471 
    %mov 66, 0, 1;
1472 
    %cmp/u 9, 38, 29;
1473 
    %or 5, 4, 1;
1474 
    %mov 9, 5, 1;
1475 
    %and 8, 9, 1;
1476 
    %jmp/0xz  T_24.4, 8;
1477 
    %ix/load 0, 1, 0;
1478 
    %assign/v0 v0x93ccf0_0, 0, 0;
1479 
    %ix/load 0, 1, 0;
1480 
    %assign/v0 v0x93f420_0, 0, 1;
1481 
    %jmp T_24.5;
1482 
T_24.4 ;
1483 
    %ix/load 0, 1, 0;
1484 
    %assign/v0 v0x93f420_0, 0, 0;
1485 
    %ix/load 0, 1, 0;
1486 
    %assign/v0 v0x93ccf0_0, 0, 0;
1487 
T_24.5 ;
1488 
T_24.3 ;
1489 
    %load/v 8, v0x93d9b0_0, 8; Only need 8 of 32 bits
1490 
; Save base=8 wid=8 in lookaside.
1491 
    %ix/load 0, 8, 0;
1492 
    %assign/v0 v0x937f70_0, 0, 8;
1493 
    %end;
1494 
t_51 %join;
1495 
    %jmp T_24;
1496 
    .thread T_24, $push;
1497 
    .scope S_0x8ca510;
1498 
T_25 ;
1499 
    %wait E_0x8dad90;
1500 
    %fork t_54, S_0x92dca0;
1501 
    %jmp t_53;
1502 
t_54 ;
1503 
    %load/v 8, v0x93d730_0, 1;
1504 
    %jmp/0xz  T_25.0, 8;
1505 
    %ix/load 3, 0, 0;
1506 
    %mov 4, 0, 1;
1507 
    %load/av 8, v0x93dc80, 1;
1508 
    %jmp/0xz  T_25.2, 8;
1509 
    %ix/load 3, 0, 0;
1510 
    %mov 4, 0, 1;
1511 
    %load/av 8, v0x93d3c0, 8;
1512 
    %ix/getv 3, v0x93d320_0;
1513 
    %jmp/1 t_55, 4;
1514 
    %ix/load 0, 8, 0; word width
1515 
    %ix/load 1, 0, 0; part off
1516 
    %assign/av v0x93d120, 0, 8;
1517 
t_55 ;
1518 
T_25.2 ;
1519 
    %load/v 16, v0x93d320_0, 14;
1520 
    %movi 30, 2048, 14;
1521 
    %mod 16, 30, 14;
1522 
    %ix/get 3, 16, 14;
1523 
    %load/av 8, v0x93d120, 8;
1524 
    %ix/load 3, 0, 0; address
1525 
    %ix/load 0, 8, 0; word width
1526 
    %ix/load 1, 0, 0; part off
1527 
    %assign/av v0x93d440, 0, 8;
1528 
t_56 ;
1529 
T_25.0 ;
1530 
    %end;
1531 
t_53 %join;
1532 
    %jmp T_25;
1533 
    .thread T_25;
1534 
    .scope S_0x8ca510;
1535 
T_26 ;
1536 
    %vpi_call 2 777 "$readmemh", "rom0.vmem", v0x93d120;
1537 
    %end;
1538 
    .thread T_26;
1539 
    .scope S_0x8ca510;
1540 
T_27 ;
1541 
    %wait E_0x8dad90;
1542 
    %fork t_58, S_0x92dbc0;
1543 
    %jmp t_57;
1544 
t_58 ;
1545 
    %load/v 8, v0x93d730_0, 1;
1546 
    %jmp/0xz  T_27.0, 8;
1547 
    %ix/load 3, 1, 0;
1548 
    %mov 4, 0, 1;
1549 
    %load/av 8, v0x93dc80, 1;
1550 
    %jmp/0xz  T_27.2, 8;
1551 
    %ix/load 3, 1, 0;
1552 
    %mov 4, 0, 1;
1553 
    %load/av 8, v0x93d3c0, 8;
1554 
    %ix/getv 3, v0x93d320_0;
1555 
    %jmp/1 t_59, 4;
1556 
    %ix/load 0, 8, 0; word width
1557 
    %ix/load 1, 0, 0; part off
1558 
    %assign/av v0x93d1a0, 0, 8;
1559 
t_59 ;
1560 
T_27.2 ;
1561 
    %load/v 16, v0x93d320_0, 14;
1562 
    %movi 30, 2048, 14;
1563 
    %mod 16, 30, 14;
1564 
    %ix/get 3, 16, 14;
1565 
    %load/av 8, v0x93d1a0, 8;
1566 
    %ix/load 3, 1, 0; address
1567 
    %ix/load 0, 8, 0; word width
1568 
    %ix/load 1, 0, 0; part off
1569 
    %assign/av v0x93d440, 0, 8;
1570 
t_60 ;
1571 
T_27.0 ;
1572 
    %end;
1573 
t_57 %join;
1574 
    %jmp T_27;
1575 
    .thread T_27;
1576 
    .scope S_0x8ca510;
1577 
T_28 ;
1578 
    %vpi_call 2 790 "$readmemh", "rom1.vmem", v0x93d1a0;
1579 
    %end;
1580 
    .thread T_28;
1581 
    .scope S_0x8ca510;
1582 
T_29 ;
1583 
    %wait E_0x8dad90;
1584 
    %fork t_62, S_0x92dae0;
1585 
    %jmp t_61;
1586 
t_62 ;
1587 
    %load/v 8, v0x93d730_0, 1;
1588 
    %jmp/0xz  T_29.0, 8;
1589 
    %ix/load 3, 2, 0;
1590 
    %mov 4, 0, 1;
1591 
    %load/av 8, v0x93dc80, 1;
1592 
    %jmp/0xz  T_29.2, 8;
1593 
    %ix/load 3, 2, 0;
1594 
    %mov 4, 0, 1;
1595 
    %load/av 8, v0x93d3c0, 8;
1596 
    %ix/getv 3, v0x93d320_0;
1597 
    %jmp/1 t_63, 4;
1598 
    %ix/load 0, 8, 0; word width
1599 
    %ix/load 1, 0, 0; part off
1600 
    %assign/av v0x93d220, 0, 8;
1601 
t_63 ;
1602 
T_29.2 ;
1603 
    %load/v 16, v0x93d320_0, 14;
1604 
    %movi 30, 2048, 14;
1605 
    %mod 16, 30, 14;
1606 
    %ix/get 3, 16, 14;
1607 
    %load/av 8, v0x93d220, 8;
1608 
    %ix/load 3, 2, 0; address
1609 
    %ix/load 0, 8, 0; word width
1610 
    %ix/load 1, 0, 0; part off
1611 
    %assign/av v0x93d440, 0, 8;
1612 
t_64 ;
1613 
T_29.0 ;
1614 
    %end;
1615 
t_61 %join;
1616 
    %jmp T_29;
1617 
    .thread T_29;
1618 
    .scope S_0x8ca510;
1619 
T_30 ;
1620 
    %vpi_call 2 803 "$readmemh", "rom2.vmem", v0x93d220;
1621 
    %end;
1622 
    .thread T_30;
1623 
    .scope S_0x8ca510;
1624 
T_31 ;
1625 
    %wait E_0x8dad90;
1626 
    %fork t_66, S_0x92da00;
1627 
    %jmp t_65;
1628 
t_66 ;
1629 
    %load/v 8, v0x93d730_0, 1;
1630 
    %jmp/0xz  T_31.0, 8;
1631 
    %ix/load 3, 3, 0;
1632 
    %mov 4, 0, 1;
1633 
    %load/av 8, v0x93dc80, 1;
1634 
    %jmp/0xz  T_31.2, 8;
1635 
    %ix/load 3, 3, 0;
1636 
    %mov 4, 0, 1;
1637 
    %load/av 8, v0x93d3c0, 8;
1638 
    %ix/getv 3, v0x93d320_0;
1639 
    %jmp/1 t_67, 4;
1640 
    %ix/load 0, 8, 0; word width
1641 
    %ix/load 1, 0, 0; part off
1642 
    %assign/av v0x93d2a0, 0, 8;
1643 
t_67 ;
1644 
T_31.2 ;
1645 
    %load/v 16, v0x93d320_0, 14;
1646 
    %movi 30, 2048, 14;
1647 
    %mod 16, 30, 14;
1648 
    %ix/get 3, 16, 14;
1649 
    %load/av 8, v0x93d2a0, 8;
1650 
    %ix/load 3, 3, 0; address
1651 
    %ix/load 0, 8, 0; word width
1652 
    %ix/load 1, 0, 0; part off
1653 
    %assign/av v0x93d440, 0, 8;
1654 
t_68 ;
1655 
T_31.0 ;
1656 
    %end;
1657 
t_65 %join;
1658 
    %jmp T_31;
1659 
    .thread T_31;
1660 
    .scope S_0x8ca510;
1661 
T_32 ;
1662 
    %vpi_call 2 816 "$readmemh", "rom3.vmem", v0x93d2a0;
1663 
    %end;
1664 
    .thread T_32;
1665 
    .scope S_0x8ca510;
1666 
T_33 ;
1667 
    %wait E_0x8e14f0;
1668 
    %fork t_70, S_0x92d8a0;
1669 
    %jmp t_69;
1670 
t_70 ;
1671 
    %ix/load 1, 2, 0;
1672 
    %mov 4, 0, 1;
1673 
    %load/x1p 8, v0x93d080_0, 14;
1674 
; Save base=8 wid=14 in lookaside.
1675 
    %ix/load 0, 14, 0;
1676 
    %assign/v0 v0x93d320_0, 0, 8;
1677 
    %set/v v0x92d980_0, 0, 32;
1678 
T_33.0 ;
1679 
    %load/v 8, v0x92d980_0, 32;
1680 
   %cmpi/s 8, 4, 32;
1681 
    %jmp/0xz T_33.1, 5;
1682 
    %ix/getv/s 1, v0x92d980_0;
1683 
    %load/x1p 8, v0x93d7d0_0, 1;
1684 
; Save base=8 wid=1 in lookaside.
1685 
    %ix/getv/s 3, v0x92d980_0;
1686 
    %jmp/1 t_71, 4;
1687 
    %ix/load 0, 1, 0; word width
1688 
    %ix/load 1, 0, 0; part off
1689 
    %assign/av v0x93dc80, 0, 8;
1690 
t_71 ;
1691 
    %ix/load 0, 1, 0;
1692 
    %load/vp0/s 8, v0x92d980_0, 32;
1693 
    %set/v v0x92d980_0, 8, 32;
1694 
    %jmp T_33.0;
1695 
T_33.1 ;
1696 
    %load/v 8, v0x93d5f0_0, 8; Only need 8 of 32 bits
1697 
; Save base=8 wid=8 in lookaside.
1698 
    %ix/load 3, 0, 0; address
1699 
    %ix/load 0, 8, 0; word width
1700 
    %ix/load 1, 0, 0; part off
1701 
    %assign/av v0x93d3c0, 0, 8;
1702 
t_72 ;
1703 
    %ix/load 1, 8, 0;
1704 
    %mov 4, 0, 1;
1705 
    %load/x1p 8, v0x93d5f0_0, 8;
1706 
; Save base=8 wid=8 in lookaside.
1707 
    %ix/load 3, 1, 0; address
1708 
    %ix/load 0, 8, 0; word width
1709 
    %ix/load 1, 0, 0; part off
1710 
    %assign/av v0x93d3c0, 0, 8;
1711 
t_73 ;
1712 
    %ix/load 1, 16, 0;
1713 
    %mov 4, 0, 1;
1714 
    %load/x1p 8, v0x93d5f0_0, 8;
1715 
; Save base=8 wid=8 in lookaside.
1716 
    %ix/load 3, 2, 0; address
1717 
    %ix/load 0, 8, 0; word width
1718 
    %ix/load 1, 0, 0; part off
1719 
    %assign/av v0x93d3c0, 0, 8;
1720 
t_74 ;
1721 
    %ix/load 1, 24, 0;
1722 
    %mov 4, 0, 1;
1723 
    %load/x1p 8, v0x93d5f0_0, 8;
1724 
; Save base=8 wid=8 in lookaside.
1725 
    %ix/load 3, 3, 0; address
1726 
    %ix/load 0, 8, 0; word width
1727 
    %ix/load 1, 0, 0; part off
1728 
    %assign/av v0x93d3c0, 0, 8;
1729 
t_75 ;
1730 
    %ix/load 3, 0, 0;
1731 
    %mov 4, 0, 1;
1732 
    %load/av 8, v0x93d440, 8;
1733 
    %ix/load 3, 1, 0;
1734 
    %mov 4, 0, 1;
1735 
    %load/av 16, v0x93d440, 8;
1736 
    %ix/load 3, 2, 0;
1737 
    %mov 4, 0, 1;
1738 
    %load/av 24, v0x93d440, 8;
1739 
    %ix/load 3, 3, 0;
1740 
    %mov 4, 0, 1;
1741 
    %load/av 32, v0x93d440, 8;
1742 
    %ix/load 0, 32, 0;
1743 
    %assign/v0 v0x93dd00_0, 0, 8;
1744 
    %end;
1745 
t_69 %join;
1746 
    %jmp T_33;
1747 
    .thread T_33, $push;
1748 
    .scope S_0x8ca510;
1749 
T_34 ;
1750 
    %wait E_0x8dad90;
1751 
    %fork t_77, S_0x92d7c0;
1752 
    %jmp t_76;
1753 
t_77 ;
1754 
    %load/v 8, v0x93cd90_0, 1;
1755 
    %jmp/0xz  T_34.0, 8;
1756 
    %load/v 8, v0x93b6a0_0, 1;
1757 
    %jmp/0xz  T_34.2, 8;
1758 
    %load/v 8, v0x9399b0_0, 32;
1759 
    %ix/getv 3, v0x93bb90_0;
1760 
    %jmp/1 t_78, 4;
1761 
    %ix/load 0, 32, 0; word width
1762 
    %ix/load 1, 0, 0; part off
1763 
    %assign/av v0x9381f0, 0, 8;
1764 
t_78 ;
1765 
T_34.2 ;
1766 
    %ix/getv 3, v0x938e50_0;
1767 
    %load/av 8, v0x9381f0, 32;
1768 
    %ix/load 0, 32, 0;
1769 
    %assign/v0 v0x93ade0_0, 0, 8;
1770 
T_34.0 ;
1771 
    %end;
1772 
t_76 %join;
1773 
    %jmp T_34;
1774 
    .thread T_34;
1775 
    .scope S_0x8ca510;
1776 
T_35 ;
1777 
    %wait E_0x8dad90;
1778 
    %fork t_80, S_0x92d6e0;
1779 
    %jmp t_79;
1780 
t_80 ;
1781 
    %load/v 8, v0x93cd90_0, 1;
1782 
    %jmp/0xz  T_35.0, 8;
1783 
    %load/v 8, v0x93b6a0_0, 1;
1784 
    %jmp/0xz  T_35.2, 8;
1785 
    %load/v 8, v0x9399b0_0, 32;
1786 
    %ix/getv 3, v0x93bb90_0;
1787 
    %jmp/1 t_81, 4;
1788 
    %ix/load 0, 32, 0; word width
1789 
    %ix/load 1, 0, 0; part off
1790 
    %assign/av v0x9382f0, 0, 8;
1791 
t_81 ;
1792 
T_35.2 ;
1793 
    %ix/getv 3, v0x9391c0_0;
1794 
    %load/av 8, v0x9382f0, 32;
1795 
    %ix/load 0, 32, 0;
1796 
    %assign/v0 v0x93af20_0, 0, 8;
1797 
T_35.0 ;
1798 
    %end;
1799 
t_79 %join;
1800 
    %jmp T_35;
1801 
    .thread T_35;
1802 
    .scope S_0x8ca510;
1803 
T_36 ;
1804 
    %wait E_0x8dad90;
1805 
    %fork t_83, S_0x92d600;
1806 
    %jmp t_82;
1807 
t_83 ;
1808 
    %load/v 8, v0x93cd90_0, 1;
1809 
    %jmp/0xz  T_36.0, 8;
1810 
    %load/v 8, v0x93b6a0_0, 1;
1811 
    %jmp/0xz  T_36.2, 8;
1812 
    %load/v 8, v0x9399b0_0, 32;
1813 
    %ix/getv 3, v0x93bb90_0;
1814 
    %jmp/1 t_84, 4;
1815 
    %ix/load 0, 32, 0; word width
1816 
    %ix/load 1, 0, 0; part off
1817 
    %assign/av v0x938270, 0, 8;
1818 
t_84 ;
1819 
T_36.2 ;
1820 
    %ix/getv 3, v0x938ef0_0;
1821 
    %load/av 8, v0x938270, 32;
1822 
    %ix/load 0, 32, 0;
1823 
    %assign/v0 v0x93ae80_0, 0, 8;
1824 
T_36.0 ;
1825 
    %end;
1826 
t_82 %join;
1827 
    %jmp T_36;
1828 
    .thread T_36;
1829 
    .scope S_0x8ca510;
1830 
T_37 ;
1831 
    %wait E_0x8dad90;
1832 
    %fork t_86, S_0x92d3b0;
1833 
    %jmp t_85;
1834 
t_86 ;
1835 
    %load/v 8, v0x938010_0, 1;
1836 
    %jmp/0xz  T_37.0, 8;
1837 
    %ix/load 0, 4, 0;
1838 
    %assign/v0 v0x93b7e0_0, 0, 0;
1839 
    %ix/load 0, 2, 0;
1840 
    %assign/v0 v0x93b880_0, 0, 0;
1841 
    %ix/load 0, 2, 0;
1842 
    %assign/v0 v0x93b920_0, 0, 0;
1843 
    %ix/load 0, 3, 0;
1844 
    %assign/v0 v0x93b9c0_0, 0, 1;
1845 
    %ix/load 0, 2, 0;
1846 
    %assign/v0 v0x93ba60_0, 0, 0;
1847 
    %ix/load 0, 1, 0;
1848 
    %assign/v0 v0x93bb00_0, 0, 0;
1849 
    %ix/load 0, 1, 0;
1850 
    %assign/v0 v0x93c150_0, 0, 0;
1851 
    %ix/load 0, 32, 0;
1852 
    %assign/v0 v0x93bdd0_0, 0, 0;
1853 
    %ix/load 0, 1, 0;
1854 
    %assign/v0 v0x93bfb0_0, 0, 0;
1855 
    %ix/load 0, 1, 0;
1856 
    %assign/v0 v0x93c050_0, 0, 0;
1857 
    %ix/load 0, 16, 0;
1858 
    %assign/v0 v0x93c7e0_0, 0, 0;
1859 
    %ix/load 0, 5, 0;
1860 
    %assign/v0 v0x93c860_0, 0, 0;
1861 
    %ix/load 0, 5, 0;
1862 
    %assign/v0 v0x93c250_0, 0, 0;
1863 
    %ix/load 0, 1, 0;
1864 
    %assign/v0 v0x93c370_0, 0, 0;
1865 
    %ix/load 0, 2, 0;
1866 
    %assign/v0 v0x93c410_0, 0, 0;
1867 
    %ix/load 0, 1, 0;
1868 
    %assign/v0 v0x939380_0, 0, 0;
1869 
    %ix/load 0, 5, 0;
1870 
    %assign/v0 v0x9394c0_0, 0, 0;
1871 
    %ix/load 0, 1, 0;
1872 
    %assign/v0 v0x9395e0_0, 0, 0;
1873 
    %ix/load 0, 1, 0;
1874 
    %assign/v0 v0x939560_0, 0, 0;
1875 
    %ix/load 0, 16, 0;
1876 
    %assign/v0 v0x939240_0, 0, 0;
1877 
    %ix/load 0, 32, 0;
1878 
    %assign/v0 v0x9392e0_0, 0, 0;
1879 
    %ix/load 0, 16, 0;
1880 
    %assign/v0 v0x939420_0, 0, 0;
1881 
    %ix/load 0, 32, 0;
1882 
    %assign/v0 v0x93c1d0_0, 0, 0;
1883 
    %ix/load 0, 5, 0;
1884 
    %assign/v0 v0x93bc10_0, 0, 0;
1885 
    %ix/load 0, 1, 0;
1886 
    %assign/v0 v0x93bc90_0, 0, 0;
1887 
    %jmp T_37.1;
1888 
T_37.0 ;
1889 
    %load/v 8, v0x93cd90_0, 1;
1890 
    %jmp/0xz  T_37.2, 8;
1891 
    %load/v 8, v0x938680_0, 4;
1892 
    %ix/load 0, 4, 0;
1893 
    %assign/v0 v0x93b7e0_0, 0, 8;
1894 
    %load/v 8, v0x938700_0, 2;
1895 
    %ix/load 0, 2, 0;
1896 
    %assign/v0 v0x93b880_0, 0, 8;
1897 
    %load/v 8, v0x938430_0, 2;
1898 
    %ix/load 0, 2, 0;
1899 
    %assign/v0 v0x93b920_0, 0, 8;
1900 
    %load/v 8, v0x9384d0_0, 3;
1901 
    %ix/load 0, 3, 0;
1902 
    %assign/v0 v0x93b9c0_0, 0, 8;
1903 
    %load/v 8, v0x938570_0, 2;
1904 
    %ix/load 0, 2, 0;
1905 
    %assign/v0 v0x93ba60_0, 0, 8;
1906 
    %load/v 8, v0x938a10_0, 1;
1907 
    %ix/load 0, 1, 0;
1908 
    %assign/v0 v0x93bb00_0, 0, 8;
1909 
    %load/v 8, v0x938780_0, 1;
1910 
    %ix/load 0, 1, 0;
1911 
    %assign/v0 v0x93c150_0, 0, 8;
1912 
    %load/v 8, v0x938820_0, 32;
1913 
    %ix/load 0, 32, 0;
1914 
    %assign/v0 v0x93bdd0_0, 0, 8;
1915 
    %load/v 8, v0x9388c0_0, 1;
1916 
    %ix/load 0, 1, 0;
1917 
    %assign/v0 v0x93bfb0_0, 0, 8;
1918 
    %load/v 8, v0x938960_0, 1;
1919 
    %ix/load 0, 1, 0;
1920 
    %assign/v0 v0x93c050_0, 0, 8;
1921 
    %load/v 8, v0x938d50_0, 16;
1922 
    %ix/load 0, 16, 0;
1923 
    %assign/v0 v0x93c7e0_0, 0, 8;
1924 
    %load/v 8, v0x938e50_0, 5;
1925 
    %ix/load 0, 5, 0;
1926 
    %assign/v0 v0x93c860_0, 0, 8;
1927 
    %load/v 8, v0x938ef0_0, 5;
1928 
    %ix/load 0, 5, 0;
1929 
    %assign/v0 v0x93c250_0, 0, 8;
1930 
    %load/v 8, v0x938f90_0, 1;
1931 
    %ix/load 0, 1, 0;
1932 
    %assign/v0 v0x93c370_0, 0, 8;
1933 
    %load/v 8, v0x939030_0, 2;
1934 
    %ix/load 0, 2, 0;
1935 
    %assign/v0 v0x93c410_0, 0, 8;
1936 
    %load/v 8, v0x938c70_0, 1;
1937 
    %ix/load 0, 1, 0;
1938 
    %assign/v0 v0x939380_0, 0, 8;
1939 
    %load/v 8, v0x9391c0_0, 5;
1940 
    %ix/load 0, 5, 0;
1941 
    %assign/v0 v0x9394c0_0, 0, 8;
1942 
    %load/v 8, v0x938a90_0, 1;
1943 
    %ix/load 0, 1, 0;
1944 
    %assign/v0 v0x9395e0_0, 0, 8;
1945 
    %load/v 8, v0x938dd0_0, 1;
1946 
    %ix/load 0, 1, 0;
1947 
    %assign/v0 v0x939560_0, 0, 8;
1948 
    %load/v 8, v0x938b30_0, 16;
1949 
    %ix/load 0, 16, 0;
1950 
    %assign/v0 v0x939240_0, 0, 8;
1951 
    %load/v 8, v0x938bd0_0, 32;
1952 
    %ix/load 0, 32, 0;
1953 
    %assign/v0 v0x9392e0_0, 0, 8;
1954 
    %load/v 8, v0x939140_0, 16;
1955 
    %ix/load 0, 16, 0;
1956 
    %assign/v0 v0x939420_0, 0, 8;
1957 
    %load/v 8, v0x9399b0_0, 32;
1958 
    %ix/load 0, 32, 0;
1959 
    %assign/v0 v0x93c1d0_0, 0, 8;
1960 
    %load/v 8, v0x93bb90_0, 5;
1961 
    %ix/load 0, 5, 0;
1962 
    %assign/v0 v0x93bc10_0, 0, 8;
1963 
    %load/v 8, v0x93b6a0_0, 1;
1964 
    %ix/load 0, 1, 0;
1965 
    %assign/v0 v0x93bc90_0, 0, 8;
1966 
T_37.2 ;
1967 
T_37.1 ;
1968 
    %end;
1969 
t_85 %join;
1970 
    %jmp T_37;
1971 
    .thread T_37;
1972 
    .scope S_0x8ca510;
1973 
T_38 ;
1974 
    %wait E_0x8e2160;
1975 
    %fork t_88, S_0x92c2b0;
1976 
    %jmp t_87;
1977 
t_88 ;
1978 
    %set/v v0x92ceb0_0, 0, 32;
1979 
    %load/v 8, v0x93dd00_0, 32;
1980 
    %set/v v0x92ceb0_0, 8, 32;
1981 
    %set/v v0x92cff0_0, 0, 16;
1982 
    %load/v 8, v0x93afc0_0, 16;
1983 
    %set/v v0x92cff0_0, 8, 16;
1984 
    %set/v v0x92b450_0, 0, 16;
1985 
    %set/v v0x92ce30_0, 0, 1;
1986 
    %set/v v0x92d1e0_0, 0, 5;
1987 
    %set/v v0x92cf70_0, 0, 1;
1988 
    %set/v v0x92c890_0, 0, 32;
1989 
    %set/v v0x92c930_0, 0, 16;
1990 
    %set/v v0x92c9d0_0, 0, 32;
1991 
    %set/v v0x92ca70_0, 0, 32;
1992 
    %set/v v0x92cbb0_0, 0, 6;
1993 
    %set/v v0x92cd70_0, 0, 5;
1994 
    %set/v v0x92cc30_0, 0, 16;
1995 
    %set/v v0x92d120_0, 0, 5;
1996 
    %set/v v0x92d330_0, 0, 5;
1997 
    %load/v 8, v0x93b530_0, 1;
1998 
    %jmp/0xz  T_38.0, 8;
1999 
    %load/v 8, v0x93cbb0_0, 32;
2000 
    %set/v v0x9350b0_0, 8, 32;
2001 
    %load/v 8, v0x93b740_0, 2;
2002 
    %set/v v0x9351d0_0, 8, 2;
2003 
    %load/v 8, v0x93b490_0, 2; Only need 2 of 32 bits
2004 
    %movi 10, 0, 30;
2005 
; Save base=8 wid=32 in lookaside.
2006 
    %set/v v0x935010_0, 8, 32;
2007 
    %fork TD_TopBench.MYHDL22_align_mem_load, S_0x934d90;
2008 
    %join;
2009 
    %load/v  8, v0x934f50_0, 32;
2010 
    %set/v v0x92ca70_0, 8, 32;
2011 
    %jmp T_38.1;
2012 
T_38.0 ;
2013 
    %load/v 8, v0x93b490_0, 32;
2014 
    %set/v v0x92ca70_0, 8, 32;
2015 
T_38.1 ;
2016 
    %load/v 8, v0x92ca70_0, 32;
2017 
    %ix/load 0, 32, 0;
2018 
    %assign/v0 v0x9399b0_0, 0, 8;
2019 
    %load/v 8, v0x939db0_0, 1;
2020 
    %inv 8, 1;
2021 
    %load/v 9, v0x939380_0, 1;
2022 
    %and 8, 9, 1;
2023 
    %ix/load 1, 16, 0;
2024 
    %mov 4, 0, 1;
2025 
    %load/x1p 9, v0x93dd00_0, 5;
2026 
; Save base=9 wid=5 in lookaside.
2027 
    %load/v 14, v0x9394c0_0, 5;
2028 
    %cmp/u 9, 14, 5;
2029 
    %mov 9, 4, 1;
2030 
    %ix/load 1, 11, 0;
2031 
    %mov 4, 0, 1;
2032 
    %load/x1p 10, v0x93dd00_0, 5;
2033 
; Save base=10 wid=5 in lookaside.
2034 
    %load/v 15, v0x9394c0_0, 5;
2035 
    %cmp/u 10, 15, 5;
2036 
    %or 9, 4, 1;
2037 
    %and 8, 9, 1;
2038 
    %jmp/0xz  T_38.2, 8;
2039 
    %set/v v0x92c9d0_0, 0, 32;
2040 
    %set/v v0x92cc30_0, 0, 16;
2041 
    %set/v v0x92cf70_0, 1, 1;
2042 
    %jmp T_38.3;
2043 
T_38.2 ;
2044 
    %load/v 8, v0x939db0_0, 1;
2045 
    %inv 8, 1;
2046 
    %load/v 9, v0x939380_0, 1;
2047 
    %and 8, 9, 1;
2048 
    %ix/load 1, 21, 0;
2049 
    %mov 4, 0, 1;
2050 
    %load/x1p 9, v0x93dd00_0, 5;
2051 
; Save base=9 wid=5 in lookaside.
2052 
    %load/v 14, v0x9394c0_0, 5;
2053 
    %cmp/u 9, 14, 5;
2054 
    %mov 9, 4, 1;
2055 
    %and 8, 9, 1;
2056 
    %jmp/0xz  T_38.4, 8;
2057 
    %set/v v0x92c9d0_0, 0, 32;
2058 
    %set/v v0x92cc30_0, 0, 16;
2059 
    %set/v v0x92cf70_0, 1, 1;
2060 
    %jmp T_38.5;
2061 
T_38.4 ;
2062 
    %load/v 8, v0x9395e0_0, 1;
2063 
    %jmp/0xz  T_38.6, 8;
2064 
    %load/v 8, v0x9392e0_0, 32;
2065 
    %set/v v0x92c9d0_0, 8, 32;
2066 
    %load/v 8, v0x939420_0, 16;
2067 
    %set/v v0x92cc30_0, 8, 16;
2068 
    %set/v v0x92cf70_0, 0, 1;
2069 
    %jmp T_38.7;
2070 
T_38.6 ;
2071 
    %load/v 8, v0x93dd00_0, 32;
2072 
    %set/v v0x92c9d0_0, 8, 32;
2073 
    %load/v 8, v0x93afc0_0, 16;
2074 
    %set/v v0x92cc30_0, 8, 16;
2075 
    %set/v v0x92cf70_0, 0, 1;
2076 
T_38.7 ;
2077 
T_38.5 ;
2078 
T_38.3 ;
2079 
    %ix/load 1, 26, 0;
2080 
    %mov 4, 0, 1;
2081 
    %load/x1p 13, v0x92c9d0_0, 3;
2082 
    %mov 8, 13, 3; Move signal select into place
2083 
    %ix/load 1, 30, 0;
2084 
    %mov 4, 0, 1;
2085 
    %load/x1p 13, v0x92c9d0_0, 2;
2086 
    %mov 11, 13, 2; Move signal select into place
2087 
    %set/v v0x92cd70_0, 8, 5;
2088 
    %ix/load 1, 26, 0;
2089 
    %mov 4, 0, 1;
2090 
    %load/x1p 8, v0x92c9d0_0, 6;
2091 
; Save base=8 wid=6 in lookaside.
2092 
    %set/v v0x92cbb0_0, 8, 6;
2093 
    %ix/load 1, 3, 0;
2094 
    %mov 4, 0, 1;
2095 
    %load/x1p 8, v0x92cbb0_0, 1;
2096 
; Save base=8 wid=1 in lookaside.
2097 
    %set/v v0x92c7f0_0, 8, 1;
2098 
    %load/v 8, v0x92c9d0_0, 16; Only need 16 of 32 bits
2099 
; Save base=8 wid=16 in lookaside.
2100 
    %set/v v0x92c930_0, 8, 16;
2101 
    %ix/load 1, 16, 0;
2102 
    %mov 4, 0, 1;
2103 
    %load/x1p 8, v0x92c9d0_0, 5;
2104 
; Save base=8 wid=5 in lookaside.
2105 
    %set/v v0x92d120_0, 8, 5;
2106 
    %ix/load 1, 11, 0;
2107 
    %mov 4, 0, 1;
2108 
    %load/x1p 8, v0x92c9d0_0, 5;
2109 
; Save base=8 wid=5 in lookaside.
2110 
    %set/v v0x92d330_0, 8, 5;
2111 
    %ix/load 1, 21, 0;
2112 
    %mov 4, 0, 1;
2113 
    %load/x1p 8, v0x92c9d0_0, 5;
2114 
; Save base=8 wid=5 in lookaside.
2115 
    %set/v v0x92d1e0_0, 8, 5;
2116 
    %load/v 8, v0x939560_0, 1;
2117 
    %jmp/0xz  T_38.8, 8;
2118 
    %load/v 8, v0x92c930_0, 16;
2119 
    %load/v 24, v0x939240_0, 16;
2120 
    %set/v v0x92c890_0, 8, 32;
2121 
    %jmp T_38.9;
2122 
T_38.8 ;
2123 
    %load/v 8, v0x92c930_0, 16;
2124 
    %set/v v0x934cb0_0, 8, 16;
2125 
    %ix/load 1, 15, 0;
2126 
    %mov 4, 0, 1;
2127 
    %load/x1p 8, v0x92c930_0, 1;
2128 
; Save base=8 wid=1 in lookaside.
2129 
    %set/v v0x934a20_0, 8, 1;
2130 
    %fork TD_TopBench.MYHDL23_sign_extend16, S_0x9347a0;
2131 
    %join;
2132 
    %load/v  8, v0x934960_0, 32;
2133 
    %set/v v0x92c890_0, 8, 32;
2134 
T_38.9 ;
2135 
    %set/v v0x92c390_0, 0, 4;
2136 
    %set/v v0x92c450_0, 0, 2;
2137 
    %set/v v0x92c4f0_0, 0, 2;
2138 
    %set/v v0x92c590_0, 1, 3;
2139 
    %set/v v0x92c610_0, 0, 2;
2140 
    %set/v v0x92c6b0_0, 0, 1;
2141 
    %set/v v0x92c750_0, 0, 1;
2142 
    %set/v v0x92d0a0_0, 0, 1;
2143 
    %set/v v0x92cb10_0, 0, 1;
2144 
    %set/v v0x92ccd0_0, 0, 1;
2145 
    %set/v v0x92d260_0, 0, 1;
2146 
    %set/v v0x92d490_0, 0, 2;
2147 
    %load/v 8, v0x939db0_0, 1;
2148 
    %load/v 9, v0x92cf70_0, 1;
2149 
    %or 8, 9, 1;
2150 
    %jmp/0xz  T_38.10, 8;
2151 
    %jmp T_38.11;
2152 
T_38.10 ;
2153 
    %ix/load 1, 3, 0;
2154 
    %mov 4, 0, 1;
2155 
    %load/x1p 8, v0x92cd70_0, 2;
2156 
; Save base=8 wid=2 in lookaside.
2157 
    %cmpi/u 8, 0, 2;
2158 
    %jmp/0xz  T_38.12, 4;
2159 
    %set/v v0x92c390_0, 0, 4;
2160 
    %load/v 8, v0x92cbb0_0, 1; Only need 1 of 6 bits
2161 
; Save base=8 wid=1 in lookaside.
2162 
    %jmp/0xz  T_38.14, 8;
2163 
    %movi 8, 1, 2;
2164 
    %set/v v0x92c450_0, 8, 2;
2165 
T_38.14 ;
2166 
    %load/v 8, v0x92cbb0_0, 6;
2167 
    %cmpi/u 8, 5, 6;
2168 
    %mov 8, 4, 1;
2169 
    %ix/load 1, 1, 0;
2170 
    %mov 4, 0, 1;
2171 
    %load/x1p 9, v0x92c9d0_0, 1;
2172 
; Save base=9 wid=1 in lookaside.
2173 
    %and 8, 9, 1;
2174 
    %jmp/0xz  T_38.16, 8;
2175 
    %set/v v0x92ccd0_0, 1, 1;
2176 
T_38.16 ;
2177 
    %load/v 8, v0x92c7f0_0, 1;
2178 
    %jmp/0xz  T_38.18, 8;
2179 
    %movi 8, 2, 2;
2180 
    %set/v v0x92c4f0_0, 8, 2;
2181 
    %jmp T_38.19;
2182 
T_38.18 ;
2183 
    %set/v v0x92c4f0_0, 0, 2;
2184 
T_38.19 ;
2185 
    %load/v 8, v0x92cbb0_0, 2; Only need 2 of 6 bits
2186 
; Save base=8 wid=2 in lookaside.
2187 
    %cmpi/u 8, 0, 2;
2188 
    %jmp/0xz  T_38.20, 4;
2189 
    %set/v v0x92c610_0, 0, 2;
2190 
    %jmp T_38.21;
2191 
T_38.20 ;
2192 
    %load/v 8, v0x92cbb0_0, 2; Only need 2 of 6 bits
2193 
; Save base=8 wid=2 in lookaside.
2194 
    %cmpi/u 8, 1, 2;
2195 
    %jmp/0xz  T_38.22, 4;
2196 
    %movi 8, 1, 2;
2197 
    %set/v v0x92c610_0, 8, 2;
2198 
    %jmp T_38.23;
2199 
T_38.22 ;
2200 
    %movi 8, 2, 2;
2201 
    %set/v v0x92c610_0, 8, 2;
2202 
T_38.23 ;
2203 
T_38.21 ;
2204 
    %ix/load 1, 2, 0;
2205 
    %mov 4, 0, 1;
2206 
    %load/x1p 8, v0x92cbb0_0, 1;
2207 
; Save base=8 wid=1 in lookaside.
2208 
    %set/v v0x92c6b0_0, 8, 1;
2209 
    %load/v 8, v0x92d1e0_0, 5;
2210 
    %cmpi/u 8, 0, 5;
2211 
    %mov 8, 4, 1;
2212 
    %inv 8, 1;
2213 
    %set/v v0x92d260_0, 8, 1;
2214 
    %jmp T_38.13;
2215 
T_38.12 ;
2216 
    %ix/load 1, 2, 0;
2217 
    %mov 4, 0, 1;
2218 
    %load/x1p 12, v0x92cd70_0, 3;
2219 
    %mov 8, 12, 3; Move signal select into place
2220 
    %mov 11, 0, 1;
2221 
    %cmpi/u 8, 4, 4;
2222 
    %jmp/0xz  T_38.24, 4;
2223 
    %load/v 8, v0x92cbb0_0, 2; Only need 2 of 6 bits
2224 
; Save base=8 wid=2 in lookaside.
2225 
    %cmpi/u 8, 0, 2;
2226 
    %jmp/0xz  T_38.26, 4;
2227 
    %movi 8, 1, 4;
2228 
    %set/v v0x92c390_0, 8, 4;
2229 
    %jmp T_38.27;
2230 
T_38.26 ;
2231 
    %load/v 8, v0x92cbb0_0, 2; Select 2 out of 6 bits
2232 
    %mov 10, 0, 1;
2233 
    %cmpi/u 8, 2, 3;
2234 
    %jmp/0xz  T_38.28, 4;
2235 
    %movi 8, 3, 4;
2236 
    %set/v v0x92c390_0, 8, 4;
2237 
    %jmp T_38.29;
2238 
T_38.28 ;
2239 
    %movi 8, 2, 4;
2240 
    %set/v v0x92c390_0, 8, 4;
2241 
T_38.29 ;
2242 
T_38.27 ;
2243 
    %load/v 8, v0x92c7f0_0, 1;
2244 
    %load/v 9, v0x92cbb0_0, 2; Select 2 out of 6 bits
2245 
    %mov 11, 0, 1;
2246 
    %cmpi/u 9, 3, 3;
2247 
    %mov 9, 4, 1;
2248 
    %and 8, 9, 1;
2249 
    %jmp/0xz  T_38.30, 8;
2250 
    %set/v v0x92c4f0_0, 1, 2;
2251 
    %jmp T_38.31;
2252 
T_38.30 ;
2253 
    %load/v 8, v0x92c7f0_0, 1;
2254 
    %jmp/0xz  T_38.32, 8;
2255 
    %movi 8, 2, 2;
2256 
    %set/v v0x92c4f0_0, 8, 2;
2257 
    %jmp T_38.33;
2258 
T_38.32 ;
2259 
    %load/v 8, v0x92c7f0_0, 1;
2260 
    %inv 8, 1;
2261 
    %load/v 9, v0x92cbb0_0, 2; Select 2 out of 6 bits
2262 
    %mov 11, 0, 1;
2263 
    %cmpi/u 9, 3, 3;
2264 
    %mov 9, 4, 1;
2265 
    %and 8, 9, 1;
2266 
    %jmp/0xz  T_38.34, 8;
2267 
    %movi 8, 1, 2;
2268 
    %set/v v0x92c4f0_0, 8, 2;
2269 
    %jmp T_38.35;
2270 
T_38.34 ;
2271 
    %set/v v0x92c4f0_0, 0, 2;
2272 
T_38.35 ;
2273 
T_38.33 ;
2274 
T_38.31 ;
2275 
    %load/v 8, v0x92d1e0_0, 5;
2276 
    %cmpi/u 8, 0, 5;
2277 
    %mov 8, 4, 1;
2278 
    %inv 8, 1;
2279 
    %set/v v0x92d260_0, 8, 1;
2280 
    %jmp T_38.25;
2281 
T_38.24 ;
2282 
    %load/v 8, v0x92cbb0_0, 6;
2283 
    %mov 14, 0, 1;
2284 
    %cmpi/u 8, 44, 7;
2285 
    %jmp/0xz  T_38.36, 4;
2286 
    %load/v 8, v0x92c9d0_0, 16; Only need 16 of 32 bits
2287 
; Save base=8 wid=16 in lookaside.
2288 
    %set/v v0x92b450_0, 8, 16;
2289 
    %set/v v0x92ce30_0, 1, 1;
2290 
    %jmp T_38.37;
2291 
T_38.36 ;
2292 
    %load/v 8, v0x92cbb0_0, 6;
2293 
    %mov 14, 0, 1;
2294 
    %cmpi/u 8, 36, 7;
2295 
    %jmp/0xz  T_38.38, 4;
2296 
    %ix/load 1, 5, 0;
2297 
    %mov 4, 0, 1;
2298 
    %load/x1p 11, v0x92c9d0_0, 2;
2299 
    %mov 8, 11, 2; Move signal select into place
2300 
    %mov 10, 0, 1;
2301 
    %cmpi/u 8, 3, 3;
2302 
    %jmp/0xz  T_38.40, 4;
2303 
    %load/v 8, v0x92c9d0_0, 1; Only need 1 of 32 bits
2304 
; Save base=8 wid=1 in lookaside.
2305 
    %jmp/0xz  T_38.42, 8;
2306 
    %movi 8, 6, 4;
2307 
    %set/v v0x92c390_0, 8, 4;
2308 
    %jmp T_38.43;
2309 
T_38.42 ;
2310 
    %movi 8, 5, 4;
2311 
    %set/v v0x92c390_0, 8, 4;
2312 
T_38.43 ;
2313 
    %jmp T_38.41;
2314 
T_38.40 ;
2315 
    %movi 8, 4, 4;
2316 
    %set/v v0x92c390_0, 8, 4;
2317 
    %set/v v0x92c6b0_0, 0, 1;
2318 
    %ix/load 1, 5, 0;
2319 
    %mov 4, 0, 1;
2320 
    %load/x1p 11, v0x92c9d0_0, 2;
2321 
    %mov 8, 11, 2; Move signal select into place
2322 
    %mov 10, 0, 1;
2323 
    %cmpi/u 8, 2, 3;
2324 
    %jmp/0xz  T_38.44, 4;
2325 
    %set/v v0x92c610_0, 0, 2;
2326 
    %jmp T_38.45;
2327 
T_38.44 ;
2328 
    %ix/load 1, 5, 0;
2329 
    %mov 4, 0, 1;
2330 
    %load/x1p 8, v0x92c9d0_0, 2;
2331 
; Save base=8 wid=2 in lookaside.
2332 
    %cmpi/u 8, 1, 2;
2333 
    %jmp/0xz  T_38.46, 4;
2334 
    %movi 8, 2, 2;
2335 
    %set/v v0x92c610_0, 8, 2;
2336 
    %jmp T_38.47;
2337 
T_38.46 ;
2338 
    %set/v v0x92c610_0, 1, 2;
2339 
T_38.47 ;
2340 
T_38.45 ;
2341 
T_38.41 ;
2342 
    %load/v 8, v0x92d1e0_0, 5;
2343 
    %cmpi/u 8, 0, 5;
2344 
    %mov 8, 4, 1;
2345 
    %inv 8, 1;
2346 
    %set/v v0x92d260_0, 8, 1;
2347 
    %jmp T_38.39;
2348 
T_38.38 ;
2349 
    %load/v 8, v0x92cd70_0, 5;
2350 
    %mov 13, 0, 1;
2351 
    %cmpi/u 8, 22, 6;
2352 
    %jmp/0xz  T_38.48, 4;
2353 
    %movi 8, 6, 3;
2354 
    %set/v v0x92c590_0, 8, 3;
2355 
    %load/v 8, v0x92c7f0_0, 1;
2356 
    %jmp/0xz  T_38.50, 8;
2357 
    %movi 8, 2, 2;
2358 
    %set/v v0x92c4f0_0, 8, 2;
2359 
    %jmp T_38.51;
2360 
T_38.50 ;
2361 
    %set/v v0x92c4f0_0, 0, 2;
2362 
T_38.51 ;
2363 
    %ix/load 1, 2, 0;
2364 
    %mov 4, 0, 1;
2365 
    %load/x1p 8, v0x92d120_0, 1;
2366 
; Save base=8 wid=1 in lookaside.
2367 
    %jmp/0xz  T_38.52, 8;
2368 
    %load/v 8, v0x92d1e0_0, 5;
2369 
    %cmpi/u 8, 0, 5;
2370 
    %mov 8, 4, 1;
2371 
    %inv 8, 1;
2372 
    %set/v v0x92d260_0, 8, 1;
2373 
T_38.52 ;
2374 
    %ix/load 1, 3, 0;
2375 
    %mov 4, 0, 1;
2376 
    %load/x1p 8, v0x92d120_0, 1;
2377 
; Save base=8 wid=1 in lookaside.
2378 
    %jmp/0xz  T_38.54, 8;
2379 
    %set/v v0x92c450_0, 1, 2;
2380 
    %jmp T_38.55;
2381 
T_38.54 ;
2382 
    %movi 8, 2, 2;
2383 
    %set/v v0x92c450_0, 8, 2;
2384 
T_38.55 ;
2385 
    %ix/load 1, 4, 0;
2386 
    %mov 4, 0, 1;
2387 
    %load/x1p 8, v0x92d120_0, 1;
2388 
; Save base=8 wid=1 in lookaside.
2389 
    %set/v v0x92c750_0, 8, 1;
2390 
    %jmp T_38.49;
2391 
T_38.48 ;
2392 
    %load/v 8, v0x92cd70_0, 5;
2393 
    %mov 13, 0, 1;
2394 
    %cmpi/u 8, 23, 6;
2395 
    %jmp/0xz  T_38.56, 4;
2396 
    %set/v v0x92c390_0, 0, 4;
2397 
    %movi 8, 2, 2;
2398 
    %set/v v0x92c450_0, 8, 2;
2399 
    %load/v 8, v0x92c7f0_0, 1;
2400 
    %jmp/0xz  T_38.58, 8;
2401 
    %movi 8, 2, 2;
2402 
    %set/v v0x92c4f0_0, 8, 2;
2403 
    %jmp T_38.59;
2404 
T_38.58 ;
2405 
    %set/v v0x92c4f0_0, 0, 2;
2406 
T_38.59 ;
2407 
    %load/v 8, v0x92d1e0_0, 3; Only need 3 of 5 bits
2408 
; Save base=8 wid=3 in lookaside.
2409 
    %cmpi/u 8, 0, 3;
2410 
    %jmp/0xz  T_38.60, 4;
2411 
    %set/v v0x92c590_0, 0, 3;
2412 
    %jmp T_38.61;
2413 
T_38.60 ;
2414 
    %load/v 8, v0x92d1e0_0, 3; Only need 3 of 5 bits
2415 
; Save base=8 wid=3 in lookaside.
2416 
    %cmpi/u 8, 1, 3;
2417 
    %jmp/0xz  T_38.62, 4;
2418 
    %movi 8, 1, 3;
2419 
    %set/v v0x92c590_0, 8, 3;
2420 
    %jmp T_38.63;
2421 
T_38.62 ;
2422 
    %load/v 8, v0x92d1e0_0, 3; Only need 3 of 5 bits
2423 
; Save base=8 wid=3 in lookaside.
2424 
    %cmpi/u 8, 2, 3;
2425 
    %jmp/0xz  T_38.64, 4;
2426 
    %movi 8, 2, 3;
2427 
    %set/v v0x92c590_0, 8, 3;
2428 
    %jmp T_38.65;
2429 
T_38.64 ;
2430 
    %load/v 8, v0x92d1e0_0, 3; Only need 3 of 5 bits
2431 
; Save base=8 wid=3 in lookaside.
2432 
    %cmpi/u 8, 3, 3;
2433 
    %jmp/0xz  T_38.66, 4;
2434 
    %movi 8, 3, 3;
2435 
    %set/v v0x92c590_0, 8, 3;
2436 
    %jmp T_38.67;
2437 
T_38.66 ;
2438 
    %load/v 8, v0x92d1e0_0, 3; Select 3 out of 5 bits
2439 
    %mov 11, 0, 1;
2440 
    %cmpi/u 8, 4, 4;
2441 
    %jmp/0xz  T_38.68, 4;
2442 
    %movi 8, 4, 3;
2443 
    %set/v v0x92c590_0, 8, 3;
2444 
    %jmp T_38.69;
2445 
T_38.68 ;
2446 
    %movi 8, 5, 3;
2447 
    %set/v v0x92c590_0, 8, 3;
2448 
T_38.69 ;
2449 
T_38.67 ;
2450 
T_38.65 ;
2451 
T_38.63 ;
2452 
T_38.61 ;
2453 
    %ix/load 1, 4, 0;
2454 
    %mov 4, 0, 1;
2455 
    %load/x1p 8, v0x92d1e0_0, 1;
2456 
; Save base=8 wid=1 in lookaside.
2457 
    %set/v v0x92c750_0, 8, 1;
2458 
    %jmp T_38.57;
2459 
T_38.56 ;
2460 
    %load/v 8, v0x92cbb0_0, 6;
2461 
    %mov 14, 0, 1;
2462 
    %cmpi/u 8, 45, 7;
2463 
    %jmp/0xz  T_38.70, 4;
2464 
    %movi 8, 6, 3;
2465 
    %set/v v0x92c590_0, 8, 3;
2466 
    %movi 8, 2, 2;
2467 
    %set/v v0x92c4f0_0, 8, 2;
2468 
    %set/v v0x92c750_0, 1, 1;
2469 
    %jmp T_38.71;
2470 
T_38.70 ;
2471 
    %ix/load 1, 3, 0;
2472 
    %mov 4, 0, 1;
2473 
    %load/x1p 11, v0x92cd70_0, 2;
2474 
    %mov 8, 11, 2; Move signal select into place
2475 
    %mov 10, 0, 1;
2476 
    %cmpi/u 8, 3, 3;
2477 
    %jmp/0xz  T_38.72, 4;
2478 
    %set/v v0x92c390_0, 0, 4;
2479 
    %set/v v0x92c450_0, 0, 2;
2480 
    %load/v 8, v0x92c7f0_0, 1;
2481 
    %jmp/0xz  T_38.74, 8;
2482 
    %movi 8, 2, 2;
2483 
    %set/v v0x92c4f0_0, 8, 2;
2484 
    %jmp T_38.75;
2485 
T_38.74 ;
2486 
    %set/v v0x92c4f0_0, 0, 2;
2487 
T_38.75 ;
2488 
    %set/v v0x92c610_0, 0, 2;
2489 
    %ix/load 1, 2, 0;
2490 
    %mov 4, 0, 1;
2491 
    %load/x1p 8, v0x92cbb0_0, 1;
2492 
; Save base=8 wid=1 in lookaside.
2493 
    %jmp/0xz  T_38.76, 8;
2494 
    %set/v v0x92cb10_0, 1, 1;
2495 
    %set/v v0x92d0a0_0, 0, 1;
2496 
    %set/v v0x92d260_0, 0, 1;
2497 
    %jmp T_38.77;
2498 
T_38.76 ;
2499 
    %set/v v0x92cb10_0, 0, 1;
2500 
    %set/v v0x92d0a0_0, 1, 1;
2501 
    %load/v 8, v0x92d1e0_0, 5;
2502 
    %cmpi/u 8, 0, 5;
2503 
    %mov 8, 4, 1;
2504 
    %inv 8, 1;
2505 
    %set/v v0x92d260_0, 8, 1;
2506 
T_38.77 ;
2507 
    %load/v 8, v0x92cbb0_0, 2; Only need 2 of 6 bits
2508 
; Save base=8 wid=2 in lookaside.
2509 
    %cmpi/u 8, 0, 2;
2510 
    %jmp/0xz  T_38.78, 4;
2511 
    %movi 8, 2, 2;
2512 
    %set/v v0x92d490_0, 8, 2;
2513 
    %jmp T_38.79;
2514 
T_38.78 ;
2515 
    %load/v 8, v0x92cbb0_0, 2; Only need 2 of 6 bits
2516 
; Save base=8 wid=2 in lookaside.
2517 
    %cmpi/u 8, 1, 2;
2518 
    %jmp/0xz  T_38.80, 4;
2519 
    %movi 8, 1, 2;
2520 
    %set/v v0x92d490_0, 8, 2;
2521 
    %jmp T_38.81;
2522 
T_38.80 ;
2523 
    %set/v v0x92d490_0, 0, 2;
2524 
T_38.81 ;
2525 
T_38.79 ;
2526 
    %set/v v0x92c750_0, 0, 1;
2527 
T_38.72 ;
2528 
T_38.71 ;
2529 
T_38.57 ;
2530 
T_38.49 ;
2531 
T_38.39 ;
2532 
T_38.37 ;
2533 
T_38.25 ;
2534 
T_38.13 ;
2535 
T_38.11 ;
2536 
    %load/v 8, v0x92ce30_0, 1;
2537 
    %ix/load 0, 1, 0;
2538 
    %assign/v0 v0x938dd0_0, 0, 8;
2539 
    %load/v 8, v0x92b450_0, 16;
2540 
    %ix/load 0, 16, 0;
2541 
    %assign/v0 v0x938b30_0, 0, 8;
2542 
    %load/v 8, v0x92ceb0_0, 32;
2543 
    %ix/load 0, 32, 0;
2544 
    %assign/v0 v0x938bd0_0, 0, 8;
2545 
    %load/v 8, v0x92cff0_0, 16;
2546 
    %ix/load 0, 16, 0;
2547 
    %assign/v0 v0x939140_0, 0, 8;
2548 
    %load/v 8, v0x92cf70_0, 1;
2549 
    %ix/load 0, 1, 0;
2550 
    %assign/v0 v0x938a90_0, 0, 8;
2551 
    %load/v 8, v0x92d0a0_0, 1;
2552 
    %ix/load 0, 1, 0;
2553 
    %assign/v0 v0x938c70_0, 0, 8;
2554 
    %load/v 8, v0x92d1e0_0, 5;
2555 
    %ix/load 0, 5, 0;
2556 
    %assign/v0 v0x9391c0_0, 0, 8;
2557 
    %load/v 8, v0x92c390_0, 4;
2558 
    %ix/load 0, 4, 0;
2559 
    %assign/v0 v0x938680_0, 0, 8;
2560 
    %load/v 8, v0x92c450_0, 2;
2561 
    %ix/load 0, 2, 0;
2562 
    %assign/v0 v0x938700_0, 0, 8;
2563 
    %load/v 8, v0x92c4f0_0, 2;
2564 
    %ix/load 0, 2, 0;
2565 
    %assign/v0 v0x938430_0, 0, 8;
2566 
    %load/v 8, v0x92c590_0, 3;
2567 
    %ix/load 0, 3, 0;
2568 
    %assign/v0 v0x9384d0_0, 0, 8;
2569 
    %load/v 8, v0x92c610_0, 2;
2570 
    %ix/load 0, 2, 0;
2571 
    %assign/v0 v0x938570_0, 0, 8;
2572 
    %load/v 8, v0x92c6b0_0, 1;
2573 
    %ix/load 0, 1, 0;
2574 
    %assign/v0 v0x938a10_0, 0, 8;
2575 
    %load/v 8, v0x92c750_0, 1;
2576 
    %ix/load 0, 1, 0;
2577 
    %assign/v0 v0x938780_0, 0, 8;
2578 
    %load/v 8, v0x92c890_0, 32;
2579 
    %ix/load 0, 32, 0;
2580 
    %assign/v0 v0x938820_0, 0, 8;
2581 
    %load/v 8, v0x92cb10_0, 1;
2582 
    %ix/load 0, 1, 0;
2583 
    %assign/v0 v0x9388c0_0, 0, 8;
2584 
    %load/v 8, v0x92ccd0_0, 1;
2585 
    %ix/load 0, 1, 0;
2586 
    %assign/v0 v0x938960_0, 0, 8;
2587 
    %load/v 8, v0x92cc30_0, 16;
2588 
    %ix/load 0, 16, 0;
2589 
    %assign/v0 v0x938d50_0, 0, 8;
2590 
    %load/v 8, v0x92d120_0, 5;
2591 
    %ix/load 0, 5, 0;
2592 
    %assign/v0 v0x938e50_0, 0, 8;
2593 
    %load/v 8, v0x92d330_0, 5;
2594 
    %ix/load 0, 5, 0;
2595 
    %assign/v0 v0x938ef0_0, 0, 8;
2596 
    %load/v 8, v0x92d260_0, 1;
2597 
    %ix/load 0, 1, 0;
2598 
    %assign/v0 v0x938f90_0, 0, 8;
2599 
    %load/v 8, v0x92d490_0, 2;
2600 
    %ix/load 0, 2, 0;
2601 
    %assign/v0 v0x939030_0, 0, 8;
2602 
    %end;
2603 
t_87 %join;
2604 
    %jmp T_38;
2605 
    .thread T_38, $push;
2606 
    .scope S_0x8ca510;
2607 
T_39 ;
2608 
    %wait E_0x8dad90;
2609 
    %fork t_90, S_0x92c1d0;
2610 
    %jmp t_89;
2611 
t_90 ;
2612 
    %load/v 8, v0x938010_0, 1;
2613 
    %jmp/0xz  T_39.0, 8;
2614 
    %ix/load 0, 16, 0;
2615 
    %assign/v0 v0x93ad40_0, 0, 0;
2616 
    %jmp T_39.1;
2617 
T_39.0 ;
2618 
    %load/v 8, v0x93cd90_0, 1;
2619 
    %jmp/0xz  T_39.2, 8;
2620 
    %load/v 8, v0x93aca0_0, 16;
2621 
    %ix/load 0, 16, 0;
2622 
    %assign/v0 v0x93ad40_0, 0, 8;
2623 
T_39.2 ;
2624 
T_39.1 ;
2625 
    %end;
2626 
t_89 %join;
2627 
    %jmp T_39;
2628 
    .thread T_39;
2629 
    .scope S_0x8ca510;
2630 
T_40 ;
2631 
    %wait E_0x8e1620;
2632 
    %fork t_92, S_0x92c030;
2633 
    %jmp t_91;
2634 
t_92 ;
2635 
    %set/v v0x92c110_0, 0, 16;
2636 
    %load/v 8, v0x938010_0, 1;
2637 
    %jmp/0xz  T_40.0, 8;
2638 
    %set/v v0x92c110_0, 0, 16;
2639 
    %jmp T_40.1;
2640 
T_40.0 ;
2641 
    %load/v 8, v0x93bd30_0, 1;
2642 
    %jmp/0xz  T_40.2, 8;
2643 
    %load/v 8, v0x93ad40_0, 16;
2644 
    %set/v v0x92c110_0, 8, 16;
2645 
    %jmp T_40.3;
2646 
T_40.2 ;
2647 
    %load/v 8, v0x939700_0, 1;
2648 
    %jmp/0xz  T_40.4, 8;
2649 
    %load/v 8, v0x939660_0, 16; Only need 16 of 32 bits
2650 
; Save base=8 wid=16 in lookaside.
2651 
    %set/v v0x92c110_0, 8, 16;
2652 
    %jmp T_40.5;
2653 
T_40.4 ;
2654 
    %load/v 8, v0x93ad40_0, 16;
2655 
    %mov 24, 0, 16;
2656 
   %addi 8, 4, 32;
2657 
    %movi 40, 65536, 32;
2658 
    %mod 8, 40, 32;
2659 
    %set/v v0x92c110_0, 8, 16;
2660 
T_40.5 ;
2661 
T_40.3 ;
2662 
T_40.1 ;
2663 
    %load/v 8, v0x92c110_0, 16;
2664 
    %ix/load 0, 16, 0;
2665 
    %assign/v0 v0x93aca0_0, 0, 8;
2666 
    %end;
2667 
t_91 %join;
2668 
    %jmp T_40;
2669 
    .thread T_40, $push;
2670 
    .scope S_0x8ca510;
2671 
T_41 ;
2672 
    %wait E_0x8dad90;
2673 
    %fork t_94, S_0x92bf50;
2674 
    %jmp t_93;
2675 
t_94 ;
2676 
    %load/v 8, v0x938010_0, 1;
2677 
    %jmp/0xz  T_41.0, 8;
2678 
    %ix/load 0, 32, 0;
2679 
    %assign/v0 v0x93b490_0, 0, 0;
2680 
    %ix/load 0, 1, 0;
2681 
    %assign/v0 v0x93b530_0, 0, 0;
2682 
    %ix/load 0, 5, 0;
2683 
    %assign/v0 v0x93bb90_0, 0, 0;
2684 
    %ix/load 0, 1, 0;
2685 
    %assign/v0 v0x93b6a0_0, 0, 0;
2686 
    %ix/load 0, 2, 0;
2687 
    %assign/v0 v0x93b740_0, 0, 0;
2688 
    %jmp T_41.1;
2689 
T_41.0 ;
2690 
    %load/v 8, v0x93cd90_0, 1;
2691 
    %jmp/0xz  T_41.2, 8;
2692 
    %load/v 8, v0x93b170_0, 32;
2693 
    %ix/load 0, 32, 0;
2694 
    %assign/v0 v0x93b490_0, 0, 8;
2695 
    %load/v 8, v0x93b210_0, 1;
2696 
    %ix/load 0, 1, 0;
2697 
    %assign/v0 v0x93b530_0, 0, 8;
2698 
    %load/v 8, v0x93b2b0_0, 5;
2699 
    %ix/load 0, 5, 0;
2700 
    %assign/v0 v0x93bb90_0, 0, 8;
2701 
    %load/v 8, v0x93b350_0, 1;
2702 
    %ix/load 0, 1, 0;
2703 
    %assign/v0 v0x93b6a0_0, 0, 8;
2704 
    %load/v 8, v0x93b3f0_0, 2;
2705 
    %ix/load 0, 2, 0;
2706 
    %assign/v0 v0x93b740_0, 0, 8;
2707 
T_41.2 ;
2708 
T_41.1 ;
2709 
    %end;
2710 
t_93 %join;
2711 
    %jmp T_41;
2712 
    .thread T_41;
2713 
    .scope S_0x8ca510;
2714 
T_42 ;
2715 
    %wait E_0x8de000;
2716 
    %fork t_96, S_0x92bdd0;
2717 
    %jmp t_95;
2718 
t_96 ;
2719 
    %set/v v0x92beb0_0, 0, 32;
2720 
    %load/v 8, v0x939700_0, 1;
2721 
    %jmp/0xz  T_42.0, 8;
2722 
    %load/v 8, v0x939c10_0, 16;
2723 
    %mov 24, 0, 16;
2724 
    %set/v v0x92beb0_0, 8, 32;
2725 
    %jmp T_42.1;
2726 
T_42.0 ;
2727 
    %load/v 8, v0x939660_0, 32;
2728 
    %set/v v0x92beb0_0, 8, 32;
2729 
T_42.1 ;
2730 
    %load/v 8, v0x9398e0_0, 32;
2731 
    %ix/load 0, 32, 0;
2732 
    %assign/v0 v0x93b620_0, 0, 8;
2733 
    %load/v 8, v0x92beb0_0, 32;
2734 
    %ix/load 0, 32, 0;
2735 
    %assign/v0 v0x93b170_0, 0, 8;
2736 
    %load/v 8, v0x939ad0_0, 1;
2737 
    %ix/load 0, 1, 0;
2738 
    %assign/v0 v0x93b210_0, 0, 8;
2739 
    %load/v 8, v0x939e30_0, 5;
2740 
    %ix/load 0, 5, 0;
2741 
    %assign/v0 v0x93b2b0_0, 0, 8;
2742 
    %load/v 8, v0x939ed0_0, 1;
2743 
    %ix/load 0, 1, 0;
2744 
    %assign/v0 v0x93b350_0, 0, 8;
2745 
    %load/v 8, v0x939f70_0, 2;
2746 
    %ix/load 0, 2, 0;
2747 
    %assign/v0 v0x93b3f0_0, 0, 8;
2748 
    %end;
2749 
t_95 %join;
2750 
    %jmp T_42;
2751 
    .thread T_42, $push;
2752 
    .scope S_0x8ca510;
2753 
T_43 ;
2754 
    %wait E_0x8dcfb0;
2755 
    %fork t_98, S_0x92a780;
2756 
    %jmp t_97;
2757 
t_98 ;
2758 
    %set/v v0x92b520_0, 0, 1;
2759 
    %set/v v0x92b660_0, 0, 1;
2760 
    %set/v v0x92b290_0, 0, 32;
2761 
    %set/v v0x92b700_0, 0, 5;
2762 
    %set/v v0x92b5c0_0, 0, 1;
2763 
    %set/v v0x92aa60_0, 0, 1;
2764 
    %set/v v0x92ae20_0, 0, 32;
2765 
    %set/v v0x92aec0_0, 0, 1;
2766 
    %set/v v0x92afc0_0, 0, 1;
2767 
    %set/v v0x92b170_0, 0, 1;
2768 
    %set/v v0x92b3d0_0, 0, 16;
2769 
    %set/v v0x92ba50_0, 0, 2;
2770 
    %set/v v0x92a860_0, 0, 32;
2771 
    %set/v v0x92a920_0, 0, 32;
2772 
    %set/v v0x92ab10_0, 0, 1;
2773 
    %set/v v0x92b850_0, 0, 33;
2774 
    %set/v v0x92b7a0_0, 0, 33;
2775 
    %set/v v0x92bba0_0, 0, 1;
2776 
    %set/v v0x92ac90_0, 0, 32;
2777 
    %set/v v0x92ad30_0, 0, 32;
2778 
    %set/v v0x92b9b0_0, 0, 32;
2779 
    %set/v v0x92b8f0_0, 0, 32;
2780 
    %set/v v0x92bb00_0, 0, 32;
2781 
    %set/v v0x92b060_0, 0, 32;
2782 
    %load/v 8, v0x93ade0_0, 32;
2783 
    %set/v v0x933ae0_0, 8, 32;
2784 
    %load/v 8, v0x93c860_0, 5;
2785 
    %set/v v0x933b80_0, 8, 5;
2786 
    %load/v 8, v0x93c1d0_0, 32;
2787 
    %set/v v0x933cd0_0, 8, 32;
2788 
    %load/v 8, v0x93bc90_0, 1;
2789 
    %set/v v0x934210_0, 8, 1;
2790 
    %load/v 8, v0x93bc10_0, 5;
2791 
    %set/v v0x9340d0_0, 8, 5;
2792 
    %load/v 8, v0x93c860_0, 5;
2793 
    %set/v v0x934170_0, 8, 5;
2794 
    %fork TD_TopBench.MYHDL35_forward_condition, S_0x933e50;
2795 
    %join;
2796 
    %load/v  8, v0x934010_0, 1;
2797 
    %set/v v0x933d70_0, 8, 1;
2798 
    %fork TD_TopBench.MYHDL36_select_register_data, S_0x933860;
2799 
    %join;
2800 
    %load/v  8, v0x933a20_0, 32;
2801 
    %set/v v0x92b9b0_0, 8, 32;
2802 
    %load/v 8, v0x93ae80_0, 32;
2803 
    %set/v v0x933010_0, 8, 32;
2804 
    %load/v 8, v0x93c250_0, 5;
2805 
    %set/v v0x9330b0_0, 8, 5;
2806 
    %load/v 8, v0x93c1d0_0, 32;
2807 
    %set/v v0x933200_0, 8, 32;
2808 
    %load/v 8, v0x93bc90_0, 1;
2809 
    %set/v v0x933740_0, 8, 1;
2810 
    %load/v 8, v0x93bc10_0, 5;
2811 
    %set/v v0x933600_0, 8, 5;
2812 
    %load/v 8, v0x93c250_0, 5;
2813 
    %set/v v0x9336a0_0, 8, 5;
2814 
    %fork TD_TopBench.MYHDL37_forward_condition, S_0x933380;
2815 
    %join;
2816 
    %load/v  8, v0x933540_0, 1;
2817 
    %set/v v0x9332a0_0, 8, 1;
2818 
    %fork TD_TopBench.MYHDL38_select_register_data, S_0x932d90;
2819 
    %join;
2820 
    %load/v  8, v0x932f50_0, 32;
2821 
    %set/v v0x92b8f0_0, 8, 32;
2822 
    %load/v 8, v0x93af20_0, 32;
2823 
    %set/v v0x932580_0, 8, 32;
2824 
    %load/v 8, v0x93c2d0_0, 5;
2825 
    %set/v v0x932620_0, 8, 5;
2826 
    %load/v 8, v0x93c1d0_0, 32;
2827 
    %set/v v0x932770_0, 8, 32;
2828 
    %load/v 8, v0x93bc90_0, 1;
2829 
    %set/v v0x932c70_0, 8, 1;
2830 
    %load/v 8, v0x93bc10_0, 5;
2831 
    %set/v v0x932b30_0, 8, 5;
2832 
    %load/v 8, v0x93c2d0_0, 5;
2833 
    %set/v v0x932bd0_0, 8, 5;
2834 
    %fork TD_TopBench.MYHDL39_forward_condition, S_0x9328b0;
2835 
    %join;
2836 
    %load/v  8, v0x932a70_0, 1;
2837 
    %set/v v0x932810_0, 8, 1;
2838 
    %fork TD_TopBench.MYHDL40_select_register_data, S_0x932300;
2839 
    %join;
2840 
    %load/v  8, v0x9324c0_0, 32;
2841 
    %set/v v0x92bb00_0, 8, 32;
2842 
    %load/v 8, v0x93b070_0, 1;
2843 
    %inv 8, 1;
2844 
    %jmp/0xz  T_43.0, 8;
2845 
    %load/v 8, v0x93bfb0_0, 1;
2846 
    %cmpi/u 8, 0, 1;
2847 
    %inv 4, 1;
2848 
    %mov 8, 4, 1;
2849 
    %set/v v0x92b170_0, 8, 1;
2850 
    %load/v 8, v0x93bf10_0, 1;
2851 
    %cmpi/u 8, 0, 1;
2852 
    %inv 4, 1;
2853 
    %mov 8, 4, 1;
2854 
    %set/v v0x92afc0_0, 8, 1;
2855 
    %load/v 8, v0x93c410_0, 2;
2856 
    %set/v v0x92ba50_0, 8, 2;
2857 
    %load/v 8, v0x93c370_0, 1;
2858 
    %cmpi/u 8, 0, 1;
2859 
    %inv 4, 1;
2860 
    %mov 8, 4, 1;
2861 
    %set/v v0x92b5c0_0, 8, 1;
2862 
    %load/v 8, v0x93c2d0_0, 5;
2863 
    %set/v v0x92b700_0, 8, 5;
2864 
T_43.0 ;
2865 
    %load/v 8, v0x93b530_0, 1;
2866 
    %jmp/0xz  T_43.2, 8;
2867 
    %load/v 8, v0x93cbb0_0, 32;
2868 
    %set/v v0x932110_0, 8, 32;
2869 
    %load/v 8, v0x93b740_0, 2;
2870 
    %set/v v0x932260_0, 8, 2;
2871 
    %load/v 8, v0x93b490_0, 2; Only need 2 of 32 bits
2872 
    %movi 10, 0, 30;
2873 
; Save base=8 wid=32 in lookaside.
2874 
    %set/v v0x932070_0, 8, 32;
2875 
    %fork TD_TopBench.MYHDL41_align_mem_load, S_0x931df0;
2876 
    %join;
2877 
    %load/v  8, v0x931fb0_0, 32;
2878 
    %set/v v0x92b060_0, 8, 32;
2879 
    %jmp T_43.3;
2880 
T_43.2 ;
2881 
    %load/v 8, v0x93b490_0, 32;
2882 
    %set/v v0x92b060_0, 8, 32;
2883 
T_43.3 ;
2884 
    %load/v 8, v0x93ac00_0, 1;
2885 
    %set/v v0x931ca0_0, 8, 1;
2886 
    %load/v 8, v0x93b0f0_0, 5;
2887 
    %set/v v0x931b60_0, 8, 5;
2888 
    %load/v 8, v0x93c860_0, 5;
2889 
    %set/v v0x931c00_0, 8, 5;
2890 
    %fork TD_TopBench.MYHDL42_forward_condition, S_0x9318e0;
2891 
    %join;
2892 
    %load/v  8, v0x931aa0_0, 1;
2893 
    %jmp/0xz  T_43.4, 8;
2894 
    %load/v 8, v0x93a9d0_0, 32;
2895 
    %set/v v0x92ac90_0, 8, 32;
2896 
    %jmp T_43.5;
2897 
T_43.4 ;
2898 
    %load/v 8, v0x93b6a0_0, 1;
2899 
    %set/v v0x931790_0, 8, 1;
2900 
    %load/v 8, v0x93bb90_0, 5;
2901 
    %set/v v0x931650_0, 8, 5;
2902 
    %load/v 8, v0x93c860_0, 5;
2903 
    %set/v v0x9316f0_0, 8, 5;
2904 
    %fork TD_TopBench.MYHDL43_forward_condition, S_0x9313d0;
2905 
    %join;
2906 
    %load/v  8, v0x931590_0, 1;
2907 
    %jmp/0xz  T_43.6, 8;
2908 
    %load/v 8, v0x92b060_0, 32;
2909 
    %set/v v0x92ac90_0, 8, 32;
2910 
    %jmp T_43.7;
2911 
T_43.6 ;
2912 
    %load/v 8, v0x92b9b0_0, 32;
2913 
    %set/v v0x92ac90_0, 8, 32;
2914 
T_43.7 ;
2915 
T_43.5 ;
2916 
    %load/v 8, v0x93ac00_0, 1;
2917 
    %set/v v0x931280_0, 8, 1;
2918 
    %load/v 8, v0x93b0f0_0, 5;
2919 
    %set/v v0x931140_0, 8, 5;
2920 
    %load/v 8, v0x93c250_0, 5;
2921 
    %set/v v0x9311e0_0, 8, 5;
2922 
    %fork TD_TopBench.MYHDL44_forward_condition, S_0x930ec0;
2923 
    %join;
2924 
    %load/v  8, v0x931080_0, 1;
2925 
    %jmp/0xz  T_43.8, 8;
2926 
    %load/v 8, v0x93a9d0_0, 32;
2927 
    %set/v v0x92ad30_0, 8, 32;
2928 
    %jmp T_43.9;
2929 
T_43.8 ;
2930 
    %load/v 8, v0x93b6a0_0, 1;
2931 
    %set/v v0x930d70_0, 8, 1;
2932 
    %load/v 8, v0x93bb90_0, 5;
2933 
    %set/v v0x930c30_0, 8, 5;
2934 
    %load/v 8, v0x93c250_0, 5;
2935 
    %set/v v0x930cd0_0, 8, 5;
2936 
    %fork TD_TopBench.MYHDL45_forward_condition, S_0x9309b0;
2937 
    %join;
2938 
    %load/v  8, v0x930b70_0, 1;
2939 
    %jmp/0xz  T_43.10, 8;
2940 
    %load/v 8, v0x92b060_0, 32;
2941 
    %set/v v0x92ad30_0, 8, 32;
2942 
    %jmp T_43.11;
2943 
T_43.10 ;
2944 
    %load/v 8, v0x92b8f0_0, 32;
2945 
    %set/v v0x92ad30_0, 8, 32;
2946 
T_43.11 ;
2947 
T_43.9 ;
2948 
    %load/v 8, v0x93ac00_0, 1;
2949 
    %set/v v0x930860_0, 8, 1;
2950 
    %load/v 8, v0x93b0f0_0, 5;
2951 
    %set/v v0x930720_0, 8, 5;
2952 
    %load/v 8, v0x93c2d0_0, 5;
2953 
    %set/v v0x9307c0_0, 8, 5;
2954 
    %fork TD_TopBench.MYHDL46_forward_condition, S_0x9304a0;
2955 
    %join;
2956 
    %load/v  8, v0x930660_0, 1;
2957 
    %jmp/0xz  T_43.12, 8;
2958 
    %load/v 8, v0x93a9d0_0, 32;
2959 
    %set/v v0x9302b0_0, 8, 32;
2960 
    %load/v 8, v0x93c410_0, 2;
2961 
    %set/v v0x9303f0_0, 8, 2;
2962 
    %fork TD_TopBench.MYHDL47_align_mem_store, S_0x930030;
2963 
    %join;
2964 
    %load/v  8, v0x9301f0_0, 32;
2965 
    %set/v v0x92ae20_0, 8, 32;
2966 
    %jmp T_43.13;
2967 
T_43.12 ;
2968 
    %load/v 8, v0x93b6a0_0, 1;
2969 
    %set/v v0x92fee0_0, 8, 1;
2970 
    %load/v 8, v0x93bb90_0, 5;
2971 
    %set/v v0x92fda0_0, 8, 5;
2972 
    %load/v 8, v0x93c2d0_0, 5;
2973 
    %set/v v0x92fe40_0, 8, 5;
2974 
    %fork TD_TopBench.MYHDL48_forward_condition, S_0x92fb20;
2975 
    %join;
2976 
    %load/v  8, v0x92fce0_0, 1;
2977 
    %jmp/0xz  T_43.14, 8;
2978 
    %load/v 8, v0x92b060_0, 32;
2979 
    %set/v v0x92f930_0, 8, 32;
2980 
    %load/v 8, v0x93c410_0, 2;
2981 
    %set/v v0x92fa70_0, 8, 2;
2982 
    %fork TD_TopBench.MYHDL49_align_mem_store, S_0x92f6b0;
2983 
    %join;
2984 
    %load/v  8, v0x92f870_0, 32;
2985 
    %set/v v0x92ae20_0, 8, 32;
2986 
    %jmp T_43.15;
2987 
T_43.14 ;
2988 
    %load/v 8, v0x92bb00_0, 32;
2989 
    %set/v v0x92f4f0_0, 8, 32;
2990 
    %load/v 8, v0x93c410_0, 2;
2991 
    %set/v v0x92f630_0, 8, 2;
2992 
    %fork TD_TopBench.MYHDL50_align_mem_store, S_0x92f270;
2993 
    %join;
2994 
    %load/v  8, v0x92f430_0, 32;
2995 
    %set/v v0x92ae20_0, 8, 32;
2996 
T_43.15 ;
2997 
T_43.13 ;
2998 
    %load/v 8, v0x93b880_0, 2;
2999 
    %movi 10, 2, 2;
3000 
    %cmp/z 8, 10, 2;
3001 
    %jmp/1 T_43.16, 4;
3002 
    %movi 10, 1, 2;
3003 
    %cmp/z 8, 10, 2;
3004 
    %jmp/1 T_43.17, 4;
3005 
    %cmp/z 8, 1, 2;
3006 
    %jmp/1 T_43.18, 4;
3007 
    %load/v 8, v0x92ac90_0, 32;
3008 
    %set/v v0x92a860_0, 8, 32;
3009 
    %jmp T_43.20;
3010 
T_43.16 ;
3011 
    %load/v 8, v0x93c7e0_0, 16;
3012 
    %mov 24, 0, 16;
3013 
    %set/v v0x92a860_0, 8, 32;
3014 
    %jmp T_43.20;
3015 
T_43.17 ;
3016 
    %load/v 8, v0x92ac90_0, 32;
3017 
    %inv 8, 32;
3018 
    %set/v v0x92a860_0, 8, 32;
3019 
    %jmp T_43.20;
3020 
T_43.18 ;
3021 
    %set/v v0x92a860_0, 0, 32;
3022 
    %jmp T_43.20;
3023 
T_43.20 ;
3024 
    %load/v 8, v0x93b920_0, 2;
3025 
    %movi 10, 2, 2;
3026 
    %cmp/z 8, 10, 2;
3027 
    %jmp/1 T_43.21, 4;
3028 
    %cmp/z 8, 1, 2;
3029 
    %jmp/1 T_43.22, 4;
3030 
    %movi 10, 1, 2;
3031 
    %cmp/z 8, 10, 2;
3032 
    %jmp/1 T_43.23, 4;
3033 
    %load/v 8, v0x92ad30_0, 32;
3034 
    %set/v v0x92a920_0, 8, 32;
3035 
    %jmp T_43.25;
3036 
T_43.21 ;
3037 
    %load/v 8, v0x93bdd0_0, 32;
3038 
    %set/v v0x92a920_0, 8, 32;
3039 
    %jmp T_43.25;
3040 
T_43.22 ;
3041 
    %load/v 8, v0x93bdd0_0, 32;
3042 
    %inv 8, 32;
3043 
    %set/v v0x92a920_0, 8, 32;
3044 
    %jmp T_43.25;
3045 
T_43.23 ;
3046 
    %load/v 8, v0x92ad30_0, 32;
3047 
    %inv 8, 32;
3048 
    %set/v v0x92a920_0, 8, 32;
3049 
    %jmp T_43.25;
3050 
T_43.25 ;
3051 
    %load/v 8, v0x93ba60_0, 2;
3052 
    %movi 10, 2, 2;
3053 
    %cmp/z 8, 10, 2;
3054 
    %jmp/1 T_43.26, 4;
3055 
    %movi 10, 1, 2;
3056 
    %cmp/z 8, 10, 2;
3057 
    %jmp/1 T_43.27, 4;
3058 
    %cmp/z 8, 1, 2;
3059 
    %jmp/1 T_43.28, 4;
3060 
    %set/v v0x92ab10_0, 0, 1;
3061 
    %jmp T_43.30;
3062 
T_43.26 ;
3063 
    %load/v 8, v0x93aa70_0, 1;
3064 
    %cmpi/u 8, 0, 1;
3065 
    %inv 4, 1;
3066 
    %mov 8, 4, 1;
3067 
    %set/v v0x92ab10_0, 8, 1;
3068 
    %jmp T_43.30;
3069 
T_43.27 ;
3070 
    %set/v v0x92ab10_0, 1, 1;
3071 
    %jmp T_43.30;
3072 
T_43.28 ;
3073 
    %ix/load 1, 31, 0;
3074 
    %mov 4, 0, 1;
3075 
    %load/x1p 8, v0x92a860_0, 1;
3076 
; Save base=8 wid=1 in lookaside.
3077 
    %set/v v0x92ab10_0, 8, 1;
3078 
    %jmp T_43.30;
3079 
T_43.30 ;
3080 
    %load/v 8, v0x92a860_0, 32;
3081 
    %set/v v0x92eda0_0, 8, 32;
3082 
    %load/v 8, v0x92a920_0, 32;
3083 
    %set/v v0x92eee0_0, 8, 32;
3084 
    %load/v 8, v0x92ab10_0, 1;
3085 
    %set/v v0x92f0e0_0, 8, 1;
3086 
    %fork TD_TopBench.MYHDL51_add, S_0x92eb20;
3087 
    %join;
3088 
    %load/v  8, v0x92ece0_0, 33;
3089 
    %set/v v0x92b7a0_0, 8, 33;
3090 
    %load/v 8, v0x93b7e0_0, 4;
3091 
    %cmp/z 8, 0, 4;
3092 
    %jmp/1 T_43.31, 4;
3093 
    %movi 12, 1, 4;
3094 
    %cmp/z 8, 12, 4;
3095 
    %jmp/1 T_43.32, 4;
3096 
    %movi 12, 2, 4;
3097 
    %cmp/z 8, 12, 4;
3098 
    %jmp/1 T_43.33, 4;
3099 
    %movi 12, 3, 4;
3100 
    %cmp/z 8, 12, 4;
3101 
    %jmp/1 T_43.34, 4;
3102 
    %movi 12, 4, 4;
3103 
    %cmp/z 8, 12, 4;
3104 
    %jmp/1 T_43.35, 4;
3105 
    %movi 12, 5, 4;
3106 
    %cmp/z 8, 12, 4;
3107 
    %jmp/1 T_43.36, 4;
3108 
    %movi 12, 6, 4;
3109 
    %cmp/z 8, 12, 4;
3110 
    %jmp/1 T_43.37, 4;
3111 
    %set/v v0x92b850_0, 0, 33;
3112 
    %jmp T_43.39;
3113 
T_43.31 ;
3114 
    %load/v 8, v0x92b7a0_0, 33;
3115 
    %set/v v0x92b850_0, 8, 33;
3116 
    %jmp T_43.39;
3117 
T_43.32 ;
3118 
    %set/v v0x92b330_0, 0, 32;
3119 
    %load/v 8, v0x92a860_0, 32;
3120 
    %load/v 40, v0x92a920_0, 32;
3121 
    %or 8, 40, 32;
3122 
    %set/v v0x92b330_0, 8, 32;
3123 
    %load/v 8, v0x92b330_0, 32;
3124 
    %mov 40, 0, 1;
3125 
    %set/v v0x92b850_0, 8, 33;
3126 
    %jmp T_43.39;
3127 
T_43.33 ;
3128 
    %set/v v0x92a9c0_0, 0, 32;
3129 
    %load/v 8, v0x92a860_0, 32;
3130 
    %load/v 40, v0x92a920_0, 32;
3131 
    %and 8, 40, 32;
3132 
    %set/v v0x92a9c0_0, 8, 32;
3133 
    %load/v 8, v0x92a9c0_0, 32;
3134 
    %mov 40, 0, 1;
3135 
    %set/v v0x92b850_0, 8, 33;
3136 
    %jmp T_43.39;
3137 
T_43.34 ;
3138 
    %set/v v0x92bc60_0, 0, 32;
3139 
    %load/v 8, v0x92a860_0, 32;
3140 
    %load/v 40, v0x92a920_0, 32;
3141 
    %xor 8, 40, 32;
3142 
    %set/v v0x92bc60_0, 8, 32;
3143 
    %load/v 8, v0x92bc60_0, 32;
3144 
    %mov 40, 0, 1;
3145 
    %set/v v0x92b850_0, 8, 33;
3146 
    %jmp T_43.39;
3147 
T_43.35 ;
3148 
    %ix/load 1, 1, 0;
3149 
    %mov 4, 0, 1;
3150 
    %load/x1p 41, v0x92a860_0, 31;
3151 
    %mov 8, 41, 31; Move signal select into place
3152 
    %load/v 39, v0x92ab10_0, 1;
3153 
    %load/v 40, v0x92a860_0, 1; Select 1 out of 32 bits
3154 
    %set/v v0x92b850_0, 8, 33;
3155 
    %jmp T_43.39;
3156 
T_43.36 ;
3157 
    %load/v 41, v0x92a860_0, 32;
3158 
    %set/v v0x92ea40_0, 41, 32;
3159 
    %ix/load 1, 7, 0;
3160 
    %mov 4, 0, 1;
3161 
    %load/x1p 41, v0x92a860_0, 1;
3162 
; Save base=41 wid=1 in lookaside.
3163 
    %set/v v0x92e7e0_0, 41, 1;
3164 
    %fork TD_TopBench.MYHDL55_sign_extend8, S_0x92e560;
3165 
    %join;
3166 
    %load/v  41, v0x92e720_0, 32;
3167 
    %mov 8, 41, 32;
3168 
    %mov 40, 0, 1;
3169 
    %set/v v0x92b850_0, 8, 33;
3170 
    %jmp T_43.39;
3171 
T_43.37 ;
3172 
    %load/v 41, v0x92a860_0, 32;
3173 
    %set/v v0x92e480_0, 41, 32;
3174 
    %ix/load 1, 15, 0;
3175 
    %mov 4, 0, 1;
3176 
    %load/x1p 41, v0x92a860_0, 1;
3177 
; Save base=41 wid=1 in lookaside.
3178 
    %set/v v0x92e260_0, 41, 1;
3179 
    %fork TD_TopBench.MYHDL61_sign_extend16, S_0x92e020;
3180 
    %join;
3181 
    %load/v  41, v0x92e1e0_0, 32;
3182 
    %mov 8, 41, 32;
3183 
    %mov 40, 0, 1;
3184 
    %set/v v0x92b850_0, 8, 33;
3185 
    %jmp T_43.39;
3186 
T_43.39 ;
3187 
    %load/v 8, v0x93bb00_0, 1;
3188 
    %jmp/0xz  T_43.40, 8;
3189 
    %load/v 8, v0x93aa70_0, 1;
3190 
    %cmpi/u 8, 0, 1;
3191 
    %inv 4, 1;
3192 
    %mov 8, 4, 1;
3193 
    %set/v v0x92b520_0, 8, 1;
3194 
    %jmp T_43.41;
3195 
T_43.40 ;
3196 
    %ix/load 1, 32, 0;
3197 
    %mov 4, 0, 1;
3198 
    %load/x1p 8, v0x92b850_0, 1;
3199 
; Save base=8 wid=1 in lookaside.
3200 
    %set/v v0x92b520_0, 8, 1;
3201 
T_43.41 ;
3202 
    %load/v 8, v0x93b070_0, 1;
3203 
    %inv 8, 1;
3204 
    %jmp/0xz  T_43.42, 8;
3205 
    %load/v 8, v0x92ac90_0, 32;
3206 
    %cmpi/u 8, 0, 32;
3207 
    %mov 8, 4, 1;
3208 
    %set/v v0x92bba0_0, 8, 1;
3209 
    %load/v 8, v0x93b9c0_0, 3;
3210 
    %movi 11, 6, 3;
3211 
    %cmp/z 8, 11, 3;
3212 
    %jmp/1 T_43.44, 4;
3213 
    %cmp/z 8, 0, 3;
3214 
    %jmp/1 T_43.45, 4;
3215 
    %movi 11, 1, 3;
3216 
    %cmp/z 8, 11, 3;
3217 
    %jmp/1 T_43.46, 4;
3218 
    %movi 11, 2, 3;
3219 
    %cmp/z 8, 11, 3;
3220 
    %jmp/1 T_43.47, 4;
3221 
    %movi 11, 3, 3;
3222 
    %cmp/z 8, 11, 3;
3223 
    %jmp/1 T_43.48, 4;
3224 
    %movi 11, 4, 3;
3225 
    %cmp/z 8, 11, 3;
3226 
    %jmp/1 T_43.49, 4;
3227 
    %movi 11, 5, 3;
3228 
    %cmp/z 8, 11, 3;
3229 
    %jmp/1 T_43.50, 4;
3230 
    %set/v v0x92aa60_0, 0, 1;
3231 
    %jmp T_43.52;
3232 
T_43.44 ;
3233 
    %set/v v0x92aa60_0, 1, 1;
3234 
    %jmp T_43.52;
3235 
T_43.45 ;
3236 
    %load/v 8, v0x92bba0_0, 1;
3237 
    %set/v v0x92aa60_0, 8, 1;
3238 
    %jmp T_43.52;
3239 
T_43.46 ;
3240 
    %load/v 8, v0x92bba0_0, 1;
3241 
    %inv 8, 1;
3242 
    %set/v v0x92aa60_0, 8, 1;
3243 
    %jmp T_43.52;
3244 
T_43.47 ;
3245 
    %ix/load 1, 31, 0;
3246 
    %mov 4, 0, 1;
3247 
    %load/x1p 8, v0x92ac90_0, 1;
3248 
; Save base=8 wid=1 in lookaside.
3249 
    %set/v v0x92aa60_0, 8, 1;
3250 
    %jmp T_43.52;
3251 
T_43.48 ;
3252 
    %ix/load 1, 31, 0;
3253 
    %mov 4, 0, 1;
3254 
    %load/x1p 8, v0x92ac90_0, 1;
3255 
; Save base=8 wid=1 in lookaside.
3256 
    %load/v 9, v0x92bba0_0, 1;
3257 
    %or 8, 9, 1;
3258 
    %set/v v0x92aa60_0, 8, 1;
3259 
    %jmp T_43.52;
3260 
T_43.49 ;
3261 
    %ix/load 1, 31, 0;
3262 
    %mov 4, 0, 1;
3263 
    %load/x1p 8, v0x92ac90_0, 1;
3264 
; Save base=8 wid=1 in lookaside.
3265 
    %load/v 9, v0x92bba0_0, 1;
3266 
    %or 8, 9, 1;
3267 
    %inv 8, 1;
3268 
    %set/v v0x92aa60_0, 8, 1;
3269 
    %jmp T_43.52;
3270 
T_43.50 ;
3271 
    %ix/load 1, 31, 0;
3272 
    %mov 4, 0, 1;
3273 
    %load/x1p 8, v0x92ac90_0, 1;
3274 
; Save base=8 wid=1 in lookaside.
3275 
    %inv 8, 1;
3276 
    %set/v v0x92aa60_0, 8, 1;
3277 
    %jmp T_43.52;
3278 
T_43.52 ;
3279 
T_43.42 ;
3280 
    %ix/load 1, 31, 0;
3281 
    %mov 4, 0, 1;
3282 
    %load/x1p 8, v0x92a860_0, 1;
3283 
; Save base=8 wid=1 in lookaside.
3284 
    %ix/load 1, 31, 0;
3285 
    %mov 4, 0, 1;
3286 
    %load/x1p 9, v0x92a920_0, 1;
3287 
; Save base=9 wid=1 in lookaside.
3288 
    %xor 8, 9, 1;
3289 
    %set/v v0x92abb0_0, 8, 1;
3290 
    %load/v 8, v0x93c050_0, 1;
3291 
    %load/v 9, v0x92abb0_0, 1;
3292 
    %and 8, 9, 1;
3293 
    %jmp/0xz  T_43.53, 8;
3294 
    %ix/load 1, 31, 0;
3295 
    %mov 4, 0, 1;
3296 
    %load/x1p 8, v0x92a860_0, 1;
3297 
; Save base=8 wid=1 in lookaside.
3298 
    %set/v v0x92b210_0, 8, 1;
3299 
    %load/v 8, v0x92b850_0, 31; Select 31 out of 33 bits
3300 
    %load/v 39, v0x92b210_0, 1;
3301 
    %set/v v0x92b290_0, 8, 32;
3302 
    %jmp T_43.54;
3303 
T_43.53 ;
3304 
    %load/v 8, v0x92b850_0, 32; Only need 32 of 33 bits
3305 
; Save base=8 wid=32 in lookaside.
3306 
    %set/v v0x92b290_0, 8, 32;
3307 
T_43.54 ;
3308 
    %load/v 8, v0x93c7e0_0, 16;
3309 
    %set/v v0x92b3d0_0, 8, 16;
3310 
    %load/v 8, v0x92aa60_0, 1;
3311 
    %set/v v0x92aec0_0, 8, 1;
3312 
    %load/v 8, v0x92aa60_0, 1;
3313 
    %load/v 9, v0x93c150_0, 1;
3314 
    %inv 9, 1;
3315 
    %and 8, 9, 1;
3316 
    %set/v v0x92b660_0, 8, 1;
3317 
    %load/v 8, v0x92b520_0, 1;
3318 
    %ix/load 0, 1, 0;
3319 
    %assign/v0 v0x93a4c0_0, 0, 8;
3320 
    %load/v 8, v0x92b660_0, 1;
3321 
    %ix/load 0, 1, 0;
3322 
    %assign/v0 v0x93a560_0, 0, 8;
3323 
    %load/v 8, v0x92b290_0, 32;
3324 
    %ix/load 0, 32, 0;
3325 
    %assign/v0 v0x93a420_0, 0, 8;
3326 
    %load/v 8, v0x92b700_0, 5;
3327 
    %ix/load 0, 5, 0;
3328 
    %assign/v0 v0x93ab80_0, 0, 8;
3329 
    %load/v 8, v0x92b5c0_0, 1;
3330 
    %ix/load 0, 1, 0;
3331 
    %assign/v0 v0x93a750_0, 0, 8;
3332 
    %load/v 8, v0x92aa60_0, 1;
3333 
    %ix/load 0, 1, 0;
3334 
    %assign/v0 v0x93a010_0, 0, 8;
3335 
    %load/v 8, v0x92ae20_0, 32;
3336 
    %ix/load 0, 32, 0;
3337 
    %assign/v0 v0x93a650_0, 0, 8;
3338 
    %load/v 8, v0x92aec0_0, 1;
3339 
    %ix/load 0, 1, 0;
3340 
    %assign/v0 v0x93a6d0_0, 0, 8;
3341 
    %load/v 8, v0x92afc0_0, 1;
3342 
    %ix/load 0, 1, 0;
3343 
    %assign/v0 v0x93a260_0, 0, 8;
3344 
    %load/v 8, v0x92b170_0, 1;
3345 
    %ix/load 0, 1, 0;
3346 
    %assign/v0 v0x93a2e0_0, 0, 8;
3347 
    %load/v 8, v0x92b3d0_0, 16;
3348 
    %ix/load 0, 16, 0;
3349 
    %assign/v0 v0x93a380_0, 0, 8;
3350 
    %load/v 8, v0x92ba50_0, 2;
3351 
    %ix/load 0, 2, 0;
3352 
    %assign/v0 v0x93a930_0, 0, 8;
3353 
    %load/v 8, v0x92ac90_0, 32;
3354 
    %ix/load 0, 32, 0;
3355 
    %assign/v0 v0x93a0b0_0, 0, 8;
3356 
    %load/v 8, v0x92ad30_0, 32;
3357 
    %ix/load 0, 32, 0;
3358 
    %assign/v0 v0x93a150_0, 0, 8;
3359 
    %load/v 8, v0x93be70_0, 32;
3360 
    %ix/load 0, 32, 0;
3361 
    %assign/v0 v0x935e60_0, 0, 8;
3362 
    %load/v 8, v0x93c860_0, 5;
3363 
    %ix/load 0, 5, 0;
3364 
    %assign/v0 v0x93a7f0_0, 0, 8;
3365 
    %load/v 8, v0x93c250_0, 5;
3366 
    %ix/load 0, 5, 0;
3367 
    %assign/v0 v0x93a890_0, 0, 8;
3368 
    %end;
3369 
t_97 %join;
3370 
    %jmp T_43;
3371 
    .thread T_43, $push;
3372 
    .scope S_0x8ca510;
3373 
T_44 ;
3374 
    %wait E_0x8dad90;
3375 
    %fork t_100, S_0x92a6a0;
3376 
    %jmp t_99;
3377 
t_100 ;
3378 
    %load/v 8, v0x938010_0, 1;
3379 
    %jmp/0xz  T_44.0, 8;
3380 
    %ix/load 0, 1, 0;
3381 
    %assign/v0 v0x93aa70_0, 0, 0;
3382 
    %ix/load 0, 1, 0;
3383 
    %assign/v0 v0x93b070_0, 0, 0;
3384 
    %ix/load 0, 32, 0;
3385 
    %assign/v0 v0x93a9d0_0, 0, 0;
3386 
    %ix/load 0, 5, 0;
3387 
    %assign/v0 v0x93b0f0_0, 0, 0;
3388 
    %ix/load 0, 1, 0;
3389 
    %assign/v0 v0x93ac00_0, 0, 0;
3390 
    %ix/load 0, 1, 0;
3391 
    %assign/v0 v0x939700_0, 0, 0;
3392 
    %ix/load 0, 32, 0;
3393 
    %assign/v0 v0x9398e0_0, 0, 0;
3394 
    %ix/load 0, 1, 0;
3395 
    %assign/v0 v0x939db0_0, 0, 0;
3396 
    %ix/load 0, 1, 0;
3397 
    %assign/v0 v0x939ad0_0, 0, 0;
3398 
    %ix/load 0, 1, 0;
3399 
    %assign/v0 v0x939b70_0, 0, 0;
3400 
    %ix/load 0, 16, 0;
3401 
    %assign/v0 v0x939c10_0, 0, 0;
3402 
    %ix/load 0, 2, 0;
3403 
    %assign/v0 v0x939f70_0, 0, 0;
3404 
    %jmp T_44.1;
3405 
T_44.0 ;
3406 
    %load/v 8, v0x93cd90_0, 1;
3407 
    %jmp/0xz  T_44.2, 8;
3408 
    %load/v 8, v0x93a4c0_0, 1;
3409 
    %ix/load 0, 1, 0;
3410 
    %assign/v0 v0x93aa70_0, 0, 8;
3411 
    %load/v 8, v0x93a560_0, 1;
3412 
    %ix/load 0, 1, 0;
3413 
    %assign/v0 v0x93b070_0, 0, 8;
3414 
    %load/v 8, v0x93a420_0, 32;
3415 
    %ix/load 0, 32, 0;
3416 
    %assign/v0 v0x93a9d0_0, 0, 8;
3417 
    %load/v 8, v0x93ab80_0, 5;
3418 
    %ix/load 0, 5, 0;
3419 
    %assign/v0 v0x93b0f0_0, 0, 8;
3420 
    %load/v 8, v0x93a750_0, 1;
3421 
    %ix/load 0, 1, 0;
3422 
    %assign/v0 v0x93ac00_0, 0, 8;
3423 
    %load/v 8, v0x93a010_0, 1;
3424 
    %ix/load 0, 1, 0;
3425 
    %assign/v0 v0x939700_0, 0, 8;
3426 
    %load/v 8, v0x93a650_0, 32;
3427 
    %ix/load 0, 32, 0;
3428 
    %assign/v0 v0x9398e0_0, 0, 8;
3429 
    %load/v 8, v0x93a6d0_0, 1;
3430 
    %ix/load 0, 1, 0;
3431 
    %assign/v0 v0x939db0_0, 0, 8;
3432 
    %load/v 8, v0x93a260_0, 1;
3433 
    %ix/load 0, 1, 0;
3434 
    %assign/v0 v0x939ad0_0, 0, 8;
3435 
    %load/v 8, v0x93a2e0_0, 1;
3436 
    %ix/load 0, 1, 0;
3437 
    %assign/v0 v0x939b70_0, 0, 8;
3438 
    %load/v 8, v0x93a380_0, 16;
3439 
    %ix/load 0, 16, 0;
3440 
    %assign/v0 v0x939c10_0, 0, 8;
3441 
    %load/v 8, v0x93a930_0, 2;
3442 
    %ix/load 0, 2, 0;
3443 
    %assign/v0 v0x939f70_0, 0, 8;
3444 
    %load/v 8, v0x93a0b0_0, 32;
3445 
    %ix/load 0, 32, 0;
3446 
    %assign/v0 v0x9397a0_0, 0, 8;
3447 
    %load/v 8, v0x93a150_0, 32;
3448 
    %ix/load 0, 32, 0;
3449 
    %assign/v0 v0x939840_0, 0, 8;
3450 
    %load/v 8, v0x935e60_0, 32;
3451 
    %ix/load 0, 32, 0;
3452 
    %assign/v0 v0x939a30_0, 0, 8;
3453 
    %load/v 8, v0x93a7f0_0, 5;
3454 
    %ix/load 0, 5, 0;
3455 
    %assign/v0 v0x939cb0_0, 0, 8;
3456 
    %load/v 8, v0x93a890_0, 5;
3457 
    %ix/load 0, 5, 0;
3458 
    %assign/v0 v0x93a1e0_0, 0, 8;
3459 
T_44.2 ;
3460 
T_44.1 ;
3461 
    %end;
3462 
t_99 %join;
3463 
    %jmp T_44;
3464 
    .thread T_44;
3465 
    .scope S_0x8ca510;
3466 
T_45 ;
3467 
    %wait E_0x8dad90;
3468 
    %fork t_102, S_0x92a5c0;
3469 
    %jmp t_101;
3470 
t_102 ;
3471 
    %load/v 8, v0x938010_0, 1;
3472 
    %jmp/0xz  T_45.0, 8;
3473 
    %ix/load 0, 1, 0;
3474 
    %assign/v0 v0x93fe10_0, 0, 0;
3475 
    %ix/load 0, 1, 0;
3476 
    %assign/v0 v0x93f570_0, 0, 0;
3477 
    %movi 8, 1, 32;
3478 
    %ix/load 0, 32, 0;
3479 
    %assign/v0 v0x93d9b0_0, 0, 8;
3480 
    %movi 8, 1, 32;
3481 
    %ix/load 0, 32, 0;
3482 
    %assign/v0 v0x93d910_0, 0, 8;
3483 
    %ix/load 0, 32, 0;
3484 
    %assign/v0 v0x93d5f0_0, 0, 0;
3485 
    %ix/load 0, 4, 0;
3486 
    %assign/v0 v0x93d7d0_0, 0, 0;
3487 
    %ix/load 0, 1, 0;
3488 
    %assign/v0 v0x93da50_0, 0, 0;
3489 
    %ix/load 0, 1, 0;
3490 
    %assign/v0 v0x93ed40_0, 0, 1;
3491 
    %ix/load 0, 1, 0;
3492 
    %assign/v0 v0x93daf0_0, 0, 0;
3493 
    %ix/load 0, 1, 0;
3494 
    %assign/v0 v0x93ede0_0, 0, 1;
3495 
    %ix/load 0, 20, 0;
3496 
    %assign/v0 v0x93c4b0_0, 0, 0;
3497 
    %jmp T_45.1;
3498 
T_45.0 ;
3499 
    %load/v 8, v0x93f100_0, 1;
3500 
    %ix/load 0, 1, 0;
3501 
    %assign/v0 v0x93fe10_0, 0, 8;
3502 
    %load/v 8, v0x938390_0, 1;
3503 
    %ix/load 0, 1, 0;
3504 
    %assign/v0 v0x93ed40_0, 0, 8;
3505 
    %load/v 8, v0x93f1a0_0, 1;
3506 
    %ix/load 0, 1, 0;
3507 
    %assign/v0 v0x93f570_0, 0, 8;
3508 
    %load/v 8, v0x938150_0, 1;
3509 
    %ix/load 0, 1, 0;
3510 
    %assign/v0 v0x93ede0_0, 0, 8;
3511 
    %ix/load 0, 1, 0;
3512 
    %assign/v0 v0x93da50_0, 0, 0;
3513 
    %load/v 8, v0x93c4b0_0, 20;
3514 
    %mov 28, 0, 12;
3515 
   %addi 8, 1, 32;
3516 
    %movi 40, 1048576, 32;
3517 
    %mod 8, 40, 32;
3518 
    %ix/load 0, 20, 0;
3519 
    %assign/v0 v0x93c4b0_0, 0, 8;
3520 
    %load/v 8, v0x93c4b0_0, 20;
3521 
    %cmpi/u 8, 0, 20;
3522 
    %jmp/0xz  T_45.2, 4;
3523 
    %ix/load 1, 31, 0;
3524 
    %mov 4, 0, 1;
3525 
    %load/x1p 40, v0x93d910_0, 1;
3526 
    %mov 8, 40, 1; Move signal select into place
3527 
    %load/v 9, v0x93d910_0, 31; Select 31 out of 32 bits
3528 
    %ix/load 0, 32, 0;
3529 
    %assign/v0 v0x93d910_0, 0, 8;
3530 
T_45.2 ;
3531 
    %load/v 8, v0x93d080_0, 16;
3532 
    %cmpi/u 8, 580, 16;
3533 
    %jmp/0xz  T_45.4, 4;
3534 
    %movi 8, 255, 32;
3535 
    %ix/load 0, 32, 0;
3536 
    %assign/v0 v0x93d9b0_0, 0, 8;
3537 
T_45.4 ;
3538 
T_45.1 ;
3539 
    %end;
3540 
t_101 %join;
3541 
    %jmp T_45;
3542 
    .thread T_45;
3543 
    .scope S_0x8ca510;
3544 
T_46 ;
3545 
    %wait E_0x8dad90;
3546 
    %fork t_104, S_0x92a4e0;
3547 
    %jmp t_103;
3548 
t_104 ;
3549 
    %load/v 8, v0x93ed40_0, 1;
3550 
    %ix/load 0, 1, 0;
3551 
    %assign/v0 v0x93f2e0_0, 0, 8;
3552 
    %load/v 8, v0x93f2e0_0, 1;
3553 
    %ix/load 0, 1, 0;
3554 
    %assign/v0 v0x93f380_0, 0, 8;
3555 
    %end;
3556 
t_103 %join;
3557 
    %jmp T_46;
3558 
    .thread T_46;
3559 
    .scope S_0x8ca510;
3560 
T_47 ;
3561 
    %wait E_0x8dad90;
3562 
    %fork t_106, S_0x92a400;
3563 
    %jmp t_105;
3564 
t_106 ;
3565 
    %load/v 8, v0x938010_0, 1;
3566 
    %load/v 9, v0x93e9d0_0, 1;
3567 
    %or 8, 9, 1;
3568 
    %jmp/0xz  T_47.0, 8;
3569 
    %movi 8, 26, 16;
3570 
    %ix/load 0, 16, 0;
3571 
    %assign/v0 v0x93ea70_0, 0, 8;
3572 
    %jmp T_47.1;
3573 
T_47.0 ;
3574 
    %load/v 8, v0x93ea70_0, 16;
3575 
    %mov 24, 0, 16;
3576 
    %subi 8, 1, 32;
3577 
    %ix/load 0, 16, 0;
3578 
    %assign/v0 v0x93ea70_0, 0, 8;
3579 
T_47.1 ;
3580 
    %end;
3581 
t_105 %join;
3582 
    %jmp T_47;
3583 
    .thread T_47;
3584 
    .scope S_0x8ca510;
3585 
T_48 ;
3586 
    %wait E_0x8dad90;
3587 
    %fork t_108, S_0x92a320;
3588 
    %jmp t_107;
3589 
t_108 ;
3590 
    %load/v 8, v0x938010_0, 1;
3591 
    %jmp/0xz  T_48.0, 8;
3592 
    %ix/load 0, 4, 0;
3593 
    %assign/v0 v0x93ebb0_0, 0, 0;
3594 
    %ix/load 0, 1, 0;
3595 
    %assign/v0 v0x93db90_0, 0, 0;
3596 
    %ix/load 0, 1, 0;
3597 
    %assign/v0 v0x93de20_0, 0, 0;
3598 
    %ix/load 0, 1, 0;
3599 
    %assign/v0 v0x93f4f0_0, 0, 0;
3600 
    %jmp T_48.1;
3601 
T_48.0 ;
3602 
    %load/v 8, v0x93da50_0, 1;
3603 
    %jmp/0xz  T_48.2, 8;
3604 
    %ix/load 0, 1, 0;
3605 
    %assign/v0 v0x93db90_0, 0, 0;
3606 
    %ix/load 0, 1, 0;
3607 
    %assign/v0 v0x93de20_0, 0, 0;
3608 
T_48.2 ;
3609 
    %load/v 8, v0x93e9d0_0, 1;
3610 
    %jmp/0xz  T_48.4, 8;
3611 
    %load/v 8, v0x93f4f0_0, 1;
3612 
    %inv 8, 1;
3613 
    %jmp/0xz  T_48.6, 8;
3614 
    %load/v 8, v0x93f380_0, 1;
3615 
    %inv 8, 1;
3616 
    %jmp/0xz  T_48.8, 8;
3617 
    %ix/load 0, 1, 0;
3618 
    %assign/v0 v0x93f4f0_0, 0, 1;
3619 
    %movi 8, 7, 4;
3620 
    %ix/load 0, 4, 0;
3621 
    %assign/v0 v0x93ebb0_0, 0, 8;
3622 
    %ix/load 0, 4, 0;
3623 
    %assign/v0 v0x93eb10_0, 0, 0;
3624 
T_48.8 ;
3625 
    %jmp T_48.7;
3626 
T_48.6 ;
3627 
    %load/v 8, v0x93ebb0_0, 4;
3628 
    %mov 12, 0, 28;
3629 
   %addi 8, 1, 32;
3630 
    %movi 40, 16, 32;
3631 
    %mod 8, 40, 32;
3632 
    %ix/load 0, 4, 0;
3633 
    %assign/v0 v0x93ebb0_0, 0, 8;
3634 
    %load/v 8, v0x93ebb0_0, 4;
3635 
    %cmpi/u 8, 0, 4;
3636 
    %jmp/0xz  T_48.10, 4;
3637 
    %load/v 8, v0x93eb10_0, 4;
3638 
    %mov 12, 0, 28;
3639 
   %addi 8, 1, 32;
3640 
    %movi 40, 16, 32;
3641 
    %mod 8, 40, 32;
3642 
    %ix/load 0, 4, 0;
3643 
    %assign/v0 v0x93eb10_0, 0, 8;
3644 
    %load/v 8, v0x93eb10_0, 4;
3645 
    %cmpi/u 8, 0, 4;
3646 
    %jmp/0xz  T_48.12, 4;
3647 
    %load/v 8, v0x93f380_0, 1;
3648 
    %jmp/0xz  T_48.14, 8;
3649 
    %ix/load 0, 1, 0;
3650 
    %assign/v0 v0x93f4f0_0, 0, 0;
3651 
T_48.14 ;
3652 
    %jmp T_48.13;
3653 
T_48.12 ;
3654 
    %load/v 8, v0x93eb10_0, 4;
3655 
    %mov 12, 0, 1;
3656 
    %cmpi/u 8, 9, 5;
3657 
    %jmp/0xz  T_48.16, 4;
3658 
    %ix/load 0, 1, 0;
3659 
    %assign/v0 v0x93f4f0_0, 0, 0;
3660 
    %load/v 8, v0x93f380_0, 1;
3661 
    %jmp/0xz  T_48.18, 8;
3662 
    %load/v 8, v0x93ee80_0, 8;
3663 
    %mov 16, 0, 24;
3664 
    %ix/load 0, 32, 0;
3665 
    %assign/v0 v0x93e4f0_0, 0, 8;
3666 
    %ix/load 0, 1, 0;
3667 
    %assign/v0 v0x93db90_0, 0, 1;
3668 
    %ix/load 0, 1, 0;
3669 
    %assign/v0 v0x93de20_0, 0, 0;
3670 
    %jmp T_48.19;
3671 
T_48.18 ;
3672 
    %ix/load 0, 1, 0;
3673 
    %assign/v0 v0x93de20_0, 0, 1;
3674 
T_48.19 ;
3675 
    %jmp T_48.17;
3676 
T_48.16 ;
3677 
    %ix/load 1, 1, 0;
3678 
    %mov 4, 0, 1;
3679 
    %load/x1p 16, v0x93ee80_0, 7;
3680 
    %mov 8, 16, 7; Move signal select into place
3681 
    %load/v 15, v0x93f380_0, 1;
3682 
    %ix/load 0, 8, 0;
3683 
    %assign/v0 v0x93ee80_0, 0, 8;
3684 
T_48.17 ;
3685 
T_48.13 ;
3686 
T_48.10 ;
3687 
T_48.7 ;
3688 
T_48.4 ;
3689 
T_48.1 ;
3690 
    %end;
3691 
t_107 %join;
3692 
    %jmp T_48;
3693 
    .thread T_48;
3694 
    .scope S_0x8ca510;
3695 
T_49 ;
3696 
    %wait E_0x8dad90;
3697 
    %fork t_110, S_0x92a240;
3698 
    %jmp t_109;
3699 
t_110 ;
3700 
    %load/v 8, v0x938010_0, 1;
3701 
    %jmp/0xz  T_49.0, 8;
3702 
    %ix/load 0, 1, 0;
3703 
    %assign/v0 v0x93f060_0, 0, 0;
3704 
    %ix/load 0, 1, 0;
3705 
    %assign/v0 v0x93f100_0, 0, 1;
3706 
    %ix/load 0, 4, 0;
3707 
    %assign/v0 v0x93efc0_0, 0, 0;
3708 
    %jmp T_49.1;
3709 
T_49.0 ;
3710 
    %load/v 8, v0x93f420_0, 1;
3711 
    %load/v 9, v0x93f060_0, 1;
3712 
    %inv 9, 1;
3713 
    %and 8, 9, 1;
3714 
    %jmp/0xz  T_49.2, 8;
3715 
    %mov 8, 0, 1;
3716 
    %load/v 9, v0x93e0a0_0, 8; Select 8 out of 32 bits
3717 
    %ix/load 0, 9, 0;
3718 
    %assign/v0 v0x93f240_0, 0, 8;
3719 
    %movi 8, 10, 4;
3720 
    %ix/load 0, 4, 0;
3721 
    %assign/v0 v0x93ef20_0, 0, 8;
3722 
    %ix/load 0, 4, 0;
3723 
    %assign/v0 v0x93efc0_0, 0, 0;
3724 
    %ix/load 0, 1, 0;
3725 
    %assign/v0 v0x93f060_0, 0, 1;
3726 
T_49.2 ;
3727 
    %load/v 8, v0x93e9d0_0, 1;
3728 
    %jmp/0xz  T_49.4, 8;
3729 
    %load/v 8, v0x93efc0_0, 4;
3730 
    %mov 12, 0, 28;
3731 
   %addi 8, 1, 32;
3732 
    %movi 40, 16, 32;
3733 
    %mod 8, 40, 32;
3734 
    %ix/load 0, 4, 0;
3735 
    %assign/v0 v0x93efc0_0, 0, 8;
3736 
    %load/v 8, v0x93efc0_0, 4;
3737 
    %cmpi/u 8, 0, 4;
3738 
    %mov 8, 4, 1;
3739 
    %load/v 9, v0x93f060_0, 1;
3740 
    %and 8, 9, 1;
3741 
    %jmp/0xz  T_49.6, 8;
3742 
    %load/v 8, v0x93ef20_0, 4;
3743 
    %mov 12, 0, 28;
3744 
    %subi 8, 1, 32;
3745 
    %ix/load 0, 4, 0;
3746 
    %assign/v0 v0x93ef20_0, 0, 8;
3747 
    %load/v 8, v0x93ef20_0, 4;
3748 
    %cmpi/u 8, 0, 4;
3749 
    %jmp/0xz  T_49.8, 4;
3750 
    %ix/load 0, 1, 0;
3751 
    %assign/v0 v0x93f060_0, 0, 0;
3752 
    %jmp T_49.9;
3753 
T_49.8 ;
3754 
    %load/v 8, v0x93f240_0, 1; Only need 1 of 9 bits
3755 
; Save base=8 wid=1 in lookaside.
3756 
    %ix/load 0, 1, 0;
3757 
    %assign/v0 v0x93f100_0, 0, 8;
3758 
    %ix/load 1, 1, 0;
3759 
    %mov 4, 0, 1;
3760 
    %load/x1p 17, v0x93f240_0, 8;
3761 
    %mov 8, 17, 8; Move signal select into place
3762 
    %mov 16, 1, 1;
3763 
    %ix/load 0, 9, 0;
3764 
    %assign/v0 v0x93f240_0, 0, 8;
3765 
T_49.9 ;
3766 
T_49.6 ;
3767 
T_49.4 ;
3768 
T_49.1 ;
3769 
    %end;
3770 
t_109 %join;
3771 
    %jmp T_49;
3772 
    .thread T_49;
3773 
    .scope S_0x8ca510;
3774 
T_50 ;
3775 
    %wait E_0x8dad90;
3776 
    %fork t_112, S_0x92a160;
3777 
    %jmp t_111;
3778 
t_112 ;
3779 
    %load/v 8, v0x93ccf0_0, 1;
3780 
    %jmp/0xz  T_50.0, 8;
3781 
    %ix/load 3, 0, 0;
3782 
    %mov 4, 0, 1;
3783 
    %load/av 8, v0x93cb30, 1;
3784 
    %jmp/0xz  T_50.2, 8;
3785 
    %ix/load 3, 0, 0;
3786 
    %mov 4, 0, 1;
3787 
    %load/av 8, v0x93c980, 8;
3788 
    %ix/getv 3, v0x93c8e0_0;
3789 
    %jmp/1 t_113, 4;
3790 
    %ix/load 0, 8, 0; word width
3791 
    %ix/load 1, 0, 0; part off
3792 
    %assign/av v0x93c5f0, 0, 8;
3793 
t_113 ;
3794 
T_50.2 ;
3795 
    %load/v 16, v0x93c8e0_0, 30;
3796 
    %movi 46, 2048, 30;
3797 
    %mod 16, 46, 30;
3798 
    %ix/get 3, 16, 30;
3799 
    %load/av 8, v0x93c5f0, 8;
3800 
    %ix/load 3, 0, 0; address
3801 
    %ix/load 0, 8, 0; word width
3802 
    %ix/load 1, 0, 0; part off
3803 
    %assign/av v0x93ca00, 0, 8;
3804 
t_114 ;
3805 
T_50.0 ;
3806 
    %end;
3807 
t_111 %join;
3808 
    %jmp T_50;
3809 
    .thread T_50;
3810 
    .scope S_0x8ca510;
3811 
T_51 ;
3812 
    %vpi_call 2 1771 "$readmemh", "rom0.vmem", v0x93c5f0;
3813 
    %end;
3814 
    .thread T_51;
3815 
    .scope S_0x8ca510;
3816 
T_52 ;
3817 
    %wait E_0x8dad90;
3818 
    %fork t_116, S_0x92a080;
3819 
    %jmp t_115;
3820 
t_116 ;
3821 
    %load/v 8, v0x93ccf0_0, 1;
3822 
    %jmp/0xz  T_52.0, 8;
3823 
    %ix/load 3, 1, 0;
3824 
    %mov 4, 0, 1;
3825 
    %load/av 8, v0x93cb30, 1;
3826 
    %jmp/0xz  T_52.2, 8;
3827 
    %ix/load 3, 1, 0;
3828 
    %mov 4, 0, 1;
3829 
    %load/av 8, v0x93c980, 8;
3830 
    %ix/getv 3, v0x93c8e0_0;
3831 
    %jmp/1 t_117, 4;
3832 
    %ix/load 0, 8, 0; word width
3833 
    %ix/load 1, 0, 0; part off
3834 
    %assign/av v0x93c670, 0, 8;
3835 
t_117 ;
3836 
T_52.2 ;
3837 
    %load/v 16, v0x93c8e0_0, 30;
3838 
    %movi 46, 2048, 30;
3839 
    %mod 16, 46, 30;
3840 
    %ix/get 3, 16, 30;
3841 
    %load/av 8, v0x93c670, 8;
3842 
    %ix/load 3, 1, 0; address
3843 
    %ix/load 0, 8, 0; word width
3844 
    %ix/load 1, 0, 0; part off
3845 
    %assign/av v0x93ca00, 0, 8;
3846 
t_118 ;
3847 
T_52.0 ;
3848 
    %end;
3849 
t_115 %join;
3850 
    %jmp T_52;
3851 
    .thread T_52;
3852 
    .scope S_0x8ca510;
3853 
T_53 ;
3854 
    %vpi_call 2 1784 "$readmemh", "rom1.vmem", v0x93c670;
3855 
    %end;
3856 
    .thread T_53;
3857 
    .scope S_0x8ca510;
3858 
T_54 ;
3859 
    %wait E_0x8dad90;
3860 
    %fork t_120, S_0x929fa0;
3861 
    %jmp t_119;
3862 
t_120 ;
3863 
    %load/v 8, v0x93ccf0_0, 1;
3864 
    %jmp/0xz  T_54.0, 8;
3865 
    %ix/load 3, 2, 0;
3866 
    %mov 4, 0, 1;
3867 
    %load/av 8, v0x93cb30, 1;
3868 
    %jmp/0xz  T_54.2, 8;
3869 
    %ix/load 3, 2, 0;
3870 
    %mov 4, 0, 1;
3871 
    %load/av 8, v0x93c980, 8;
3872 
    %ix/getv 3, v0x93c8e0_0;
3873 
    %jmp/1 t_121, 4;
3874 
    %ix/load 0, 8, 0; word width
3875 
    %ix/load 1, 0, 0; part off
3876 
    %assign/av v0x93c6f0, 0, 8;
3877 
t_121 ;
3878 
T_54.2 ;
3879 
    %load/v 16, v0x93c8e0_0, 30;
3880 
    %movi 46, 2048, 30;
3881 
    %mod 16, 46, 30;
3882 
    %ix/get 3, 16, 30;
3883 
    %load/av 8, v0x93c6f0, 8;
3884 
    %ix/load 3, 2, 0; address
3885 
    %ix/load 0, 8, 0; word width
3886 
    %ix/load 1, 0, 0; part off
3887 
    %assign/av v0x93ca00, 0, 8;
3888 
t_122 ;
3889 
T_54.0 ;
3890 
    %end;
3891 
t_119 %join;
3892 
    %jmp T_54;
3893 
    .thread T_54;
3894 
    .scope S_0x8ca510;
3895 
T_55 ;
3896 
    %vpi_call 2 1797 "$readmemh", "rom2.vmem", v0x93c6f0;
3897 
    %end;
3898 
    .thread T_55;
3899 
    .scope S_0x8ca510;
3900 
T_56 ;
3901 
    %wait E_0x8dad90;
3902 
    %fork t_124, S_0x929ec0;
3903 
    %jmp t_123;
3904 
t_124 ;
3905 
    %load/v 8, v0x93ccf0_0, 1;
3906 
    %jmp/0xz  T_56.0, 8;
3907 
    %ix/load 3, 3, 0;
3908 
    %mov 4, 0, 1;
3909 
    %load/av 8, v0x93cb30, 1;
3910 
    %jmp/0xz  T_56.2, 8;
3911 
    %ix/load 3, 3, 0;
3912 
    %mov 4, 0, 1;
3913 
    %load/av 8, v0x93c980, 8;
3914 
    %ix/getv 3, v0x93c8e0_0;
3915 
    %jmp/1 t_125, 4;
3916 
    %ix/load 0, 8, 0; word width
3917 
    %ix/load 1, 0, 0; part off
3918 
    %assign/av v0x93cec0, 0, 8;
3919 
t_125 ;
3920 
T_56.2 ;
3921 
    %load/v 16, v0x93c8e0_0, 30;
3922 
    %movi 46, 2048, 30;
3923 
    %mod 16, 46, 30;
3924 
    %ix/get 3, 16, 30;
3925 
    %load/av 8, v0x93cec0, 8;
3926 
    %ix/load 3, 3, 0; address
3927 
    %ix/load 0, 8, 0; word width
3928 
    %ix/load 1, 0, 0; part off
3929 
    %assign/av v0x93ca00, 0, 8;
3930 
t_126 ;
3931 
T_56.0 ;
3932 
    %end;
3933 
t_123 %join;
3934 
    %jmp T_56;
3935 
    .thread T_56;
3936 
    .scope S_0x8ca510;
3937 
T_57 ;
3938 
    %vpi_call 2 1810 "$readmemh", "rom3.vmem", v0x93cec0;
3939 
    %end;
3940 
    .thread T_57;
3941 
    .scope S_0x8ca510;
3942 
T_58 ;
3943 
    %wait E_0x8dcf40;
3944 
    %fork t_128, S_0x929d20;
3945 
    %jmp t_127;
3946 
t_128 ;
3947 
    %ix/load 1, 2, 0;
3948 
    %mov 4, 0, 1;
3949 
    %load/x1p 8, v0x93c550_0, 30;
3950 
; Save base=8 wid=30 in lookaside.
3951 
    %ix/load 0, 30, 0;
3952 
    %assign/v0 v0x93c8e0_0, 0, 8;
3953 
    %set/v v0x929e00_0, 0, 32;
3954 
T_58.0 ;
3955 
    %load/v 8, v0x929e00_0, 32;
3956 
   %cmpi/s 8, 4, 32;
3957 
    %jmp/0xz T_58.1, 5;
3958 
    %ix/getv/s 1, v0x929e00_0;
3959 
    %load/x1p 8, v0x93d570_0, 1;
3960 
; Save base=8 wid=1 in lookaside.
3961 
    %ix/getv/s 3, v0x929e00_0;
3962 
    %jmp/1 t_129, 4;
3963 
    %ix/load 0, 1, 0; word width
3964 
    %ix/load 1, 0, 0; part off
3965 
    %assign/av v0x93cb30, 0, 8;
3966 
t_129 ;
3967 
    %ix/load 0, 1, 0;
3968 
    %load/vp0/s 8, v0x929e00_0, 32;
3969 
    %set/v v0x929e00_0, 8, 32;
3970 
    %jmp T_58.0;
3971 
T_58.1 ;
3972 
    %load/v 8, v0x93cc50_0, 8; Only need 8 of 32 bits
3973 
; Save base=8 wid=8 in lookaside.
3974 
    %ix/load 3, 0, 0; address
3975 
    %ix/load 0, 8, 0; word width
3976 
    %ix/load 1, 0, 0; part off
3977 
    %assign/av v0x93c980, 0, 8;
3978 
t_130 ;
3979 
    %ix/load 1, 8, 0;
3980 
    %mov 4, 0, 1;
3981 
    %load/x1p 8, v0x93cc50_0, 8;
3982 
; Save base=8 wid=8 in lookaside.
3983 
    %ix/load 3, 1, 0; address
3984 
    %ix/load 0, 8, 0; word width
3985 
    %ix/load 1, 0, 0; part off
3986 
    %assign/av v0x93c980, 0, 8;
3987 
t_131 ;
3988 
    %ix/load 1, 16, 0;
3989 
    %mov 4, 0, 1;
3990 
    %load/x1p 8, v0x93cc50_0, 8;
3991 
; Save base=8 wid=8 in lookaside.
3992 
    %ix/load 3, 2, 0; address
3993 
    %ix/load 0, 8, 0; word width
3994 
    %ix/load 1, 0, 0; part off
3995 
    %assign/av v0x93c980, 0, 8;
3996 
t_132 ;
3997 
    %ix/load 1, 24, 0;
3998 
    %mov 4, 0, 1;
3999 
    %load/x1p 8, v0x93cc50_0, 8;
4000 
; Save base=8 wid=8 in lookaside.
4001 
    %ix/load 3, 3, 0; address
4002 
    %ix/load 0, 8, 0; word width
4003 
    %ix/load 1, 0, 0; part off
4004 
    %assign/av v0x93c980, 0, 8;
4005 
t_133 ;
4006 
    %ix/load 3, 0, 0;
4007 
    %mov 4, 0, 1;
4008 
    %load/av 8, v0x93ca00, 8;
4009 
    %ix/load 3, 1, 0;
4010 
    %mov 4, 0, 1;
4011 
    %load/av 16, v0x93ca00, 8;
4012 
    %ix/load 3, 2, 0;
4013 
    %mov 4, 0, 1;
4014 
    %load/av 24, v0x93ca00, 8;
4015 
    %ix/load 3, 3, 0;
4016 
    %mov 4, 0, 1;
4017 
    %load/av 32, v0x93ca00, 8;
4018 
    %ix/load 0, 32, 0;
4019 
    %assign/v0 v0x93cbb0_0, 0, 8;
4020 
    %end;
4021 
t_127 %join;
4022 
    %jmp T_58;
4023 
    .thread T_58, $push;
4024 
    .scope S_0x8ca510;
4025 
T_59 ;
4026 
    %wait E_0x8dad90;
4027 
    %fork t_135, S_0x929c40;
4028 
    %jmp t_134;
4029 
t_135 ;
4030 
    %load/v 8, v0x93ede0_0, 1;
4031 
    %ix/load 0, 1, 0;
4032 
    %assign/v0 v0x93e890_0, 0, 8;
4033 
    %load/v 8, v0x93e890_0, 1;
4034 
    %ix/load 0, 1, 0;
4035 
    %assign/v0 v0x93e930_0, 0, 8;
4036 
    %end;
4037 
t_134 %join;
4038 
    %jmp T_59;
4039 
    .thread T_59;
4040 
    .scope S_0x8ca510;
4041 
T_60 ;
4042 
    %wait E_0x8dad90;
4043 
    %fork t_137, S_0x929b60;
4044 
    %jmp t_136;
4045 
t_137 ;
4046 
    %load/v 8, v0x938010_0, 1;
4047 
    %load/v 9, v0x93e1e0_0, 1;
4048 
    %or 8, 9, 1;
4049 
    %jmp/0xz  T_60.0, 8;
4050 
    %movi 8, 26, 16;
4051 
    %ix/load 0, 16, 0;
4052 
    %assign/v0 v0x93e280_0, 0, 8;
4053 
    %jmp T_60.1;
4054 
T_60.0 ;
4055 
    %load/v 8, v0x93e280_0, 16;
4056 
    %mov 24, 0, 16;
4057 
    %subi 8, 1, 32;
4058 
    %ix/load 0, 16, 0;
4059 
    %assign/v0 v0x93e280_0, 0, 8;
4060 
T_60.1 ;
4061 
    %end;
4062 
t_136 %join;
4063 
    %jmp T_60;
4064 
    .thread T_60;
4065 
    .scope S_0x8ca510;
4066 
T_61 ;
4067 
    %wait E_0x8dad90;
4068 
    %fork t_139, S_0x929a80;
4069 
    %jmp t_138;
4070 
t_139 ;
4071 
    %load/v 8, v0x938010_0, 1;
4072 
    %jmp/0xz  T_61.0, 8;
4073 
    %ix/load 0, 4, 0;
4074 
    %assign/v0 v0x93e3c0_0, 0, 0;
4075 
    %ix/load 0, 1, 0;
4076 
    %assign/v0 v0x93e470_0, 0, 0;
4077 
    %ix/load 0, 1, 0;
4078 
    %assign/v0 v0x93dec0_0, 0, 0;
4079 
    %ix/load 0, 1, 0;
4080 
    %assign/v0 v0x93ecc0_0, 0, 0;
4081 
    %jmp T_61.1;
4082 
T_61.0 ;
4083 
    %load/v 8, v0x93daf0_0, 1;
4084 
    %jmp/0xz  T_61.2, 8;
4085 
    %ix/load 0, 1, 0;
4086 
    %assign/v0 v0x93e470_0, 0, 0;
4087 
    %ix/load 0, 1, 0;
4088 
    %assign/v0 v0x93dec0_0, 0, 0;
4089 
T_61.2 ;
4090 
    %load/v 8, v0x93e1e0_0, 1;
4091 
    %jmp/0xz  T_61.4, 8;
4092 
    %load/v 8, v0x93ecc0_0, 1;
4093 
    %inv 8, 1;
4094 
    %jmp/0xz  T_61.6, 8;
4095 
    %load/v 8, v0x93e930_0, 1;
4096 
    %inv 8, 1;
4097 
    %jmp/0xz  T_61.8, 8;
4098 
    %ix/load 0, 1, 0;
4099 
    %assign/v0 v0x93ecc0_0, 0, 1;
4100 
    %movi 8, 7, 4;
4101 
    %ix/load 0, 4, 0;
4102 
    %assign/v0 v0x93e3c0_0, 0, 8;
4103 
    %ix/load 0, 4, 0;
4104 
    %assign/v0 v0x93e320_0, 0, 0;
4105 
T_61.8 ;
4106 
    %jmp T_61.7;
4107 
T_61.6 ;
4108 
    %load/v 8, v0x93e3c0_0, 4;
4109 
    %mov 12, 0, 28;
4110 
   %addi 8, 1, 32;
4111 
    %movi 40, 16, 32;
4112 
    %mod 8, 40, 32;
4113 
    %ix/load 0, 4, 0;
4114 
    %assign/v0 v0x93e3c0_0, 0, 8;
4115 
    %load/v 8, v0x93e3c0_0, 4;
4116 
    %cmpi/u 8, 0, 4;
4117 
    %jmp/0xz  T_61.10, 4;
4118 
    %load/v 8, v0x93e320_0, 4;
4119 
    %mov 12, 0, 28;
4120 
   %addi 8, 1, 32;
4121 
    %movi 40, 16, 32;
4122 
    %mod 8, 40, 32;
4123 
    %ix/load 0, 4, 0;
4124 
    %assign/v0 v0x93e320_0, 0, 8;
4125 
    %load/v 8, v0x93e320_0, 4;
4126 
    %cmpi/u 8, 0, 4;
4127 
    %jmp/0xz  T_61.12, 4;
4128 
    %load/v 8, v0x93e930_0, 1;
4129 
    %jmp/0xz  T_61.14, 8;
4130 
    %ix/load 0, 1, 0;
4131 
    %assign/v0 v0x93ecc0_0, 0, 0;
4132 
T_61.14 ;
4133 
    %jmp T_61.13;
4134 
T_61.12 ;
4135 
    %load/v 8, v0x93e320_0, 4;
4136 
    %mov 12, 0, 1;
4137 
    %cmpi/u 8, 9, 5;
4138 
    %jmp/0xz  T_61.16, 4;
4139 
    %ix/load 0, 1, 0;
4140 
    %assign/v0 v0x93ecc0_0, 0, 0;
4141 
    %load/v 8, v0x93e930_0, 1;
4142 
    %jmp/0xz  T_61.18, 8;
4143 
    %load/v 8, v0x93e570_0, 8;
4144 
    %mov 16, 0, 24;
4145 
    %ix/load 0, 32, 0;
4146 
    %assign/v0 v0x93dd80_0, 0, 8;
4147 
    %ix/load 0, 1, 0;
4148 
    %assign/v0 v0x93e470_0, 0, 1;
4149 
    %ix/load 0, 1, 0;
4150 
    %assign/v0 v0x93dec0_0, 0, 0;
4151 
    %jmp T_61.19;
4152 
T_61.18 ;
4153 
    %ix/load 0, 1, 0;
4154 
    %assign/v0 v0x93dec0_0, 0, 1;
4155 
T_61.19 ;
4156 
    %jmp T_61.17;
4157 
T_61.16 ;
4158 
    %ix/load 1, 1, 0;
4159 
    %mov 4, 0, 1;
4160 
    %load/x1p 16, v0x93e570_0, 7;
4161 
    %mov 8, 16, 7; Move signal select into place
4162 
    %load/v 15, v0x93e930_0, 1;
4163 
    %ix/load 0, 8, 0;
4164 
    %assign/v0 v0x93e570_0, 0, 8;
4165 
T_61.17 ;
4166 
T_61.13 ;
4167 
T_61.10 ;
4168 
T_61.7 ;
4169 
T_61.4 ;
4170 
T_61.1 ;
4171 
    %end;
4172 
t_138 %join;
4173 
    %jmp T_61;
4174 
    .thread T_61;
4175 
    .scope S_0x8ca510;
4176 
T_62 ;
4177 
    %wait E_0x8dad90;
4178 
    %fork t_141, S_0x9299a0;
4179 
    %jmp t_140;
4180 
t_141 ;
4181 
    %load/v 8, v0x938010_0, 1;
4182 
    %jmp/0xz  T_62.0, 8;
4183 
    %ix/load 0, 1, 0;
4184 
    %assign/v0 v0x93e750_0, 0, 0;
4185 
    %ix/load 0, 1, 0;
4186 
    %assign/v0 v0x93f1a0_0, 0, 1;
4187 
    %ix/load 0, 4, 0;
4188 
    %assign/v0 v0x93e6b0_0, 0, 0;
4189 
    %jmp T_62.1;
4190 
T_62.0 ;
4191 
    %load/v 8, v0x93fd90_0, 1;
4192 
    %load/v 9, v0x93e750_0, 1;
4193 
    %inv 9, 1;
4194 
    %and 8, 9, 1;
4195 
    %jmp/0xz  T_62.2, 8;
4196 
    %mov 8, 0, 1;
4197 
    %load/v 9, v0x93e140_0, 8; Select 8 out of 32 bits
4198 
    %ix/load 0, 9, 0;
4199 
    %assign/v0 v0x93e7f0_0, 0, 8;
4200 
    %movi 8, 10, 4;
4201 
    %ix/load 0, 4, 0;
4202 
    %assign/v0 v0x93e610_0, 0, 8;
4203 
    %ix/load 0, 4, 0;
4204 
    %assign/v0 v0x93e6b0_0, 0, 0;
4205 
    %ix/load 0, 1, 0;
4206 
    %assign/v0 v0x93e750_0, 0, 1;
4207 
T_62.2 ;
4208 
    %load/v 8, v0x93e1e0_0, 1;
4209 
    %jmp/0xz  T_62.4, 8;
4210 
    %load/v 8, v0x93e6b0_0, 4;
4211 
    %mov 12, 0, 28;
4212 
   %addi 8, 1, 32;
4213 
    %movi 40, 16, 32;
4214 
    %mod 8, 40, 32;
4215 
    %ix/load 0, 4, 0;
4216 
    %assign/v0 v0x93e6b0_0, 0, 8;
4217 
    %load/v 8, v0x93e6b0_0, 4;
4218 
    %cmpi/u 8, 0, 4;
4219 
    %mov 8, 4, 1;
4220 
    %load/v 9, v0x93e750_0, 1;
4221 
    %and 8, 9, 1;
4222 
    %jmp/0xz  T_62.6, 8;
4223 
    %load/v 8, v0x93e610_0, 4;
4224 
    %mov 12, 0, 28;
4225 
    %subi 8, 1, 32;
4226 
    %ix/load 0, 4, 0;
4227 
    %assign/v0 v0x93e610_0, 0, 8;
4228 
    %load/v 8, v0x93e610_0, 4;
4229 
    %cmpi/u 8, 0, 4;
4230 
    %jmp/0xz  T_62.8, 4;
4231 
    %ix/load 0, 1, 0;
4232 
    %assign/v0 v0x93e750_0, 0, 0;
4233 
    %jmp T_62.9;
4234 
T_62.8 ;
4235 
    %load/v 8, v0x93e7f0_0, 1; Only need 1 of 9 bits
4236 
; Save base=8 wid=1 in lookaside.
4237 
    %ix/load 0, 1, 0;
4238 
    %assign/v0 v0x93f1a0_0, 0, 8;
4239 
    %ix/load 1, 1, 0;
4240 
    %mov 4, 0, 1;
4241 
    %load/x1p 17, v0x93e7f0_0, 8;
4242 
    %mov 8, 17, 8; Move signal select into place
4243 
    %mov 16, 1, 1;
4244 
    %ix/load 0, 9, 0;
4245 
    %assign/v0 v0x93e7f0_0, 0, 8;
4246 
T_62.9 ;
4247 
T_62.6 ;
4248 
T_62.4 ;
4249 
T_62.1 ;
4250 
    %end;
4251 
t_140 %join;
4252 
    %jmp T_62;
4253 
    .thread T_62;
4254 
    .scope S_0x8ca510;
4255 
T_63 ;
4256 
    %fork t_143, S_0x910750;
4257 
    %jmp t_142;
4258 
t_143 ;
4259 
    %ix/load 0, 1, 0;
4260 
    %assign/v0 v0x938010_0, 0, 0;
4261 
    %delay 3700, 0;
4262 
    %ix/load 0, 1, 0;
4263 
    %assign/v0 v0x938010_0, 0, 1;
4264 
    %delay 5300, 0;
4265 
    %ix/load 0, 1, 0;
4266 
    %assign/v0 v0x938010_0, 0, 0;
4267 
    %set/v v0x9161b0_0, 0, 32;
4268 
T_63.0 ;
4269 
    %load/v 8, v0x9161b0_0, 32;
4270 
   %cmpi/s 8, 2000, 32;
4271 
    %jmp/0xz T_63.1, 5;
4272 
    %wait E_0x904600;
4273 
    %ix/load 0, 1, 0;
4274 
    %load/vp0/s 8, v0x9161b0_0, 32;
4275 
    %set/v v0x9161b0_0, 8, 32;
4276 
    %jmp T_63.0;
4277 
T_63.1 ;
4278 
    %ix/load 0, 1, 0;
4279 
    %assign/v0 v0x938010_0, 0, 0;
4280 
    %delay 3700, 0;
4281 
    %ix/load 0, 1, 0;
4282 
    %assign/v0 v0x938010_0, 0, 1;
4283 
    %delay 5300, 0;
4284 
    %ix/load 0, 1, 0;
4285 
    %assign/v0 v0x938010_0, 0, 0;
4286 
    %set/v v0x9161b0_0, 0, 32;
4287 
T_63.2 ;
4288 
    %load/v 8, v0x9161b0_0, 32;
4289 
   %cmpi/s 8, 2000, 32;
4290 
    %jmp/0xz T_63.3, 5;
4291 
    %wait E_0x904600;
4292 
    %ix/load 0, 1, 0;
4293 
    %load/vp0/s 8, v0x9161b0_0, 32;
4294 
    %set/v v0x9161b0_0, 8, 32;
4295 
    %jmp T_63.2;
4296 
T_63.3 ;
4297 
    %vpi_call 2 1941 "$finish";
4298 
    %end;
4299 
t_142 %join;
4300 
    %end;
4301 
    .thread T_63;
4302 
# The file index is used to find the file name in the following table.
4303 
:file_names 3;
4304 
    "N/A";
4305 
    "";
4306 
    "TopBench.v";

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