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[/] [neorv32/] [trunk/] [sim/] [README.md] - Blame information for rev 74

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# Simulation Sources
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## [simple](simple)
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Simple testbench for the NEORV32 Processor and script for simulation using GHDL.
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- [`ghdl.setup.sh`](simple/ghdl.setup.sh)
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- [`ghdl.run.sh`](simple/ghdl.run.sh)
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- [`ghdl.sh`](simple/ghdl.sh)
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- [`neorv32_tb.simple.vhd`](simple/neorv32_tb.simple.vhd)
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- [`neorv32_imem.simple.vhd`](simple/neorv32_imem.simple.vhd): memory component optimized for simulation.
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- [`neorv32_imem.iram.simple.vhd`](simple/neorv32_imem.iram.simple.vhd)
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- [`uart_rx.simple.vhd`](simple/uart_rx.simple.vhd)
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## VUnit testbench
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VUnit testbench for the NEORV32 Processor.
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- [`run.py`](run.py)
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- [`neorv32_tb.vhd`](neorv32_tb.vhd)
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- [`uart_rx_pkg.vhd`](uart_rx_pkg.vhd)
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- [`uart_rx.vhd`](uart_rx.vhd)

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