OpenCores
URL https://opencores.org/ocsvn/nysa_sata/nysa_sata/trunk

Subversion Repositories nysa_sata

[/] [nysa_sata/] [trunk/] [test/] [model/] [sata_model.py] - Blame information for rev 3

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 cospan
import cocotb
2
from cocotb.clock import Clock
3
from cocotb.triggers import Timer, RisingEdge, FallingEdge
4
 
5
CLK_PERIOD = 4
6
RESET_PERIOD = 100
7
 
8
class SataController(object):
9
 
10
    def __init__(self, dut, period = CLK_PERIOD):
11
        self.dut = dut
12
        self.dut.log.warning("Setup Sata")
13
        cocotb.fork(Clock(dut.clk, CLK_PERIOD).start())
14
        self.dut.rst = 0
15
        self.dut.prim_scrambler_en = 1
16
        self.dut.data_scrambler_en = 1
17
 
18
    @cocotb.coroutine
19
    def wait_clocks(self, num_clks):
20
        for i in range(num_clks):
21
            yield RisingEdge(self.dut.clk)
22
 
23
    @cocotb.coroutine
24
    def reset(self):
25
        self.dut.rst = 0
26 3 cospan
        #self.dut.write_data_stb = 0
27
        self.dut.hard_drive_command = 0x00
28
        self.dut.execute_command_stb = 0
29
        #self.dut.read_data_stb = 0
30
        self.dut.command_layer_reset = 0
31 2 cospan
        self.dut.sector_count = 0
32
        self.dut.sector_address = 0
33
        self.dut.fifo_reset = 0
34
 
35
        self.dut.hold = 0
36
        self.dut.single_rdwr = 0
37
        self.dut.platform_ready = 0
38
 
39
        self.dut.u2h_write_enable = 0
40
        self.dut.u2h_write_count = 0
41
        self.dut.h2u_read_enable = 0
42
 
43
        self.dut.hd_read_enable = 0;
44
        self.dut.user_read_enable = 0;
45
 
46
 
47
        yield(self.wait_clocks(RESET_PERIOD / 2))
48
        self.dut.rst = 1
49
 
50
        yield(self.wait_clocks(RESET_PERIOD / 2))
51
        self.dut.rst = 0
52
 
53
        yield(self.wait_clocks(100))
54
        self.dut.platform_ready = 1
55
 
56
        yield(self.wait_clocks(10))
57
 
58
    def ready(self):
59
        if self.dut.sata_ready == 1:
60
            return True
61
        return False
62
 
63
    @cocotb.coroutine
64
    def wait_for_idle(self):
65 3 cospan
        print "Wait for idle..."
66
        if self.dut.sata_busy.value == 1:
67
            yield(cocotb.triggers.FallingEdge(self.dut.sata_busy))
68
        if self.dut.sata_ready.value == 0:
69
            yield(cocotb.triggers.RisingEdge(self.dut.sata_ready))
70
        print "Idle!"
71 2 cospan
 
72
    @cocotb.coroutine
73
    def write_to_hard_drive(self, length, address):
74 3 cospan
        #self.dut.u2h_write_enable = 1
75 2 cospan
        self.dut.u2h_write_count = length
76
        #self.dut.h2u_read_enable = 1
77
        self.dut.sector_address = address
78
        #What does this do?
79 3 cospan
        self.dut.sector_count = (length / 8192) + 1
80
        self.dut.hard_drive_command = 0x35
81
        print "Write!"
82
 
83
 
84
        yield(self.wait_clocks(10))
85
        self.dut.execute_command_stb = 1
86
        #self.dut.write_data_stb = 1
87 2 cospan
        yield(self.wait_clocks(1))
88 3 cospan
        #self.dut.write_data_stb = 0
89
        self.dut.execute_command_stb = 0
90 2 cospan
        yield(self.wait_for_idle())
91
        yield(self.wait_clocks(100))
92
        #self.dut.h2u_read_enable = 0
93 3 cospan
        self.dut.hard_drive_command = 0x00
94 2 cospan
 
95
    @cocotb.coroutine
96
    def read_from_hard_drive(self, length, address):
97
        self.dut.sector_address = address
98
        sector_count = (length / 0x800) + 1
99
        self.dut.sector_count = sector_count
100
        #Initiate pattern generation within the data generators
101
        #Also tell the reader to analyze the incomming data
102
        self.dut.h2u_read_enable = 1
103
        yield(self.wait_clocks(10))
104 3 cospan
 
105
        print "Read..."
106
        #self.dut.read_data_stb = 1
107
        self.dut.hard_drive_command = 0x25
108
        self.dut.execute_command_stb = 1
109
        yield(self.wait_clocks(1))
110
        #self.dut.read_data_stb = 0
111
        self.dut.execute_command_stb = 0
112
        yield(self.wait_clocks(100))
113 2 cospan
        while (self.dut.h2u_read_total_count.value < length):
114 3 cospan
            if self.dut.sata_ready.value == 1:
115
                #self.dut.read_data_stb = 1
116
                self.dut.execute_command_stb = 1
117
                yield(self.wait_clocks(1))
118
                #self.dut.read_data_stb = 0
119
                self.dut.execute_command_stb = 0
120
                yield(self.wait_clocks(10))
121
 
122
            yield(self.wait_clocks(100))
123 2 cospan
            self.dut.log.info("count: %d" % self.dut.h2u_read_total_count.value)
124
 
125
        self.dut.h2u_read_enable = 0
126
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.