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[/] [nysa_sata/] [trunk/] [test/] [test_sata.py] - Blame information for rev 2

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1 2 cospan
# Simple tests for an adder module
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import cocotb
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from cocotb.result import TestFailure
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#from cocotb.triggers import Timer, RisingEdge
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from sata_model import SataController
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#import random
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CLK_PERIOD = 4
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@cocotb.test(skip = True)
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def bootup_test(dut):
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    """
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    Description:
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        Bootup the SATA stack
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    Test ID: 0
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    Expected Results:
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        The SATA stack should be ready and in the IDLE state
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    """
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    dut.test_id = 0
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    #yield(sata.wait_for_idle()0))
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    yield(sata.wait_for_idle())
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    if not sata.ready():
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        dut.log.error("Sata Is not ready")
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        TestFailure()
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    else:
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        dut.log.info("Sata is Ready")
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@cocotb.test(skip = True)
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def short_write_test(dut):
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    """
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    Description:
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        Perform a single write to the SATA stack
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    Test ID: 1
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    Expected Results:
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        Data and Addressed should be read from the
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        fake hard drive
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    """
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    dut.test_id = 1
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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    yield(sata.write_to_hard_drive(10, 0x00))
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    yield(sata.wait_clocks(100))
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    dut.log.info("Wrote 1 piece of data to SATA")
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@cocotb.test(skip = True)
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def short_read_test(dut):
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    """
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    Description:
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        Perform a single read from the SATA stack
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    Test ID: 2
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    Expected Result:
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        -Address should be seen on the fake hard drive side
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        -Data should be read out of the hard drive
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    """
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    dut.test_id = 2
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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    yield(sata.read_from_hard_drive(10, 0x00))
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    yield(sata.wait_clocks(10))
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    yield(sata.wait_for_idle())
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    yield(sata.wait_clocks(200))
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@cocotb.test(skip = True)
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def long_write_test(dut):
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    """
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    Description:
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        Perform a long write to the hard drive
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    Test ID: 3
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    Expected Result:
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        -Address should be seen on the fake hard drive side
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        -Data should be read out of the hard drive side
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        -Number of data should be the same as the write amount
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    """
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    dut.test_id = 3
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    data_count = 400
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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    yield(sata.write_to_hard_drive(data_count, 0x00))
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    yield(sata.wait_clocks(100))
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    dut.log.info("Wrote %d piece of data to SATA" % data_count)
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@cocotb.test(skip = True)
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def long_read_test(dut):
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    """
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    Description:
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        Perform a long read from the hard drive
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    Test ID: 4
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    Expected Result:
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        -Address should be seen on the fake hard drive side
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        -Data should be written in to the hard drive side
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        -Data should be read out of the stack side
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        -The length of data that is read should be the same as the
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            data entered into the hard drive
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    """
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    dut.test_id = 4
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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    yield(sata.read_from_hard_drive(0x900, 0x00))
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    yield(sata.wait_clocks(10))
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    yield(sata.wait_for_idle())
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    yield(sata.wait_clocks(100))
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@cocotb.test(skip = True)
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def long_write_with_easy_back_preassure_test(dut):
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    """
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    Description:
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        Perform a long write to the hard drive and simulate a stall condition
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    Test ID: 5
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    Expected Result:
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        -Address should be seen on the fake hard drive side
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        -Data should be read out of the hard drive side
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        -Length of data read should be the same as the length of data written
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    """
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    dut.test_id = 5
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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    length = 400
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    address = 0x00
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    dut.write_count = length
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    dut.write_enable = 1
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    dut.u2h_write_enable = 1
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    dut.u2h_write_count = length
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    #dut.h2u_read_enable = 1
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    dut.sector_address = address
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    #What does this do?
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    dut.sector_count = 0
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    dut.write_data_en = 1
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    yield(sata.wait_clocks(1))
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    dut.write_data_en = 0
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    yield(sata.wait_clocks(200))
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    dut.hold = 1
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    yield(sata.wait_clocks(200))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(300))
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    dut.hold = 0
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    yield(sata.wait_for_idle())
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    dut.write_enable = 0
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    dut.write_count = 0
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    yield(sata.wait_clocks(100))
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    #dut.h2u_read_enable = 0
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    dut.log.info("Wrote %d piece of data to SATA" % length)
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@cocotb.test(skip = True)
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def long_write_with_hard_back_preassure_test(dut):
174
    """
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    Description:
176
        Perform a long write to the hard drive and simulate difficult
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        stall condition
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    Test ID: 7
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    Expected Result:
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        -Address should be seen on the fake hard drive side
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        -Data should be read out of the hard drive
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        -Length of data in should be equal to the length of data read
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    """
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    dut.test_id = 7
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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    length = 9000
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    address = 0x00
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    dut.write_count = length
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    dut.write_enable = 1
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    dut.u2h_write_enable = 1
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    dut.u2h_write_count = length
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    #dut.h2u_read_enable = 1
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    dut.sector_address = address
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    #What does this do?
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    dut.sector_count = 0
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    dut.write_data_en = 1
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    yield(sata.wait_clocks(1))
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    dut.write_data_en = 0
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    yield(sata.wait_clocks(2500))
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    dut.hold = 1
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    yield(sata.wait_clocks(1))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(10))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(20))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(1))
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    dut.hold = 0
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220
    yield(sata.wait_for_idle())
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    dut.write_enable = 0
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    dut.write_count = 0
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    yield(sata.wait_clocks(100))
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    #dut.h2u_read_enable = 0
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    dut.log.info("Wrote %d piece of data to SATA" % length)
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@cocotb.test(skip = False)
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def long_write_long_read_back_preassure_test(dut):
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    """
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    Description:
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        Perform a long write to the hard drive and simulate difficult
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        stall condition, then start a new long read transaction
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    Test ID: 8
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    Expected Result:
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        -Address should be seen on the fake hard drive side
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        -Data should be read out of the hard drive
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        -Length of data in should be equal to the length of data read
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    """
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    dut.test_id = 8
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    sata = SataController(dut, CLK_PERIOD)
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    yield(sata.reset())
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    yield(sata.wait_for_idle())
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245
    length = 9000
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    address = 0x00
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248
    dut.write_count = length
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    dut.write_enable = 1
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    dut.u2h_write_enable = 1
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    dut.u2h_write_count = length
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    #dut.h2u_read_enable = 1
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    dut.sector_address = address
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    #What does this do?
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    dut.sector_count = 0
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    dut.write_data_en = 1
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    yield(sata.wait_clocks(1))
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    dut.write_data_en = 0
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    yield(sata.wait_clocks(2500))
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    dut.hold = 1
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    yield(sata.wait_clocks(1))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(10))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(20))
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    dut.hold = 0
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    yield(sata.wait_clocks(400))
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    dut.hold = 1
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    yield(sata.wait_clocks(1))
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    dut.hold = 0
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276
    yield(sata.wait_for_idle())
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278
    dut.write_enable = 0
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    dut.write_count = 0
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    yield(sata.wait_clocks(100))
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    #dut.h2u_read_enable = 0
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    dut.log.info("Wrote %d piece of data to SATA" % length)
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284
    data_count = 0x900
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    yield(sata.read_from_hard_drive(data_count, 0x00))
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    yield(sata.wait_clocks(10))
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    yield(sata.wait_for_idle())
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    yield(sata.wait_clocks(100))
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    dut.log.info("Read %d words of data" % data_count)
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292
 
293
    data_count = 400
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    yield(sata.write_to_hard_drive(data_count, 0x00))
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    yield(sata.wait_clocks(200))
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    dut.log.info("Wrote %d piece of data to SATA" % data_count)
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