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[/] [oms8051mini/] [trunk/] [verif/] [defs/] [tb_defines.v] - Blame information for rev 29

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Line No. Rev Author Line
1 2 dinesha
//
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// Functional Description:
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//
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// This has all defines used in TB
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//
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// *************************************************************************
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// For Top level simulations
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`define TB_TOP_LEVEL_SIM  1
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`define TB_RAND_SEED      0
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// RTL - Instance 
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`define TB_TOP          tb_top
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`define CHIP_TOP        `TB_TOP.chip_top
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`define CORE            `TB_TOP.u_core
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// TB - Global
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`define TB_GLBL         `TB_TOP.tb_glbl
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`define TB_AGENTS_GMAC  `TB_TOP.u_tb_eth
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`define TB_AGENTS_UART  `TB_TOP.tb_uart
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//--------------------------------------------------------------
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// Target ID Mapping
26 29 dinesha
// 4'b0011 -- I2CM
27 10 dinesha
// 4'b0010 -- UART
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// 4'b0001 -- SPI core
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// 4'b0000 -- External RAM
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//--------------------------------------------------------------
31 29 dinesha
`define ADDR_SPACE_I2CM 4'b0011
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`define ADDR_SPACE_UART 4'b0010
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`define ADDR_SPACE_SPI  4'b0001
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`define ADDR_SPACE_RAM  4'b0000
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//`define ADDR_SPACE_ROM  4'b0000 
36 2 dinesha
 

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