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[/] [openmsp430/] [trunk/] [core/] [rtl/] [verilog/] [openMSP430_defines.v] - Blame information for rev 106

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1 2 olivier.gi
//----------------------------------------------------------------------------
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// Copyright (C) 2001 Authors
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//
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// This source file may be used and distributed without restriction provided
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// that this copyright statement is not removed from the file and that any
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// derivative work contains the original copyright notice and the associated
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// disclaimer.
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//
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// This source file is free software; you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation; either version 2.1 of the License, or
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// (at your option) any later version.
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//
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// This source is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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// License for more details.
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//
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// You should have received a copy of the GNU Lesser General Public License
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// along with this source; if not, write to the Free Software Foundation,
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// Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
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//
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//----------------------------------------------------------------------------
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// 
25 23 olivier.gi
// *File Name: openMSP430_defines.v
26 2 olivier.gi
// 
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// *Module Description:
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//                      openMSP430 Configuration file
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//
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// *Author(s):
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//              - Olivier Girard,    olgirard@gmail.com
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//
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//----------------------------------------------------------------------------
34 17 olivier.gi
// $Rev: 106 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-03-25 23:01:03 +0100 (Fri, 25 Mar 2011) $
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//----------------------------------------------------------------------------
38 103 olivier.gi
//`define OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`else
41 33 olivier.gi
`include "openMSP430_undefines.v"
42 103 olivier.gi
`endif
43 2 olivier.gi
 
44
//----------------------------------------------------------------------------
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// SYSTEM CONFIGURATION
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//----------------------------------------------------------------------------
47 72 olivier.gi
//
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// Note: the sum of both program and data memories should not exceed 63.5 kB
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//
50 2 olivier.gi
 
51 33 olivier.gi
// Program Memory Size:
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//                     Uncomment the required memory size
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//-------------------------------------------------------
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//`define PMEM_SIZE_59_KB
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//`define PMEM_SIZE_55_KB
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//`define PMEM_SIZE_54_KB
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//`define PMEM_SIZE_51_KB
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//`define PMEM_SIZE_48_KB
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//`define PMEM_SIZE_41_KB
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//`define PMEM_SIZE_32_KB
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//`define PMEM_SIZE_24_KB
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//`define PMEM_SIZE_16_KB
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//`define PMEM_SIZE_12_KB
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//`define PMEM_SIZE_8_KB
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//`define PMEM_SIZE_4_KB
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`define PMEM_SIZE_2_KB
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//`define PMEM_SIZE_1_KB
68 2 olivier.gi
 
69 33 olivier.gi
// Data Memory Size:
70 72 olivier.gi
//                     Uncomment the required memory size
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//-------------------------------------------------------
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//`define DMEM_SIZE_32_KB
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//`define DMEM_SIZE_24_KB
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//`define DMEM_SIZE_16_KB
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//`define DMEM_SIZE_10_KB
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//`define DMEM_SIZE_8_KB
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//`define DMEM_SIZE_5_KB
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//`define DMEM_SIZE_4_KB
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//`define DMEM_SIZE_2p5_KB
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//`define DMEM_SIZE_2_KB
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//`define DMEM_SIZE_1_KB
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//`define DMEM_SIZE_512_B
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//`define DMEM_SIZE_256_B
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`define DMEM_SIZE_128_B
85 2 olivier.gi
 
86 72 olivier.gi
 
87 67 olivier.gi
// Include/Exclude Hardware Multiplier
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`define MULTIPLIER
89
 
90
 
91 2 olivier.gi
//----------------------------------------------------------------------------
92
// REMOTE DEBUGGING INTERFACE CONFIGURATION
93
//----------------------------------------------------------------------------
94
 
95
// Include Debug interface
96
`define DBG_EN
97
 
98
// Debug interface selection
99
//             `define DBG_UART -> Enable UART (8N1) debug interface
100 33 olivier.gi
//             `define DBG_JTAG -> DON'T UNCOMMENT, NOT SUPPORTED
101 2 olivier.gi
//
102
`define DBG_UART
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//`define DBG_JTAG
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105
// Number of hardware breakpoints (each unit contains 2 hw address breakpoints)
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//             `define DBG_HWBRK_0 -> Include hardware breakpoints unit 0
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//             `define DBG_HWBRK_1 -> Include hardware breakpoints unit 1
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//             `define DBG_HWBRK_2 -> Include hardware breakpoints unit 2
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//             `define DBG_HWBRK_3 -> Include hardware breakpoints unit 3
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//
111
`define  DBG_HWBRK_0
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`define  DBG_HWBRK_1
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`define  DBG_HWBRK_2
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`define  DBG_HWBRK_3
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116 106 olivier.gi
// Defines the debugger CPU_CTL.RST_BRK_EN reset value (CPU break on PUC reset)
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//
118
// When defined, this concretely bring the CPU to break after a PUC
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// occurrence by default. This is typically usefull when the program
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// memory can only be initialized through the serial debug interface.
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//
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//`define DBG_RST_BRK_EN
123 2 olivier.gi
 
124 106 olivier.gi
 
125 2 olivier.gi
//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//=====        SYSTEM CONSTANTS --- !!!!!!!! DO NOT EDIT !!!!!!!!      =====//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
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//==========================================================================//
134
 
135 72 olivier.gi
//
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// PROGRAM & DATA MEMORY CONFIGURATION
137
//======================================
138 2 olivier.gi
 
139 72 olivier.gi
// Program Memory Size
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`ifdef PMEM_SIZE_59_KB
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  `define PMEM_AWIDTH      15
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  `define PMEM_SIZE     60416
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`endif
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`ifdef PMEM_SIZE_55_KB
145
  `define PMEM_AWIDTH      15
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  `define PMEM_SIZE     56320
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`endif
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`ifdef PMEM_SIZE_54_KB
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  `define PMEM_AWIDTH      15
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  `define PMEM_SIZE     55296
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`endif
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`ifdef PMEM_SIZE_51_KB
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  `define PMEM_AWIDTH      15
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  `define PMEM_SIZE     52224
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`endif
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`ifdef PMEM_SIZE_48_KB
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  `define PMEM_AWIDTH      15
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  `define PMEM_SIZE     49152
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`endif
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`ifdef PMEM_SIZE_41_KB
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  `define PMEM_AWIDTH      15
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  `define PMEM_SIZE     41984
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`endif
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`ifdef PMEM_SIZE_32_KB
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  `define PMEM_AWIDTH      14
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  `define PMEM_SIZE     32768
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`endif
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`ifdef PMEM_SIZE_24_KB
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  `define PMEM_AWIDTH      14
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  `define PMEM_SIZE     24576
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`endif
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`ifdef PMEM_SIZE_16_KB
173
  `define PMEM_AWIDTH      13
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  `define PMEM_SIZE     16384
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`endif
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`ifdef PMEM_SIZE_12_KB
177
  `define PMEM_AWIDTH      13
178
  `define PMEM_SIZE     12288
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`endif
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`ifdef PMEM_SIZE_8_KB
181
  `define PMEM_AWIDTH      12
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  `define PMEM_SIZE      8192
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`endif
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`ifdef PMEM_SIZE_4_KB
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  `define PMEM_AWIDTH      11
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  `define PMEM_SIZE      4096
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`endif
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`ifdef PMEM_SIZE_2_KB
189
  `define PMEM_AWIDTH      10
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  `define PMEM_SIZE      2048
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`endif
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`ifdef PMEM_SIZE_1_KB
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  `define PMEM_AWIDTH       9
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  `define PMEM_SIZE      1024
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`endif
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197
// Data Memory Size
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`ifdef DMEM_SIZE_32_KB
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  `define DMEM_AWIDTH       14
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  `define DMEM_SIZE      32768
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`endif
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`ifdef DMEM_SIZE_24_KB
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  `define DMEM_AWIDTH       14
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  `define DMEM_SIZE      24576
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`endif
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`ifdef DMEM_SIZE_16_KB
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  `define DMEM_AWIDTH       13
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  `define DMEM_SIZE      16384
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`endif
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`ifdef DMEM_SIZE_10_KB
211
  `define DMEM_AWIDTH       13
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  `define DMEM_SIZE      10240
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`endif
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`ifdef DMEM_SIZE_8_KB
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  `define DMEM_AWIDTH       12
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  `define DMEM_SIZE       8192
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`endif
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`ifdef DMEM_SIZE_5_KB
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  `define DMEM_AWIDTH       12
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  `define DMEM_SIZE       5120
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`endif
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`ifdef DMEM_SIZE_4_KB
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  `define DMEM_AWIDTH       11
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  `define DMEM_SIZE       4096
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`endif
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`ifdef DMEM_SIZE_2p5_KB
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  `define DMEM_AWIDTH       11
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  `define DMEM_SIZE       2560
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`endif
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`ifdef DMEM_SIZE_2_KB
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  `define DMEM_AWIDTH       10
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  `define DMEM_SIZE       2048
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`endif
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`ifdef DMEM_SIZE_1_KB
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  `define DMEM_AWIDTH        9
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  `define DMEM_SIZE       1024
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`endif
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`ifdef DMEM_SIZE_512_B
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  `define DMEM_AWIDTH        8
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  `define DMEM_SIZE        512
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`endif
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`ifdef DMEM_SIZE_256_B
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  `define DMEM_AWIDTH        7
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  `define DMEM_SIZE        256
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`endif
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`ifdef DMEM_SIZE_128_B
247
  `define DMEM_AWIDTH        6
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  `define DMEM_SIZE        128
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`endif
250
 
251 33 olivier.gi
// Data Memory Base Adresses
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`define DMEM_BASE  16'h0200
253 2 olivier.gi
 
254 33 olivier.gi
// Program & Data Memory most significant address bit (for 16 bit words)
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`define PMEM_MSB   `PMEM_AWIDTH-1
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`define DMEM_MSB   `DMEM_AWIDTH-1
257 2 olivier.gi
 
258 72 olivier.gi
//
259
// STATES, REGISTER FIELDS, ...
260
//======================================
261 2 olivier.gi
 
262
// Instructions type
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`define INST_SO  0
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`define INST_JMP 1
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`define INST_TO  2
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267
// Single-operand arithmetic
268
`define RRC    0
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`define SWPB   1
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`define RRA    2
271
`define SXT    3
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`define PUSH   4
273
`define CALL   5
274
`define RETI   6
275
`define IRQ    7
276
 
277
// Conditional jump
278
`define JNE    0
279
`define JEQ    1
280
`define JNC    2
281
`define JC     3
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`define JN     4
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`define JGE    5
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`define JL     6
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`define JMP    7
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287
// Two-operand arithmetic
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`define MOV    0
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`define ADD    1
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`define ADDC   2
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`define SUBC   3
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`define SUB    4
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`define CMP    5
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`define DADD   6
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`define BIT    7
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`define BIC    8
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`define BIS    9
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`define XOR   10
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`define AND   11
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301
// Addressing modes
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`define DIR      0
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`define IDX      1
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`define INDIR    2
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`define INDIR_I  3
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`define SYMB     4
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`define IMM      5
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`define ABS      6
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`define CONST    7
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311
// Execution state machine
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`define E_IRQ_0    4'h0
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`define E_IRQ_1    4'h1
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`define E_IRQ_2    4'h2
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`define E_IRQ_3    4'h3
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`define E_IRQ_4    4'h4
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`define E_SRC_AD   4'h5
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`define E_SRC_RD   4'h6
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`define E_SRC_WR   4'h7
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`define E_DST_AD   4'h8
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`define E_DST_RD   4'h9
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`define E_DST_WR   4'hA
323
`define E_EXEC     4'hB
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`define E_JUMP     4'hC
325
`define E_IDLE     4'hD
326
 
327
// ALU control signals
328
`define ALU_SRC_INV   0
329
`define ALU_INC       1
330
`define ALU_INC_C     2
331
`define ALU_ADD       3
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`define ALU_AND       4
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`define ALU_OR        5
334
`define ALU_XOR       6
335
`define ALU_DADD      7
336
`define ALU_STAT_7    8
337
`define ALU_STAT_F    9
338
`define ALU_SHIFT    10
339
`define EXEC_NO_WR   11
340
 
341
// Debug interface
342
`define DBG_UART_WR   18
343
`define DBG_UART_BW   17
344
`define DBG_UART_ADDR 16:11
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346
// Debug interface CPU_CTL register
347
`define HALT        0
348
`define RUN         1
349
`define ISTEP       2
350
`define SW_BRK_EN   3
351
`define FRZ_BRK_EN  4
352
`define RST_BRK_EN  5
353
`define CPU_RST     6
354
 
355
// Debug interface CPU_STAT register
356
`define HALT_RUN    0
357
`define PUC_PND     1
358
`define SWBRK_PND   3
359
`define HWBRK0_PND  4
360
`define HWBRK1_PND  5
361
 
362
// Debug interface BRKx_CTL register
363
`define BRK_MODE_RD 0
364
`define BRK_MODE_WR 1
365
`define BRK_MODE    1:0
366
`define BRK_EN      2
367
`define BRK_I_EN    3
368
`define BRK_RANGE   4
369
 
370
// Basic clock module: BCSCTL1 Control Register
371
`define DIVAx       5:4
372
 
373
// Basic clock module: BCSCTL2 Control Register
374
`define SELS        3
375
`define DIVSx       2:1
376
 
377
 
378
//
379
// DEBUG INTERFACE EXTRA CONFIGURATION
380
//======================================
381
 
382
// Debug interface: Software breakpoint opcode
383
`define DBG_SWBRK_OP 16'h4343
384
 
385
// Debug UART interface auto data synchronization
386
// If the following define is commented out, then
387
// the DBG_UART_BAUD and DBG_DCO_FREQ need to be properly
388
// defined.
389
`define DBG_UART_AUTO_SYNC
390
 
391
// Debug UART interface data rate
392
//      In order to properly setup the UART debug interface, you
393
//      need to specify the DCO_CLK frequency (DBG_DCO_FREQ) and
394
//      the chosen BAUD rate from the UART interface.
395
//
396
//`define DBG_UART_BAUD    9600
397
//`define DBG_UART_BAUD   19200
398
//`define DBG_UART_BAUD   38400
399
//`define DBG_UART_BAUD   57600
400
//`define DBG_UART_BAUD  115200
401
//`define DBG_UART_BAUD  230400
402
//`define DBG_UART_BAUD  460800
403
//`define DBG_UART_BAUD  576000
404
//`define DBG_UART_BAUD  921600
405
`define DBG_UART_BAUD 2000000
406
`define DBG_DCO_FREQ  20000000
407
`define DBG_UART_CNT ((`DBG_DCO_FREQ/`DBG_UART_BAUD)-1)
408
 
409 57 olivier.gi
// Enable/Disable the hardware breakpoint RANGE mode
410
`define HWBRK_RANGE 1'b0
411
 
412 74 olivier.gi
// Counter width for the debug interface UART
413
`define DBG_UART_XFER_CNT_W 16
414
 
415 2 olivier.gi
// Check configuration
416
`ifdef DBG_EN
417
 `ifdef DBG_UART
418
   `ifdef DBG_JTAG
419
CONFIGURATION ERROR: JTAG AND UART DEBUG INTERFACE ARE BOTH ENABLED
420
   `endif
421
 `else
422
   `ifdef DBG_JTAG
423 33 olivier.gi
CONFIGURATION ERROR: JTAG INTERFACE NOT SUPPORTED
424 2 olivier.gi
   `else
425
CONFIGURATION ERROR: JTAG OR UART DEBUG INTERFACE SHOULD BE ENABLED
426
   `endif
427
 `endif
428
`endif
429 67 olivier.gi
 
430
//
431
// MULTIPLIER CONFIGURATION
432
//======================================
433
 
434
// If uncommented, the following define selects
435
// the 16x16 multiplier (1 cycle) instead of the
436
// default 16x8 multplier (2 cycles)
437
//`define MPY_16x16
438
 

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