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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [software/] [ta_uart/] [linker.msp430-elf.x] - Blame information for rev 212

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1 212 olivier.gi
/* ============================================================================ */
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/* Copyright (c) 2014, Texas Instruments Incorporated                           */
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/*  All rights reserved.                                                        */
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/*                                                                              */
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/*  Redistribution and use in source and binary forms, with or without          */
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/*  modification, are permitted provided that the following conditions          */
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/*  are met:                                                                    */
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/*                                                                              */
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/*  *  Redistributions of source code must retain the above copyright           */
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/*     notice, this list of conditions and the following disclaimer.            */
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/*                                                                              */
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/*  *  Redistributions in binary form must reproduce the above copyright        */
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/*     notice, this list of conditions and the following disclaimer in the      */
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/*     documentation and/or other materials provided with the distribution.     */
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/*                                                                              */
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/*  *  Neither the name of Texas Instruments Incorporated nor the names of      */
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/*     its contributors may be used to endorse or promote products derived      */
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/*     from this software without specific prior written permission.            */
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/*                                                                              */
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/*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
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/*  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,       */
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/*  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR      */
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/*  PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR            */
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/*  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,       */
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/*  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,         */
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/*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
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/*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,    */
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/*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR     */
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/*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,              */
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/*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          */
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/* ============================================================================ */
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33
/* This file supports MSP430F110 devices. */
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/* Version: 1.155 */
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/* Default linker script, for normal executables */
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OUTPUT_ARCH(msp430)
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ENTRY(_start)
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MEMORY {
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  SFR              : ORIGIN = 0x0000, LENGTH = 0x0010
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  PERIPHERAL_8BIT  : ORIGIN = 0x0010, LENGTH = 0x00F0
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  PERIPHERAL_16BIT : ORIGIN = 0x0100, LENGTH = 0x0100
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  RAM              : ORIGIN = 0x0200, LENGTH = 0x0400
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  ROM (rx)         : ORIGIN = 0xF000, LENGTH = 0x1000-0x20
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  VECT1            : ORIGIN = 0xFFE0, LENGTH = 0x0002
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  VECT2            : ORIGIN = 0xFFE2, LENGTH = 0x0002
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  VECT3            : ORIGIN = 0xFFE4, LENGTH = 0x0002
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  VECT4            : ORIGIN = 0xFFE6, LENGTH = 0x0002
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  VECT5            : ORIGIN = 0xFFE8, LENGTH = 0x0002
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  VECT6            : ORIGIN = 0xFFEA, LENGTH = 0x0002
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  VECT7            : ORIGIN = 0xFFEC, LENGTH = 0x0002
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  VECT8            : ORIGIN = 0xFFEE, LENGTH = 0x0002
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  VECT9            : ORIGIN = 0xFFF0, LENGTH = 0x0002
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  VECT10           : ORIGIN = 0xFFF2, LENGTH = 0x0002
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  VECT11           : ORIGIN = 0xFFF4, LENGTH = 0x0002
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  VECT12           : ORIGIN = 0xFFF6, LENGTH = 0x0002
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  VECT13           : ORIGIN = 0xFFF8, LENGTH = 0x0002
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  VECT14           : ORIGIN = 0xFFFA, LENGTH = 0x0002
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  VECT15           : ORIGIN = 0xFFFC, LENGTH = 0x0002
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  RESETVEC         : ORIGIN = 0xFFFE, LENGTH = 0x0002
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}
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CCTL0    = 0x0162;
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CCR0     = 0x0172;
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CCTL1    = 0x0164;
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CCR1     = 0x0174;
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TAR      = 0x0170;
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P1OUT    = 0x0021;
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SCCI     = 0x0400;
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CCIFG    = 0x0001;
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SECTIONS
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{
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  __interrupt_vector_1   : { KEEP (*(__interrupt_vector_1 )) } > VECT1
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  __interrupt_vector_2   : { KEEP (*(__interrupt_vector_2 )) } > VECT2
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  __interrupt_vector_3   : { KEEP (*(__interrupt_vector_3 )) KEEP (*(__interrupt_vector_port1)) } > VECT3
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  __interrupt_vector_4   : { KEEP (*(__interrupt_vector_4 )) KEEP (*(__interrupt_vector_port2)) } > VECT4
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  __interrupt_vector_5   : { KEEP (*(__interrupt_vector_5 )) } > VECT5
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  __interrupt_vector_6   : { KEEP (*(__interrupt_vector_6 )) } > VECT6
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  __interrupt_vector_7   : { KEEP (*(__interrupt_vector_7 )) } > VECT7
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  __interrupt_vector_8   : { KEEP (*(__interrupt_vector_8 )) } > VECT8
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  __interrupt_vector_9   : { KEEP (*(__interrupt_vector_9 )) KEEP (*(__interrupt_vector_timera1)) } > VECT9
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  __interrupt_vector_10  : { KEEP (*(__interrupt_vector_10)) KEEP (*(__interrupt_vector_timera0)) } > VECT10
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  __interrupt_vector_11  : { KEEP (*(__interrupt_vector_11)) KEEP (*(__interrupt_vector_wdt)) } > VECT11
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  __interrupt_vector_12  : { KEEP (*(__interrupt_vector_12)) } > VECT12
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  __interrupt_vector_13  : { KEEP (*(__interrupt_vector_13)) } > VECT13
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  __interrupt_vector_14  : { KEEP (*(__interrupt_vector_14)) } > VECT14
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  __interrupt_vector_15  : { KEEP (*(__interrupt_vector_15)) KEEP (*(__interrupt_vector_nmi)) } > VECT15
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  __reset_vector :
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  {
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    KEEP (*(__interrupt_vector_16))
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    KEEP (*(__interrupt_vector_reset))
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    KEEP (*(.resetvec))
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  } > RESETVEC
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  .rodata : {
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    . = ALIGN(2);
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    *(.plt)
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    *(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
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    *(.rodata1)
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    *(.eh_frame_hdr)
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    KEEP (*(.eh_frame))
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    KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
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    PROVIDE (__preinit_array_start = .);
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    KEEP (*(.preinit_array))
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    PROVIDE (__preinit_array_end = .);
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    PROVIDE (__init_array_start = .);
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    KEEP (*(SORT(.init_array.*)))
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    KEEP (*(.init_array))
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    PROVIDE (__init_array_end = .);
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    PROVIDE (__fini_array_start = .);
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    KEEP (*(.fini_array))
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    KEEP (*(SORT(.fini_array.*)))
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    PROVIDE (__fini_array_end = .);
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    LONG(0); /* Sentinel.  */
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119
    /* gcc uses crtbegin.o to find the start of the constructors, so
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       we make sure it is first.  Because this is a wildcard, it
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       doesn't matter if the user does not actually link against
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       crtbegin.o; the linker won't look for a file to match a
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       wildcard.  The wildcard also means that it doesn't matter which
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       directory crtbegin.o is in.  */
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    KEEP (*crtbegin*.o(.ctors))
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    /* We don't want to include the .ctor section from from the
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       crtend.o file until after the sorted ctors.  The .ctor section
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       from the crtend file contains the end of ctors marker and it
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       must be last */
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    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
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    KEEP (*(SORT(.ctors.*)))
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    KEEP (*(.ctors))
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    KEEP (*crtbegin*.o(.dtors))
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    KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
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    KEEP (*(SORT(.dtors.*)))
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    KEEP (*(.dtors))
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  } > ROM
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  .text           :
142
  {
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    . = ALIGN(2);
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    PROVIDE (_start = .);
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    KEEP (*(SORT(.crt_*)))
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    *(.lowtext .text .stub .text.* .gnu.linkonce.t.* .text:*)
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    KEEP (*(.text.*personality*))
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    /* .gnu.warning sections are handled specially by elf32.em.  */
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    *(.gnu.warning)
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    *(.interp .hash .dynsym .dynstr .gnu.version*)
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    PROVIDE (__etext = .);
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    PROVIDE (_etext = .);
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    PROVIDE (etext = .);
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    . = ALIGN(2);
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    KEEP (*(.init))
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    KEEP (*(.fini))
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    KEEP (*(.tm_clone_table))
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  } > ROM
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  .data : {
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    . = ALIGN(2);
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    PROVIDE (__datastart = .);
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    KEEP (*(.jcr))
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    *(.data.rel.ro.local) *(.data.rel.ro*)
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    *(.dynamic)
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    *(.data .data.* .gnu.linkonce.d.*)
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    KEEP (*(.gnu.linkonce.d.*personality*))
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    SORT(CONSTRUCTORS)
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    *(.data1)
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    *(.got.plt) *(.got)
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    /* We want the small data sections together, so single-instruction offsets
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       can access them all, and initialized data all before uninitialized, so
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       we can shorten the on-disk segment size.  */
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    . = ALIGN(2);
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    *(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
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    . = ALIGN(2);
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    _edata = .;
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    PROVIDE (edata = .);
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    PROVIDE (__dataend = .);
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  } > RAM AT>ROM
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186
  /* Note that crt0 assumes this is a multiple of two; all the
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     start/stop symbols are also assumed word-aligned.  */
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  PROVIDE(__romdatastart = LOADADDR(.data));
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  PROVIDE (__romdatacopysize = SIZEOF(.data));
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191
  .bss : {
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    . = ALIGN(2);
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    PROVIDE (__bssstart = .);
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    *(.dynbss)
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    *(.sbss .sbss.*)
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    *(.bss .bss.* .gnu.linkonce.b.*)
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    . = ALIGN(2);
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    *(COMMON)
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    PROVIDE (__bssend = .);
200
  } > RAM
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  PROVIDE (__bsssize = SIZEOF(.bss));
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203
  .noinit (NOLOAD) : {
204
    . = ALIGN(2);
205
    PROVIDE (__noinit_start = .);
206
    *(.noinit)
207
    . = ALIGN(2);
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    PROVIDE (__noinit_end = .);
209
    end = .;
210
  } > RAM
211
 
212
  .stack (ORIGIN (RAM) + LENGTH(RAM)) :
213
  {
214
    PROVIDE (__stack = .);
215
    *(.stack)
216
  }
217
 
218
  .MP430.attributes 0 :
219
  {
220
    KEEP (*(.MSP430.attributes))
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    KEEP (*(.gnu.attributes))
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    KEEP (*(__TI_build_attributes))
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  }
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225
  /* The rest are all not normally part of the runtime image.  */
226
 
227
  /* Stabs debugging sections.  */
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  .stab          0 : { *(.stab) }
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  .stabstr       0 : { *(.stabstr) }
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  .stab.excl     0 : { *(.stab.excl) }
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  .stab.exclstr  0 : { *(.stab.exclstr) }
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  .stab.index    0 : { *(.stab.index) }
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  .stab.indexstr 0 : { *(.stab.indexstr) }
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  .comment       0 : { *(.comment) }
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  /* DWARF debug sections.
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     Symbols in the DWARF debugging sections are relative to the beginning
237
     of the section so we begin them at 0.  */
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  /* DWARF 1 */
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  .debug          0 : { *(.debug) }
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  .line           0 : { *(.line) }
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  /* GNU DWARF 1 extensions */
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  .debug_srcinfo  0 : { *(.debug_srcinfo) }
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  .debug_sfnames  0 : { *(.debug_sfnames) }
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  /* DWARF 1.1 and DWARF 2 */
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  .debug_aranges  0 : { *(.debug_aranges) }
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  .debug_pubnames 0 : { *(.debug_pubnames) }
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  /* DWARF 2 */
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  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
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  .debug_abbrev   0 : { *(.debug_abbrev) }
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  .debug_line     0 : { *(.debug_line .debug_line.* .debug_line_end ) }
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  .debug_frame    0 : { *(.debug_frame) }
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  .debug_str      0 : { *(.debug_str) }
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  .debug_loc      0 : { *(.debug_loc) }
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  .debug_macinfo  0 : { *(.debug_macinfo) }
255
  /* SGI/MIPS DWARF 2 extensions */
256
  .debug_weaknames 0 : { *(.debug_weaknames) }
257
  .debug_funcnames 0 : { *(.debug_funcnames) }
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  .debug_typenames 0 : { *(.debug_typenames) }
259
  .debug_varnames  0 : { *(.debug_varnames) }
260
  /DISCARD/ : { *(.note.GNU-stack) }
261
}

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