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              Or1ksim: The OpenRISC 1000 Architectural Simulator
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              ==================================================
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What is this stuff?
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===================
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This is OpenRISC 1000 architectural simulator. See the file COPYING
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for copying permission. To contact the authors, see the AUTHORS file.
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This simulator loads an assembly file for one of the both architectures
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and it simulates the operation of instructions.
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SVN Repository status
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=====================
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Or1ksim is now part of the openrisc project SVN repository. This contains
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Ork1sim from release 0.3.0 onwards. Earlier versions may be found in the
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legacy or1k project repository.
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Pre-requisites
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==============
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The GNU toolchain for OpenRISC 1000 is required to compile programs for use
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with Or1ksim. Instructions how to build these GNU tools can be found on
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www.opencores.org
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Installation
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============
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See the file INSTALL for generic installation instructions. Full details are
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in the user guide, which can be found in the 'doc' subdirectory.
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GNU Tools
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=========
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Instructions how to build GNU tools can be found on www.opencores.org, or in
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the Embecosm Application Note EAN2: "The OpenCores OpenRISC 1000 Simulator and
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Tool Chain: Installation Guide" .
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Simulator test
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==============
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Follow the instructions in testbench/README to test the simulator. Be warned
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that these tests are very rudimentary in the current release.
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Help
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====
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Run sim with --help option for list of command line options and help in
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interactive mode, to list the commands.
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A user guide may be found in the doc sub-directory.
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If doxygen and dot are installed, structured documentation of the code base
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may be obtained by running the command:
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  doxygen doxygen.config
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from the top level directory.
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OpenRISC and OpenCores
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======================
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This project is licensed under the GNU Public License version 3. See the file
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COPYING for details.
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About the same idea as with GNU project except we want free and open source
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IP (intellectual property) cores. We design open source, synthesizable
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cores. OpenRISC is one such core. It is a 32-bit RISC microprocessor that
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will run GNU/Linux.
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For more information visit us at http://www.opencores.org.
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Upated by Jeremy Bennett (jeremy.bennett@embecosm.com)
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25 May 2009
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