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This is ../../doc/or1ksim.info, produced by makeinfo version 4.13 from
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../../doc/or1ksim.texi.
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4
INFO-DIR-SECTION Embedded development
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START-INFO-DIR-ENTRY
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* Or1ksim: (or32-uclinux-or1ksim).      The OpenRISC 1000 Architectural
7
                                        Simulator
8
END-INFO-DIR-ENTRY
9
 
10
This file documents the OpenRISC Architectural Simulator, Or1ksim.
11
 
12
Copyright (C) 2008, 2009 Embecosm Limited.
13
 
14
     Permission is granted to copy, distribute and/or modify this
15
     document under the terms of the GNU Free Documentation License,
16
     Version 1.2 or any later version published by the Free Software
17
     Foundation; with no Invariant Sections, with no Front-Cover Texts,
18
     and with no Back-Cover Texts.  A copy of the license is included
19
     in the section entitled "GNU Free Documentation License".
20
 
21

22
File: or1ksim.info,  Node: Top,  Next: Installation,  Up: (dir)
23
 
24
Scope of this Document
25
**********************
26
 
27
This document is the user guide for Or1ksim, the OpenRISC 1000
28
Architectural Simulator.
29
 
30
* Menu:
31
 
32
* Installation::
33
* Usage::
34
* Configuration::
35
* Interactive Command Line::
36
* Verification API::
37
 
38
* Code Internals::
39
 
40
* GNU Free Documentation License::  The license for this documentation
41
* Index::
42
 
43

44
File: or1ksim.info,  Node: Installation,  Next: Usage,  Prev: Top,  Up: Top
45
 
46
1 Installation
47
**************
48
 
49
Installation follows standard GNU protocols.
50
 
51
* Menu:
52
 
53
* Preparation::
54
* Configuring the Build::
55
* Build and Install::
56
* Known Issues::
57
 
58

59
File: or1ksim.info,  Node: Preparation,  Next: Configuring the Build,  Up: Installation
60
 
61
1.1 Preparation
62
===============
63
 
64
Unpack the software and create a _separate_ directory in which to build
65
it:
66
 
67 96 jeremybenn
     tar jxf or1ksim-2010-05-02.tar.bz2
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     mkdir builddir_or1ksim
69
     cd builddir_or1ksim
70
 
71

72
File: or1ksim.info,  Node: Configuring the Build,  Next: Build and Install,  Prev: Preparation,  Up: Installation
73
 
74
1.2 Configuring the Build
75
=========================
76
 
77
Configure the software using the `configure' script in the main
78
directory.
79
 
80
The most significant argument is `--target', which should specify the
81 82 jeremybenn
OpenRISC 1000 32-bit architecture.  If this argument is omitted, it will
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default to OpenRISC 1000 32-bit with a warning
83
 
84 96 jeremybenn
     ../or1ksim-2010-05-02/configure --target=or32-uclinux ...
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86
There are several other options available, many of which are standard
87 82 jeremybenn
to GNU `configure' scripts.  Use `configure --help' to see all the
88
options.  The most useful is `--prefix' to specify a directory for
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installation of the tools.
90
 
91
A number of Or1ksim features in the simulator do require enabling at
92 82 jeremybenn
configuration.  These include
93 19 jeremybenn
 
94
`--enable-profiling'
95
`--disable-profiling'
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     If enabled, Or1ksim is compiled for profiling with `gprof'.  This
97
     is disabled by default.  Only really of value for developers of
98 19 jeremybenn
     Or1ksim.
99
 
100
`--enable-execution=simple'
101
`--enable-execution=complex'
102
`--enable-execution=dynamic'
103
     Or1ksim has developed to improve functionality and performance.
104
     This feature allows three versions of Or1ksim to be built
105
 
106
    `--enable-execution=simple'
107
          Build the original simple interpreting simulator
108
 
109
    `--enable-execution=complex'
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          Build a more complex interpreting simulator.  Experiments
111
          suggest this is 50% faster than the simple simulator.  This
112
          is the default.
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114
    `--enable-execution=dynamic'
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          Build a dynamically compiling simulator.  This is the way
116
          many modern ISS are built.  This represents a work in
117
          progress.  Currently Or1ksim will compile, but segfaults if
118
          configured with this option.
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120
 
121
     The default is `--enable-execution=complex'.
122
 
123
`--enable-ethphy'
124
`--disable-ethphy'
125
     If enabled, this option allows the Ethernet to be simulated by
126
     connecting via a socket (the alternative reads and writes, from
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     and to files).  This must then be configured using the relevant
128
     fields in the `ethernet' section of the configuration file.  *Note
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     Ethernet Configuration: Ethernet Configuration.
130
 
131
     The default is for this to be disabled.
132
 
133
`--enable-range-stats'
134
`--disable-range-stats'
135
     If enabled, this option allows statistics to be collected to
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     analyse register access over time.  The default is for this to be
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     disabled.
138
 
139
`--enable-ov-flag'
140
`--disable-ov-flag'
141
     If enabled, this option causes instructions to set the overflow
142 82 jeremybenn
     flag.  The instructions affected by this are `l.add', `l.addc',
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     `l.addi', `l.and', `l.andi', `l.div', `l.divu', `l.mul', `l.muli',
144
     `l.or', `l.ori', `l.sll', `l.slli', `l.srl', `l.srli', `l.sra',
145
     `l.srai', `l.sub', `l.xor' and `l.xori'.
146
 
147
     The default is for this to be disabled.
148
 
149
          Caution: This appears a very dangerous option, to the extent
150 82 jeremybenn
          of arguably being a bug.  Whether or not flags are set is
151
          part of the OpenRISC 1000 architectural specification.
152
          Within the above list, the arithmetic instructions (`l.add',
153
          `l.addc', `l.addi', `l.div', `l.divu', `l.mul', `l.muli' and
154
          `l.sub'), together with `l.addic' which is missed out, set
155
          the overflow flag.  All the others (`l.and', `l.andi',
156
          `l.or', `l.ori', `l.sll', `l.slli', `l.srl', `l.srli',
157
          `l.sra', `l.srai', `l.xor' and `l.xori') do not.
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159
          Thus it is impossible to get correct behavior whichever way
160
          this option is set.
161
 
162
`--enable-arith-flag'
163
`--disable-arith-flag'
164
     If enabled, this option causes instructions to set the flag (`F'
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     bit) in the supervision register.  The instructions affected by
166 19 jeremybenn
     this are `l.add', `l.addc', `l.addi', `l.and' and `l.andi'.
167
 
168
     The default is for this to be disabled.
169
 
170
          Caution: As with `--enable-ov-flag', this appears another
171
          very dangerous option, to the extent of arguably being a bug.
172
          It also appears to be only partially implemented--why only
173
          the instructions early in the alphabet?
174
 
175
          Whether or not flags are set is part of the OpenRISC 1000
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          architectural specification.  The only flags which should set
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          this are the "set flag" instructions: `l.sfeq', `l.sfeqi',
178
          `l.sfges', `l.sfgesi', `l.sfgeu', `l.sfgeui', `l.sfgts',
179
          `l.sfgtsi', `l.sfgtu', `l.sfgtui', `l.sfles', `l.sflesi',
180
          `l.sfleu', `l.sfleui', `l.sflts', `l.sfltsi', `l.sfltu',
181
          `l.sfltui', `l.sfne' and `l.sfnei'.
182
 
183
          The flags are correctly set (irrespective of
184
          `--enable-arith_flag').
185
 
186
          Correct behavior is thus achieved if this flag is not set.
187
          `--enable-arith-flag' should never be used.
188
 
189
 
190
`--enable-debug'
191
`--disable-debug'
192
     This is a feature of the Argtable2 package used to process
193 82 jeremybenn
     arguments.  If enabled, some debugging features are turned on in
194
     Argtable2.  It is provided for completeness, but there is no
195
     reason why this feature should ever be needed by any Or1ksim user.
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197 82 jeremybenn
`--enable-all-tests'
198
`--disable-all-tests'
199
     Some of the tests (at the time of writing just one) will not
200
     compile without error.  If enabled with this flag, all test
201
     programs will be compiled with `make check'.
202 19 jeremybenn
 
203 82 jeremybenn
     This flag is intended for those working on the test package, who
204
     wish to get the missing test(s) working.
205
 
206
 
207 19 jeremybenn

208
File: or1ksim.info,  Node: Build and Install,  Next: Known Issues,  Prev: Configuring the Build,  Up: Installation
209
 
210
1.3 Building and Installing
211
===========================
212
 
213 82 jeremybenn
Build the tool with:
214 19 jeremybenn
 
215
     make all
216 82 jeremybenn
 
217
If you have the OpenRISC tool chain and DejaGNU installed, you can
218
verify the tool as follows (otherwise omit this step):
219
 
220
     make check
221
 
222
Install the tool with:
223
 
224 19 jeremybenn
     make install
225
 
226
This will install the three variations of the Or1ksim tool,
227
`or32-uclinux-sim', `or32-uclinux-psim' and `or32-uclinux-mpsim', the
228
Or1ksim library, `libsim', the header file, `or1ksim.h' and this
229
documentation in `info' format.
230
 
231
     Note: Testing Or1ksim with `make check' is not yet supported.
232
 
233
The documentation may be created and installed in alternative formats
234
(PDF, Postscript, DVI, HTML) with for example:
235
 
236
     make pdf
237
     make install-pdf
238
 
239

240
File: or1ksim.info,  Node: Known Issues,  Prev: Build and Install,  Up: Installation
241
 
242
1.4 Known Problems and Issues
243
=============================
244
 
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The following problems and issues are known about with Or1ksim
246 96 jeremybenn
2010-05-02.  The OpenRISC tracker may be used to see the current state
247 90 jeremybenn
of these issues and to raise new problems and feature requests.  It may
248
be found at `http://www.opencores.org/ptracker.cgi/view/or1k/398'.
249 19 jeremybenn
 
250
   * The Supervision Register Little Endian Enable (LEE) bit is
251 82 jeremybenn
     ignored.  Or1ksim can be built for either little endian or big
252 19 jeremybenn
     endian use, but that behavior cannot be changed dynamically.
253
 
254
   * The NPC is a read/write register, but after being written it
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     clears the pipeline.  This means that if the processor is stalled,
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     the value should subsequently read back as 0, until the processor
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     is unstalled and able to refill its pipeline.  By default Or1ksim
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     always reports back the value of NPC, even when it has been
259
     written while stalled.
260
 
261
     There is now an option, `--strict-npc', which will enforce this
262 82 jeremybenn
     behavior.  At some stage in the future it will become the default
263 19 jeremybenn
     behavior, but for now it is an option, since its use will break
264
     GDB.
265
 
266
   * The memory components are given names in the configuration file.
267
     However there is currently no way for Or1ksim to report that name
268
     back to the user (for example to identify which memory block
269
     corresponds to a particular access).
270
 
271
   * Or1ksim allows the processor to be stalled (from the command
272 82 jeremybenn
     line), even if there is no debugger present.  This seems to be a
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     meaningless operation.
274
 
275
   * Or1ksim is not reentrant, so a program cannot instantiate multiple
276 82 jeremybenn
     instances using the library.  This is clearly a problem when
277
     considering multi-core applications.  However it stems from the
278
     original design, and can only be fixed by a complete rewrite.  The
279 19 jeremybenn
     entire source code uses static global constants liberally!
280
 
281
   * There is no support for floating point instructions currently in
282 82 jeremybenn
     Or1ksim.  However this is a work in progress and should be
283
     available in the future.
284 19 jeremybenn
 
285
 
286

287
File: or1ksim.info,  Node: Usage,  Next: Configuration,  Prev: Installation,  Up: Top
288
 
289
2 Usage
290
*******
291
 
292
* Menu:
293
 
294
* Standalone Simulator::
295
* Profiling Utility::
296
* Memory Profiling Utility::
297
* Simulator Library::
298
 
299

300
File: or1ksim.info,  Node: Standalone Simulator,  Next: Profiling Utility,  Up: Usage
301
 
302
2.1 Standalone Simulator
303
========================
304
 
305
The general form the standalone command is:
306
 
307
     or32-uclinux-sim [-vhi] [-f FILE] [--nosrv] [--srv=[N]] [-d STR]
308
                      [--enable-profile] [--enable-mprofile] [FILE]
309
 
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Many of the options have both a short and a long form.  For example
311
`-h' or `--help'.
312 19 jeremybenn
 
313
`-v'
314
`--version'
315
     Print out the version and copyright notice for Or1ksim and exit.
316
 
317
`-h'
318
`--help'
319
     Print out help about the command line options and what they mean.
320
 
321
`-f FILE'
322
`--file FILE'
323
     Read configuration commands from the specified file, looking first
324
     in the current directory, and otherwise in the `$HOME/.or1k'
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     directory.  If this argument is not specified, the file `sim.cfg'
326
     in those two locations is used.  Failure to find the file is a
327
     fatal error.  *Note Configuration: Configuration, for detailed
328
     information on configuring Or1ksim.
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330
`--nosrv'
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     Do not start up the debug server.  This overrides any setting
332
     specified in the configuration file.  This option may not be
333
     specified with `--srv'.  If it is, a rude message is printed and
334
     the `--nosrv' option is ignored.
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336
`--srv'
337
 
338
`--srv=N'
339 82 jeremybenn
     Start up the debug server.  If the parameter, N, is specified, use
340 19 jeremybenn
     that as the TCP/IP port for the server, otherwise a random value
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     from the private port range (41920-65535) will be used.  This
342
     option may not be specified with `--nosrv'.  If it is, a rude
343
     message is printed and the `--nosrv' option is ignored.
344 19 jeremybenn
 
345
`-d=CONFIG_STRING'
346
`--debug-config=CONFIG_STRING'
347 82 jeremybenn
     Enable selected debug messages in Or1ksim.  This parameter is for
348
     use by developers only, and is not covered further here.  See the
349 19 jeremybenn
     source code for more details.
350
 
351
`-i'
352
`--interactive'
353
     After starting, drop into the Or1ksim interactive command shell.
354
 
355
`--strict-npc'
356
     In real hardware, setting the next program counter (NPC, SPR 16),
357 82 jeremybenn
     flushes the processor pipeline.  The consequence of this is that
358
     until the pipeline refills, reading the NPC will return zero.
359
     This is typically the case when debugging, since the processor is
360 19 jeremybenn
     stalled.
361
 
362
     Historically, Or1ksim has always returned the value of the NPC,
363 82 jeremybenn
     irrespective of when it is changed.  If the `--strict-npc' option
364
     is used, then Or1ksim will mirror real hardware more accurately.
365
     If the NPC is changed while the processor is stalled, subsequent
366 19 jeremybenn
     reads of its value will return 0 until the processor is unstalled.
367
 
368
     This is not currently the default behavior, since tools such as
369
     GDB have been implemented assuming the historic Or1ksim behavior.
370
     However at some time in the future it will become the default.
371
 
372
`--enable-profile'
373
     Enable instruction profiling.
374
 
375
`--enable-mprofile'
376
     Enable memory profiling.
377
 
378
 
379

380
File: or1ksim.info,  Node: Profiling Utility,  Next: Memory Profiling Utility,  Prev: Standalone Simulator,  Up: Usage
381
 
382
2.2 Profiling Utility
383
=====================
384
 
385 82 jeremybenn
This utility analyses instruction profile data generated by Or1ksim.
386
It may be invoked as a standalone command, or from the Or1ksim CLI.
387
The general form the standalone command is:
388 19 jeremybenn
 
389
     or32-uclinux-profile [-vhcq] [-g=FILE]
390
 
391 82 jeremybenn
Many of the options have both a short and a long form.  For example
392
`-h' or `--help'.
393 19 jeremybenn
 
394
`-v'
395
`--version'
396
     Print out the version and copyright notice for the Or1ksim
397
     profiling utility and exit.
398
 
399
`-h'
400
`--help'
401
     Print out help about the command line options and what they mean.
402
 
403
`-c'
404
`--cumulative'
405
     Show cumulative sum of cycles in functions
406
 
407
`-q'
408
`--quiet'
409
     Suppress messages
410
 
411
`-g=FILE'
412
`--generate=FILE'
413 82 jeremybenn
     The data file to analyse.  If omitted, the default file,
414 19 jeremybenn
     `sim.profile' is used.
415
 
416
 
417

418
File: or1ksim.info,  Node: Memory Profiling Utility,  Next: Simulator Library,  Prev: Profiling Utility,  Up: Usage
419
 
420
2.3 Memory Profiling Utility
421
============================
422
 
423 82 jeremybenn
This utility analyses memory profile data generated by Or1ksim.  It may
424
be invoked as a standalone command, or from the Or1ksim CLI.  The
425 19 jeremybenn
general form the standalone command is:
426
 
427
     or32-uclinux-mprofile  [-vh] [-m=M] [-g=N] [-f=FILE] FROM TO
428
 
429 82 jeremybenn
Many of the options have both a short and a long form.  For example
430
`-h' or `--help'.
431 19 jeremybenn
 
432
`-v'
433
`--version'
434
     Print out the version and copyright notice for the Or1ksim memory
435
     profiling utility and exit.
436
 
437
`-h'
438
`--help'
439
     Print out help about the command line options and what they mean.
440
 
441
`-m=M'
442
`--mode=M'
443 82 jeremybenn
     Specify the mode out output.  Permitted options are
444 19 jeremybenn
 
445
    `detailed'
446
    `d'
447 82 jeremybenn
          Detailed output.  This is the default if no mode is specified.
448 19 jeremybenn
 
449
    `pretty'
450
    `p'
451
          Pretty printed output.
452
 
453
    `access'
454
    `a'
455
          Memory accesses only.
456
 
457
    `width'
458
    `w'
459
          Access width only.
460
 
461
 
462
`-g=N'
463
`--group=N'
464
     Group 2^n bits of successive addresses together.
465
 
466
`-f=FILE'
467
`--filename=FILE'
468 82 jeremybenn
     The data file to analyse.  If not specified, the default,
469 19 jeremybenn
     `sim.profile' is used.
470
 
471
`FROM'
472
`TO'
473
     FROM and TO are respectively the start and end address of the
474
     region of memory to be analysed.
475
 
476
 
477

478
File: or1ksim.info,  Node: Simulator Library,  Prev: Memory Profiling Utility,  Up: Usage
479
 
480
2.4 Simulator Library
481
=====================
482
 
483
Or1ksim may be used as a static of dynamic library, `libsim.a' or
484 82 jeremybenn
`libsim.so'.  When compiling with the static library, the flag, `-lsim'
485 19 jeremybenn
should be added to the link command.
486
 
487
The header file `or1ksim.h' contains appropriate declarations of the
488 82 jeremybenn
functions exported by the Or1ksim library.  These are:
489 19 jeremybenn
 
490 93 jeremybenn
 -- `or1ksim.h': int or1ksim_init (const char
491
     *CONFIG_FILE, const char *IMAGE_FILE, void *CLASS_PTR, int
492
     (*UPR)(void *CLASS_PTR, unsigned long int ADDR, unsigned char
493
     MASK[], unsigned char RDATA[], int DATA_LEN), int (*UPW)(void
494
     *CLASS_PTR, unsigned long int ADDR, unsigned char MASK[], unsigned
495
     char WDATA[], int DATA_LEN))
496
 
497 19 jeremybenn
     The initialization function is supplied with the name of a
498
     configuration file, CONFIG_FILE, an executable image, IMAGE_FILE,
499
     a pointer to the calling class, CLASS_PTR (since the library may
500
     be used from C++) and two up-call functions, one for reads, UPR,
501
     and one for writes, UPW.
502
 
503
     *Note Configuration: Configuration, for detailed information on
504
     configuring Or1ksim and the format of the configuration file.
505
 
506
     UPW is called for any write to an address external to the model
507 82 jeremybenn
     (determined by a `generic' section in the configuration file).
508
     UPR is called for any reads to an external address.  The CLASS_PTR
509
     is passed back with these upcalls, allowing the function to
510
     associate the call with the class which originally initialized the
511 93 jeremybenn
     library.  Both UPW and UPR should return zero on success and
512
     non-zero otherwise.  At the present time the meaning of non-zero
513
     values is not defined but this may change in the future.
514 19 jeremybenn
 
515 93 jeremybenn
     MASK indicates which bytes in the data are to be written or read.
516 82 jeremybenn
     Bytes to be read/written should have 0xff set in MASK.  Otherwise
517 93 jeremybenn
     the byte should be zero.  The adddress, ADDR, is the _full_
518
     address, since the upcall function must handle all generic
519
     devices, using the full address for decoding.
520 19 jeremybenn
 
521 93 jeremybenn
     Endianness is not completely transparent, since Or1ksim is
522
     transferring byte vectors, not multi-byte values.
523 19 jeremybenn
 
524 93 jeremybenn
          Caution: This is a change from version 0.3.0. It simplifies
525
          the interface, and makes Or1ksim more consistent with payload
526
          representation in SystemC TLM 2.0.
527 19 jeremybenn
 
528 93 jeremybenn
          Note: The current implementation of Or1ksim always transfers
529
          single words (4 bytes), using masks if smaller values are
530
          required.  In this it mimcs the behavior of the WishBone bus.
531
 
532
 
533 19 jeremybenn
 -- `or1ksim.h': int or1ksim_run (double DURATION)
534
     Run the simulator for the simulated duration specified (in
535
     seconds).
536
 
537
 
538
 -- `or1ksim.h': void or1ksim_reset_duration (double DURATION)
539
     Change the duration of a run specified in an earlier call to
540 82 jeremybenn
     `or1ksim_run'.  Typically this is called from an upcall, which
541 19 jeremybenn
     realizes it needs to change the duration of the run specified in
542
     the call to `or1ksim_run' that has been interrupted by the upcall.
543
 
544
     The time specified is the amount of time that the run must continue
545
     for (i.e the duration from _now_, not the duration from the
546
     original call to `or1ksim_run').
547
 
548
 
549
 -- `or1ksim.h': void or1ksim_set_time_point ()
550 82 jeremybenn
     Set a timing point.  For use with `or1ksim_get_time_period'.
551 19 jeremybenn
 
552
 
553
 -- `or1ksim.h': double or1ksim_get_time_period ()
554
     Return the simulated time (in seconds) that has elapsed since the
555
     last call to `or1ksim_set_time_point'.
556
 
557
 
558
 -- `or1ksim.h': int or1ksim_is_le ()
559
     Return 1 (logical true) if the Or1ksim simulation is
560
     little-endian, 0 otherwise.
561
 
562
 
563
 -- `or1ksim.h': unsigned long int or1ksim_clock_rate ()
564 82 jeremybenn
     Return the Or1ksim clock rate (in Hz).  This is the value
565
     specified in the configuration file.
566 19 jeremybenn
 
567
 
568
 -- `or1ksim.h': void or1ksim_interrupt (int I)
569 82 jeremybenn
     Generate an edge-triggered interrupt on interrupt line I.  The
570
     interrupt is then immediately cleared automatically.  A warning
571 19 jeremybenn
     will be generated and the interrupt request ignored if level
572
     sensitive interrupts have been configured with the programmable
573
     interrupt controller (*note Interrupt Configuration: Interrupt
574
     Configuration.).
575
 
576
 
577
 -- `or1ksim.h': void or1ksim_interrupt_set (int I)
578 82 jeremybenn
     Assert a level-triggered interrupt on interrupt line I.  The
579 19 jeremybenn
     interrupt must be cleared separately by an explicit call to
580 82 jeremybenn
     `or1ksim_interrupt_clear'.  A warning will be generated, and the
581 19 jeremybenn
     interrupt request ignored if edge sensitive interrupts have been
582
     configured with the programmable interrupt controller (*note
583
     Interrupt Configuration: Interrupt Configuration.).
584
 
585
 
586
 -- `or1ksim.h': void or1ksim_interrupt_clear (int I)
587
     Clear a level-triggered interrupt on interrupt line I, which was
588 82 jeremybenn
     previously asserted by a call to `or1ksim_interrupt_set'.  A
589 19 jeremybenn
     warning will be generated, and the interrupt request ignored if
590
     edge sensitive interrupts have been configured with the
591
     programmable interrupt controller (*note Interrupt Configuration:
592
     Interrupt Configuration.).
593
 
594
 
595
The libraries will be installed in the `lib' sub-directory of the main
596
installation directory (as specified with the `--prefix' option to the
597
`configure' script).
598
 
599
For example if the main installation directory is `/opt/or1ksim', the
600 82 jeremybenn
library will be found in the `/opt/or1ksim/lib' directory.  It is
601 19 jeremybenn
available as both a static library (`libsim.a') and a shared object
602
(`libsim.so').
603
 
604
To link against the library add the `-lsim' flag when linking and do
605
one of the following:
606
 
607
   * Add the library directory to the `LD_LIBRARY_PATH' environment
608 82 jeremybenn
     variable during execution.  For example:
609 19 jeremybenn
 
610
          export LD_LIBRARY_PATH=/opt/or1ksim/lib:$LD_LIBRARY_PATH
611
 
612
   * Add the library directory to the `LD_RUN_PATH' environment
613 82 jeremybenn
     variable during linking.  For example:
614 19 jeremybenn
 
615
          export LD_RUN_PATH=/opt/or1ksim/lib:$LD_RUN_PATH
616
 
617
   * Use the linker `--rpath' option and specify the library directory
618 82 jeremybenn
     when linking your program.  For example
619 19 jeremybenn
 
620 82 jeremybenn
          gcc ...  -Wl,--rpath -Wl,/opt/or1ksim/lib ...
621 19 jeremybenn
 
622
   * Add the library directory to `/etc/ld.so.conf'
623
 
624
 
625

626
File: or1ksim.info,  Node: Configuration,  Next: Interactive Command Line,  Prev: Usage,  Up: Top
627
 
628
3 Configuration
629
***************
630
 
631 82 jeremybenn
Or1ksim is configured through a configuration file.  This is specified
632 19 jeremybenn
through the `-f' parameter to the Or1ksim command, or passed as a
633 82 jeremybenn
string when initializing the Or1ksim library.  If no file is specified,
634
the default `sim.cfg' is used.  The file is looked for first in the
635 19 jeremybenn
current directory, then in the `$HOME/.or1k' directory of the user.
636
 
637
* Menu:
638
 
639
* Configuration File Format::
640
* Simulator Configuration::
641
* Core OpenRISC Configuration::
642
* Peripheral Configuration::
643
 
644

645
File: or1ksim.info,  Node: Configuration File Format,  Next: Simulator Configuration,  Up: Configuration
646
 
647
3.1 Configuration File Format
648
=============================
649
 
650
The configuration file is a plain text file.
651
 
652
* Menu:
653
 
654
* Configuration File Preprocessing::
655
* Configuration File Syntax::
656
 
657

658
File: or1ksim.info,  Node: Configuration File Preprocessing,  Next: Configuration File Syntax,  Up: Configuration File Format
659
 
660
3.1.1 Configuration File Preprocessing
661
--------------------------------------
662
 
663 82 jeremybenn
The configuration file may include C style comments (i.e.  delimited by
664 19 jeremybenn
`/*' and `*/').
665
 
666
Configure files may be included, using
667
 
668
     include FILENAME_TO_INCLUDE
669
 
670

671
File: or1ksim.info,  Node: Configuration File Syntax,  Prev: Configuration File Preprocessing,  Up: Configuration File Format
672
 
673
3.1.2 Configuration File Syntax
674
-------------------------------
675
 
676
The configuration file is divided into a series of sections, with the
677
general form:
678
 
679
     section SECTION_NAME
680
 
681
       ...
682
 
683
     end
684
 
685
Sections may also have sub-sections within them (currently only the
686
ATA/ATAPI disc interface uses this).
687
 
688
Within a section, or sub-section are a series of parameter assignments,
689
one per line, withe the general form
690
 
691
       PARAMETER = VALUE
692
 
693
Depending on the parameter, the value may be a named value (an
694
enumeration), an integer (specified in any format acceptable in C) or a
695 82 jeremybenn
string in doubple quotes.  For flag parameters, the value 1 is used to
696
mean "true" or "on" and the value "0" to mean "false" or "off".  An
697 19 jeremybenn
example from a memory section shows each of these
698
 
699
     section memory
700
       type    = random
701
       pattern = 0x00
702
       name    = "FLASH"
703
       ...
704
     end
705
 
706
Many parameters are optional and take reasonable default values if not
707 82 jeremybenn
specified.  However there are some parameters (for example the `ce'
708 19 jeremybenn
parameter in `section memory') _must_ be specified.
709
 
710
Subsections are introduced by a keyword, with a parameter value (no `='
711 82 jeremybenn
sign), and end with the same keyword prefixed by `end'.  Thus the
712 19 jeremybenn
ATA/ATAPI inteface (`section ata') has a `device' subsection, thus:
713
 
714
     section ata
715
       ...
716
       device 0
717
         type    = 1
718
         file = "FILENAME"
719
         ...
720
       enddevice
721
       ...
722
     end
723
 
724
Some sections (for example `section sim') should appear only once.
725
Others (for example `section memory' may appear multiple times.
726
 
727
Sections may be omitted, _unless they contain parameters which are
728 82 jeremybenn
non-optional_.  If the section describes a part of the simulator which
729 19 jeremybenn
is optional (for example whether it has a UART), then that
730 82 jeremybenn
functionality will not be provided.  If the section describes a part of
731 19 jeremybenn
the simulator which is not optional (for example the CPU), then all the
732
parameters of that section will take their default values.
733
 
734
All optional parts of the functionality are always described by
735
sections including a `enabled' parameter, which can be set to 0 to
736
ensure that functionality is explicitly omitted.
737
 
738
Even if a section is disabled, all its parameters will be read and
739 82 jeremybenn
stored.  This is helpful if the section is subsequently enabled from
740
the Or1ksim command line (*note Interactive Command Line: Interactive
741 19 jeremybenn
Command Line.).
742
 
743
     Tip: It generally clearer to have sections describing _all_
744
     components, with omitted functionality explicitly indicated by
745
     setting the `enabled' parameter to 0
746
 
747
The following sections describe the various configuration sections and
748
the parameters which may be set in each.
749
 
750

751
File: or1ksim.info,  Node: Simulator Configuration,  Next: Core OpenRISC Configuration,  Prev: Configuration File Format,  Up: Configuration
752
 
753
3.2 Simulator Configuration
754
===========================
755
 
756
* Menu:
757
 
758
* Simulator Behavior::
759
* Verification API Configuration::
760
* CUC Configuration::
761
 
762

763
File: or1ksim.info,  Node: Simulator Behavior,  Next: Verification API Configuration,  Up: Simulator Configuration
764
 
765
3.2.1 Simulator Behavior
766
------------------------
767
 
768 82 jeremybenn
Simulator behavior is described in `section sim'.  This section should
769
appear only once.  The following parameters may be specified.
770 19 jeremybenn
 
771
`verbose = 0|1'
772 82 jeremybenn
     If 1 (true), print extra messages.  Default 0.
773 19 jeremybenn
 
774
`debug = 0-9'
775 82 jeremybenn
 
776
     higher the value the greater the number of messages.  Default 0.
777
     Negative values will be treated as 0 (with a warning).  Values
778
     that are too large will be treated as 9 (with a warning).
779 19 jeremybenn
 
780
`profile = 0|1'
781
     If 1 (true) generate a profiling file using the file specified in
782 82 jeremybenn
     the `prof_file' parameter or otherwise `sim.profile'.  Default 0.
783 19 jeremybenn
 
784
`prof_file = ``FILENAME'''
785 82 jeremybenn
     Specifies the file to be used with the `profile' parameter.
786
     Default `sim.profile'.  For backwards compatibility, the
787
     alternative name `prof_fn' is supported for this parameter, but
788
     deprecated.
789 19 jeremybenn
 
790
`mprofile = 0|1'
791
     If 1 (true) generate a memory profiling file using the file
792
     specified in the `mprof_file' parameter or otherwise
793 82 jeremybenn
     `sim.mprofile'.  Default 0.
794 19 jeremybenn
 
795
`mprof_fn = ``FILENAME'''
796
     Specifies the file to be used with the `mprofile' parameter.
797 82 jeremybenn
     Default `sim.mprofile'.  For backwards compatibility, the
798 19 jeremybenn
     alternative name `mprof_fn' is supported for this parameter, but
799
     deprecated.
800
 
801
`history = 0|1'
802 82 jeremybenn
     If 1 (true) track execution flow.  Default 0.
803 19 jeremybenn
 
804
          Note: Setting this parameter seriously degrades performance.
805
 
806
          Note: If this execution flow tracking is enabled, then
807
          `dependstats' must be enabled in the CPU configuration
808
          section (*note CPU Configuration: CPU Configuration.).
809
 
810
`exe_log = 0|1'
811 82 jeremybenn
     If 1 (true), generate an execution log.  Log is written to the
812
     file specified in parameter `exe_log_file'.  Default 0.
813 19 jeremybenn
 
814
          Note: Setting this parameter seriously degrades performance.
815
 
816
`exe_log_type = default|hardware|simple|software'
817
     Type of execution log to produce.
818
 
819
    `default'
820 82 jeremybenn
          Produce default output for the execution log.  In the current
821 19 jeremybenn
          implementation this is the equivalent of `hardware'.
822
 
823
    `hardware'
824
          After each instruction execution, log the number of
825
          instructions executed so far, the next instruction to execute
826
          (in hex), the general purpose registers (GPRs), status
827
          register, exception program counter, exception, effective
828
          address register and exception status register.
829
 
830
    `simple'
831
          After each instruction execution, log the number of
832
          instructions executed so far and the next instruction to
833
          execute, symbolically disassembled.
834
 
835
    `software'
836
          After each instruction execution, log the number of
837
          instructions executed so far and the next instruction to
838 82 jeremybenn
          execute, symbolically disassembled.  Also show the value of
839 19 jeremybenn
          each operand to the instruction.
840
 
841
 
842 82 jeremybenn
     Default value `hardware'.  Any unrecognized keyword (case
843 19 jeremybenn
     insensitive) will be treated as the default with a warning.
844
 
845
          Note: Execution logs can be _very_ big.
846
 
847
`exe_log_start = VALUE'
848 82 jeremybenn
     Address of the first instruction to start logging.  Default 0.
849 19 jeremybenn
 
850
`exe_log_end = VALUE'
851 82 jeremybenn
     Address of the last instruction to log.  Default no limit (i.e
852
     once started logging will continue until the simulator exits).
853 19 jeremybenn
 
854
`exe_log_marker = VALUE'
855
     Specifies the number of instructions between printing horizontal
856 82 jeremybenn
     markers.  Default is to produce no markers.
857 19 jeremybenn
 
858
`exe_log_file = FILENAME'
859
     Filename for the execution log filename if `exe_log' is enabled.
860 82 jeremybenn
     Default `executed.log'.  For backwards compatibility, the
861 19 jeremybenn
     alternative name `exe_log_fn' is supported for this parameter, but
862
     deprecated.
863
 
864
`clkcycle = VALUE[ps|ns|us|ms]'
865 82 jeremybenn
     Specify the time taken by one clock cycle.  If no units are
866
     specified, `ps' is assumed.  Default 4000ps (250MHz).
867 19 jeremybenn
 
868
 
869

870
File: or1ksim.info,  Node: Verification API Configuration,  Next: CUC Configuration,  Prev: Simulator Behavior,  Up: Simulator Configuration
871
 
872
3.2.2 Verification API (VAPI) Configuration
873
-------------------------------------------
874
 
875
The Verification API (VAPI) provides a TCP/IP interface to allow
876 82 jeremybenn
components of the simulation to be controlled externally.  *Note
877 19 jeremybenn
Verification API: Verification API, for more details.
878
 
879 82 jeremybenn
Verification API configuration is described in `section vapi'.  This
880
section may appear at most once.  The following parameters may be
881 19 jeremybenn
specified.
882
 
883
`enabled = 0|1'
884
     If 1 (true), verification API is enabled and its server started.
885
     If 0 (the default), it is disabled.
886
 
887
`server_port = VALUE'
888
     When VAPI is enabled, communication will be via TCP/IP on the port
889 82 jeremybenn
     specified by VALUE.  The value must lie in the range 1 to 65535.
890 19 jeremybenn
     The default value is 50000.
891
 
892 82 jeremybenn
          Tip: There is no registered port for Or1ksim VAPI.  Good
893 19 jeremybenn
          practice suggests users should adopt port values in the
894 82 jeremybenn
          "Dynamic" or "Private" port range, i.e.  49152-65535.
895 19 jeremybenn
 
896
`log_enabled = 0|1'
897
     If 1 (true), all VAPI requests and sent commands will be logged.
898 82 jeremybenn
     If 0 (the default), logging is diabled.  Logs are written to the
899 19 jeremybenn
     file specified by the `vapi_log_file' field (see below).
900
 
901
          Caution: This can generate a substantial amount of file I/O
902
          and seriously degrade simulator performance.
903
 
904
`hide_device_id = 0|1'
905 82 jeremybenn
     If 1 (true) don't log the device ID.  If 0 (the default), log the
906
     device ID.  This feature (when set to 1) is provided for backwards
907 19 jeremybenn
     compatibility with an old version of VAPI.
908
 
909
`vapi_log_file = "FILENAME"'
910
     Use `filename' as the file for logged data is logging is enabled
911 82 jeremybenn
     (see `log_enabled' above).  The default is `"vapi.log"'.  For
912 19 jeremybenn
     backwards compatibility, the alternative name `vapi_log_fn' is
913
     supported for this parameter, but deprecated.
914
 
915
 
916

917
File: or1ksim.info,  Node: CUC Configuration,  Prev: Verification API Configuration,  Up: Simulator Configuration
918
 
919
3.2.3 Custom Unit Compiler (CUC) Configuration
920
----------------------------------------------
921
 
922
The Custom Unit Compiler (CUC) was a project by Marko Mlinar to generate
923 82 jeremybenn
Verilog from ANSI C functions.  The project seems to not have progressed
924
beyond the initial prototype phase.  The configuration parameters are
925 19 jeremybenn
described here for the record.
926
 
927 82 jeremybenn
CUC configuration is described in `section cuc'.  This section may
928
appear at most once.  The following parameters may be specified.
929 19 jeremybenn
 
930
`memory_order = none|weak|strong|exact'
931
     This parameter specifies the memory ordering required:
932
 
933
    `memory_order=none'
934
          Different memory ordering, even if there are dependencies.
935
          Bursts can be made, width can change.
936
 
937 82 jeremybenn
          Different memory ordering, even if there are dependencies.  If
938 19 jeremybenn
          dependencies cannot occur, then bursts can be made, width can
939
          change.
940
 
941 82 jeremybenn
          Same memory ordering.  Bursts can be made, width can change.
942 19 jeremybenn
 
943
          Exactly the same memory ordering and widths.
944
 
945
 
946 82 jeremybenn
     The default value is `memory_order=exact'.  Invalid memory
947 19 jeremybenn
     orderings are ignored with a warning.
948
 
949
`calling_convention = 0|1'
950 82 jeremybenn
     If 1 (true), programs follow OpenRISC calling conventions.  If 0
951 19 jeremybenn
     (the default), they may use other convenitions.
952
 
953
`enable_bursts = 0 | 1'
954 82 jeremybenn
     If 1 (true), bursts are detected.  If 0 (the default), bursts are
955 19 jeremybenn
     not detected.
956
 
957
`no_multicycle = 0 | 1'
958 82 jeremybenn
     If 1 (true), no multicycle logic paths will be generated.  If 0
959
     (the default), multicycle logic paths will be generated.
960 19 jeremybenn
 
961
`timings_file = "FILENAME"'
962 82 jeremybenn
     FILENAME specifies a file containing timing information.  The
963
     default value is `"virtex.tim"'.  For backwards compatibility, the
964 19 jeremybenn
     alternative name `timings_fn' is supported for this parameter, but
965
     deprecated.
966
 
967
 
968

969
File: or1ksim.info,  Node: Core OpenRISC Configuration,  Next: Peripheral Configuration,  Prev: Simulator Configuration,  Up: Configuration
970
 
971
3.3 Configuring the OpenRISC Architectural Components
972
=====================================================
973
 
974
* Menu:
975
 
976
* CPU Configuration::
977
* Memory Configuration::
978
* Memory Management Configuration::
979
* Cache Configuration::
980
* Interrupt Configuration::
981
* Power Management Configuration::
982
* Branch Prediction Configuration::
983
* Debug Interface Configuration::
984
 
985

986
File: or1ksim.info,  Node: CPU Configuration,  Next: Memory Configuration,  Up: Core OpenRISC Configuration
987
 
988
3.3.1 CPU Configuration
989
-----------------------
990
 
991 82 jeremybenn
CPU configuration is described in `section cpu'.  This section should
992
appear only once.  At present Or1ksim does not model multi-CPU systems.
993 19 jeremybenn
The following parameters may be specified.
994
 
995
`ver = VALUE'
996
 
997
`cfg = VALUE'
998
 
999
`rev = VALUE'
1000
     The values are used to form the corresponding fields in the `VR'
1001 82 jeremybenn
     Special Purpose Register (SPR 0).  Default values 0.  A warning is
1002 19 jeremybenn
     given and the value truncated if it is too large (8 bits for `ver'
1003
     and `cfg', 6 bits for `rev').
1004
 
1005
`upr = VALUE'
1006
     Used as the value of the Unit Present Register (UPR) Special
1007 82 jeremybenn
     Purpose Register (SPR 1) to VALUE.  Default value is 0x0000075f,
1008 19 jeremybenn
     i.e.
1009
        * UPR present (0x00000001)
1010
 
1011
        * Data cache present (0x00000002)
1012
 
1013
        * Instruction cache present (0x00000004)
1014
 
1015
        * Data MMY present (0x00000008)
1016
 
1017
        * Instruction MMU present (0x00000010)
1018
 
1019
        * Debug unit present (0x00000040)
1020
 
1021
        * Power management unit present (0x00000100)
1022
 
1023
        * Programmable interrupt controller present (0x00000200)
1024
 
1025
        * Tick timer present (0x00000400)
1026
 
1027
     However, with the exection of the UPR present (0x00000001) and tick
1028
     timer present, the various fields will be modified with the values
1029
     specified in their corresponding configuration sections.
1030
 
1031
`cfgr = VALUE'
1032
     Sets the CPU configuration register (Special Purpose Register 2) to
1033 82 jeremybenn
     VALUE.  Default value is 0x00000020, i.e.  support for the ORBIS32
1034
     instruction set.  Attempts to set any other value are accepted, but
1035 19 jeremybenn
     issue a warning that there is no support for the instruction set.
1036
 
1037
`sr = VALUE'
1038
     Sets the supervision register Special Purpose Register (SPR 0x11)
1039 82 jeremybenn
     to VALUE.  Default value is 0x00008001, i.e.  start in supervision
1040 19 jeremybenn
     mode (0x00000001) and set the "Fixed One" bit (0x00008000).
1041
 
1042
`superscalar = 0|1'
1043 82 jeremybenn
     If 1, the processor operates in superscalar mode.  Default value is
1044 19 jeremybenn
     0.
1045
 
1046
     In the current simulator, the only functional effect of superscalar
1047
     mode is to affect the calculation of the number of cycles taken to
1048
     execute an instruction.
1049
 
1050
          Caution: The code for this does not appear to be complete or
1051
          well tested, so users are advised not to use this option.
1052
 
1053
`hazards = 0|1'
1054 82 jeremybenn
     If 1, data hazards are tracked in a superscalar CPU.  Default
1055
     value is 0.
1056 19 jeremybenn
 
1057
     In the current simulator, the only functional effect is to cause
1058
     logging of hazard waiting information if the CPU is superscalar.
1059
     However nowhere in the simulator is this data actually computed,
1060
     so the net result is probably to have no effect.
1061
 
1062
     if harzards are tracked, current hazards can be displayed using the
1063
     simulator's `r' command.
1064
 
1065
          Caution: The code for this does not appear to be complete or
1066
          well tested, so users are advised not to use this option.
1067
 
1068
`dependstats = 0|1'
1069 82 jeremybenn
     If 1, inter-instruction dependencies are calculated.  Default
1070
     value 0.
1071 19 jeremybenn
 
1072
     If these values are calculated, the depencies can be displayed
1073
     using the simulator's `stat' command.
1074
 
1075
          Note: This field must be enabled, if execution execution flow
1076
          tracking (field `history') has been requested in the simulator
1077
          configuration section (*note Simulator Behavior: Simulator
1078
          Behavior.).
1079
 
1080
`sbuf_len = VALUE'
1081
     The length of the store buffer is set to VALUE, which must be no
1082 82 jeremybenn
     greater than 256.  Larger values will be truncated to 256 with a
1083
     warning.  Negative values will be treated as 0 with a warning.
1084
     Use 0 to disable the store buffer.
1085 19 jeremybenn
 
1086
     When the store buffer is active, stores are accumulated and
1087
     committed when I/O is idle.
1088
 
1089
 
1090

1091
File: or1ksim.info,  Node: Memory Configuration,  Next: Memory Management Configuration,  Prev: CPU Configuration,  Up: Core OpenRISC Configuration
1092
 
1093
3.3.2 Memory Configuration
1094
--------------------------
1095
 
1096 82 jeremybenn
Memory configuration is described in `section memory'.  This section
1097
may appear multiple times, specifying multiple blocks of memory.  The
1098 19 jeremybenn
following parameters may be specified.
1099
 
1100
`type=random|pattern|unknown|zero'
1101 82 jeremybenn
     Specifies the values to which memory should be initialized.  The
1102 19 jeremybenn
     default value is `unknown'.
1103
 
1104
    `random'
1105 82 jeremybenn
          Set the memory values to be a random value.  A seed for the
1106 19 jeremybenn
          random generator may be set using the `random_seed' field in
1107
          this section (see below), thus ensuring the same "random"
1108
          values are used each time.
1109
 
1110
    `pattern'
1111
          Set the memory values to be a pattern value, which is set
1112
          using the `pattern' field in this section (see below).
1113
 
1114
    `unknown'
1115 82 jeremybenn
          The memory values are not initialized (i.e.  left "unknown").
1116 19 jeremybenn
          This option will yield faster initialization of the simulator.
1117
 
1118
    `zero'
1119 82 jeremybenn
          Set the memory values to be 0.  This is the equivalent of
1120 19 jeremybenn
          `type=pattern' and a `pattern' value of 0, and implemented as
1121
          such.
1122
 
1123
               Note: As a consequence, if the `pattern' field is
1124
               _subsequently_ specified in this section, the value in
1125
               that field will be used instead of zero to initialize
1126
               the memory.
1127
 
1128
 
1129
`random_seed = VALUE'
1130 82 jeremybenn
     Set the seed for the random number generator to VALUE.  This only
1131 19 jeremybenn
     has any effect for memory type `random'.
1132
 
1133
     The default value is -1, which means the seed will be set from a
1134
     call to the `time' function, thus ensuring different random values
1135 82 jeremybenn
     are used on each run.  The simulator prints out the seed used in
1136 19 jeremybenn
     this case, allowing repeat runs to regenerate the same random
1137
     values used in any particular run.
1138
 
1139
`pattern = VALUE'
1140 82 jeremybenn
     Set the pattern to be used when initializing memory to VALUE.  The
1141
     default value is 0.  This only has any effect for memory type
1142
     `pattern'.  The least significant 8 bits of this value is used to
1143
     initialize each byte.  More than 8 bits can be specified, but will
1144 19 jeremybenn
     ignored with a warning.
1145
 
1146
          Tip: The default value, is equivalent to setting the memory
1147 82 jeremybenn
          `type' to be `zero'.  If that is what is intended, then using
1148 19 jeremybenn
          `type=zero' explicitly is better than using `type=pattern'
1149
          and not specifying a value for `pattern'.
1150
 
1151
`baseaddr = VALUE'
1152 82 jeremybenn
     Set the base address of the memory to VALUE.  It should be aligned
1153 19 jeremybenn
     to a multiple of the memory size rounded up to the nearest 2^n.
1154
     The default value is 0.
1155
 
1156
`size = VALUE'
1157 82 jeremybenn
     Set the size of the memory block to be VALUE bytes.  This should
1158
     be a multiple of 4 (i.e.  word aligned).  The default value is
1159
     1024.
1160 19 jeremybenn
 
1161
          Note: When allocating memory, the simulator will allocate the
1162
          nearest 2^n bytes greater than or equal to VALUE, and will not
1163
          notice memory misses in any part of the memory between VALUE
1164
          and the amount allocated.
1165
 
1166
          As a consequence users are strongly recommended to specify
1167 82 jeremybenn
          memory sizes that are an exact power of 2.  If some other
1168 19 jeremybenn
          amount of memory is required, it should be specified as
1169
          separate, contiguous blocks, each of which is a power of 2 in
1170
          size.
1171
 
1172
`name = "TEXT"'
1173 82 jeremybenn
     Name the block.  Typically these describe the type of memory being
1174
     modeled (thus `"SRAM"' or `"Flash"'.  The default is
1175 19 jeremybenn
     `"anonymous memory block"'.
1176
 
1177
          Note: It is not clear that this information is currently ever
1178 82 jeremybenn
          used in normal operation of the simulator.  Even the `info'
1179 19 jeremybenn
          command of the simulator ignores it.
1180
 
1181
`ce = VALUE'
1182 82 jeremybenn
     Set the chip enable index of the memory instance.  Each memory
1183 19 jeremybenn
     instance should have a unique chip enable index, which should be
1184 82 jeremybenn
     greater than or equal to zero.  This is used by the memory
1185 19 jeremybenn
     controller when identifying different memory instances.
1186
 
1187
     The default value is -1 (invalid).
1188
 
1189
`mc = VALUE'
1190 82 jeremybenn
     Specifies the memory controller this memory is connected to.  It
1191 19 jeremybenn
     should correspond to the `index' field specified in a `section mc'
1192
     for a memory controller (*note Memory Controller Configuration:
1193
     Memory Controller Configuration.).
1194
 
1195
     Default value is 0, which is also the default value of a memory
1196 82 jeremybenn
     controller `index' field.  This is suitable therefore for designs
1197 19 jeremybenn
     with just one memory controller.
1198
 
1199
`delayr = VALUE'
1200 82 jeremybenn
     The number of cycles required for a read access.  Set to -1 if the
1201
     memory does not support reading.  Default value 1.  The simulator
1202 19 jeremybenn
     will add this number of cycles to the total instruction cycle
1203
     count when reading from main memory.
1204
 
1205
`delayw = VALUE'
1206 82 jeremybenn
     The number of cycles required for a write access.  Set to -1 if the
1207
     memory does not support writing.  Default value 1.  The simulator
1208 19 jeremybenn
     will add this number of cycles to the total instruction cycle
1209
     count when writing to main memory.
1210
 
1211
`log = "FILE"'
1212
     If specified, `file' names a file for all memory accesses to be
1213 82 jeremybenn
     logged.  If not specified, the default value, NULL is used, meaning
1214 19 jeremybenn
     that the memory is not logged.
1215
 
1216
 
1217

1218
File: or1ksim.info,  Node: Memory Management Configuration,  Next: Cache Configuration,  Prev: Memory Configuration,  Up: Core OpenRISC Configuration
1219
 
1220
3.3.3 Memory Management Configuration
1221
-------------------------------------
1222
 
1223
Memory Management Unit (MMU) configuration is described in `section
1224
dmmu' (for the data MMU) and `section immu' (for the instruction MMU).
1225 82 jeremybenn
Each section should appear at most once.  The following parameters may
1226 19 jeremybenn
be specified.
1227
 
1228
`enabled = 0|1'
1229
     If 1 (true), the data or instruction (as appropriate) MMU is
1230 82 jeremybenn
     enabled.  If 0 (the default), it is disabled.
1231 19 jeremybenn
 
1232
`nsets = VALUE'
1233
     Sets the number of data or instruction (as appropriate) TLB sets to
1234 82 jeremybenn
     VALUE, which must be a power of two, not exceeding 128.  Values
1235
     which do not fit these criteria are ignored with a warning.  The
1236 19 jeremybenn
     default value is 1.
1237
 
1238
`nways = VALUE'
1239
     Sets the number of data or instruction (as appropriate) TLB ways to
1240 82 jeremybenn
     VALUE.  The value must be in the range 1 to 4.  Values outside
1241
     this range are ignored with a warning.  The default value is 1.
1242 19 jeremybenn
 
1243
`pagesize = VALUE'
1244
     The data or instruction (as appropriate) MMU page size is set to
1245 82 jeremybenn
     VALUE, which must be a power of 2.  Values which are not a power
1246
     of 2 are ignored with a warning.  The default is 8192 (0x2000).
1247 19 jeremybenn
 
1248
`entrysize = VALUE'
1249
     The data or instruction (as appropriate) MMU entry size is set to
1250 82 jeremybenn
     VALUE, which must be a power of 2.  Values which are not a power
1251
     of 2 are ignored with a warning.  The default value is 1.
1252 19 jeremybenn
 
1253
          Note: Or1ksim does not appear to use the `entrysize' parameter
1254 82 jeremybenn
          in its simulation of the MMUs.  Thus setting this value does
1255 19 jeremybenn
          not seem to matter.
1256
 
1257
`ustates = VALUE'
1258
     The number of instruction usage states for the data or instruction
1259
     (as appropriate) MMU is set to VALUE, which must be 2, 3 or 4.
1260 82 jeremybenn
     Values outside this range are ignored with a warning.  The default
1261 19 jeremybenn
     value is 2.
1262
 
1263
          Note: Or1ksim does not appear to use the `ustates' parameter
1264 82 jeremybenn
          in its simulation of the MMUs.  Thus setting this value does
1265 19 jeremybenn
          not seem to matter.
1266
 
1267
`hitdelay = VALUE'
1268
     Set the number of cycles a data or instruction (as appropriate) MMU
1269 82 jeremybenn
     hit costs.  Default value 1.
1270 19 jeremybenn
 
1271
`missdelay = VALUE'
1272
     Set the number of cycles a data or instruction (as appropriate) MMU
1273 82 jeremybenn
     miss costs.  Default value 1.
1274 19 jeremybenn
 
1275
 
1276

1277
File: or1ksim.info,  Node: Cache Configuration,  Next: Interrupt Configuration,  Prev: Memory Management Configuration,  Up: Core OpenRISC Configuration
1278
 
1279
3.3.4 Cache Configuration
1280
-------------------------
1281
 
1282
Cache configuration is described in `section dc' (for the data cache)
1283 82 jeremybenn
and `seciton ic' (for the instruction cache).  Each section should
1284
appear at most once.  The following parameters may be specified.
1285 19 jeremybenn
 
1286
`enabled = 0|1'
1287
     If 1 (true), the data or instruction (as appropriate) cache is
1288 82 jeremybenn
     enabled.  If 0 (the default), it is disabled.
1289 19 jeremybenn
 
1290
`nsets = VALUE'
1291
     Sets the number of data or instruction (as appropriate) cache sets
1292
     to VALUE, which must be a power of two, not exceeding
1293
     `MAX_DC_SETS' (for the data cache) or `MAX_IC_SETS' (for the
1294 82 jeremybenn
     instruction cache).  At the time of writing, these constants are
1295
     both defined in the code to be 1024).  The default value is 1.
1296 19 jeremybenn
 
1297
`nways = VALUE'
1298
     Sets the number of data or instruction (as appropriate) cache ways
1299
     to VALUE, which must be a power of two, not exceeding
1300
     `MAX_DC_WAYS' (for the data cache) or `MAX_IC_WAYS' (for the
1301 82 jeremybenn
     instruction cache).  At the time of writing, these constants are
1302
     both defined in the code to be 32).  The default value is 1.
1303 19 jeremybenn
 
1304
`blocksize = VALUE'
1305
     The data or instruction (as appropriate) cache block size is set to
1306 82 jeremybenn
     VALUE bytes, which must be either 16 or 32.  The default is 16.
1307 19 jeremybenn
 
1308
`ustates = VALUE'
1309
     The number of instruction usage states for the data or instruction
1310
     (as appropriate) cache is set to VALUE, which must be 2, 3 or 4.
1311
     The default value is 2.
1312
 
1313
`hitdelay = VALUE'
1314 82 jeremybenn
     _Instruction cache only_.  Set the number of cycles an instruction
1315
     cache hit costs.  Default value 1.
1316 19 jeremybenn
 
1317
`missdelay = VALUE'
1318 82 jeremybenn
     _Instruction cache only_.  Set the number of cycles an instruction
1319
     cache miss costs.  Default value 1.
1320 19 jeremybenn
 
1321
`load_hitdelay = VALUE'
1322 82 jeremybenn
     _Data cache only_.  Set the number of cycles a data load cache hit
1323
     costs.  Default value 2.
1324 19 jeremybenn
 
1325
`load_missdelay = VALUE'
1326 82 jeremybenn
     _Data cache only_.  Set the number of cycles a data load cache
1327
     miss costs.  Default value 2.
1328 19 jeremybenn
 
1329
`store_hitdelay = VALUE'
1330 82 jeremybenn
     _Data cache only_.  Set the number of cycles a data store cache hit
1331
     costs.  Default value 0.
1332 19 jeremybenn
 
1333
`store_missdelay = VALUE'
1334 82 jeremybenn
     _Data cache only_.  Set the number of cycles a data store cache
1335
     miss costs.  Default value 0.
1336 19 jeremybenn
 
1337
 
1338

1339
File: or1ksim.info,  Node: Interrupt Configuration,  Next: Power Management Configuration,  Prev: Cache Configuration,  Up: Core OpenRISC Configuration
1340
 
1341
3.3.5 Interrupt Configuration
1342
-----------------------------
1343
 
1344
Programmable Interrupt Controller (PIC) configuration is described in
1345 82 jeremybenn
`section pic'.  This section may appear at most once--Or1ksim has no
1346
mechanism for handling multiple interrupt controllers.  The following
1347 19 jeremybenn
parameters may be specified.
1348
 
1349
`enabled = 0|1'
1350 82 jeremybenn
     If 1 (true), the programmable interrupt controller is enabled.  If
1351
 
1352 19 jeremybenn
 
1353
`edge_trigger = 0|1'
1354
     If 1 (true, the default), the programmable interrupt controller is
1355 82 jeremybenn
     edge triggered.  If 0 (false), it is level triggered.
1356 19 jeremybenn
 
1357
 
1358

1359
File: or1ksim.info,  Node: Power Management Configuration,  Next: Branch Prediction Configuration,  Prev: Interrupt Configuration,  Up: Core OpenRISC Configuration
1360
 
1361
3.3.6 Power Management Configuration
1362
------------------------------------
1363
 
1364 82 jeremybenn
Power management implementation is incomplete.  At present the effect
1365 19 jeremybenn
(which only happens when the power management unit is enabled) of
1366
setting the different bits in the power management Special Purpose
1367
Register (PMR, SPR 0x4000) is
1368
 
1369
`SDF (bit mask 0x0000000f)'
1370
     No effect - these bits are ignored
1371
 
1372
`DME (bit mask 0x00000010)'
1373
`SME (bit mask 0x00000020)'
1374
     Both these bits cause the processor to stop executing
1375 82 jeremybenn
     instructions.  However all other functions (debug interaction, CLI,
1376 19 jeremybenn
     VAPI etc) carry on as normal.
1377
 
1378
`DCGE (bit mask 0x00000004)'
1379
     No effect - this bit is ignored
1380
 
1381
`SUME (bit mask 0x00000008)'
1382
     Enabling this bit causes a message to be printed, advising that the
1383
     processor is suspending and the simulator exits.
1384
 
1385
 
1386
On reset all bits are cleared.
1387
 
1388 82 jeremybenn
Power management configuration is described in `section pm'.  This
1389
section may appear at most once.  The following parameter may be
1390 19 jeremybenn
specified.
1391
 
1392
`enabled = 0|1'
1393 82 jeremybenn
     If 1 (true), power management is enabled.  If 0 (the default), it
1394
     is disabled.
1395 19 jeremybenn
 
1396
 
1397

1398
File: or1ksim.info,  Node: Branch Prediction Configuration,  Next: Debug Interface Configuration,  Prev: Power Management Configuration,  Up: Core OpenRISC Configuration
1399
 
1400
3.3.7 Branch Prediction Configuration
1401
-------------------------------------
1402
 
1403
From examining the code base, it seems the branch prediction function
1404 82 jeremybenn
is not fully implemented.  At present the functionality seems
1405
restricted to collection of statistics.
1406 19 jeremybenn
 
1407 82 jeremybenn
Branch prediction configuration is described in `section bpb'.  This
1408
section may appear at most once.  The following parameters may be
1409 19 jeremybenn
specified.
1410
 
1411
`enabled = 0|1'
1412 82 jeremybenn
     If 1 (true), branch prediction is enabled.  If 0 (the default), it
1413 19 jeremybenn
     is disabled.
1414
 
1415
`btic = 0|1'
1416
     If 1 (true), the branch target instruction cache model is enabled.
1417
     If 0 (the default), it is disabled.
1418
 
1419
`sbp_bf_fwd = 0|1'
1420 82 jeremybenn
     If 1 (true), use forward prediction for the `l.bf' instruction.  If
1421 19 jeremybenn
 
1422
     instruction.
1423
 
1424
`sbp_bnf_fwd = 0|1'
1425 82 jeremybenn
     If 1 (true), use forward prediction for the `l.bnf' instruction.
1426
     If 0 (the default), do not use forward prediction for this
1427 19 jeremybenn
     instruction.
1428
 
1429
`hitdelay = VALUE'
1430 82 jeremybenn
     Set the number of cycles a branch prediction hit costs.  Default
1431 19 jeremybenn
     value 0.
1432
 
1433
`missdelay = VALUE'
1434 82 jeremybenn
     Set the number of cycles a branch prediction miss costs.  Default
1435 19 jeremybenn
     value 0.
1436
 
1437
 
1438

1439
File: or1ksim.info,  Node: Debug Interface Configuration,  Prev: Branch Prediction Configuration,  Up: Core OpenRISC Configuration
1440
 
1441
3.3.8 Debug Interface Configuration
1442
-----------------------------------
1443
 
1444
The debug unit and debug interface configuration is described in
1445 82 jeremybenn
`section debug'.  This section may appear at most once.  The following
1446 19 jeremybenn
parameters may be specified.
1447
 
1448
`enabled = 0|1'
1449 82 jeremybenn
     If 1 (true), the debug unit is enabled.  If 0 (the default), it is
1450 19 jeremybenn
     disabled.
1451
 
1452
          Note: This enables the functionality of the debug unit (its
1453 82 jeremybenn
          registers etc) within the mode.  It does not provide any
1454
          external interface to the debug unit.  For that, see
1455 19 jeremybenn
          `gdb_enabled' and `rsp_enabled' below.
1456
 
1457
`rsp_enabled = 0|1'
1458
     If 1 (true), the GDB "Remote Serial Protocol" server is started,
1459
     provding an interface to an external GNU debugger, using the port
1460
     specified in the `rsp_port' field (see below), or the
1461 82 jeremybenn
     `or1ksim-rsp' TCP/IP service.  If 0 (the default), the server is
1462 19 jeremybenn
     not started, and no external interface is provided.
1463
 
1464
     For more detailed information on the interface to the GNU Debugger
1465
     see Embecosm Application Note 2, `Howto: Porting the GNU Debugger
1466
     Practical Experience with the OpenRISC 1000 Architecture', by
1467
     Jeremy Bennett, published by Embecosm Limited (`www.embecosm.com').
1468
 
1469 82 jeremybenn
          Note: `rsp_enabled' may not be enabled with `gdb_enabled' (see
1470
          below).  If both are enabled, a warning is issued and only
1471
          the "Remote Serial Protocol" interface is enabled.
1472 19 jeremybenn
 
1473
`rsp_port = VALUE'
1474
     VALUE specifies the port to be used for the GDB "Remote Serial
1475 82 jeremybenn
     Protocol" interface to the GNU Debugger (GDB).  Default value
1476
     51000.  If the value 0 is specified, Or1ksim will instead look for
1477 19 jeremybenn
     a TCP/IP service named `or1ksim-rsp'.
1478
 
1479
          Tip: There is no registered port for Or1ksim "Remote Serial
1480 82 jeremybenn
          Protocol" service `or1ksim-rsp'.  Good practice suggests
1481
          users should adopt port values in the "Dynamic" or "Private"
1482
          port range, i.e.  49152-65535.
1483 19 jeremybenn
 
1484
`gdb_enabled = 0|1'
1485
     If 1 (true), the OpenRISC Remote JTAG protocol server is started,
1486
     provding an interface to an external GNU debugger, using the port
1487
     specified in the `server_port' field (see below), or the `or1ksim'
1488 82 jeremybenn
     TCP/IP service.  If 0 (the default), the server is not started,
1489
     and no external interface is provided.
1490 19 jeremybenn
 
1491
     For more detailed information on the interface to the GNU Debugger
1492
     see Embecosm Application Note 2, `Howto: Porting the GNU Debugger
1493
     Practical Experience with the OpenRISC 1000 Architecture', by
1494
     Jeremy Bennett, published by Embecosm Limited (`www.embecosm.com').
1495
 
1496
          Note: The OpenRISC Remote JTAG protocol is unique to
1497 82 jeremybenn
          OpenRISC, and remains only for backward compatibility.  New
1498 19 jeremybenn
          users should adopt the standard GDB "Remote Serial Protocol"
1499
          interface (see `rsp_enabled' above) providing access to a
1500
          wider range of GDB functionality.
1501
 
1502 82 jeremybenn
          Note: `gdb_enabled' may not be enabled with `rsp_enabled'.
1503
          If both are enabled, a warning is issued and only the "Remote
1504 19 jeremybenn
          Serial Protocol" interface is enabled.
1505
 
1506
`server_port = VALUE'
1507
     VALUE specifies the port to be used for the OpenRISC Rmote JTAG
1508 82 jeremybenn
     protocol interface to the GNU Debugger (GDB).  Default value
1509
     51000.  If the value 0 is specified, Or1ksim will instead look for
1510
     a TCP/IP service named `or1ksim'.
1511 19 jeremybenn
 
1512
          Tip: There is no registered port for Or1ksim Remote JTAG
1513 82 jeremybenn
          Interface or service `or1ksim'.  Good practice suggests users
1514 19 jeremybenn
          should adopt port values in the "Dynamic" or "Private" port
1515 82 jeremybenn
          range, i.e.  49152-65535.
1516 19 jeremybenn
 
1517
`vapi_id = VALUE'
1518
     VALUE specifies the value of the Verification API (VAPI) base
1519 82 jeremybenn
     address to be used with the debug unit.  *Note Verification API:
1520 19 jeremybenn
     Verification API, for more details.
1521
 
1522
     If this is specified and VALUE is non-zero, all OpenRISC Remote
1523
     JTAG protocol transactions will be logged to the VAPI log file, if
1524 82 jeremybenn
     enabled.  This is the only functionality associated with VAPI for
1525
     the debug unit.  No VAPI commands are sent, nor requests handled.
1526 19 jeremybenn
 
1527
 
1528

1529
File: or1ksim.info,  Node: Peripheral Configuration,  Prev: Core OpenRISC Configuration,  Up: Configuration
1530
 
1531
3.4 Configuring Memory Mapped Peripherals
1532
=========================================
1533
 
1534 82 jeremybenn
All peripheral components are optional.  If they are specified, then
1535 19 jeremybenn
(unlike other components) by default they are enabled.
1536
 
1537
* Menu:
1538
 
1539
* Memory Controller Configuration::
1540
* UART Configuration::
1541
* DMA Configuration::
1542
* Ethernet Configuration::
1543
* GPIO Configuration::
1544
* Display Interface Configuration::
1545
* Frame Buffer Configuration::
1546
* Keyboard Configuration::
1547
* Disc Interface Configuration::
1548
* Generic Peripheral Configuration::
1549
 
1550

1551
File: or1ksim.info,  Node: Memory Controller Configuration,  Next: UART Configuration,  Up: Peripheral Configuration
1552
 
1553
3.4.1 Memory Controller Configuration
1554
-------------------------------------
1555
 
1556
The memory controller used in Or1ksim is the component implemented at
1557 82 jeremybenn
OpenCores, and found in the top level CVS directory, `mem_ctrl'.  It is
1558 19 jeremybenn
described in the document `Memory Controller IP Core' by Rudolf
1559 82 jeremybenn
Usselmann, which can be found in the `doc' subdirectory.  It is a
1560
memory mapped component, which resides on the main OpenRISC Wishbone
1561
data bus.
1562 19 jeremybenn
 
1563 82 jeremybenn
The memory controller configuration is described in `section mc'.  This
1564 19 jeremybenn
section may appear multiple times, specifying multiple memory
1565 82 jeremybenn
controllers.  The following parameters may be specified.
1566 19 jeremybenn
 
1567
`enabled = 0|1'
1568 82 jeremybenn
     If 1 (true, the default), this memory controller is enabled.  If
1569
     0, it is disabled.
1570 19 jeremybenn
 
1571
          Note: The memory controller can effectively also be disabled
1572
          by setting an appropriate power on control register value
1573 82 jeremybenn
          (see below).  However this should only be used if it is
1574 19 jeremybenn
          desired to specifically model this behavior of the memory
1575
          controller, not as a way of disabling the memory controller
1576
          in general.
1577
 
1578
`baseaddr = VALUE'
1579
     Set the base address of the memory controller's memory mapped
1580 82 jeremybenn
     registers to VALUE.  The default is 0, which is probably not a
1581 19 jeremybenn
     sensible value.
1582
 
1583
     The memory controller has a 7 bit address bus, with a total of 19
1584
     32-bit registers, at addresses 0x00 through 0x4c (address 0x0c and
1585
     addresses 0x50 through 0x7c are not used).
1586
 
1587
`poc = VALUE'
1588
     Specifies the value of the power on control register, The least
1589
     signficant two bits specify the bus width (use 0 for an 8-bit bus,
1590
     1 for a 16-bit bus and 2 for a 32-bit bus) and the next two bits
1591
     the type of memory connected (use 0 for a disabled interface, 1
1592
     for SSRAM, 2 for asyncrhonous devices and 3 for synchronous
1593
     devices).
1594
 
1595
     If other bits are specified, they are ignored with a warning.
1596
 
1597
          Caution: The default value, 0, corresponds to a disabled
1598
          8-bit bus, and is likely not the most suitable value
1599
 
1600
`index = VALUE'
1601
     Specify the index of this memory controller amongst all the memory
1602 82 jeremybenn
     controllers.  This value should be unique for each memory
1603 19 jeremybenn
     controller, and is used to associate specific memories with the
1604
     controller, through the `mc' field in the `section memory'
1605
     configuration (*note Memory Configuration: Memory Configuration.).
1606
 
1607
     The default value, 0, is suitable when there is only one memory
1608
     controller.
1609
 
1610
 
1611

1612
File: or1ksim.info,  Node: UART Configuration,  Next: DMA Configuration,  Prev: Memory Controller Configuration,  Up: Peripheral Configuration
1613
 
1614
3.4.2 UART Configuration
1615
------------------------
1616
 
1617
The UART implemented in Or1ksim follows the specification of the
1618 82 jeremybenn
National Semiconductor 16450 and 16550 parts.  It is a memory mapped
1619 19 jeremybenn
component, which resides on the main OpenRISC Wishbone data bus.
1620
 
1621
The component provides a number of interfaces to emulate the behavior
1622
of an external terminal connected to the UART.
1623
 
1624 82 jeremybenn
UART configuration is described in `section uart'.  This section may
1625
appear multiple times, specifying multiple UARTs.  The following
1626 19 jeremybenn
parameters may be specified.
1627
 
1628
`enabled = 0|1'
1629 82 jeremybenn
     If 1 (true, the default), this UART is enabled.  If 0, it is
1630 19 jeremybenn
     disabled.
1631
 
1632
`baseaddr = VALUE'
1633
     Set the base address of the UART's memory mapped registers to
1634 82 jeremybenn
     VALUE.  The default is 0, which is probably not a sensible value.
1635 19 jeremybenn
 
1636
     The UART has a 3 bit address bus, with a total of 8 8-bit
1637
     registers, at addresses 0x0 through 0x7.
1638
 
1639
`channel = "TYPE:ARGS"'
1640
     Specify the channel representing the terminal connected to the UART
1641
     Rx & Tx pins.
1642
 
1643
    `channel="file:`rxfile',`txfile'"'
1644
          Read input characters from the file `rxfile' and write output
1645
          characters to the file `txfile' (which will be created if
1646
          required).
1647
 
1648
    `channel="xterm:ARGS"'
1649
          Create an xterm on startup, write UART Tx traffic to the
1650
          xterm and take Rx traffic from the keyboard when the xterm
1651 82 jeremybenn
          window is selected.  Additional arguments to the xterm
1652
          command (for example specifying window size may be specified
1653
          in ARGS, or this may be left blank.
1654 19 jeremybenn
 
1655
    `channel="tcp:VALUE"'
1656
          Open the TCP/IP port specified by VALUE and read and write
1657
          UART traffic from and to it.
1658
 
1659
          Typically a telnet session is connected to the other end of
1660
          this port.
1661
 
1662
               Tip: There is no registered port for Or1ksim telnet UART
1663 82 jeremybenn
               connection.  Priviledged access is required to read
1664 19 jeremybenn
               traffic on the registered "well-known" telnet port (23).
1665
               Instead users should use port values in the "Dynamic" or
1666 82 jeremybenn
               "Private" port range, i.e.  49152-65535.
1667 19 jeremybenn
 
1668
    `channel="fd:`rxfd',`txfd'"'
1669
          Read and write characters from and to the existing open
1670
          numerical file descriptors, file `rxfd' and `txfd'.
1671
 
1672
    `channel="tty:device=/dev/ttyS0,baud=9600"'
1673
          Read and write characters from and to a physical serial port.
1674
          The precise device (shown here as `/dev/ttyS0') may vary from
1675
          machine to machine.
1676
 
1677
 
1678
     The default value for this field is `"xterm:"'.
1679
 
1680
`irq = VALUE'
1681 82 jeremybenn
     Use VALUE as the IRQ number of this UART.  Default value 0.
1682 19 jeremybenn
 
1683
`16550 = 0|1'
1684 82 jeremybenn
     If 1 (true), the UART has the functionality of a 16550.  If 0 (the
1685
     default), it has the functionality of a 16450.  The principal
1686 19 jeremybenn
     difference is that the 16550 can buffer multiple characters.
1687
 
1688
`jitter = VALUE'
1689
     Set the jitter, modeled as a time to block, to VALUE milliseconds.
1690 82 jeremybenn
     Set to -1 to disable jitter modeling.  Default value 0.
1691 19 jeremybenn
 
1692
          Note: This functionality has yet to be implemented, so this
1693
          parameter has no effect.
1694
 
1695
`vapi_id = VALUE'
1696
     VALUE specifies the value of the Verification API (VAPI) base
1697 82 jeremybenn
     address to be used with the UART.  *Note Verification API:
1698 19 jeremybenn
     Verification API, for more details, which details the use of the
1699
     VAPI with the UART.
1700
 
1701
 
1702

1703
File: or1ksim.info,  Node: DMA Configuration,  Next: Ethernet Configuration,  Prev: UART Configuration,  Up: Peripheral Configuration
1704
 
1705
3.4.3 DMA Configuration
1706
-----------------------
1707
 
1708
The DMA controller used in Or1ksim is the component implemented at
1709 82 jeremybenn
OpenCores, and found in the top level CVS directory, `wb_dma'.  It is
1710 19 jeremybenn
described in the document `Wishbone DMA/Bridge IP Core' by Rudolf
1711 82 jeremybenn
Usselmann, which can be found in the `doc' subdirectory.  It is a
1712
memory mapped component, which resides on the main OpenRISC Wishbone
1713
data bus.  The present implementation is incomplete, intended only to
1714
support the Ethernet interface (*note Ethernet Configuration::),
1715
although the Ethernet interface is not yet completed.
1716 19 jeremybenn
 
1717 82 jeremybenn
DMA configuration is described in `section dma'.  This section may
1718
appear multiple times, specifying multiple DMA controllers.  The
1719 19 jeremybenn
following parameters may be specified.
1720
 
1721
`enabled = 0|1'
1722 82 jeremybenn
     If 1 (true, the default), this DMA controller is enabled.  If 0,
1723
     it is disabled.
1724 19 jeremybenn
 
1725
`baseaddr = VALUE'
1726
     Set the base address of the DMA's memory mapped registers to
1727 82 jeremybenn
     VALUE.  The default is 0, which is probably not a sensible value.
1728 19 jeremybenn
 
1729
     The DMA controller has a 10 bit address bus, with a total of 253
1730 82 jeremybenn
     32-bit registers.  The first 5 registers at addresses 0x000 through
1731
     0x010 control the overall behavior of the DMA controller.  There
1732
     are then 31 blocks of 8 registers, controlling each of the 31 DMA
1733
     channels available.  Addresses 0x014 through 0x01c are not used.
1734 19 jeremybenn
 
1735
`irq = VALUE'
1736 82 jeremybenn
     Use VALUE as the IRQ number of this DMA controller.  Default value
1737 19 jeremybenn
     0.
1738
 
1739
`vapi_id = VALUE'
1740
     VALUE specifies the value of the Verification API (VAPI) base
1741 82 jeremybenn
     address to be used with the DMA controller.  *Note Verification
1742 19 jeremybenn
     API: Verification API, for more details, which details the use of
1743
     the VAPI with the DMA controller.
1744
 
1745
 
1746

1747
File: or1ksim.info,  Node: Ethernet Configuration,  Next: GPIO Configuration,  Prev: DMA Configuration,  Up: Peripheral Configuration
1748
 
1749
3.4.4 Ethernet Configuration
1750
----------------------------
1751
 
1752
The Ethernet MAC used in Or1ksim is the component implemented at
1753 82 jeremybenn
OpenCores, and found in the top level CVS directory, `ethernet'.  It
1754
also forms part of the OpenRISC SoC, ORPSoC.  It is described in the
1755 19 jeremybenn
document `Ethernet IP Core Specification' by Igor Mohor, which can be
1756 82 jeremybenn
found in the `doc' subdirectory.  It is a memory mapped component,
1757
which resides on the main OpenRISC Wishbone data bus.
1758 19 jeremybenn
 
1759 82 jeremybenn
Ethernet configuration is described in `section ethernet'.  This
1760
section may appear multiple times, specifying multiple Ethernet
1761
interfaces.  The following parameters may be specified.
1762 19 jeremybenn
 
1763
`enabled = 0|1'
1764 82 jeremybenn
     If 1 (true, the default), this Ethernet MAC is enabled.  If 0, it
1765
     is disabled.
1766 19 jeremybenn
 
1767
`baseaddr = VALUE'
1768
     Set the base address of the MAC's memory mapped registers to
1769 82 jeremybenn
     VALUE.  The default is 0, which is probably not a sensible value.
1770 19 jeremybenn
 
1771
     The Ethernet MAC has a 7-bit address bus, with a total of 21
1772 82 jeremybenn
     32-bit registers.  Addresses 0x54 through 0x7c are not used.
1773 19 jeremybenn
 
1774
          Note: The Ethernet specification describes a Tx control
1775 82 jeremybenn
          register, `TXCTRL', at address 0x50.  However this register
1776
          is not implemented in the Or1ksim model.
1777 19 jeremybenn
 
1778
`dma = VALUE'
1779
     VALUE specifies the DMA controller with which this Ethernet is
1780 82 jeremybenn
     associated.  The default value is 0.
1781 19 jeremybenn
 
1782
          Note: Support for external DMA is not provided in the current
1783 82 jeremybenn
          implementation, and this value is ignored.  In any case there
1784 19 jeremybenn
          is no equivalent field to which this can be matched in the
1785
          current DMA component implementation (*note DMA
1786
          Configuration: DMA Configuration.).
1787
 
1788
`irq = VALUE'
1789 82 jeremybenn
     Use VALUE as the IRQ number of this Ethernet MAC.  Default value 0.
1790 19 jeremybenn
 
1791
`rtx_type = 0|1'
1792
     If 1 (true) use a socket interface to the Ethernet (see parameter
1793 82 jeremybenn
     `sockif' below).  If 0 (the default), use a file interface,
1794
     reading and writing from and to the files specified in the
1795
     `rxfile' and `txfile' parameters (see below).
1796 19 jeremybenn
 
1797
          Note: By default the socket interface is not provided in
1798 82 jeremybenn
          Or1ksim.  If it is required, this must be requested when
1799 19 jeremybenn
          configuring, by use of the `--enable-ethphy' option to
1800
          `configure'.
1801
 
1802
               configure --target=or32-uclinux --enable-ethphy ...
1803
 
1804
`rx_channel = RXVALUE'
1805
`tx_channel = TXVALUE'
1806
     RXVALUE specifies the DMA channel to use for receive and TXVALUE
1807 82 jeremybenn
     the DMA channel to use for transmit.  Both default to 0.
1808 19 jeremybenn
 
1809
          Note: As noted above, support for external DMA is not
1810
          provided in the current implementation, and so these values
1811
          are ignored.
1812
 
1813
`rxfile = "RXFILE"'
1814
`txfile = "TXFILE"'
1815
     When `rtx_type' is 0 (see above), RXFILE specifies the file to use
1816
     as input and TXFILE specifies the fie to use as output.
1817
 
1818 82 jeremybenn
     The file contains a sequence of packets.  Each packet consists of a
1819
     packet length (32 bits), followed by that many bytes of data.
1820
     Once the input file is empty, the Ethernet MAC behaves as though
1821
     there were no data on the Ethernet.  The default values of these
1822 19 jeremybenn
     parameters are `"eth_rx"' and `"eth_tx"' respectively.
1823
 
1824 82 jeremybenn
     The input file must exist and be readable.  The output file must be
1825
     writable and will be created if necessary.  If either of these
1826 19 jeremybenn
     conditions is not met, a warning will be given.
1827
 
1828
`sockif = "SERVICE"'
1829
     When `rtx_type' is 1 (see above), SERVICE specifies the service to
1830 82 jeremybenn
     use for communication.  This may be TCP/IP or UDP/IP.  The default
1831 19 jeremybenn
     value of this parameter is `"or1ksim_eth"'.
1832
 
1833
`vapi_id = VALUE'
1834
     VALUE specifies the value of the Verification API (VAPI) base
1835 82 jeremybenn
     address to be used with the Ethernet PHY.  *Note Verification API:
1836 19 jeremybenn
     Verification API, for more details, which details the use of the
1837
     VAPI with the DMA controller.
1838
 
1839
 
1840

1841
File: or1ksim.info,  Node: GPIO Configuration,  Next: Display Interface Configuration,  Prev: Ethernet Configuration,  Up: Peripheral Configuration
1842
 
1843
3.4.5 GPIO Configuration
1844
------------------------
1845
 
1846
The GPIO used in Or1ksim is the component implemented at OpenCores, and
1847 82 jeremybenn
found in the top level CVS directory, `gpio'.  It is described in the
1848 19 jeremybenn
document `GPIO IP Core Specification' by Damjan Lampret and Goran
1849 82 jeremybenn
Djakovic, which can be found in the `doc' subdirectory.  It is a memory
1850 19 jeremybenn
mapped component, which resides on the main OpenRISC Wishbone data bus.
1851
 
1852 82 jeremybenn
GPIO configuration is described in `section gpio'.  This section may
1853
appear multiple times, specifying multiple GPIO devices.  The following
1854 19 jeremybenn
parameters may be specified.
1855
 
1856
`enabled = 0|1'
1857 82 jeremybenn
     If 1 (true, the default), this GPIO is enabled.  If 0, it is
1858 19 jeremybenn
     disabled.
1859
 
1860
`baseaddr = VALUE'
1861
     Set the base address of the GPIO's memory mapped registers to
1862 82 jeremybenn
     VALUE.  The default is 0, which is probably not a sensible value.
1863 19 jeremybenn
 
1864
     The GPIO has a 6 bit address bus, with a total of 10 32-bit
1865
     registers, although the number of bits that are actively used
1866 82 jeremybenn
     varies.  Addresses 0x28 through 0x3c are not used.
1867 19 jeremybenn
 
1868
`irq = VALUE'
1869 82 jeremybenn
     Use VALUE as the IRQ number of this GPIO.  Default value 0.
1870 19 jeremybenn
 
1871
`vapi_id = VALUE'
1872
     VALUE specifies the value of the Verification API (VAPI) base
1873 82 jeremybenn
     address to be used with the GPIO.  *Note Verification API:
1874 19 jeremybenn
     Verification API, for more details, which details the use of the
1875 82 jeremybenn
     VAPI with the GPIO controller.  For backwards compatibility, the
1876 19 jeremybenn
     alternative name `base_vapi_id' is supported for this parameter,
1877
     but deprecated.
1878
 
1879
 
1880

1881
File: or1ksim.info,  Node: Display Interface Configuration,  Next: Frame Buffer Configuration,  Prev: GPIO Configuration,  Up: Peripheral Configuration
1882
 
1883
3.4.6 Display Interface Configuration
1884
-------------------------------------
1885
 
1886
Or1ksim models a VGA interface to an external monitor.  The VGA
1887
controller used in Or1ksim is the component implemented at OpenCores,
1888
and found in the top level CVS directory, `vga_lcd', with no support
1889 82 jeremybenn
for the optional hardware cursors.  It is described in the document
1890 19 jeremybenn
`VGA/LCD Core v2.0 Specifications' by Richard Herveille, which can be
1891 82 jeremybenn
found in the `doc' subdirectory.  It is a memory mapped component,
1892
which resides on the main OpenRISC Wishbone data bus.
1893 19 jeremybenn
 
1894
The current implementation provides only functionality to dump the
1895
screen to a file at intervals.
1896
 
1897 82 jeremybenn
VGA controller configuration is described in `section vga'.  This
1898 19 jeremybenn
section may appear multiple times, specifying multiple VGA controllers.
1899
The following parameters may be specified.
1900
 
1901
`enabled = 0|1'
1902 82 jeremybenn
     If 1 (true, the default), this VGA is enabled.  If 0, it is
1903 19 jeremybenn
     disabled.
1904
 
1905
`baseaddr = VALUE'
1906
     Set the base address of the VGA controller's memory mapped
1907 82 jeremybenn
     registers to VALUE.  The default is 0, which is probably not a
1908 19 jeremybenn
     sensible value.
1909
 
1910
     The VGA controller has a 12-bit address bus, with 7 32-bit
1911
     registers, at addresses 0x000 through 0x018, and two color lookup
1912 82 jeremybenn
     tables at addresses 0x800 through 0xfff.  The hardware cursor
1913 19 jeremybenn
     registers are not implemented, so addresses 0x01c through 0x7fc
1914
     are not used.
1915
 
1916
`irq = VALUE'
1917 82 jeremybenn
     Use VALUE as the IRQ number of this VGA controller.  Default value
1918 19 jeremybenn
     0.
1919
 
1920
`refresh_rate = VALUE'
1921 82 jeremybenn
     VALUE specifies number of cycles between screen dumps.  Default
1922 19 jeremybenn
     value is derived from the simulation clock cycle time (*note
1923
     Simulator Behavior: Simulator Behavior.), to correspond to dumping
1924
     50 times per simulated second.
1925
 
1926
`txfile = "FILE"'
1927
     FILE specifies the base of the filename for screen dumps.
1928
     Successive screen dumps will be in BMP format, in files with the
1929
     name `FILENNNN.bmp', where NNNN is a sequential count of the
1930 82 jeremybenn
     screen dumps starting at zero.  The default value is `"vga_out"'.
1931 19 jeremybenn
     For backwards compatibility, the alternative name `filename' is
1932
     supported for this parameter, but deprecated.
1933
 
1934
 
1935

1936
File: or1ksim.info,  Node: Frame Buffer Configuration,  Next: Keyboard Configuration,  Prev: Display Interface Configuration,  Up: Peripheral Configuration
1937
 
1938
3.4.7 Frame Buffer Configuration
1939
--------------------------------
1940
 
1941 82 jeremybenn
     Caution: The frame buffer is only partially implemented.  Its
1942 19 jeremybenn
     configuration fields are described here, but the component should
1943 82 jeremybenn
     not be used at this time.  Like the VGA controller, it is designed
1944 19 jeremybenn
     to make screen dumps to file.
1945
 
1946 82 jeremybenn
Frame buffer configuration is described in `section fb'.  This section
1947
may appear multiple times, specifying multiple frame buffers.  The
1948 19 jeremybenn
following parameters may be specified.
1949
 
1950
`enabled = 0|1'
1951 82 jeremybenn
     If 1 (true, the default), this frame buffer is enabled.  If 0, it
1952 19 jeremybenn
     is disabled.
1953
 
1954
`baseaddr = VALUE'
1955
     Set the base address of the frame buffer's memory mapped registers
1956 82 jeremybenn
     to VALUE.  The default is 0, which is probably not a sensible
1957
     value.
1958 19 jeremybenn
 
1959
     The frame buffer has an 121-bit address bus, with 4 32-bit
1960
     registers, at addresses 0x000 through 0x00c, and a PAL lookup
1961 82 jeremybenn
     table at addresses 0x400 through 0x4ff.  Addresses 0x010 through
1962 19 jeremybenn
     0x3fc and addresses 0x500 through 0x7ff are not used.
1963
 
1964
`refresh_rate = VALUE'
1965 82 jeremybenn
     VALUE specifies number of cycles between screen dumps.  Default
1966 19 jeremybenn
     value is derived from the simulation clock cycle time (*note
1967
     Simulator Behavior: Simulator Behavior.), to correspond to dumping
1968
     50 times per simulated second.
1969
 
1970
`txfile = "FILE"'
1971
     FILE specifies the base of the filename for screen dumps.
1972
     Successive screen dumps will be in BMP format, in files with the
1973
     name `FILENNNN.bmp', where NNNN is a sequential count of the
1974 82 jeremybenn
     screen dumps starting at zero.  The default value is `"fb_out"'.
1975 19 jeremybenn
     For backwards compatibility, the alternative name `filename' is
1976
     supported for this parameter, but deprecated.
1977
 
1978
 
1979

1980
File: or1ksim.info,  Node: Keyboard Configuration,  Next: Disc Interface Configuration,  Prev: Frame Buffer Configuration,  Up: Peripheral Configuration
1981
 
1982
3.4.8 Keyboard Configuration (PS2)
1983
----------------------------------
1984
 
1985 82 jeremybenn
The PS2 interface provided by Or1ksim is not documented.  It may be
1986 19 jeremybenn
based on the PS2 project at OpenCores, and found in the top level CVS
1987 82 jeremybenn
directory, `ps2'.  However this project lacks any documentation beyond
1988
its project webpage.  Since most PS2 interfaces follow the Intel i8042
1989 19 jeremybenn
standard, this is presumably what is expected with this device.
1990
 
1991
The implementation only provides for keyboard support, which is
1992 82 jeremybenn
modelled as a file of keystrokes.  There is no mouse support.
1993 19 jeremybenn
 
1994
     Caution: A standard i8042 device has two registers at addresses
1995 82 jeremybenn
     0x60 (command) and 0x64 (status).  Inspection of the code,
1996
     suggests that the Or1ksim component places these registers at
1997
     addresses 0x00 and 0x04.
1998 19 jeremybenn
 
1999
     The port of Linux for the OpenRISC 1000, which runs on Or1ksim
2000
     implements the i8042 device driver, anticipating these registers
2001 82 jeremybenn
     reside at their conventional address.  It seems unlikel that this
2002 19 jeremybenn
     code will work.
2003
 
2004
     This component should be used with caution.
2005
 
2006 82 jeremybenn
Keyboard configuration is described in `section kbd'.  This section may
2007
appear multiple times, specifying multiple keyboard interfaces.  The
2008 19 jeremybenn
following parameters may be specified.
2009
 
2010
`enabled = 0|1'
2011 82 jeremybenn
     If 1 (true, the default), this keyboard is enabled.  If 0, it is
2012 19 jeremybenn
     disabled.
2013
 
2014
`baseaddr = VALUE'
2015
     Set the base address of the keyboard's memory mapped registers to
2016 82 jeremybenn
     VALUE.  The default is 0, which is probably not a sensible value.
2017 19 jeremybenn
 
2018
     The keyboard PS/2 interface has an 3-bit address bus, with 2 8-bit
2019
     registers, at addresses 0x000 and 0x004.
2020
 
2021
          Caution: As noted above, a standard Intel 8042 interface
2022
          would expect to find these registers at locations 0x60 and
2023
          0x64, thus requiring at least a 7-bit bus.
2024
 
2025
`irq = VALUE'
2026 82 jeremybenn
     Use VALUE as the IRQ number of this Keyboard interface.  Default
2027 19 jeremybenn
     value 0.
2028
 
2029
`rxfile = "FILE"'
2030
     `file' specifies a file containing raw key stroke data, which
2031 82 jeremybenn
     models the input from a physical keyboard.  The default value is
2032 19 jeremybenn
     `"kbd_in"'.
2033
 
2034
 
2035

2036
File: or1ksim.info,  Node: Disc Interface Configuration,  Next: Generic Peripheral Configuration,  Prev: Keyboard Configuration,  Up: Peripheral Configuration
2037
 
2038
3.4.9 Disc Interface Configuration
2039
----------------------------------
2040
 
2041
The ATA/ATAPI disc controller used in Or1ksim is the OCIDEC (OpenCores
2042
IDE Controller) component implemented at OpenCores, and found in the
2043 82 jeremybenn
top level CVS directory, `ata'.  It is described in the document
2044 19 jeremybenn
`ATA/ATAPI-5 Core Specification' by Richard Herveille, which can be
2045 82 jeremybenn
found in the `doc' subdirectory.  It is a memory mapped component,
2046
which resides on the main OpenRISC Wishbone data bus.
2047 19 jeremybenn
 
2048 82 jeremybenn
ATA/ATAPI configuration is described in `section ata'.  This section
2049
may appear multiple times, specifying multiple disc controllers.  The
2050 19 jeremybenn
following parameters may be specified.
2051
 
2052
`enabled = 0|1'
2053 82 jeremybenn
     If 1 (true, the default), this ATA/ATAPI interface is enabled.  If
2054 19 jeremybenn
     0, it is disabled.
2055
 
2056
`baseaddr = VALUE'
2057
     Set the base address of the ATA/ATAPI interface's memory mapped
2058 82 jeremybenn
     registers to VALUE.  The default is 0, which is probably not a
2059 19 jeremybenn
     sensible value.
2060
 
2061
     The ATA/ATAPI PS/2 interface has an 5-bit address bus, with 8
2062 82 jeremybenn
     32-bit registers.  Depending on the version of the OCIDEC
2063
     ATA/ATAPI interface selected (see `dev_id' below), not all
2064
     registers will be available.
2065 19 jeremybenn
 
2066
`irq = VALUE'
2067 82 jeremybenn
     Use VALUE as the IRQ number of this ATA/ATAPI interface.  Default
2068 19 jeremybenn
     value 0.
2069
 
2070
`dev_id = 1|2|3'
2071
     This parameter specifies which version of the OCIDEC ATA/ATAPI
2072 82 jeremybenn
     interface to model.  The default value is 1.
2073 19 jeremybenn
 
2074
     Version 1 supports only the `CTRL', `STAT' and `PCTR' registers.
2075
     Versions 2 & 3 add the `FCTR' registers, Version 3 adds the `DTR'
2076
     registers and the `RXD'/`TXD' registers.
2077
 
2078
`rev = VALUE'
2079
     Set the VALUE as the revision of the OCIDEC ATA/ATAPI interface.
2080 82 jeremybenn
     The default value is 1.  The default value is 0.  Its value should
2081
     be in the range 0-15.  Larger values are truncated with a warning.
2082 19 jeremybenn
     This only affects the reset value of the `STAT' register, where it
2083
     forms bits 24-27.
2084
 
2085
`pio_mode0_t1 = VALUE'
2086
`pio_mode0_t2 = VALUE'
2087
`pio_mode0_t4 = VALUE'
2088
`pio_mode0_teoc = VALUE'
2089
     These parameters specify the timings for use with Programmed
2090 82 jeremybenn
     Input/Output (PIO) transfers.  They are specified as the number of
2091 19 jeremybenn
     clock cycles - 2, rounded up to the next highest integer, or zero
2092 82 jeremybenn
     if that would be negative.  The values should not exceed 255.  If
2093 19 jeremybenn
     they do, they will be ignored with a warning.
2094
 
2095
     See the ATA/ATAPI-5 specification for explanations of each of these
2096 82 jeremybenn
     timing parameters.  The default values are:
2097 19 jeremybenn
 
2098
          pio_mode0_t1   =  6
2099
          pio_mode0_t2   = 28
2100
          pio_mode0_t4   =  2
2101
          pio_mode0_teoc = 23
2102
 
2103
`dma_mode0_tm = VALUE'
2104
`dma_mode0_td = VALUE'
2105
`dma_mode0_teoc = VALUE'
2106
     These parameters specify the timings for use with DMA transfers.
2107
     They are specified as the number of clock cycles - 2, rounded up
2108
     to the next highest integer, or zero if that would be negative.
2109 82 jeremybenn
     The values should not exceed 255.  If they do, they will be
2110
     ignored with a warning.
2111 19 jeremybenn
 
2112
     See the ATA/ATAPI-5 specification for explanations of each of these
2113 82 jeremybenn
     timing parameters.  The default values are:
2114 19 jeremybenn
 
2115
          dma_mode0_tm   =  4
2116
          dma_mode0_td   = 21
2117
          dma_mode0_teoc = 21
2118
 
2119
 
2120
3.4.9.1 ATA/ATAPI Device Configuration
2121
......................................
2122
 
2123 82 jeremybenn
Within the `section ata', each device is specified separately.  The
2124 19 jeremybenn
device subsection is introduced by
2125
 
2126
     device VALUE
2127
 
2128 82 jeremybenn
VALUE is the device number, which should be 0 or 1.  The subsection
2129
ends with `enddevice'.  Note that if the same device number is
2130
specified more than once, the previous values will be overwritten.
2131
Within the `device' subsection, the following parameters may appear:
2132 19 jeremybenn
 
2133
`type = VALUE'
2134
     VALUEspecifies the type of device: 0 (the default) for "not
2135
     connected", 1 for hard disk simulated in a file and 2 for local
2136
     system hard disk.
2137
 
2138
`file = "FILENAME"'
2139
     `filename' specifies the file to be used for a simulated ATA
2140 82 jeremybenn
     device if the file type (see `type' above) is 1.  Default value
2141 19 jeremybenn
     `"ata-FileN"', where N is the device number.
2142
 
2143
`size = VALUE'
2144
     VALUE specifies the size of a simulated ATA device if the file
2145 82 jeremybenn
     type (see `type' above) is 1.  The default value is zero.
2146 19 jeremybenn
 
2147
`packet = 0|1'
2148 82 jeremybenn
     If 1 (true), implement the PACKET command feature set.  If 0 (the
2149 19 jeremybenn
     default), do not implement the PACKET command feature set.
2150
 
2151
`firmware = "STR"'
2152
     Firmware to report in response to the "Identify Device" command.
2153
     Default `"02207031"'.
2154
 
2155
`heads = VALUE'
2156 82 jeremybenn
     Number of heads in the device.  Default 7, use -1 to disable all
2157 19 jeremybenn
     heads.
2158
 
2159
`sectors = VALUE'
2160 82 jeremybenn
     Number of sectors per track in the device.  Default 32.
2161 19 jeremybenn
 
2162
`mwdma = 0|1|2|-1'
2163 82 jeremybenn
     Highest multi-word DMA mode supported.  Default 2, use -1 to
2164 19 jeremybenn
     disable.
2165
 
2166
`pio = 0|1|2|3|4'
2167 82 jeremybenn
     Highest PIO mode supported.  Default 4.
2168 19 jeremybenn
 
2169
 
2170

2171
File: or1ksim.info,  Node: Generic Peripheral Configuration,  Prev: Disc Interface Configuration,  Up: Peripheral Configuration
2172
 
2173
3.4.10 Generic Peripheral Configuration
2174
---------------------------------------
2175
 
2176
When used as a library (*note Simulator Library: Simulator Library.),
2177
Or1ksim makes provision for any additional peripheral to be implemented
2178 82 jeremybenn
externally.  Any read or write access to this peripheral's memory map
2179
generates "upcall"s to an external handler.  This interface can support
2180 19 jeremybenn
either C or C++, and was particularly designed to facilitate support
2181
for OSCI SystemC (see `http://www.systemc.org').
2182
 
2183
Generic peripheral configuration is described in `section generic'.
2184
This section may appear multiple times, specifying multiple external
2185 82 jeremybenn
peripherals.  The following parameters may be specified.
2186 19 jeremybenn
 
2187
`enabled = 0|1'
2188 82 jeremybenn
     If 1 (true, the default), this ATA/ATAPI interface is enabled.  If
2189 19 jeremybenn
     0, it is disabled.
2190
 
2191
`baseaddr = VALUE'
2192
     Set the base address of the generic peripheral's memory mapped
2193 82 jeremybenn
     registers to VALUE.  The default is 0, which is probably not a
2194 19 jeremybenn
     sensible value.
2195
 
2196
     The size of the memory mapped register space is controlled by the
2197
     `size' paramter, described below.
2198
 
2199
`size = VALUE'
2200
     Set the size of the generic peripheral's memory mapped register
2201 82 jeremybenn
     space to VALUE bytes.  Any read or write accesses to addresses with
2202 19 jeremybenn
     offsets of 0 to VALUE-1 bytes from the base address specified in
2203
     parameter `baseaddr' (see above) will be directed to the external
2204
     interface.
2205
 
2206 82 jeremybenn
     VALUE will be rounded up the nearest power of 2.  It's default
2207
     value is zero.  If VALUE is not an exact power of two, accesses to
2208 19 jeremybenn
     address offsets of VALUE or above up to the next power of 2 will
2209
     generate a warning, and have no effect (reads will return zero).
2210
 
2211
`name = "STR"'
2212 82 jeremybenn
     This gives the peripheral the name `"STR"'.  This is used to
2213 19 jeremybenn
     identify the peripheral in error messages and warnings, and when
2214 82 jeremybenn
     reporting its status.  The default value is
2215 19 jeremybenn
     `"anonymous external peripheral"'.
2216
 
2217
`byte_enabled = 0|1'
2218
`hw_enabled = 0|1'
2219
`word_enabled = 0|1'
2220
     If 1 (true, the default), these parameters respectively enable the
2221 82 jeremybenn
     device for byte wide, half-word wide and word wide accesses.  If 0,
2222 19 jeremybenn
     accesses of that width will fail.
2223
 
2224
 
2225

2226
File: or1ksim.info,  Node: Interactive Command Line,  Next: Verification API,  Prev: Configuration,  Up: Top
2227
 
2228
4 Interactive Command Line
2229
**************************
2230
 
2231
If started with the `-f' flag, or if interrupted with `ctrl-C', Or1ksim
2232 82 jeremybenn
provides the user with an interactive command line.  The commands
2233 19 jeremybenn
available, which may not be abbreviated, are:
2234
 
2235
`q'
2236
     Exit the simulator
2237
 
2238
`r'
2239 82 jeremybenn
     Display all the General Purpose Registers (GPRs).  Also shows the
2240 19 jeremybenn
     just executed and next to be executed instructions symbolically
2241
     and the state of the flag in the Supervision Register.
2242
 
2243
`t'
2244
     Execute the next instruction and then display register/instruction
2245
     information as with the `r' command (see above).
2246
 
2247
`run NUM [ hush ]'
2248 82 jeremybenn
     Execute NUM instructions.  The register/instruction information is
2249 19 jeremybenn
     displayed after each instruction, as with the `r' command (see
2250
     above) _unless_ `hush' is specified.
2251
 
2252
`pr REG VALUE'
2253
     Patch register REG with VALUE.
2254
 
2255
`dm FROMADDR [ TOADDR ]'
2256 82 jeremybenn
     Display memory bytes between FROMADDR and TOADDR.  If TOADDR is
2257
     not given, 64 bytes are displayed, starting at FROMADDR.
2258 19 jeremybenn
 
2259
          Caution: The output from this command is broken (a bug).
2260 82 jeremybenn
          Or1ksim attempts to print out 16 bytes per row.  However,
2261 19 jeremybenn
          instead of printing out the address at the start of each row,
2262
          it prints the address (of the first of the 16 bytes) before
2263
          _each_ byte.
2264
 
2265
`de FROMADDR [ TOADDR ]'
2266 82 jeremybenn
     Disassemble code between FROMADDR and TOADDR.  If TOADDR is not
2267 19 jeremybenn
     given, 16 instructions are disassembled.
2268
 
2269
     The disassembly is entirely numerical, and gives no symbolic
2270
     information.
2271
 
2272
`pm ADDR VALUE'
2273
     Patch the 4 bytes in memory starting at ADDR with the 32-bit VALUE.
2274
 
2275
`pc VALUE'
2276
     Patch the program counter with VALUE.
2277
 
2278
`cm FROMADDR TOADDR SIZE'
2279
     Copy SIZE bytes in memory from FROMADDR to TOADDR.
2280
 
2281
`break ADDR'
2282
     Toggle the breakpoint set at ADDR.
2283
 
2284
`breaks'
2285
     List all set breakpoints
2286
 
2287
`reset'
2288 82 jeremybenn
     Reset the simulator.  Includes modeling a reset of the processor,
2289
     so execution will restart from the reset vector location, 0x100.
2290 19 jeremybenn
 
2291
`hist'
2292
     If saving the execution history has been configured (*note
2293
     Simulator Behavior: Simulator Behavior.), display the execution
2294
     history.
2295
 
2296
`stall'
2297
     Stall the processor, so that control is passed to the debug unit.
2298 82 jeremybenn
     When stalled, the processor can execute no instructions.  This
2299 19 jeremybenn
     command is useful when debugging the JTAG interface, used by
2300
     debuggers such as GDB.
2301
 
2302
`unstall'
2303 82 jeremybenn
     Unstall the processor, so that normal execution can continue.
2304
     This command is useful when debugging the JTAG interface, used by
2305 19 jeremybenn
     debuggers such as GDB.
2306
 
2307
`stats CATEGORY | clear'
2308
     Print the statistics for the given CATEGORY, if available, or
2309 82 jeremybenn
     clear if `clear' is specified.  The categories are:
2310 19 jeremybenn
 
2311
    1
2312
          Miscellaneous statistics: branch predictions (if branch
2313
          predictions are enabled), branch target cache model (if
2314
          enabled), cache (if enbaled), MMU (if enabled) and number of
2315
          addtional load & store cycles.
2316
 
2317
          *Note Configuring the OpenRisc Achitectural Components: Core
2318
          OpenRISC Configuration, for details of how to enable these
2319
          various features.
2320
 
2321
    2
2322 82 jeremybenn
          Instruction usage statistics.  Requires hazard analysis to be
2323 19 jeremybenn
          enabled (*note CPU Configuration: CPU Configuration.).
2324
 
2325
    3
2326 82 jeremybenn
          Instruction dependency statistics.  Requires hazard analysis
2327 19 jeremybenn
          to be enabled (*note CPU Configuration: CPU Configuration.).
2328
 
2329
    4
2330 82 jeremybenn
          Functional unit dependency statistics.  Requires hazard
2331 19 jeremybenn
          analysis to be enabled (*note CPU Configuration: CPU
2332
          Configuration.).
2333
 
2334
    5
2335 82 jeremybenn
          Raw register usage over time.  Requires hazard analysis to be
2336 19 jeremybenn
          enabled (*note CPU Configuration: CPU Configuration.).
2337
 
2338
    6
2339 82 jeremybenn
          Store buffer statistics.  Requires the store buffer to be
2340 19 jeremybenn
          enabled (*note CPU Configuration: CPU Configuration.).
2341
 
2342
 
2343
`info'
2344
     Display detailed information about the simulator configuration.
2345
     This is quite a lengthy about, because all MMU TLB information is
2346
     displayed.
2347
 
2348
`dv FROMADDR [ TOADDR ] [ MODULE ]'
2349
     Dump the area of memory between FROMADDR and TOADDR as Verilog
2350 82 jeremybenn
     code for a synchronous, 23-bit wide SRAM module, named MODULE.  If
2351 19 jeremybenn
     TOADDR is not specified, then 64 bytes are dumped (as 16 32-bit
2352 82 jeremybenn
     words).  If MODULE is not specified, `or1k_mem' is used.
2353 19 jeremybenn
 
2354
     To save to a file, use the redirection function (described after
2355
     this table, below).
2356
 
2357
`dh FROMADDR [ TOADDR ]'
2358
     Dump the area of memory between FROMADDR and TOADDR as 32-bit hex
2359 82 jeremybenn
     numbers (no `0x', or `32'h' prefix).  If TOADDR is not specified,
2360 19 jeremybenn
     then 64 bytes are dumped (as 16 32-bit words).
2361
 
2362
     To save to a file, use the redirection function (described after
2363
     this table, below).
2364
 
2365
`setdbch'
2366 82 jeremybenn
     Toggle debug channels on/off.  *Note Standalone Simulator:
2367 19 jeremybenn
     Standalone Simulator, for a description of specifying debug
2368
     channels on the command line.
2369
 
2370
`set SECTION PARAM = VALUE'
2371
     Set the configuration parameter PARA in section SECTION to VALUE.
2372
     *Note Configuration: Configuration, for details of configuration
2373
     parameters and their settings.
2374
 
2375
`debug'
2376 82 jeremybenn
     Toggle the simulator debug mode.  *Note Debug Interface
2377 19 jeremybenn
     Configuration: Debug Interface Configuration, for information on
2378
     this parameter.
2379
 
2380
          Caution: This is effectively enabling or disabling the debug
2381 82 jeremybenn
          unit.  It does not effect the remote GDB debug interface.
2382 19 jeremybenn
          However using the remote debug interface while the debug unit
2383
          is disabled will lead to undefined behavior and likely crash
2384
          Or1ksim
2385
 
2386
`cuc'
2387
     Enter the the Custom Unit Compiler command prompt (*note CUC
2388
     Configuration: CUC Configuration.).
2389
 
2390
          Caution: The CUC must be properly configured, for this to
2391 82 jeremybenn
          succeed.  In particular a timing file must be available and
2392
          readable.  Otherwise Or1ksim will crash.
2393 19 jeremybenn
 
2394
`help'
2395
     Print out brief information about each command available.
2396
 
2397
`mprofile [-vh] [-m M] [-g N] [-f FILE] FROM TO'
2398 82 jeremybenn
     Run the memory profiling utility.  This follows the same usage as
2399 19 jeremybenn
     the standalone command (*note Memory Profiling Utility: Memory
2400
     Profiling Utility.).
2401
 
2402
`profile [-vhcq] [-g FILE]'
2403 82 jeremybenn
     Run the instruction profiling utility.  This follows the same
2404
     usage as the standalone command (*note Profiling Utility:
2405
     Profiling Utility.).
2406 19 jeremybenn
 
2407
 
2408
For all commands, it is possible to redirect the output to a file, by
2409
using the redirection operator, `>'.
2410
 
2411
     COMMAND > FILENAME
2412
 
2413
This is particularly useful for commands dumping a large amount of
2414
output, such as `dv'.
2415
 
2416
     Caution: Unfortunately there is a serious bug with the redirection
2417 82 jeremybenn
     operator.  It does not return output to standard output after the
2418
     command completes.  Until this bug is fixed, file redirection
2419 19 jeremybenn
     should not be used.
2420
 
2421

2422
File: or1ksim.info,  Node: Verification API,  Next: Code Internals,  Prev: Interactive Command Line,  Up: Top
2423
 
2424
5 Verification API (VAPI)
2425
*************************
2426
 
2427
The Verification API (VAPI) provides a TCP/IP interface to allow
2428 82 jeremybenn
components of the simulation to be controlled externally.  The
2429
interface is polled for new requests on each simulated clock cycle.
2430
Components within the simulator may send responses to such requests.
2431 19 jeremybenn
 
2432 82 jeremybenn
The inteface is an asynchronous duplex protocol.  On the request side
2433
it provides for simple commands, known as VAPI IDs (a 32 bit integer),
2434
with a single piece of data (also a 32 bit integer).  On the send side,
2435
it provides for sending a single VAPI ID and data.  However there is no
2436
explicit command-response structure.  Some components just accept
2437
requests (e.g.  to set values), some just generate sends (to report
2438 19 jeremybenn
values), and some do both.
2439
 
2440
Each component has a base ID (32 bit) and its commands will start from
2441 82 jeremybenn
that base ID.  This provides a simple partitioning of the command space
2442
amongst components.  Request commands will be directed to the component
2443 19 jeremybenn
with the closest base ID lower than the VAPI ID of the command.
2444
 
2445
Thus if there are two components with base IDs of 0x200 and 0x300, and
2446
a request with VAPI ID of 0x203 is received, it will be directed to the
2447
first component as its command #3.
2448
 
2449
The results of VAPI interactions are logged (by default in `vapi.log'
2450
unless an alternative is specified in `section vapi').
2451
 
2452
Currently the following components support VAPI:
2453
 
2454
Debug Unit
2455
     Although the Debug Unit can specify a base VAPI ID, it is not used
2456
     to send commands or receive requests.
2457
 
2458
     Instead, if the base VAPI ID is set, all remote JTAG protocol
2459
     exchanges are logged in the VAPI log file.
2460
 
2461
UART
2462
     If a base VAPI ID is specified, the UART sends details of any
2463
     chars or break characters sent, with dteails of the line control
2464
     register etc encoded in the data packet sent.
2465
 
2466
     This supports a single VAPI command request, but encodes a
2467
     sub-command in the top 8 bits of the associated data.
2468
 
2469
    `0x00'
2470
          This stuffs the least significant 8 bits of the data into the
2471
          serial register of the UART and the next 8 bits into the line
2472
          control register, effectively providing control of the next
2473
          character to be sent or received.
2474
 
2475
    `0x01'
2476
          The divisor latch bytes are set from the least significant 16
2477
          bits of the data.
2478
 
2479
    `0x02'
2480
          The line control register is set from bits 15-8 of the data.
2481
 
2482
    `0x03'
2483
          The UART skew is set from the least significant 16 bits of
2484
          the data
2485
 
2486
    `0x04'
2487
          If the 16th most significant bit of the data is 1, start
2488 82 jeremybenn
          sending breaks, otherwise stop sending breaks.  The breaks
2489
          are sent or cleared after the number of UART clock divider
2490
          ticks specified by the data (immediately if the data is zero).
2491 19 jeremybenn
 
2492
 
2493
DMA
2494
     Although the DMA unit supports a base VAPI ID in its configuration
2495
     (`section dma'), no VAPI data is sent, nor VAPI requests currently
2496
     implemented.
2497
 
2498
Ethernet
2499 82 jeremybenn
     The following requests are handled by the Ethernet.  Specified
2500 19 jeremybenn
     symbolically, these are the increments from the base VAPI ID of the
2501 82 jeremybenn
     Ethernet.  At present no implementation is provided behind these
2502 19 jeremybenn
     VAPI requests.
2503
 
2504
    `ETH_VAPI_DATA (0)'
2505
 
2506
    `ETH_VAPI_CTRL (0)'
2507
 
2508
GPIO
2509
     If a base VAPI ID is specified, the GPIO sends out on its base
2510
     VAPI ID (symbolically, GPIO_VAPI_DATA (0) offset from the base
2511
     VAPI ID) any changes in outputs.
2512
 
2513 82 jeremybenn
     The following requests are handled by the GPIO.  Specified
2514 19 jeremybenn
     symbolically, these are the increments from the VAPI base ID of the
2515
     GPIO.
2516
 
2517
    `GPIO_VAPI_DATA (0)'
2518
          Set the next input to the commands data field
2519
 
2520
    `GPIO_VAPI_AUX (1)'
2521
          Set the GPIO auxiliary inputs to the data field
2522
 
2523
    `GPIO_VAPI_CLOCK (2)'
2524
          Add an external GPIO clock trigger of period specified in the
2525
          data field.
2526
 
2527
    `GPIO_VAPI_RGPIO_OE (3)'
2528
          Set the GPIO output enable to the data field
2529
 
2530
    `GPIO_VAPI_RGPIO_INTE (4)'
2531
          Set the next interrupt to the data field
2532
 
2533
    `GPIO_VAPI_RGPIO_PTRIG (5)'
2534
          Set the next trigger to the data field
2535
 
2536
    `GPIO_VAPI_RGPIO_AUX (6)'
2537
          Set the next auxiliary input to the data field
2538
 
2539
    `GPIO_VAPI_RGPIO_CTRL (7)'
2540
          Set th next control input to the data field
2541
 
2542
 
2543
 
2544

2545
File: or1ksim.info,  Node: Code Internals,  Next: GNU Free Documentation License,  Prev: Verification API,  Up: Top
2546
 
2547
6 A Guide to Or1ksim Internals
2548
******************************
2549
 
2550 82 jeremybenn
These are notes to help those wanting to extend Or1ksim.  This section
2551 19 jeremybenn
assumes the use of a tag file, so file locations of entities'
2552 82 jeremybenn
definitions are not in general provided.  For more on tags, see the
2553
Linux manual page for `etags'.  A tag file can be created with:
2554 19 jeremybenn
 
2555
     make tags
2556
 
2557
* Menu:
2558
 
2559
* Coding Conventions::
2560
* Global Data Structures::
2561
* Concepts::
2562
* Internal Debugging::
2563
 
2564

2565
File: or1ksim.info,  Node: Coding Conventions,  Next: Global Data Structures,  Up: Code Internals
2566
 
2567
6.1 Coding Conventions for Or1ksim
2568
==================================
2569
 
2570
This chapter provides some guidelines for coding, to facilitate
2571
extensions to Or1ksim
2572
 
2573
_GNU Coding Standard_
2574
     Code should follow the GNU coding standard for C
2575 82 jeremybenn
     (`http://www.gnu.org/prep/standards/'.  If in doubt, put your code
2576 19 jeremybenn
     through the `indent' program.
2577
 
2578
_`#include' headers_
2579
     All C source code files should include `config.h' before any other
2580
     file.
2581
 
2582
     This should be followed by inclusion of any system headers (but see
2583
     the comments about portability and `port.h' below) and then by any
2584
     Or1ksim package headers.
2585
 
2586
     If `port.h' is required, it should be the first package header to
2587
     be included after the system headers.
2588
 
2589
     All C source code and header files should directly include any
2590 82 jeremybenn
     system or package header they depend on, i.e.  not rely on any
2591
     other header having already included it.  The two exceptions are
2592 19 jeremybenn
 
2593
       1. All header files may assume that `config.h' has already been
2594
          included.
2595
 
2596
       2. System headers which impose portability problems should be
2597
          included by using the package header `port.h', rather than
2598 82 jeremybenn
          the system headers themselves.  This is the case for code
2599 19 jeremybenn
          requiring
2600
 
2601
             * `strndup' (from `string.h')
2602
 
2603
             * Integer types (`intN_t', `uintN_t') (from `inttypes.h').
2604
 
2605
             * `isblank' (from `ctype.h')
2606
 
2607
 
2608
 
2609
_`#include' files once only_
2610
     All include files should be protected by `#ifndef' to ensure their
2611 82 jeremybenn
     definitions are only included once.  For instance a header file
2612 19 jeremybenn
     `X-Y.H' should surround its contents with:
2613
 
2614
          #ifndef X_Y__H
2615
          #define X_Y__H
2616
 
2617
          
2618
 
2619
          #endif  /* X_Y__H */
2620
 
2621
_Avoid `typedef'_
2622
     The GNU coding style for C does not have a clear way to distinguish
2623 82 jeremybenn
     between user type name and user variables.  For this reason
2624 19 jeremybenn
     `typedef' should be avoided except for the most ubiquitous user
2625 82 jeremybenn
     defined types.  This makes the code much easier to read.
2626 19 jeremybenn
 
2627
     There are some `typedef' declarations in the `argtable2' library
2628
     and the ELF and COFF headers, because this code is taken from
2629
     other places.
2630
 
2631
     Within Or1ksim legacy uses of `typedef' have largely been purged,
2632
     except in the Custom Unit Compiler (*note Custom Unit Compiler
2633
     (CUC) Configuration: CUC Configuration.).
2634
 
2635
     The remaining uses of `typedef' occur in two places:
2636
 
2637
        * `port/port.h' defines types to replace those in header files
2638
          that are not available (character functions, string
2639
          duplication, integer types).
2640
 
2641
          `cpu/or1k/arch.h' defines types for the key Or1ksim entities:
2642
          addresses (`oraddr_t'), unsigned register values (`uorreg_t')
2643
          and signed register (`orreg_t') values.
2644
 
2645
 
2646
     Where new types are defined, they should appear in one of these two
2647 82 jeremybenn
     files as appropriate.  Or1ksim specific types appearing in
2648
     `arch.h' should always have the suffix `_h'.
2649 19 jeremybenn
 
2650
_Don't begin names with underscore_
2651
     Names beginning with `_' are intended to be part of the C
2652 82 jeremybenn
     infrastructure.  They should not be used in the simulator code.
2653 19 jeremybenn
 
2654
_Keep Non-global top level entities static_
2655
     All top level entities (functions, variables), which are not
2656
     explicitly part of a global interface should be declared static.
2657
     This ensures that unwanted connections are not inadvertently built
2658
     across the program.
2659
 
2660
_Use of `inline'_
2661 82 jeremybenn
     Code should not be declared `inline'.  Modern compilers can work
2662 19 jeremybenn
     out for themselves what is best in this respect.
2663
 
2664
_Initialization_
2665 82 jeremybenn
     All data structures should be explicitly initialized.  In
2666
     particular code should not rely on static data structures being
2667
     initialized to zero.
2668 19 jeremybenn
 
2669
     The rationale is that in future static data structures may become
2670 82 jeremybenn
     dynamic.  This has been a particular source of bugs in Or1ksim
2671 19 jeremybenn
     historically.
2672
 
2673
     A specific case is with new peripherals, which should always
2674
     include a `start' function to pre-initialize all configuration
2675
     parameters to sensible defaults
2676
 
2677
_Configuration Validation_
2678
     All configuration values should be validated, preferably when
2679
     encountered, if not when the `section' is closed, or otherwise at
2680
     run time when the parameter is first used.
2681
 
2682
 
2683

2684
File: or1ksim.info,  Node: Global Data Structures,  Next: Concepts,  Prev: Coding Conventions,  Up: Code Internals
2685
 
2686
6.2 Global Data Structures
2687
==========================
2688
 
2689
`config'
2690
     The global variable `config' of type `struct config' holds the
2691
     configuration data for some of the Or1ksim components which are
2692 82 jeremybenn
     always present.  At present the components are:
2693 19 jeremybenn
 
2694
        * The simulator defined in `section sim' (*note Simulator
2695
          Configuration: Simulator Configuration.).
2696
 
2697
        * The Verification API (VAPI) defined  in `section vapi' (*note
2698
          Verification API (VAPI) Configuration: Verification API
2699
          Configuration.).
2700
 
2701
        * The Custom Unit Compiler (CUC), defined in `section cuc'
2702
          (*note Custom Unit Compiler (CUC) Configuration: CUC
2703
          Configuration.).
2704
 
2705
        * The CPU, defined in `section cpu' (*note CPU Configuration:
2706
          CPU Configuration.).
2707
 
2708
        * The data cache (but not the instruction cache), defined in
2709
          `section dc' (*note Cache Configuration: Cache
2710
          Configuration.).
2711
 
2712
        * The power management unit, defined in `section pm' (*note
2713
          Power Management Configuration: Power Management
2714
          Configuration.).
2715
 
2716
        * The programmable interrupt controller, defined in
2717
          `section pic' (*note Interrupt Configuration: Interrupt
2718
          Configuration.).
2719
 
2720
        * Branch prediciton, defined in `section bpb' (*note Branch
2721
          Prediction Configuration: Branch Prediction Configuration.).
2722
 
2723
        * The debug unit, defined in `section debug' (*note Debug
2724
          Interface Configuration: Debug Interface Configuration.).
2725
 
2726
 
2727
     This struct is made of a collection of structs, one for each
2728 82 jeremybenn
     component.  For example the simulator configuration is held in
2729 19 jeremybenn
     `config.sim'.
2730
 
2731
`config'
2732
     This is a linked list of data structures holding configuration data
2733
     for all sections which are not held in the main `config' data
2734 82 jeremybenn
     structure.  In general these are components (such as peripherals
2735
     and memory) which may occur multiple times.  However it also
2736
     handles some architectural components which may occur only once,
2737
     such as the memory management units, the instruction cache, the
2738
     interrupt controller and branch prediction.
2739 19 jeremybenn
 
2740
`runtime'
2741
     The global variable `runtime' of type `struct runtime' holds all
2742 82 jeremybenn
     the runtime information about the simulation.  To access this
2743 19 jeremybenn
     variable, `sim-config.h' must be included.
2744
 
2745
     This struct is itself made of 3 other structs, `cpu' (for CPU run
2746
     time state), `vapi' (for Verification API state) and `cuc' (for
2747
     Custom Unit Compiler state).
2748
 
2749
 
2750

2751
File: or1ksim.info,  Node: Concepts,  Next: Internal Debugging,  Prev: Global Data Structures,  Up: Code Internals
2752
 
2753
6.3 Concepts
2754
============
2755
 
2756
_Output Redirection_
2757 82 jeremybenn
     The current output stream is held in `runtime.cpu.fout'.  Output
2758 19 jeremybenn
     should be explicitly written to this stream, or may use the
2759
     `PRINTF' macro, which will write its arguments to this output
2760
     stream.
2761
 
2762
_Reset Hooks_
2763
     Any peripheral may register a routine to be called when the the
2764
     processor is reset by calling `reg_sim_reset', providing a
2765 82 jeremybenn
     function and pointer to a data structure as arguments.  On reset
2766 19 jeremybenn
     that function will be called with the data stucture pointer as
2767
     argument.
2768
 
2769
 
2770

2771
File: or1ksim.info,  Node: Internal Debugging,  Prev: Concepts,  Up: Code Internals
2772
 
2773
6.4 Internal Debugging
2774
======================
2775
 
2776
The function `debug' is like `printf', but with an extra first
2777 82 jeremybenn
argument, which is the debug level.  If the debug level specified in
2778
the simulator configuration (*note Simulator Behavior: Simulator
2779
Behavior.) is greater than or equal to this value, the remaining
2780
arguments are printed to the current output stream (*note Output
2781
Redirection: Output Redirection.).
2782 19 jeremybenn
 
2783

2784
File: or1ksim.info,  Node: GNU Free Documentation License,  Next: Index,  Prev: Code Internals,  Up: Top
2785
 
2786
7 GNU Free Documentation License
2787
********************************
2788
 
2789
                      Version 1.2, November 2002
2790
 
2791
     Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
2792
     51 Franklin St, Fifth Floor, Boston, MA  02110-1301, USA
2793
 
2794
     Everyone is permitted to copy and distribute verbatim copies
2795
     of this license document, but changing it is not allowed.
2796
 
2797
  0. PREAMBLE
2798
 
2799
     The purpose of this License is to make a manual, textbook, or other
2800
     functional and useful document "free" in the sense of freedom: to
2801
     assure everyone the effective freedom to copy and redistribute it,
2802
     with or without modifying it, either commercially or
2803
     noncommercially.  Secondarily, this License preserves for the
2804
     author and publisher a way to get credit for their work, while not
2805
     being considered responsible for modifications made by others.
2806
 
2807
     This License is a kind of "copyleft", which means that derivative
2808
     works of the document must themselves be free in the same sense.
2809
     It complements the GNU General Public License, which is a copyleft
2810
     license designed for free software.
2811
 
2812
     We have designed this License in order to use it for manuals for
2813
     free software, because free software needs free documentation: a
2814
     free program should come with manuals providing the same freedoms
2815
     that the software does.  But this License is not limited to
2816
     software manuals; it can be used for any textual work, regardless
2817
     of subject matter or whether it is published as a printed book.
2818
     We recommend this License principally for works whose purpose is
2819
     instruction or reference.
2820
 
2821
  1. APPLICABILITY AND DEFINITIONS
2822
 
2823
     This License applies to any manual or other work, in any medium,
2824
     that contains a notice placed by the copyright holder saying it
2825
     can be distributed under the terms of this License.  Such a notice
2826
     grants a world-wide, royalty-free license, unlimited in duration,
2827
     to use that work under the conditions stated herein.  The
2828
     "Document", below, refers to any such manual or work.  Any member
2829
     of the public is a licensee, and is addressed as "you".  You
2830
     accept the license if you copy, modify or distribute the work in a
2831
     way requiring permission under copyright law.
2832
 
2833
     A "Modified Version" of the Document means any work containing the
2834
     Document or a portion of it, either copied verbatim, or with
2835
     modifications and/or translated into another language.
2836
 
2837
     A "Secondary Section" is a named appendix or a front-matter section
2838
     of the Document that deals exclusively with the relationship of the
2839
     publishers or authors of the Document to the Document's overall
2840
     subject (or to related matters) and contains nothing that could
2841
     fall directly within that overall subject.  (Thus, if the Document
2842
     is in part a textbook of mathematics, a Secondary Section may not
2843
     explain any mathematics.)  The relationship could be a matter of
2844
     historical connection with the subject or with related matters, or
2845
     of legal, commercial, philosophical, ethical or political position
2846
     regarding them.
2847
 
2848
     The "Invariant Sections" are certain Secondary Sections whose
2849
     titles are designated, as being those of Invariant Sections, in
2850
     the notice that says that the Document is released under this
2851
     License.  If a section does not fit the above definition of
2852
     Secondary then it is not allowed to be designated as Invariant.
2853
     The Document may contain zero Invariant Sections.  If the Document
2854
     does not identify any Invariant Sections then there are none.
2855
 
2856
     The "Cover Texts" are certain short passages of text that are
2857
     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
2858
     that says that the Document is released under this License.  A
2859
     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
2860
     be at most 25 words.
2861
 
2862
     A "Transparent" copy of the Document means a machine-readable copy,
2863
     represented in a format whose specification is available to the
2864
     general public, that is suitable for revising the document
2865
     straightforwardly with generic text editors or (for images
2866
     composed of pixels) generic paint programs or (for drawings) some
2867
     widely available drawing editor, and that is suitable for input to
2868
     text formatters or for automatic translation to a variety of
2869
     formats suitable for input to text formatters.  A copy made in an
2870
     otherwise Transparent file format whose markup, or absence of
2871
     markup, has been arranged to thwart or discourage subsequent
2872
     modification by readers is not Transparent.  An image format is
2873
     not Transparent if used for any substantial amount of text.  A
2874
     copy that is not "Transparent" is called "Opaque".
2875
 
2876
     Examples of suitable formats for Transparent copies include plain
2877
     ASCII without markup, Texinfo input format, LaTeX input format,
2878
     SGML or XML using a publicly available DTD, and
2879
     standard-conforming simple HTML, PostScript or PDF designed for
2880
     human modification.  Examples of transparent image formats include
2881
     PNG, XCF and JPG.  Opaque formats include proprietary formats that
2882
     can be read and edited only by proprietary word processors, SGML or
2883
     XML for which the DTD and/or processing tools are not generally
2884
     available, and the machine-generated HTML, PostScript or PDF
2885
     produced by some word processors for output purposes only.
2886
 
2887
     The "Title Page" means, for a printed book, the title page itself,
2888
     plus such following pages as are needed to hold, legibly, the
2889
     material this License requires to appear in the title page.  For
2890
     works in formats which do not have any title page as such, "Title
2891
     Page" means the text near the most prominent appearance of the
2892
     work's title, preceding the beginning of the body of the text.
2893
 
2894
     A section "Entitled XYZ" means a named subunit of the Document
2895
     whose title either is precisely XYZ or contains XYZ in parentheses
2896
     following text that translates XYZ in another language.  (Here XYZ
2897
     stands for a specific section name mentioned below, such as
2898
     "Acknowledgements", "Dedications", "Endorsements", or "History".)
2899
     To "Preserve the Title" of such a section when you modify the
2900
     Document means that it remains a section "Entitled XYZ" according
2901
     to this definition.
2902
 
2903
     The Document may include Warranty Disclaimers next to the notice
2904
     which states that this License applies to the Document.  These
2905
     Warranty Disclaimers are considered to be included by reference in
2906
     this License, but only as regards disclaiming warranties: any other
2907
     implication that these Warranty Disclaimers may have is void and
2908
     has no effect on the meaning of this License.
2909
 
2910
  2. VERBATIM COPYING
2911
 
2912
     You may copy and distribute the Document in any medium, either
2913
     commercially or noncommercially, provided that this License, the
2914
     copyright notices, and the license notice saying this License
2915
     applies to the Document are reproduced in all copies, and that you
2916
     add no other conditions whatsoever to those of this License.  You
2917
     may not use technical measures to obstruct or control the reading
2918
     or further copying of the copies you make or distribute.  However,
2919
     you may accept compensation in exchange for copies.  If you
2920
     distribute a large enough number of copies you must also follow
2921
     the conditions in section 3.
2922
 
2923
     You may also lend copies, under the same conditions stated above,
2924
     and you may publicly display copies.
2925
 
2926
  3. COPYING IN QUANTITY
2927
 
2928
     If you publish printed copies (or copies in media that commonly
2929
     have printed covers) of the Document, numbering more than 100, and
2930
     the Document's license notice requires Cover Texts, you must
2931
     enclose the copies in covers that carry, clearly and legibly, all
2932
     these Cover Texts: Front-Cover Texts on the front cover, and
2933
     Back-Cover Texts on the back cover.  Both covers must also clearly
2934
     and legibly identify you as the publisher of these copies.  The
2935
     front cover must present the full title with all words of the
2936
     title equally prominent and visible.  You may add other material
2937
     on the covers in addition.  Copying with changes limited to the
2938
     covers, as long as they preserve the title of the Document and
2939
     satisfy these conditions, can be treated as verbatim copying in
2940
     other respects.
2941
 
2942
     If the required texts for either cover are too voluminous to fit
2943
     legibly, you should put the first ones listed (as many as fit
2944
     reasonably) on the actual cover, and continue the rest onto
2945
     adjacent pages.
2946
 
2947
     If you publish or distribute Opaque copies of the Document
2948
     numbering more than 100, you must either include a
2949
     machine-readable Transparent copy along with each Opaque copy, or
2950
     state in or with each Opaque copy a computer-network location from
2951
     which the general network-using public has access to download
2952
     using public-standard network protocols a complete Transparent
2953
     copy of the Document, free of added material.  If you use the
2954
     latter option, you must take reasonably prudent steps, when you
2955
     begin distribution of Opaque copies in quantity, to ensure that
2956
     this Transparent copy will remain thus accessible at the stated
2957
     location until at least one year after the last time you
2958
     distribute an Opaque copy (directly or through your agents or
2959
     retailers) of that edition to the public.
2960
 
2961
     It is requested, but not required, that you contact the authors of
2962
     the Document well before redistributing any large number of
2963
     copies, to give them a chance to provide you with an updated
2964
     version of the Document.
2965
 
2966
  4. MODIFICATIONS
2967
 
2968
     You may copy and distribute a Modified Version of the Document
2969
     under the conditions of sections 2 and 3 above, provided that you
2970
     release the Modified Version under precisely this License, with
2971
     the Modified Version filling the role of the Document, thus
2972
     licensing distribution and modification of the Modified Version to
2973
     whoever possesses a copy of it.  In addition, you must do these
2974
     things in the Modified Version:
2975
 
2976
       A. Use in the Title Page (and on the covers, if any) a title
2977
          distinct from that of the Document, and from those of
2978
          previous versions (which should, if there were any, be listed
2979
          in the History section of the Document).  You may use the
2980
          same title as a previous version if the original publisher of
2981
          that version gives permission.
2982
 
2983
       B. List on the Title Page, as authors, one or more persons or
2984
          entities responsible for authorship of the modifications in
2985
          the Modified Version, together with at least five of the
2986
          principal authors of the Document (all of its principal
2987
          authors, if it has fewer than five), unless they release you
2988
          from this requirement.
2989
 
2990
       C. State on the Title page the name of the publisher of the
2991
          Modified Version, as the publisher.
2992
 
2993
       D. Preserve all the copyright notices of the Document.
2994
 
2995
       E. Add an appropriate copyright notice for your modifications
2996
          adjacent to the other copyright notices.
2997
 
2998
       F. Include, immediately after the copyright notices, a license
2999
          notice giving the public permission to use the Modified
3000
          Version under the terms of this License, in the form shown in
3001
          the Addendum below.
3002
 
3003
       G. Preserve in that license notice the full lists of Invariant
3004
          Sections and required Cover Texts given in the Document's
3005
          license notice.
3006
 
3007
       H. Include an unaltered copy of this License.
3008
 
3009
       I. Preserve the section Entitled "History", Preserve its Title,
3010
          and add to it an item stating at least the title, year, new
3011
          authors, and publisher of the Modified Version as given on
3012
          the Title Page.  If there is no section Entitled "History" in
3013
          the Document, create one stating the title, year, authors,
3014
          and publisher of the Document as given on its Title Page,
3015
          then add an item describing the Modified Version as stated in
3016
          the previous sentence.
3017
 
3018
       J. Preserve the network location, if any, given in the Document
3019
          for public access to a Transparent copy of the Document, and
3020
          likewise the network locations given in the Document for
3021
          previous versions it was based on.  These may be placed in
3022
          the "History" section.  You may omit a network location for a
3023
          work that was published at least four years before the
3024
          Document itself, or if the original publisher of the version
3025
          it refers to gives permission.
3026
 
3027
       K. For any section Entitled "Acknowledgements" or "Dedications",
3028
          Preserve the Title of the section, and preserve in the
3029
          section all the substance and tone of each of the contributor
3030
          acknowledgements and/or dedications given therein.
3031
 
3032
       L. Preserve all the Invariant Sections of the Document,
3033
          unaltered in their text and in their titles.  Section numbers
3034
          or the equivalent are not considered part of the section
3035
          titles.
3036
 
3037
       M. Delete any section Entitled "Endorsements".  Such a section
3038
          may not be included in the Modified Version.
3039
 
3040
       N. Do not retitle any existing section to be Entitled
3041
          "Endorsements" or to conflict in title with any Invariant
3042
          Section.
3043
 
3044
       O. Preserve any Warranty Disclaimers.
3045
 
3046
     If the Modified Version includes new front-matter sections or
3047
     appendices that qualify as Secondary Sections and contain no
3048
     material copied from the Document, you may at your option
3049
     designate some or all of these sections as invariant.  To do this,
3050
     add their titles to the list of Invariant Sections in the Modified
3051
     Version's license notice.  These titles must be distinct from any
3052
     other section titles.
3053
 
3054
     You may add a section Entitled "Endorsements", provided it contains
3055
     nothing but endorsements of your Modified Version by various
3056
     parties--for example, statements of peer review or that the text
3057
     has been approved by an organization as the authoritative
3058
     definition of a standard.
3059
 
3060
     You may add a passage of up to five words as a Front-Cover Text,
3061
     and a passage of up to 25 words as a Back-Cover Text, to the end
3062
     of the list of Cover Texts in the Modified Version.  Only one
3063
     passage of Front-Cover Text and one of Back-Cover Text may be
3064
     added by (or through arrangements made by) any one entity.  If the
3065
     Document already includes a cover text for the same cover,
3066
     previously added by you or by arrangement made by the same entity
3067
     you are acting on behalf of, you may not add another; but you may
3068
     replace the old one, on explicit permission from the previous
3069
     publisher that added the old one.
3070
 
3071
     The author(s) and publisher(s) of the Document do not by this
3072
     License give permission to use their names for publicity for or to
3073
     assert or imply endorsement of any Modified Version.
3074
 
3075
  5. COMBINING DOCUMENTS
3076
 
3077
     You may combine the Document with other documents released under
3078
     this License, under the terms defined in section 4 above for
3079
     modified versions, provided that you include in the combination
3080
     all of the Invariant Sections of all of the original documents,
3081
     unmodified, and list them all as Invariant Sections of your
3082
     combined work in its license notice, and that you preserve all
3083
     their Warranty Disclaimers.
3084
 
3085
     The combined work need only contain one copy of this License, and
3086
     multiple identical Invariant Sections may be replaced with a single
3087
     copy.  If there are multiple Invariant Sections with the same name
3088
     but different contents, make the title of each such section unique
3089
     by adding at the end of it, in parentheses, the name of the
3090
     original author or publisher of that section if known, or else a
3091
     unique number.  Make the same adjustment to the section titles in
3092
     the list of Invariant Sections in the license notice of the
3093
     combined work.
3094
 
3095
     In the combination, you must combine any sections Entitled
3096
     "History" in the various original documents, forming one section
3097
     Entitled "History"; likewise combine any sections Entitled
3098
     "Acknowledgements", and any sections Entitled "Dedications".  You
3099
     must delete all sections Entitled "Endorsements."
3100
 
3101
  6. COLLECTIONS OF DOCUMENTS
3102
 
3103
     You may make a collection consisting of the Document and other
3104
     documents released under this License, and replace the individual
3105
     copies of this License in the various documents with a single copy
3106
     that is included in the collection, provided that you follow the
3107
     rules of this License for verbatim copying of each of the
3108
     documents in all other respects.
3109
 
3110
     You may extract a single document from such a collection, and
3111
     distribute it individually under this License, provided you insert
3112
     a copy of this License into the extracted document, and follow
3113
     this License in all other respects regarding verbatim copying of
3114
     that document.
3115
 
3116
  7. AGGREGATION WITH INDEPENDENT WORKS
3117
 
3118
     A compilation of the Document or its derivatives with other
3119
     separate and independent documents or works, in or on a volume of
3120
     a storage or distribution medium, is called an "aggregate" if the
3121
     copyright resulting from the compilation is not used to limit the
3122
     legal rights of the compilation's users beyond what the individual
3123
     works permit.  When the Document is included in an aggregate, this
3124
     License does not apply to the other works in the aggregate which
3125
     are not themselves derivative works of the Document.
3126
 
3127
     If the Cover Text requirement of section 3 is applicable to these
3128
     copies of the Document, then if the Document is less than one half
3129
     of the entire aggregate, the Document's Cover Texts may be placed
3130
     on covers that bracket the Document within the aggregate, or the
3131
     electronic equivalent of covers if the Document is in electronic
3132
     form.  Otherwise they must appear on printed covers that bracket
3133
     the whole aggregate.
3134
 
3135
  8. TRANSLATION
3136
 
3137
     Translation is considered a kind of modification, so you may
3138
     distribute translations of the Document under the terms of section
3139
     4.  Replacing Invariant Sections with translations requires special
3140
     permission from their copyright holders, but you may include
3141
     translations of some or all Invariant Sections in addition to the
3142
     original versions of these Invariant Sections.  You may include a
3143
     translation of this License, and all the license notices in the
3144
     Document, and any Warranty Disclaimers, provided that you also
3145
     include the original English version of this License and the
3146
     original versions of those notices and disclaimers.  In case of a
3147
     disagreement between the translation and the original version of
3148
     this License or a notice or disclaimer, the original version will
3149
     prevail.
3150
 
3151
     If a section in the Document is Entitled "Acknowledgements",
3152
     "Dedications", or "History", the requirement (section 4) to
3153
     Preserve its Title (section 1) will typically require changing the
3154
     actual title.
3155
 
3156
  9. TERMINATION
3157
 
3158
     You may not copy, modify, sublicense, or distribute the Document
3159
     except as expressly provided for under this License.  Any other
3160
     attempt to copy, modify, sublicense or distribute the Document is
3161
     void, and will automatically terminate your rights under this
3162
     License.  However, parties who have received copies, or rights,
3163
     from you under this License will not have their licenses
3164
     terminated so long as such parties remain in full compliance.
3165
 
3166
 10. FUTURE REVISIONS OF THIS LICENSE
3167
 
3168
     The Free Software Foundation may publish new, revised versions of
3169
     the GNU Free Documentation License from time to time.  Such new
3170
     versions will be similar in spirit to the present version, but may
3171
     differ in detail to address new problems or concerns.  See
3172
     `http://www.gnu.org/copyleft/'.
3173
 
3174
     Each version of the License is given a distinguishing version
3175
     number.  If the Document specifies that a particular numbered
3176
     version of this License "or any later version" applies to it, you
3177
     have the option of following the terms and conditions either of
3178
     that specified version or of any later version that has been
3179
     published (not as a draft) by the Free Software Foundation.  If
3180
     the Document does not specify a version number of this License,
3181
     you may choose any version ever published (not as a draft) by the
3182
     Free Software Foundation.
3183
 
3184
ADDENDUM: How to use this License for your documents
3185
====================================================
3186
 
3187
To use this License in a document you have written, include a copy of
3188
the License in the document and put the following copyright and license
3189
notices just after the title page:
3190
 
3191
       Copyright (C)  YEAR  YOUR NAME.
3192
       Permission is granted to copy, distribute and/or modify this document
3193
       under the terms of the GNU Free Documentation License, Version 1.2
3194
       or any later version published by the Free Software Foundation;
3195
       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
3196
       Texts.  A copy of the license is included in the section entitled ``GNU
3197
       Free Documentation License''.
3198
 
3199
If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
3200
replace the "with...Texts." line with this:
3201
 
3202
         with the Invariant Sections being LIST THEIR TITLES, with
3203
         the Front-Cover Texts being LIST, and with the Back-Cover Texts
3204
         being LIST.
3205
 
3206
If you have Invariant Sections without Cover Texts, or some other
3207
combination of the three, merge those two alternatives to suit the
3208
situation.
3209
 
3210
If your document contains nontrivial examples of program code, we
3211
recommend releasing these examples in parallel under your choice of
3212
free software license, such as the GNU General Public License, to
3213
permit their use in free software.
3214
 
3215

3216
File: or1ksim.info,  Node: Index,  Prev: GNU Free Documentation License,  Up: Top
3217
 
3218
Index
3219
*****
3220
 
3221
 
3222
* Menu:
3223
3224
* --cumulative:                          Profiling Utility.   (line  26)
3225
* --debug-config:                        Standalone Simulator.
3226
                                                              (line  48)
3227 82 jeremybenn
* --disable-all-tests:                   Configuring the Build.
3228
                                                              (line 128)
3229 19 jeremybenn
* --disable-arith-flag:                  Configuring the Build.
3230
                                                              (line  93)
3231
* --disable-debug:                       Configuring the Build.
3232
                                                              (line 121)
3233
* --disable-ethphy:                      Configuring the Build.
3234
                                                              (line  54)
3235
* --disable-ov-flag:                     Configuring the Build.
3236
                                                              (line  70)
3237
* --disable-profiling:                   Configuring the Build.
3238
                                                              (line  25)
3239
* --disable-range-stats:                 Configuring the Build.
3240
                                                              (line  64)
3241 82 jeremybenn
* --enable-all-tests:                    Configuring the Build.
3242
                                                              (line 127)
3243 19 jeremybenn
* --enable-arith-flag:                   Configuring the Build.
3244
                                                              (line  92)
3245
* --enable-debug:                        Configuring the Build.
3246
                                                              (line 120)
3247
* --enable-ethphy:                       Configuring the Build.
3248
                                                              (line  53)
3249
* --enable-execution:                    Configuring the Build.
3250
                                                              (line  32)
3251
* --enable-mprofile:                     Standalone Simulator.
3252
                                                              (line  77)
3253
* --enable-ov-flag:                      Configuring the Build.
3254
                                                              (line  69)
3255
* --enable-profile:                      Standalone Simulator.
3256
                                                              (line  74)
3257
* --enable-profiling:                    Configuring the Build.
3258
                                                              (line  24)
3259
* --enable-range-stats:                  Configuring the Build.
3260
                                                              (line  63)
3261
* --file:                                Standalone Simulator.
3262
                                                              (line  24)
3263
* --filename:                            Memory Profiling Utility.
3264
                                                              (line  51)
3265
* --generate:                            Profiling Utility.   (line  34)
3266
* --group:                               Memory Profiling Utility.
3267
                                                              (line  47)
3268
* --help:                                Standalone Simulator.
3269
                                                              (line  20)
3270
* --help (memory profiling utility):     Memory Profiling Utility.
3271
                                                              (line  22)
3272
* --help (profiling utility):            Profiling Utility.   (line  22)
3273
* --interactive:                         Standalone Simulator.
3274
                                                              (line  54)
3275
* --mode:                                Memory Profiling Utility.
3276
                                                              (line  26)
3277
* --nosrv:                               Standalone Simulator.
3278
                                                              (line  32)
3279
* --quiet:                               Profiling Utility.   (line  30)
3280
* --srv:                                 Standalone Simulator.
3281
                                                              (line  40)
3282
* --strict-npc:                          Standalone Simulator.
3283
                                                              (line  57)
3284
* --version:                             Standalone Simulator.
3285
                                                              (line  16)
3286
* --version (memory profiling utility):  Memory Profiling Utility.
3287
                                                              (line  17)
3288
* --version (profiling utility):         Profiling Utility.   (line  17)
3289
* -c:                                    Profiling Utility.   (line  26)
3290
* -d:                                    Standalone Simulator.
3291
                                                              (line  48)
3292
* -f <1>:                                Memory Profiling Utility.
3293
                                                              (line  51)
3294
* -f:                                    Standalone Simulator.
3295
                                                              (line  24)
3296
* -g <1>:                                Memory Profiling Utility.
3297
                                                              (line  47)
3298
* -g:                                    Profiling Utility.   (line  34)
3299
* -h:                                    Standalone Simulator.
3300
                                                              (line  20)
3301
* -h (memory profiling utility):         Memory Profiling Utility.
3302
                                                              (line  22)
3303
* -h (profiling utility):                Profiling Utility.   (line  22)
3304
* -i:                                    Standalone Simulator.
3305
                                                              (line  54)
3306
* -m:                                    Memory Profiling Utility.
3307
                                                              (line  26)
3308
* -q:                                    Profiling Utility.   (line  30)
3309
* -v:                                    Standalone Simulator.
3310
                                                              (line  16)
3311
* -v (memory profiling utility):         Memory Profiling Utility.
3312
                                                              (line  17)
3313
* -v (profiling utility):                Profiling Utility.   (line  17)
3314
* 0x00 UART VAPI sub-command (UART verification): Verification API.
3315
                                                              (line  49)
3316
* 0x01 UART VAPI sub-command (UART verification): Verification API.
3317
                                                              (line  55)
3318
* 0x02 UART VAPI sub-command (UART verification): Verification API.
3319
                                                              (line  59)
3320
* 0x03 UART VAPI sub-command (UART verification): Verification API.
3321
                                                              (line  62)
3322
* 0x04 UART VAPI sub-command (UART verification): Verification API.
3323
                                                              (line  66)
3324
* 16550 (UART configuration):            UART Configuration.  (line  73)
3325 82 jeremybenn
* all tests enabled:                     Configuring the Build.
3326
                                                              (line 128)
3327 19 jeremybenn
* Argtable2 debugging:                   Configuring the Build.
3328
                                                              (line 121)
3329
* ATA/ATAPI configuration:               Disc Interface Configuration.
3330
                                                              (line   6)
3331
* ATA/ATAPI device configuration:        Disc Interface Configuration.
3332
                                                              (line  88)
3333
* base_vapi_id (GPIO configuration - deprecated): GPIO Configuration.
3334
                                                              (line  32)
3335
* baseaddr (ATA/ATAPI configuration):    Disc Interface Configuration.
3336
                                                              (line  22)
3337
* baseaddr (DMA configuration):          DMA Configuration.   (line  24)
3338
* baseaddr (Ethernet configuration):     Ethernet Configuration.
3339
                                                              (line  22)
3340
* baseaddr (frame buffer configuration): Frame Buffer Configuration.
3341
                                                              (line  20)
3342
* baseaddr (generic peripheral configuration): Generic Peripheral Configuration.
3343
                                                              (line  22)
3344
* baseaddr (GPIO configuration):         GPIO Configuration.  (line  21)
3345
* baseaddr (keyboard configuration):     Keyboard Configuration.
3346
                                                              (line  36)
3347
* baseaddr (memory configuration):       Memory Configuration.
3348
                                                              (line  62)
3349
* baseaddr (memory controller configuration): Memory Controller Configuration.
3350 82 jeremybenn
                                                              (line  29)
3351 19 jeremybenn
* baseaddr (UART configuration):         UART Configuration.  (line  22)
3352
* baseaddr (VGA configuration):          Display Interface Configuration.
3353
                                                              (line  26)
3354
* blocksize (cache configuration):       Cache Configuration. (line  29)
3355
* BPB configuration:                     Branch Prediction Configuration.
3356
                                                              (line   6)
3357
* branch prediction configuration:       Branch Prediction Configuration.
3358
                                                              (line   6)
3359
* break (Interactive CLI):               Interactive Command Line.
3360
                                                              (line  57)
3361
* breakpoint list (Interactive CLI):     Interactive Command Line.
3362
                                                              (line  60)
3363
* breakpoint set/clear (Interactive CLI): Interactive Command Line.
3364
                                                              (line  57)
3365
* breaks (Interactive CLI):              Interactive Command Line.
3366
                                                              (line  60)
3367
* btic (branch prediction configuration): Branch Prediction Configuration.
3368
                                                              (line  19)
3369
* byte_enabled (generic peripheral configuration): Generic Peripheral Configuration.
3370
                                                              (line  48)
3371
* cache configuration:                   Cache Configuration. (line   6)
3372
* calling_convention (CUC configuration): CUC Configuration.  (line  34)
3373
* ce (memory configuration):             Memory Configuration.
3374 82 jeremybenn
                                                              (line  92)
3375 19 jeremybenn
* cfgr (CPU configuration):              CPU Configuration.   (line  47)
3376
* channel (UART configuration):          UART Configuration.  (line  29)
3377
* clear breakpoint (Interactive CLI):    Interactive Command Line.
3378
                                                              (line  57)
3379 82 jeremybenn
* clkcycle (simulator configuration):    Simulator Behavior.  (line 103)
3380 19 jeremybenn
* cm (Interactive CLI):                  Interactive Command Line.
3381
                                                              (line  54)
3382
* command line for Or1ksim standalone use: Standalone Simulator.
3383
                                                              (line   6)
3384
* complex model:                         Configuring the Build.
3385
                                                              (line  32)
3386
* config:                                Global Data Structures.
3387
                                                              (line   7)
3388
* config.bpb:                            Global Data Structures.
3389
                                                              (line  37)
3390
* config.cpu:                            Global Data Structures.
3391
                                                              (line  22)
3392
* config.cuc:                            Global Data Structures.
3393
                                                              (line  18)
3394
* config.dc:                             Global Data Structures.
3395
                                                              (line  25)
3396
* config.debug:                          Global Data Structures.
3397
                                                              (line  40)
3398
* config.pic:                            Global Data Structures.
3399
                                                              (line  33)
3400
* config.pm:                             Global Data Structures.
3401
                                                              (line  29)
3402
* config.sim:                            Global Data Structures.
3403
                                                              (line  11)
3404
* config.vapi:                           Global Data Structures.
3405
                                                              (line  14)
3406
* configuration dynamic structure:       Global Data Structures.
3407
                                                              (line  49)
3408
* configuration file structure:          Configuration File Format.
3409
                                                              (line   6)
3410
* configuration global structure:        Global Data Structures.
3411
                                                              (line   7)
3412
* configuration info (Interactive CLI):  Interactive Command Line.
3413
                                                              (line 119)
3414
* configuration of generic peripherals:  Generic Peripheral Configuration.
3415
                                                              (line   6)
3416
* configuration parameter setting (Interactive CLI): Interactive Command Line.
3417
                                                              (line 146)
3418
* configuring branch prediction:         Branch Prediction Configuration.
3419
                                                              (line   6)
3420
* configuring data & instruction caches: Cache Configuration. (line   6)
3421
* configuring data & instruction MMUs:   Memory Management Configuration.
3422
                                                              (line   6)
3423
* configuring DMA:                       DMA Configuration.   (line   6)
3424
* configuring memory:                    Memory Configuration.
3425
                                                              (line   6)
3426
* configuring Or1ksim:                   Configuration.       (line   6)
3427
* configuring power management:          Power Management Configuration.
3428
                                                              (line   6)
3429
* configuring the ATA/ATAPI interfaces:  Disc Interface Configuration.
3430
                                                              (line   6)
3431
* configuring the behavior of Or1ksim:   Simulator Behavior.  (line   6)
3432
* configuring the CPU:                   CPU Configuration.   (line   6)
3433
* configuring the Custom Unit Compiler (CUC): CUC Configuration.
3434
                                                              (line   6)
3435
* configuring the debug unit and interface to external debuggers: Debug Interface Configuration.
3436
                                                              (line   6)
3437
* configuring the Ethernet interface:    Ethernet Configuration.
3438
                                                              (line   6)
3439
* configuring the frame buffer:          Frame Buffer Configuration.
3440
                                                              (line   6)
3441
* configuring the GPIO:                  GPIO Configuration.  (line   6)
3442
* configuring the interrupt controller:  Interrupt Configuration.
3443
                                                              (line   6)
3444
* configuring the keyboard interface:    Keyboard Configuration.
3445
                                                              (line   6)
3446
* configuring the memory controller:     Memory Controller Configuration.
3447
                                                              (line   6)
3448
* configuring the processor:             CPU Configuration.   (line   6)
3449
* configuring the PS2 interface:         Keyboard Configuration.
3450
                                                              (line   6)
3451
* configuring the UART:                  UART Configuration.  (line   6)
3452
* configuring the Verification API (VAPI): Verification API Configuration.
3453
                                                              (line   6)
3454
* configuring the VGA interface:         Display Interface Configuration.
3455
                                                              (line   6)
3456
* copying memory (Interactive CLI):      Interactive Command Line.
3457
                                                              (line  54)
3458
* CPU configuration:                     CPU Configuration.   (line   6)
3459
* CUC configuration:                     CUC Configuration.   (line   6)
3460
* Custom Unit Compiler (Interactive CLI): Interactive Command Line.
3461
                                                              (line 162)
3462
* Custom Unit Compiler Configuration:    CUC Configuration.   (line   6)
3463
* data cache configuration:              Cache Configuration. (line   6)
3464
* data MMU configuration:                Memory Management Configuration.
3465
                                                              (line   6)
3466
* DCGE (power management register):      Power Management Configuration.
3467
                                                              (line  21)
3468
* debug (Interactive CLI):               Interactive Command Line.
3469
                                                              (line 151)
3470
* debug (simulator configuration):       Simulator Behavior.  (line  13)
3471
* debug channel toggle (Interactive CLI): Interactive Command Line.
3472
                                                              (line 141)
3473
* debug interface configuration:         Debug Interface Configuration.
3474
                                                              (line   6)
3475
* debug mode toggle (Interactive CLI):   Interactive Command Line.
3476
                                                              (line 151)
3477
* debug unit configuration:              Debug Interface Configuration.
3478
                                                              (line   6)
3479
* Debug Unit verification (VAPI):        Verification API.    (line  34)
3480
* debugging enabled (Argtable2):         Configuring the Build.
3481
                                                              (line 121)
3482
* delayr (memory configuration):         Memory Configuration.
3483 82 jeremybenn
                                                              (line 110)
3484 19 jeremybenn
* delayw (memory configuration):         Memory Configuration.
3485 82 jeremybenn
                                                              (line 116)
3486 19 jeremybenn
* dependstats (CPU configuration):       CPU Configuration.   (line  84)
3487
* dev_id (ATA/ATAPI configuration):      Disc Interface Configuration.
3488
                                                              (line  36)
3489
* disassemble (Interactive CLI):         Interactive Command Line.
3490
                                                              (line  41)
3491
* disc interface configuration:          Disc Interface Configuration.
3492
                                                              (line   6)
3493
* disc interface device configuration:   Disc Interface Configuration.
3494
                                                              (line  88)
3495
* display interface configuration:       Display Interface Configuration.
3496
                                                              (line   6)
3497
* displaying memory (Interactive CLI):   Interactive Command Line.
3498
                                                              (line  31)
3499
* displaying registers (Interactive CLI): Interactive Command Line.
3500
                                                              (line  14)
3501
* dm (Interactive CLI):                  Interactive Command Line.
3502
                                                              (line  31)
3503
* dma (Ethernet configuration):          Ethernet Configuration.
3504
                                                              (line  33)
3505
* DMA configuration:                     DMA Configuration.   (line   6)
3506
* DMA verification (VAPI):               Verification API.    (line  73)
3507
* dma_mode0_td (ATA/ATAPI configuration): Disc Interface Configuration.
3508
                                                              (line  70)
3509
* dma_mode0_teoc (ATA/ATAPI configuration): Disc Interface Configuration.
3510
                                                              (line  71)
3511
* dma_mode0_tm (ATA/ATAPI configuration): Disc Interface Configuration.
3512
                                                              (line  69)
3513
* DME (power management register):       Power Management Configuration.
3514
                                                              (line  15)
3515
* DMMU configuration:                    Memory Management Configuration.
3516
                                                              (line   6)
3517
* doze mode (power management register): Power Management Configuration.
3518
                                                              (line  15)
3519
* dv (Interactive CLI):                  Interactive Command Line.
3520
                                                              (line 124)
3521
* dynamic clock gating (power management register): Power Management Configuration.
3522
                                                              (line  21)
3523
* dynamic model:                         Configuring the Build.
3524
                                                              (line  32)
3525
* dynamic ports, use of:                 Verification API Configuration.
3526
                                                              (line  23)
3527
* edge_trigger (interrupt controller):   Interrupt Configuration.
3528
                                                              (line  16)
3529
* enable_bursts (CUC configuration):     CUC Configuration.   (line  38)
3530
* enabled (ATA/ATAPI configuration):     Disc Interface Configuration.
3531
                                                              (line  18)
3532
* enabled (branch prediction configuration): Branch Prediction Configuration.
3533
                                                              (line  15)
3534
* enabled (cache configuration):         Cache Configuration. (line  11)
3535
* enabled (debug interface configuration): Debug Interface Configuration.
3536
                                                              (line  11)
3537
* enabled (DMA configuration):           DMA Configuration.   (line  20)
3538
* enabled (Ethernet configuration):      Ethernet Configuration.
3539
                                                              (line  18)
3540
* enabled (frame buffer configuration):  Frame Buffer Configuration.
3541
                                                              (line  16)
3542
* enabled (generic peripheral configuration): Generic Peripheral Configuration.
3543
                                                              (line  18)
3544
* enabled (GPIO configuration):          GPIO Configuration.  (line  17)
3545
* enabled (interrupt controller):        Interrupt Configuration.
3546
                                                              (line  12)
3547
* enabled (keyboard configuration):      Keyboard Configuration.
3548
                                                              (line  32)
3549
* enabled (memory controller configuration): Memory Controller Configuration.
3550 82 jeremybenn
                                                              (line  18)
3551 19 jeremybenn
* enabled (MMU configuration):           Memory Management Configuration.
3552
                                                              (line  12)
3553
* enabled (power management configuration): Power Management Configuration.
3554
                                                              (line  35)
3555
* enabled (UART configuration):          UART Configuration.  (line  18)
3556
* enabled (verification API configuration): Verification API Configuration.
3557
                                                              (line  15)
3558
* enabled (VGA configuration):           Display Interface Configuration.
3559
                                                              (line  22)
3560
* enabling Ethernet via socket:          Configuring the Build.
3561
                                                              (line  54)
3562
* entrysize (MMU configuration):         Memory Management Configuration.
3563
                                                              (line  32)
3564
* ETH_VAPI_CTRL (Ethernet verification): Verification API.    (line  86)
3565
* ETH_VAPI_DATA (Ethernet verification): Verification API.    (line  84)
3566
* Ethernet configuration:                Ethernet Configuration.
3567
                                                              (line   6)
3568
* Ethernet verification (VAPI):          Verification API.    (line  78)
3569
* Ethernet via socket, enabling:         Configuring the Build.
3570
                                                              (line  54)
3571 82 jeremybenn
* exe_log (simulator configuration):     Simulator Behavior.  (line  49)
3572
* exe_log_end (simulator configuration): Simulator Behavior.  (line  89)
3573
* exe_log_file (simulator configuration): Simulator Behavior. (line  97)
3574 19 jeremybenn
* exe_log_fn (simulator configuration - deprecated): Simulator Behavior.
3575 82 jeremybenn
                                                              (line  97)
3576 19 jeremybenn
* exe_log_marker (simulator configuration): Simulator Behavior.
3577 82 jeremybenn
                                                              (line  93)
3578 19 jeremybenn
* exe_log_start (simulator configuration): Simulator Behavior.
3579 82 jeremybenn
                                                              (line  86)
3580
* exe_log_type (simulator configuration): Simulator Behavior. (line  55)
3581 19 jeremybenn
* exe_log_type=default (simulator configuration): Simulator Behavior.
3582 82 jeremybenn
                                                              (line  58)
3583 19 jeremybenn
* exe_log_type=hardware (simulator configuration): Simulator Behavior.
3584 82 jeremybenn
                                                              (line  62)
3585 19 jeremybenn
* exe_log_type=simple (simulator configuration): Simulator Behavior.
3586 82 jeremybenn
                                                              (line  69)
3587 19 jeremybenn
* exe_log_type=software (simulator configuration): Simulator Behavior.
3588 82 jeremybenn
                                                              (line  74)
3589 19 jeremybenn
* executing code (Interactive CLI):      Interactive Command Line.
3590
                                                              (line  23)
3591
* execution history (Interactive CLI):   Interactive Command Line.
3592
                                                              (line  67)
3593
* file (ATA/ATAPI device configuration): Disc Interface Configuration.
3594
                                                              (line 104)
3595
* file (keyboard configuration):         Keyboard Configuration.
3596
                                                              (line  51)
3597
* filename (frame buffer configuration - deprecated): Frame Buffer Configuration.
3598 82 jeremybenn
                                                              (line  36)
3599 19 jeremybenn
* filename (VGA configuration - deprecated): Display Interface Configuration.
3600
                                                              (line  47)
3601
* firmware (ATA/ATAPI device configuration): Disc Interface Configuration.
3602
                                                              (line 117)
3603
* flag setting by instructions:          Configuring the Build.
3604
                                                              (line  93)
3605
* frame buffer configuration:            Frame Buffer Configuration.
3606
                                                              (line   6)
3607
* gdb_enabled (debug interface configuration): Debug Interface Configuration.
3608
                                                              (line  47)
3609
* generic peripheral configuration:      Generic Peripheral Configuration.
3610
                                                              (line   6)
3611
* GPIO configuration:                    GPIO Configuration.  (line   6)
3612
* GPIO verification (VAPI):              Verification API.    (line  88)
3613
* GPIO_VAPI_AUX (GPIO verification):     Verification API.    (line 100)
3614
* GPIO_VAPI_CLOCK (GPIO verification):   Verification API.    (line 103)
3615
* GPIO_VAPI_CTRL (GPIO verification):    Verification API.    (line 119)
3616
* GPIO_VAPI_DATA (GPIO verification):    Verification API.    (line  97)
3617
* GPIO_VAPI_INTE (GPIO verification):    Verification API.    (line 110)
3618
* GPIO_VAPI_PTRIG (GPIO verification):   Verification API.    (line 113)
3619
* GPIO_VAPI_RGPIO (GPIO verification):   Verification API.    (line 107)
3620
* hazards (CPU configuration):           CPU Configuration.   (line  69)
3621
* heads (ATA/ATAPI device configuration): Disc Interface Configuration.
3622
                                                              (line 121)
3623
* help (Interactive CLI):                Interactive Command Line.
3624
                                                              (line 170)
3625
* hexadecimal memory dump (Interactive CLI): Interactive Command Line.
3626
                                                              (line 133)
3627
* hide_device_id (verification API configuration): Verification API Configuration.
3628
                                                              (line  36)
3629
* hist (Interactive CLI):                Interactive Command Line.
3630
                                                              (line  67)
3631 82 jeremybenn
* history (simulator configuration):     Simulator Behavior.  (line  40)
3632 19 jeremybenn
* history of execution (Interactive CLI): Interactive Command Line.
3633
                                                              (line  67)
3634
* hitdelay (branch prediction configuration): Branch Prediction Configuration.
3635
                                                              (line  33)
3636
* hitdelay (instruction cache configuration): Cache Configuration.
3637
                                                              (line  38)
3638
* hitdelay (MMU configuration):          Memory Management Configuration.
3639
                                                              (line  51)
3640
* hw_enabled (generic peripheral configuration): Generic Peripheral Configuration.
3641
                                                              (line  49)
3642
* IMMU configuration:                    Memory Management Configuration.
3643
                                                              (line   6)
3644
* index (memory controller configuration): Memory Controller Configuration.
3645 82 jeremybenn
                                                              (line  51)
3646 19 jeremybenn
* info (Interactive CLI):                Interactive Command Line.
3647
                                                              (line 119)
3648
* installing Or1ksim:                    Installation.        (line   6)
3649
* instruction cache configuration:       Cache Configuration. (line   6)
3650
* instruction MMU configuration:         Memory Management Configuration.
3651
                                                              (line   6)
3652
* instruction profiling for Or1ksim:     Profiling Utility.   (line   6)
3653
* instruction profiling utility (Interactive CLI): Interactive Command Line.
3654
                                                              (line 178)
3655
* internal debugging:                    Internal Debugging.  (line   6)
3656
* interrupt controller configuration:    Interrupt Configuration.
3657
                                                              (line   6)
3658
* irq (ATA/ATAPI configuration):         Disc Interface Configuration.
3659
                                                              (line  32)
3660
* irq (DMA configuration):               DMA Configuration.   (line  34)
3661
* irq (GPIO configuration):              GPIO Configuration.  (line  29)
3662
* irq (keyboard configuration):          Keyboard Configuration.
3663
                                                              (line  47)
3664
* irq (UART configuration):              UART Configuration.  (line  70)
3665
* irq (VGA configuration):               Display Interface Configuration.
3666
                                                              (line  37)
3667
* jitter (UART configuration):           UART Configuration.  (line  78)
3668
* keyboard configuration:                Keyboard Configuration.
3669
                                                              (line   6)
3670
* library version of Or1ksim:            Simulator Library.   (line   6)
3671
* license for Or1ksim:                   GNU Free Documentation License.
3672
                                                              (line   6)
3673
* list breakpoints (Interactive CLI):    Interactive Command Line.
3674
                                                              (line  60)
3675
* load_hitdelay (data cache configuration): Cache Configuration.
3676
                                                              (line  46)
3677
* load_missdelay (data cache configuration): Cache Configuration.
3678
                                                              (line  50)
3679
* log (memory configuration):            Memory Configuration.
3680 82 jeremybenn
                                                              (line 122)
3681 19 jeremybenn
* log_enabled (verification API configuration): Verification API Configuration.
3682
                                                              (line  28)
3683 93 jeremybenn
* long:                                  Simulator Library.   (line  87)
3684 19 jeremybenn
* mc (memory configuration):             Memory Configuration.
3685 82 jeremybenn
                                                              (line 100)
3686 19 jeremybenn
* memory configuration:                  Memory Configuration.
3687
                                                              (line   6)
3688
* memory controller configuration:       Memory Controller Configuration.
3689
                                                              (line   6)
3690
* memory copying (Interactive CLI):      Interactive Command Line.
3691
                                                              (line  54)
3692
* memory display (Interactive CLI):      Interactive Command Line.
3693
                                                              (line  31)
3694
* memory dump, hexadecimal (Interactive CLI): Interactive Command Line.
3695
                                                              (line 133)
3696
* memory dump, Verilog (Interactive CLI): Interactive Command Line.
3697
                                                              (line 124)
3698
* memory patching (Interactive CLI):     Interactive Command Line.
3699
                                                              (line  48)
3700
* memory profiling end address:          Memory Profiling Utility.
3701
                                                              (line  56)
3702
* memory profiling start address:        Memory Profiling Utility.
3703
                                                              (line  56)
3704
* memory profiling utility (Interactive CLI): Interactive Command Line.
3705
                                                              (line 173)
3706
* memory profiling version of Or1ksim:   Memory Profiling Utility.
3707
                                                              (line   6)
3708
* memory_order (CUC configuration):      CUC Configuration.   (line  15)
3709
* memory_order=exact (CUC configuration): CUC Configuration.  (line  27)
3710
* memory_order=none (CUC configuration): CUC Configuration.   (line  18)
3711
* memory_order=strong (CUC configuration): CUC Configuration. (line  25)
3712
* memory_order=weak (CUC configuration): CUC Configuration.   (line  21)
3713
* missdelay (branch prediction configuration): Branch Prediction Configuration.
3714
                                                              (line  37)
3715
* missdelay (instruction cache configuration): Cache Configuration.
3716
                                                              (line  42)
3717
* missdelay (MMU configuration):         Memory Management Configuration.
3718
                                                              (line  55)
3719
* MMU configuration:                     Memory Management Configuration.
3720
                                                              (line   6)
3721 82 jeremybenn
* mprof_file (simulator configuration):  Simulator Behavior.  (line  34)
3722 19 jeremybenn
* mprof_fn (simulator configuration - deprecated): Simulator Behavior.
3723 82 jeremybenn
                                                              (line  34)
3724 19 jeremybenn
* mprofile (Interactive CLI):            Interactive Command Line.
3725
                                                              (line 173)
3726 82 jeremybenn
* mprofile (simulator configuration):    Simulator Behavior.  (line  29)
3727 19 jeremybenn
* mwdma (ATA/ATAPI device configuration): Disc Interface Configuration.
3728
                                                              (line 128)
3729
* name (generic peripheral configuration): Generic Peripheral Configuration.
3730
                                                              (line  42)
3731
* name (memory configuration):           Memory Configuration.
3732 82 jeremybenn
                                                              (line  83)
3733 19 jeremybenn
* no_multicycle (CUC configuration):     CUC Configuration.   (line  42)
3734
* nsets (cache configuration):           Cache Configuration. (line  15)
3735
* nsets (MMU configuration):             Memory Management Configuration.
3736
                                                              (line  16)
3737
* nways (cache configuration):           Cache Configuration. (line  22)
3738
* nways (MMU configuration):             Memory Management Configuration.
3739
                                                              (line  22)
3740 93 jeremybenn
* or1ksim_get_time_period:               Simulator Library.   (line  77)
3741
* or1ksim_init:                          Simulator Library.   (line  14)
3742
* or1ksim_interrupt:                     Simulator Library.   (line  92)
3743
* or1ksim_interrupt_clear:               Simulator Library.   (line 110)
3744
* or1ksim_interrupt_set:                 Simulator Library.   (line 101)
3745
* or1ksim_is_le:                         Simulator Library.   (line  82)
3746
* or1ksim_reset_duration:                Simulator Library.   (line  62)
3747
* or1ksim_run:                           Simulator Library.   (line  57)
3748
* or1ksim_set_time_point:                Simulator Library.   (line  73)
3749 19 jeremybenn
* output rediretion:                     Concepts.            (line   7)
3750
* overflow flag setting by instructions: Configuring the Build.
3751
                                                              (line  70)
3752
* packet (ATA/ATAPI device configuration): Disc Interface Configuration.
3753
                                                              (line 113)
3754
* pagesize (MMU configuration):          Memory Management Configuration.
3755
                                                              (line  27)
3756
* patching memory (Interactive CLI):     Interactive Command Line.
3757
                                                              (line  48)
3758
* patching registers (Interactive CLI):  Interactive Command Line.
3759
                                                              (line  28)
3760
* patching the program counter (Interactive CLI): Interactive Command Line.
3761
                                                              (line  51)
3762
* pattern (memory configuration):        Memory Configuration.
3763
                                                              (line  50)
3764
* pc (Interactive CLI):                  Interactive Command Line.
3765
                                                              (line  51)
3766
* PIC configuration:                     Interrupt Configuration.
3767
                                                              (line   6)
3768
* pio (ATA/ATAPI device configuration):  Disc Interface Configuration.
3769
                                                              (line 132)
3770
* pio_mode0_t1 (ATA/ATAPI configuration): Disc Interface Configuration.
3771
                                                              (line  51)
3772
* pio_mode0_t2 (ATA/ATAPI configuration): Disc Interface Configuration.
3773
                                                              (line  52)
3774
* pio_mode0_t4 (ATA/ATAPI configuration): Disc Interface Configuration.
3775
                                                              (line  53)
3776
* pio_mode0_teoc (ATA/ATAPI configuration): Disc Interface Configuration.
3777
                                                              (line  54)
3778
* pm (Interactive CLI):                  Interactive Command Line.
3779
                                                              (line  48)
3780
* PMR - DGCE:                            Power Management Configuration.
3781
                                                              (line  21)
3782
* PMR - DME:                             Power Management Configuration.
3783
                                                              (line  15)
3784
* PMR - SDF:                             Power Management Configuration.
3785
                                                              (line  12)
3786
* PMR - SME:                             Power Management Configuration.
3787
                                                              (line  16)
3788
* PMR - SUME:                            Power Management Configuration.
3789
                                                              (line  24)
3790
* PMU configuration:                     Power Management Configuration.
3791
                                                              (line   6)
3792
* poc (memory controller configuration): Memory Controller Configuration.
3793 82 jeremybenn
                                                              (line  38)
3794 19 jeremybenn
* port range for TCP/IP:                 Verification API Configuration.
3795
                                                              (line  23)
3796
* power management configuration:        Power Management Configuration.
3797
                                                              (line   6)
3798
* power management register, DGCE:       Power Management Configuration.
3799
                                                              (line  21)
3800
* power management register, DME:        Power Management Configuration.
3801
                                                              (line  15)
3802
* power management register, SDF:        Power Management Configuration.
3803
                                                              (line  12)
3804
* power management register, SME:        Power Management Configuration.
3805
                                                              (line  16)
3806
* power management register, SUME:       Power Management Configuration.
3807
                                                              (line  24)
3808
* pr (Interactive CLI):                  Interactive Command Line.
3809
                                                              (line  28)
3810
* private ports, use of:                 Verification API Configuration.
3811
                                                              (line  23)
3812
* processor configuration:               CPU Configuration.   (line   6)
3813
* processor stall (Interactive CLI):     Interactive Command Line.
3814
                                                              (line  72)
3815
* processor unstall (Interactive CLI):   Interactive Command Line.
3816
                                                              (line  78)
3817
* prof_file (simulator configuration):   Simulator Behavior.  (line  23)
3818
* prof_fn (simulator configuration - deprecated): Simulator Behavior.
3819
                                                              (line  23)
3820
* profile (simulator configuration):     Simulator Behavior.  (line  19)
3821
* profiling for Or1ksim:                 Profiling Utility.   (line   6)
3822
* profiling utility (Interactive CLI):   Interactive Command Line.
3823
                                                              (line 178)
3824
* program counter patching (Interactive CLI): Interactive Command Line.
3825
                                                              (line  51)
3826
* programmable interrupt controller configuration: Interrupt Configuration.
3827
                                                              (line   6)
3828
* PS2 configuration:                     Keyboard Configuration.
3829
                                                              (line   6)
3830
* q (Interactive CLI):                   Interactive Command Line.
3831
                                                              (line  11)
3832
* quitting (Interactive CLI):            Interactive Command Line.
3833
                                                              (line  11)
3834
* r (Interactive CLI):                   Interactive Command Line.
3835
                                                              (line  14)
3836
* random_seed (memory configuration):    Memory Configuration.
3837
                                                              (line  40)
3838
* refresh_rate (frame buffer configuration): Frame Buffer Configuration.
3839 82 jeremybenn
                                                              (line  30)
3840 19 jeremybenn
* refresh_rate (VGA configuration):      Display Interface Configuration.
3841
                                                              (line  41)
3842
* reg_sim_reset:                         Concepts.            (line  13)
3843
* register display (Interactive CLI):    Interactive Command Line.
3844
                                                              (line  14)
3845
* register over time statistics:         Configuring the Build.
3846
                                                              (line  64)
3847
* register patching (Interactive CLI):   Interactive Command Line.
3848
                                                              (line  28)
3849
* Remote Serial Protocol:                Debug Interface Configuration.
3850
                                                              (line  20)
3851
* reset (Interactive CLI):               Interactive Command Line.
3852
                                                              (line  63)
3853
* reset hooks:                           Concepts.            (line  13)
3854
* reset the simulator (Interactive CLI): Interactive Command Line.
3855
                                                              (line  63)
3856
* rev (ATA/ATAPI configuration):         Disc Interface Configuration.
3857
                                                              (line  44)
3858
* rev (CPU configuration):               CPU Configuration.   (line  15)
3859
* rsp_enabled (debug interface configuration): Debug Interface Configuration.
3860
                                                              (line  20)
3861
* rsp_port (debug interface configuration): Debug Interface Configuration.
3862
                                                              (line  36)
3863
* rtx_type (Ethernet configuration):     Ethernet Configuration.
3864
                                                              (line  46)
3865
* run (Interactive CLI):                 Interactive Command Line.
3866
                                                              (line  23)
3867
* running code (Interactive CLI):        Interactive Command Line.
3868
                                                              (line  23)
3869
* running Or1ksim:                       Usage.               (line   6)
3870
* runtime:                               Global Data Structures.
3871
                                                              (line  58)
3872
* runtime global structure:              Global Data Structures.
3873
                                                              (line  58)
3874
* runtime.cpu:                           Global Data Structures.
3875
                                                              (line  62)
3876
* runtime.cpu.fout:                      Concepts.            (line   7)
3877
* runtime.cuc:                           Global Data Structures.
3878
                                                              (line  62)
3879
* runtime.vapi:                          Global Data Structures.
3880
                                                              (line  62)
3881
* rx_channel (Ethernet configuration):   Ethernet Configuration.
3882
                                                              (line  59)
3883
* rxfile (Ethernet configuration):       Ethernet Configuration.
3884
                                                              (line  68)
3885
* sbp_bf_fwd (branch prediction configuration): Branch Prediction Configuration.
3886
                                                              (line  23)
3887
* sbp_bnf_fwd (branch prediction configuration): Branch Prediction Configuration.
3888
                                                              (line  28)
3889
* sbuf_len (CPU configuration):          CPU Configuration.   (line  96)
3890
* SDF (power management register):       Power Management Configuration.
3891
                                                              (line  12)
3892
* section ata:                           Disc Interface Configuration.
3893
                                                              (line   6)
3894
* section bpb:                           Branch Prediction Configuration.
3895
                                                              (line   6)
3896
* section cpio:                          GPIO Configuration.  (line   6)
3897
* section cpu:                           CPU Configuration.   (line   6)
3898
* section cuc:                           CUC Configuration.   (line   6)
3899
* section dc:                            Cache Configuration. (line   6)
3900
* section debug:                         Debug Interface Configuration.
3901
                                                              (line   6)
3902
* section dma:                           DMA Configuration.   (line   6)
3903
* section dmmu:                          Memory Management Configuration.
3904
                                                              (line   6)
3905
* section ethernet:                      Ethernet Configuration.
3906
                                                              (line   6)
3907
* section fb:                            Frame Buffer Configuration.
3908
                                                              (line   6)
3909
* section generic:                       Generic Peripheral Configuration.
3910
                                                              (line   6)
3911
* section ic:                            Cache Configuration. (line   6)
3912
* section immu:                          Memory Management Configuration.
3913
                                                              (line   6)
3914
* section kb:                            Keyboard Configuration.
3915
                                                              (line   6)
3916
* section mc:                            Memory Controller Configuration.
3917
                                                              (line   6)
3918
* section memory:                        Memory Configuration.
3919
                                                              (line   6)
3920
* section pic:                           Interrupt Configuration.
3921
                                                              (line   6)
3922
* section pmu:                           Power Management Configuration.
3923
                                                              (line   6)
3924
* section sim:                           Simulator Behavior.  (line   6)
3925
* section uart:                          UART Configuration.  (line   6)
3926
* section vapi:                          Verification API Configuration.
3927
                                                              (line   6)
3928
* section vga:                           Display Interface Configuration.
3929
                                                              (line   6)
3930
* sections:                              Global Data Structures.
3931
                                                              (line  49)
3932
* sectors (ATA/ATAPI device configuration): Disc Interface Configuration.
3933
                                                              (line 125)
3934
* server_port (debug interface configuration): Debug Interface Configuration.
3935
                                                              (line  69)
3936
* server_port (verification API configuration): Verification API Configuration.
3937
                                                              (line  19)
3938
* set (Interactive CLI):                 Interactive Command Line.
3939
                                                              (line 146)
3940
* set breakpoint (Interactive CLI):      Interactive Command Line.
3941
                                                              (line  57)
3942
* setdbch (Interactive CLI):             Interactive Command Line.
3943
                                                              (line 141)
3944
* simple model:                          Configuring the Build.
3945
                                                              (line  32)
3946
* simulator configuration:               Simulator Behavior.  (line   6)
3947
* simulator configuration info (Interactive CLI): Interactive Command Line.
3948
                                                              (line 119)
3949
* simulator reset (Interactive CLI):     Interactive Command Line.
3950
                                                              (line  63)
3951
* simulator statistics (Interactive CLI): Interactive Command Line.
3952
                                                              (line  83)
3953
* size (ATA/ATAPI device configuration): Disc Interface Configuration.
3954
                                                              (line 109)
3955
* size (generic peripheral configuration): Generic Peripheral Configuration.
3956
                                                              (line  30)
3957
* size (memory configuration):           Memory Configuration.
3958
                                                              (line  67)
3959
* sleep mode (power management register): Power Management Configuration.
3960
                                                              (line  16)
3961
* slow down factor (power management register): Power Management Configuration.
3962
                                                              (line  12)
3963
* SME (power management register):       Power Management Configuration.
3964
                                                              (line  16)
3965
* sockif (Ethernet configuration):       Ethernet Configuration.
3966
                                                              (line  83)
3967
* sr (CPU configuration):                CPU Configuration.   (line  53)
3968
* stall (Interactive CLI):               Interactive Command Line.
3969
                                                              (line  72)
3970
* stall the processor (Interactive CLI): Interactive Command Line.
3971
                                                              (line  72)
3972
* statistics, register over time:        Configuring the Build.
3973
                                                              (line  64)
3974
* statistics, simulation (Interactive CLI): Interactive Command Line.
3975
                                                              (line  83)
3976
* stats (Interactive CLI):               Interactive Command Line.
3977
                                                              (line  83)
3978
* stepping code (Interactive CLI):       Interactive Command Line.
3979
                                                              (line  19)
3980
* store_hitdelay (data cache configuration): Cache Configuration.
3981
                                                              (line  54)
3982
* store_missdelay (data cache configuration): Cache Configuration.
3983
                                                              (line  58)
3984
* SUME (power management register):      Power Management Configuration.
3985
                                                              (line  24)
3986
* superscalar (CPU configuration):       CPU Configuration.   (line  58)
3987
* suspend mode (power management register): Power Management Configuration.
3988
                                                              (line  24)
3989
* t (Interactive CLI):                   Interactive Command Line.
3990
                                                              (line  19)
3991
* TCP/IP port range:                     Verification API Configuration.
3992
                                                              (line  23)
3993
* TCP/IP port range for or1ksim service: Debug Interface Configuration.
3994
                                                              (line  74)
3995
* TCP/IP port range for or1ksim-rsp service: Debug Interface Configuration.
3996
                                                              (line  41)
3997 82 jeremybenn
* tests, all enabled.:                   Configuring the Build.
3998
                                                              (line 128)
3999 19 jeremybenn
* timings_file (CUC configuration):      CUC Configuration.   (line  46)
4000
* timings_fn (CUC configuration - deprecated): CUC Configuration.
4001
                                                              (line  46)
4002
* toggle breakpoint (Interactive CLI):   Interactive Command Line.
4003
                                                              (line  57)
4004
* toggle debug channels (Interactive CLI): Interactive Command Line.
4005
                                                              (line 141)
4006
* toggle debug mode (Interactive CLI):   Interactive Command Line.
4007
                                                              (line 151)
4008
* tx_channel (Ethernet configuration):   Ethernet Configuration.
4009
                                                              (line  60)
4010
* txfile (Ethernet configuration):       Ethernet Configuration.
4011
                                                              (line  69)
4012
* txfile (frame buffer configuration):   Frame Buffer Configuration.
4013 82 jeremybenn
                                                              (line  36)
4014 19 jeremybenn
* txfile (VGA configuration):            Display Interface Configuration.
4015
                                                              (line  47)
4016
* type (ATA/ATAPI device configuration): Disc Interface Configuration.
4017
                                                              (line  99)
4018
* type (memory configuration):           Memory Configuration.
4019
                                                              (line  11)
4020
* type=pattern (memory configuration):   Memory Configuration.
4021
                                                              (line  21)
4022
* type=random (memory configuration):    Memory Configuration.
4023
                                                              (line  15)
4024
* type=unknown (memory configuration):   Memory Configuration.
4025
                                                              (line  25)
4026
* type=zero (memory configuration):      Memory Configuration.
4027
                                                              (line  29)
4028
* UART configuration:                    UART Configuration.  (line   6)
4029
* UART I/O from/to a physical serial port: UART Configuration.
4030
                                                              (line  62)
4031
* UART I/O from/to an xterm:             UART Configuration.  (line  38)
4032
* UART I/O from/to files:                UART Configuration.  (line  33)
4033
* UART I/O from/to open file descriptors: UART Configuration. (line  58)
4034
* UART I/O from/to TCP/IP:               UART Configuration.  (line  45)
4035
* UART verification (VAPI):              Verification API.    (line  41)
4036
* unstall (Interactive CLI):             Interactive Command Line.
4037
                                                              (line  78)
4038
* unstall the processor (Interactive CLI): Interactive Command Line.
4039
                                                              (line  78)
4040
* upr (CPU configuration):               CPU Configuration.   (line  21)
4041
* ustates (cache configuration):         Cache Configuration. (line  33)
4042
* ustates (MMU configuration):           Memory Management Configuration.
4043
                                                              (line  41)
4044
* VAPI configuration:                    Verification API Configuration.
4045
                                                              (line   6)
4046
* VAPI for Debug Unit:                   Verification API.    (line  34)
4047
* VAPI for DMA:                          Verification API.    (line  73)
4048
* VAPI for Ethernet:                     Verification API.    (line  78)
4049
* VAPI for GPIO:                         Verification API.    (line  88)
4050
* VAPI for UART:                         Verification API.    (line  41)
4051
* vapi_id (debug interface configuration): Debug Interface Configuration.
4052
                                                              (line  80)
4053
* vapi_id (DMA configuration) <1>:       Ethernet Configuration.
4054
                                                              (line  88)
4055
* vapi_id (DMA configuration):           DMA Configuration.   (line  38)
4056
* vapi_id (GPIO configuration):          GPIO Configuration.  (line  32)
4057
* vapi_id (UART configuration):          UART Configuration.  (line  85)
4058
* vapi_log_file (verification API configuration): Verification API Configuration.
4059
                                                              (line  41)
4060
* vapi_log_fn (verification API configuration - deprecated): Verification API Configuration.
4061
                                                              (line  41)
4062
* ver (CPU configuration):               CPU Configuration.   (line  15)
4063
* verbose (simulator configuration):     Simulator Behavior.  (line  10)
4064
* Verification API configuration:        Verification API Configuration.
4065
                                                              (line   6)
4066
* Verilog memory dump (Interactive CLI): Interactive Command Line.
4067
                                                              (line 124)
4068
* VGA configuration:                     Display Interface Configuration.
4069
 
4070
 
4071
                                                              (line  50)
4072
4073
4074

4075
Tag Table:
4076
Node: Top814
4077
Node: Installation1224
4078
Node: Preparation1471
4079 90 jeremybenn
Node: Configuring the Build1766
4080
Node: Build and Install7245
4081
Node: Known Issues8091
4082
Node: Usage10232
4083
Node: Standalone Simulator10446
4084
Node: Profiling Utility13349
4085
Node: Memory Profiling Utility14259
4086
Node: Simulator Library15624
4087 93 jeremybenn
Node: Configuration21816
4088
Node: Configuration File Format22425
4089
Node: Configuration File Preprocessing22717
4090
Node: Configuration File Syntax23088
4091
Node: Simulator Configuration25873
4092
Node: Simulator Behavior26164
4093
Node: Verification API Configuration30208
4094
Node: CUC Configuration32148
4095
Node: Core OpenRISC Configuration34065
4096
Node: CPU Configuration34567
4097
Node: Memory Configuration38372
4098
Node: Memory Management Configuration43685
4099
Node: Cache Configuration46062
4100
Node: Interrupt Configuration48448
4101
Node: Power Management Configuration49184
4102
Node: Branch Prediction Configuration50461
4103
Node: Debug Interface Configuration51821
4104
Node: Peripheral Configuration56041
4105
Node: Memory Controller Configuration56667
4106
Node: UART Configuration59272
4107
Node: DMA Configuration62791
4108
Node: Ethernet Configuration64658
4109
Node: GPIO Configuration68636
4110
Node: Display Interface Configuration70269
4111
Node: Frame Buffer Configuration72578
4112
Node: Keyboard Configuration74442
4113
Node: Disc Interface Configuration76680
4114
Node: Generic Peripheral Configuration81623
4115
Node: Interactive Command Line83918
4116
Node: Verification API90892
4117
Node: Code Internals95322
4118
Node: Coding Conventions95882
4119
Node: Global Data Structures100309
4120
Node: Concepts102966
4121
Ref: Output Redirection103111
4122
Node: Internal Debugging103650
4123
Node: GNU Free Documentation License104147

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