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[/] [pcie_ds_dma/] [trunk/] [core/] [adm/] [cl_ac701/] [rtl/] [ctrl_adsp_v2_decode_data_in_cs.vhd] - Blame information for rev 47

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1 47 dsmv
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--
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-- Title       : ctrl_adsp_v2_decode_data_in_cs
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-- Author      : Dmitry Smekhov, Ilya Ivanov
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-- Company     : Instrumental System
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--
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-- Version     : 1.1
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---------------------------------------------------------------------------------------------------
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--
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-- Description :  Модуль декодирования сигнала чтения внешних данных для Virtex2
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--
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---------------------------------------------------------------------------------------------------
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--
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--      Version 1.1 17.06.2005
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--                              Удалены атрибуты RLOC и компоненты FMAP
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--
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---------------------------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.all;
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use ieee.std_logic_arith.all;
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-- synopsys translate_off
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library ieee;
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use ieee.vital_timing.all;
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-- synopsys translate_on
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library unisim;
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use unisim.VCOMPONENTS.all;
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entity ctrl_adsp_v2_decode_data_in_cs is
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        port (
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                reset           : in std_logic;                 -- 0 - сброс
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                clk                     : in std_logic;                 -- тактовая частота
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                cmd_adr         : in std_logic_vector( 9 downto 8 );    -- косвенный адрес
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                adr                     : in std_logic_vector( 4 downto 0 );     -- шина адреса
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                rd                      : in std_logic;                                                 -- 0 - чтение данных
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                data_cs         : out std_logic                                                 -- 0 - чтение данных
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        );
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end ctrl_adsp_v2_decode_data_in_cs;
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architecture ctrl_adsp_v2_decode_data_in_cs of ctrl_adsp_v2_decode_data_in_cs is
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signal cs1      : std_logic;    -- 0 - чтение данных
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--attribute rloc        : string;
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--attribute rloc        of xcs1 : label is "X0Y0";
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--attribute rloc        of xd   : label is "X0Y0";
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begin
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cs1 <='0' when   adr( 1 downto 0 )="00" or
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                                adr( 1 downto 0 )="01" or
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                                ( adr( 1 downto 0 )="11" and cmd_adr(9)='1' )
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                                else '1'  after 1 ns;
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--xcs1: fmap port map( o=>cs1, i1=>'0', i2=>cmd_adr(9), i3=>adr(0), i4=>adr(1) );
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xd:       fd   port map( q=>data_cs, c=>clk, d=>cs1 );
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end ctrl_adsp_v2_decode_data_in_cs;
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