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[/] [pcie_ds_dma/] [trunk/] [projects/] [ac701_a200t_core/] [src/] [testbench/] [test_pkg.vhd] - Blame information for rev 47

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1 47 dsmv 
---------------------------------------------------------------------------------------------------
2 
--
3 
-- Title       : test_pkg.vhd
4 
-- Author      : Dmitry Smekhov
5 
-- Company     : Instrumental System
6 
--
7 
-- Version     : 1.0
8 
--
9 
---------------------------------------------------------------------------------------------------
10 
--
11 
-- Description : Пакет для тестирования ambpex5.
12 
--
13 
---------------------------------------------------------------------------------------------------
14 
 
15 
 
16 
library ieee;
17 
use ieee.std_logic_1164.all;
18 
use ieee.std_logic_arith.all;
19 
use ieee.std_logic_unsigned.all;
20 
use ieee.std_logic_textio.all;
21 
use std.textio.all;
22 
 
23 
 
24 
library work;
25 
use work.cmd_sim_pkg.all;
26 
use work.block_pkg.all;
27 
use work.trd_pkg.all;
28 
 
29 
 
30 
 
31 
package test_pkg is
32 
 
33 
--! Инициализация теста
34 
procedure test_init(
35 
                fname: in string        --! имя файла отчёта
36 
        );
37 
 
38 
--! Завершение теста
39 
procedure test_close;
40 
 
41 
 
42 
 
43 
--! Запуск DMA с неправильным дескриптором
44 
procedure test_dsc_incorrect (
45 
                signal  cmd:    out bh_cmd; --! команда
46 
                signal  ret:    in  bh_ret  --! ответ
47 
                );
48 
 
49 
--! Запуск DMA на приём одного блока 4 кБ
50 
procedure test_read_4kb (
51 
                signal  cmd:    out bh_cmd; --! команда
52 
                signal  ret:    in  bh_ret  --! ответ
53 
                );
54 
 
55 
 
56 
--! Чтение 8 кБ из тетрады DIO_IN
57 
procedure test_adm_read_8kb (
58 
                signal  cmd:    out bh_cmd; --! команда
59 
                signal  ret:    in  bh_ret  --! ответ
60 
                );
61 
 
62 
--! Проверка обращений к блоку MAIN
63 
procedure test_block_main (
64 
                signal  cmd:    out bh_cmd; --! команда
65 
                signal  ret:    in  bh_ret  --! ответ
66 
                );
67 
 
68 
--! Чтение 16 кБ с использованием двух блоков дескрипторов
69 
procedure test_adm_read_16kb (
70 
                signal  cmd:    out bh_cmd; --! команда
71 
                signal  ret:    in  bh_ret  --! ответ
72 
                );
73 
 
74 
--! Запись 16 кБ с использованием двух блоков дескрипторов
75 
procedure test_adm_write_16kb (
76 
                signal  cmd:    out bh_cmd; --! команда
77 
                signal  ret:    in  bh_ret  --! ответ
78 
                );
79 
 
80 
end package     test_pkg;
81 
 
82 
package body test_pkg is
83 
 
84 
        FILE   log: text;
85 
 
86 
        shared variable cnt_ok, cnt_error: integer;
87 
 
88 
        -- Инициализация теста
89 
        procedure test_init(
90 
                fname: in string                                        -- имя файла отчёта
91 
                ) is
92 
        begin
93 
 
94 
                file_open( log, fname, WRITE_MODE );
95 
                cnt_ok:=0;
96 
                cnt_error:=0;
97 
 
98 
        end test_init;
99 
 
100 
        -- Завершение теста
101 
        procedure test_close is
102 
                variable str : LINE;            -- pointer to string
103 
        begin
104 
 
105 
                std.textio.write( str, string'(" " ));
106 
                writeline( log, str );
107 
                writeline( log, str );
108 
 
109 
                write( str, string'("Проверка завершена" ));
110 
                writeline( log, str );
111 
                write( str, string'("Число успешных тестов:  " ));
112 
                write( str, cnt_ok );
113 
                writeline( log, str );
114 
                write( str, string'("Число ошибочных тестов: " ));
115 
                write( str, cnt_error );
116 
                writeline( log, str );
117 
 
118 
 
119 
                file_close( log );
120 
 
121 
        end test_close;
122 
 
123 
 
124 
 
125 
--! Запуск DMA с неправильным дескриптором
126 
procedure test_dsc_incorrect (
127 
                signal  cmd:    out bh_cmd; --! команда
128 
                signal  ret:    in  bh_ret  --! ответ
129 
                )
130 
is
131 
 
132 
variable        adr             : std_logic_vector( 31 downto 0 );
133 
variable        data    : std_logic_vector( 31 downto 0 );
134 
variable        str             : line;
135 
begin
136 
 
137 
        write( str, string'("TEST_DSC_INCORRECT" ));
138 
        writeline( log, str );
139 
 
140 
        ---- Формирование блока дескрипторов ---
141 
        for ii in 0 to 127 loop
142 
                adr:= x"00100000";
143 
                adr:=adr + ii*4;
144 
                int_mem_write( cmd, ret, adr,  x"00000000" );
145 
        end loop;
146 
 
147 
        int_mem_write( cmd, ret, x"00100000",  x"03020100" );
148 
        int_mem_write( cmd, ret, x"001001FC",  x"FF00AA00" );
149 
 
150 
        ---- Программирование канала DMA ----
151 
        block_write( cmd, ret, 4, 8, x"00000027" );             -- DMA_MODE
152 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
153 
 
154 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
155 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
156 
        block_write( cmd, ret, 4, 23, x"0000A400" );    -- LOCAL_ADR
157 
 
158 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
159 
 
160 
        wait for 10 us;
161 
 
162 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
163 
 
164 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
165 
        if( data( 15 downto 0 )=x"A021" ) then
166 
                write( str, string'(" - Ok" ));
167 
                cnt_ok := cnt_ok + 1;
168 
        else
169 
                write( str, string'(" - Error" ));
170 
                cnt_error := cnt_error + 1;
171 
        end if;
172 
 
173 
        writeline( log, str );
174 
 
175 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
176 
 
177 
end test_dsc_incorrect;
178 
 
179 
 
180 
--! Запуск DMA приём одного блока 4 кБ
181 
procedure test_read_4kb (
182 
                signal  cmd:    out bh_cmd; --! команда
183 
                signal  ret:    in  bh_ret  --! ответ
184 
                )
185 
is
186 
 
187 
variable        adr                             : std_logic_vector( 31 downto 0 );
188 
variable        data                    : std_logic_vector( 31 downto 0 );
189 
variable        str                             : line;
190 
 
191 
variable        error                   : integer:=0;
192 
variable        dma_complete    : integer;
193 
 
194 
begin
195 
 
196 
        write( str, string'("TEST_READ_4KB" ));
197 
        writeline( log, str );
198 
 
199 
        ---- Формирование блока дескрипторов ---
200 
        for ii in 0 to 127 loop
201 
                adr:= x"00100000";
202 
                adr:=adr + ii*4;
203 
                int_mem_write( cmd, ret, adr,  x"00000000" );
204 
        end loop;
205 
 
206 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
207 
        int_mem_write( cmd, ret, x"00100004",  x"00000100" );
208 
 
209 
 
210 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
211 
        int_mem_write( cmd, ret, x"001001FC",  x"762C4953" );
212 
 
213 
        ---- Программирование канала DMA ----
214 
        block_write( cmd, ret, 4, 8, x"00000025" );             -- DMA_MODE
215 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
216 
 
217 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
218 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
219 
        block_write( cmd, ret, 4, 23, x"0000A400" );    -- LOCAL_ADR
220 
 
221 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
222 
 
223 
        wait for 20 us;
224 
 
225 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
226 
 
227 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
228 
        if( data( 8 )='1' ) then
229 
                write( str, string'(" - Дескриптор правильный" ));
230 
        else
231 
                write( str, string'(" - Ошибка чтения дескриптора" ));
232 
                error := error + 1;
233 
        end if;
234 
 
235 
        writeline( log, str );
236 
 
237 
        if( error=0 ) then
238 
 
239 
                ---- Ожидание завершения DMA ----
240 
                dma_complete := 0;
241 
                for ii in 0 to 100 loop
242 
 
243 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
244 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
245 
                        if( data(5)='1' ) then
246 
                                write( str, string'(" - DMA завершён " ));
247 
                                dma_complete := 1;
248 
                        end if;
249 
                        writeline( log, str );
250 
 
251 
                        if( dma_complete=1 ) then
252 
                                exit;
253 
                        end if;
254 
 
255 
                        wait for 1 us;
256 
 
257 
                end loop;
258 
 
259 
                writeline( log, str );
260 
 
261 
                if( dma_complete=0 ) then
262 
                        write( str, string'("Ошибка - DMA не завершён " ));
263 
                        writeline( log, str );
264 
                        error:=error+1;
265 
                end if;
266 
 
267 
        end if;
268 
 
269 
        for ii in 0 to 3 loop
270 
 
271 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
272 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
273 
                writeline( log, str );
274 
                wait for 500 ns;
275 
 
276 
        end loop;
277 
 
278 
 
279 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
280 
 
281 
        write( str, string'(" Прочитано: " ));
282 
        writeline( log, str );
283 
 
284 
        for ii in 0 to 15 loop
285 
 
286 
                adr:= x"00800000";
287 
                adr:=adr + ii*4;
288 
                int_mem_read( cmd, ret, adr,  data );
289 
 
290 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
291 
                writeline( log, str );
292 
 
293 
        end loop;
294 
 
295 
 
296 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
297 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
298 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
299 
 
300 
 
301 
        writeline( log, str );
302 
        if( error=0 ) then
303 
                write( str, string'(" Тест завершён успешно " ));
304 
                cnt_ok := cnt_ok + 1;
305 
        else
306 
                write( str, string'(" Тест не выполнен " ));
307 
                cnt_error := cnt_error + 1;
308 
        end if;
309 
        writeline( log, str );
310 
        writeline( log, str );
311 
 
312 
end test_read_4kb;
313 
 
314 
 
315 
--! Чтение 8 кБ из тетрады DIO_IN
316 
procedure test_adm_read_8kb (
317 
                signal  cmd:    out bh_cmd; --! команда
318 
                signal  ret:    in  bh_ret  --! ответ
319 
                )
320 
is
321 
 
322 
variable        adr                             : std_logic_vector( 31 downto 0 );
323 
variable        data                    : std_logic_vector( 31 downto 0 );
324 
variable        str                             : line;
325 
 
326 
variable        error                   : integer:=0;
327 
variable        dma_complete    : integer;
328 
 
329 
begin
330 
 
331 
        write( str, string'("TEST_ADM_READ_8KB" ));
332 
        writeline( log, str );
333 
 
334 
        ---- Формирование блока дескрипторов ---
335 
        for ii in 0 to 127 loop
336 
                adr:= x"00100000";
337 
                adr:=adr + ii*4;
338 
                int_mem_write( cmd, ret, adr,  x"00000000" );
339 
        end loop;
340 
 
341 
        --- Дескриптор 0 ---
342 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
343 
        int_mem_write( cmd, ret, x"00100004",  x"00000111" );   -- переход к следующему
344 
 
345 
        --- Дескриптор 1 ---
346 
        int_mem_write( cmd, ret, x"00100008",  x"00008010" );
347 
        int_mem_write( cmd, ret, x"0010000C",  x"00000110" );   -- остановка
348 
 
349 
 
350 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
351 
        int_mem_write( cmd, ret, x"001001FC",  x"D6644953" );
352 
 
353 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
354 
 
355 
        ---- Программирование канала DMA ----
356 
        block_write( cmd, ret, 4, 8, x"00000027" );             -- DMA_MODE
357 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
358 
 
359 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
360 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
361 
        block_write( cmd, ret, 4, 23, x"00019000" );    -- LOCAL_ADR
362 
 
363 
 
364 
        ---- Подготовка тетрады ----
365 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
366 
        trd_wait_cmd( cmd, ret, 0, 16, x"1600" );                -- DMAR0 - от тетрады 6 --
367 
 
368 
        trd_wait_cmd( cmd, ret, 1, 16#1F#, x"0001" );   -- Размер блока = 4 кБ --
369 
 
370 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
371 
 
372 
        trd_wait_cmd( cmd, ret, 1, 16#0F#, x"0001" );   -- Подключение выхода генератора к DIO_IN --
373 
 
374 
        trd_wait_cmd( cmd, ret, 6,      0, x"2038" );            -- запуск тетрады DIO_IN
375 
 
376 
        trd_wait_cmd( cmd, ret, 1, 16#1E#, x"0020" );   -- Запуск тестовой последовательности --
377 
 
378 
        wait for 20 us;
379 
 
380 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
381 
 
382 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
383 
        if( data( 8 )='1' ) then
384 
                write( str, string'(" - Дескриптор правильный" ));
385 
        else
386 
                write( str, string'(" - Ошибка чтения дескриптора" ));
387 
                error := error + 1;
388 
        end if;
389 
 
390 
        writeline( log, str );
391 
 
392 
        if( error=0 ) then
393 
 
394 
                ---- Ожидание завершения DMA ----
395 
                dma_complete := 0;
396 
                for ii in 0 to 100 loop
397 
 
398 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
399 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
400 
                        if( data(5)='1' ) then
401 
                                write( str, string'(" - DMA завершён " ));
402 
                                dma_complete := 1;
403 
 
404 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
405 
 
406 
                        end if;
407 
                        writeline( log, str );
408 
 
409 
                        if( dma_complete=1 ) then
410 
                                exit;
411 
                        end if;
412 
 
413 
                        wait for 1 us;
414 
 
415 
                end loop;
416 
 
417 
                writeline( log, str );
418 
 
419 
                if( dma_complete=0 ) then
420 
                        write( str, string'("Ошибка - DMA не завершён " ));
421 
                        writeline( log, str );
422 
                        error:=error+1;
423 
                end if;
424 
 
425 
        end if;
426 
 
427 
        for ii in 0 to 3 loop
428 
 
429 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
430 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
431 
                writeline( log, str );
432 
                wait for 500 ns;
433 
 
434 
        end loop;
435 
 
436 
 
437 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
438 
 
439 
        write( str, string'(" Блок 0 - прочитано: " ));
440 
        writeline( log, str );
441 
 
442 
        for ii in 0 to 15 loop
443 
 
444 
                adr:= x"00800000";
445 
                adr:=adr + ii*4;
446 
                int_mem_read( cmd, ret, adr,  data );
447 
 
448 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
449 
                writeline( log, str );
450 
 
451 
        end loop;
452 
 
453 
        writeline( log, str );
454 
 
455 
        write( str, string'(" Блок 1 - прочитано: " ));
456 
        writeline( log, str );
457 
 
458 
        for ii in 0 to 15 loop
459 
 
460 
                adr:= x"00801000";
461 
                adr:=adr + ii*4;
462 
                int_mem_read( cmd, ret, adr,  data );
463 
 
464 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
465 
                writeline( log, str );
466 
 
467 
        end loop;
468 
 
469 
 
470 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
471 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
472 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
473 
 
474 
 
475 
        writeline( log, str );
476 
        if( error=0 ) then
477 
                write( str, string'(" Тест завершён успешно " ));
478 
                cnt_ok := cnt_ok + 1;
479 
        else
480 
                write( str, string'(" Тест не выполнен " ));
481 
                cnt_error := cnt_error + 1;
482 
        end if;
483 
        writeline( log, str );
484 
        writeline( log, str );
485 
 
486 
end test_adm_read_8kb;
487 
 
488 
 
489 
--! Проверка обращений к блоку MAIN
490 
procedure test_block_main (
491 
                signal  cmd:    out bh_cmd; --! команда
492 
                signal  ret:    in  bh_ret  --! ответ
493 
                )
494 
is
495 
 
496 
variable        adr                             : std_logic_vector( 31 downto 0 );
497 
variable        data                    : std_logic_vector( 31 downto 0 );
498 
variable        str                             : line;
499 
 
500 
variable        error                   : integer:=0;
501 
variable        dma_complete    : integer;
502 
 
503 
begin
504 
 
505 
        write( str, string'("TEST_BLOCK_MAIN" ));
506 
        writeline( log, str );
507 
 
508 
        block_read( cmd, ret, 4, 16#00#, data );
509 
        write( str,  string'("БЛОК 4: " )); hwrite( str, data ); writeline( log, str );
510 
 
511 
        wait for 10 us;
512 
 
513 
--      write( str, "Константы:" );
514 
--      writeline( log, str );
515 
--      for ii in 0 to 5 loop
516 
--              write( str, "Блок " );
517 
--              write( str, ii );
518 
--              for jj in 0 to 7 loop
519 
--                      block_read( cmd, ret, ii, jj, data );
520 
--                      write( str, "   " );
521 
--                      hwrite( str, data );
522 
--              end loop;
523 
--              writeline( log, str );
524 
--      end loop;
525 
--
526 
--
527 
--      writeline( log, str );
528 
--
529 
--      block_read( cmd, ret, 0, 16#10#, data );
530 
--      write( str,  "STATUS: " ); hwrite( str, data ); writeline( log, str );
531 
--
532 
--      block_write( cmd, ret, 80, 16#08#, x"00000100" );
533 
--
534 
--      block_read( cmd, ret, 0, 16#10#, data );
535 
--      write( str, "STATUS: " ); hwrite( str, data ); writeline( log, str );
536 
--
537 
--      block_write( cmd, ret, 80, 16#08#, x"00000200" );
538 
--
539 
--      block_read( cmd, ret, 0, 16#10#, data );
540 
--      write( str, "STATUS: " ); hwrite( str, data ); writeline( log, str );
541 
--
542 
--
543 
--      writeline( log, str );
544 
--      if( error=0 ) then
545 
--              write( str, " Тест завершён успешно " );
546 
--              cnt_ok := cnt_ok + 1;
547 
--      else
548 
--              write( str, " Тест не выполнен " );
549 
--              cnt_error := cnt_error + 1;
550 
--      end if;
551 
 
552 
        for ii in 0 to 127 loop
553 
 
554 
                block_write( cmd, ret, 4, 16#08#, x"0000AA55" );
555 
                block_read( cmd, ret, 4, 8, data );
556 
                write( str, string'("READ: " )); hwrite( str, data( 15 downto 0 ) ); writeline( log, str );
557 
                if( data/=x"0000AA55" ) then
558 
                        error:=error+1;
559 
                end if;
560 
 
561 
        end loop;
562 
 
563 
 
564 
 
565 
 
566 
        writeline( log, str );
567 
        writeline( log, str );
568 
 
569 
end test_block_main;
570 
 
571 
 
572 
 
573 
 
574 
--! Чтение 16 кБ с использованием двух блоков дескрипторов
575 
procedure test_adm_read_16kb (
576 
                signal  cmd:    out bh_cmd; --! команда
577 
                signal  ret:    in  bh_ret  --! ответ
578 
                )
579 
is
580 
 
581 
variable        adr                             : std_logic_vector( 31 downto 0 );
582 
variable        data                    : std_logic_vector( 31 downto 0 );
583 
variable        str                             : line;
584 
 
585 
variable        error                   : integer:=0;
586 
variable        dma_complete    : integer;
587 
variable        kk                              : integer;
588 
variable        status                  : std_logic_vector( 15 downto 0 );
589 
 
590 
begin
591 
 
592 
        write( str, string'("TEST_ADM_READ_16KB" ));
593 
        writeline( log, str );
594 
 
595 
        ---- Формирование блока дескрипторов ---
596 
        for ii in 0 to 256 loop
597 
                adr:= x"00100000";
598 
                adr:=adr + ii*4;
599 
                int_mem_write( cmd, ret, adr,  x"00000000" );
600 
        end loop;
601 
 
602 
        --- Блок 0 ---
603 
 
604 
        --- Дескриптор 0 ---
605 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
606 
        int_mem_write( cmd, ret, x"00100004",  x"00000111" );   -- переход к следующему дескриптору
607 
 
608 
        --- Дескриптор 1 ---
609 
        int_mem_write( cmd, ret, x"00100008",  x"00008010" );
610 
        int_mem_write( cmd, ret, x"0010000C",  x"00000112" );   -- переход к следующему блоку
611 
 
612 
        --- Дескриптор 2 ---
613 
        int_mem_write( cmd, ret, x"00100010",  x"00001002" );   -- адрес следующего дескриптора
614 
        int_mem_write( cmd, ret, x"00100014",  x"00000000" );
615 
 
616 
 
617 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
618 
        int_mem_write( cmd, ret, x"001001FC",  x"14644953" );
619 
 
620 
 
621 
        --- Блок 1 ---
622 
 
623 
        --- Дескриптор 0 ---
624 
        int_mem_write( cmd, ret, x"00100200",  x"00008020" );
625 
        int_mem_write( cmd, ret, x"00100204",  x"00000111" );   -- переход к следующему дескриптору
626 
 
627 
        --- Дескриптор 1 ---
628 
        int_mem_write( cmd, ret, x"00100208",  x"00008030" );
629 
        int_mem_write( cmd, ret, x"0010020C",  x"00000110" );   -- остановка
630 
 
631 
 
632 
        int_mem_write( cmd, ret, x"001003F8",  x"00000000" );
633 
        int_mem_write( cmd, ret, x"001003FC",  x"D67C4953" );
634 
 
635 
 
636 
 
637 
        ---- Программирование канала DMA ----
638 
        block_write( cmd, ret, 4, 8, x"00000027" );             -- DMA_MODE
639 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
640 
 
641 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
642 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
643 
        block_write( cmd, ret, 4, 23, x"00019000" );    -- LOCAL_ADR
644 
 
645 
 
646 
        ---- Подготовка тетрады ----
647 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
648 
        trd_wait_cmd( cmd, ret, 0, 16, x"1600" );                -- DMAR0 - от тетрады 6 --
649 
 
650 
        trd_wait_cmd( cmd, ret, 1, 16#1F#, x"0001" );   -- Размер блока = 4 кБ --
651 
 
652 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
653 
 
654 
        trd_wait_cmd( cmd, ret, 1, 16#0F#, x"0001" );   -- Подключение выхода генератора к DIO_IN --
655 
 
656 
        trd_wait_cmd( cmd, ret, 6,      0, x"2038" );            -- запуск тетрады DIO_IN
657 
 
658 
        trd_wait_cmd( cmd, ret, 1, 16#1E#, x"06A0" );   -- Запуск тестовой последовательности --
659 
 
660 
        wait for 20 us;
661 
 
662 
        block_read( cmd, ret, 4, 16, data );                    -- STATUS
663 
 
664 
        write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
665 
        if( data( 8 )='1' ) then
666 
                write( str, string'(" - Дескриптор правильный" ));
667 
        else
668 
                write( str, string'(" - Ошибка чтения дескриптора" ));
669 
                error := error + 1;
670 
        end if;
671 
 
672 
        writeline( log, str );
673 
 
674 
        if( error=0 ) then
675 
 
676 
                kk:=0;
677 
                loop
678 
 
679 
                trd_status( cmd, ret, 6, status );
680 
                write( str, string'("TRD_STATUS: " )); hwrite( str, status );
681 
 
682 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
683 
                write( str, string'("    STATUS: " )); hwrite( str, data( 15 downto 0 ) );
684 
 
685 
                        if( data(4)='1' ) then
686 
                                write( str, string'(" - завершено чтение блока " ));
687 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
688 
                                kk:=kk+1;
689 
                                if( kk=4 ) then
690 
                                        exit;
691 
                                end if;
692 
                        end if;
693 
                        writeline( log, str );
694 
 
695 
                        wait for 500 ns;
696 
 
697 
 
698 
                end loop;
699 
 
700 
                ---- Ожидание завершения DMA ----
701 
                dma_complete := 0;
702 
                for ii in 0 to 100 loop
703 
 
704 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
705 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
706 
                        if( data(5)='1' ) then
707 
                                write( str, string'(" - DMA завершён " ));
708 
                                dma_complete := 1;
709 
 
710 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
711 
 
712 
                        end if;
713 
                        writeline( log, str );
714 
 
715 
                        if( dma_complete=1 ) then
716 
                                exit;
717 
                        end if;
718 
 
719 
                        wait for 1 us;
720 
 
721 
                end loop;
722 
 
723 
                writeline( log, str );
724 
 
725 
                if( dma_complete=0 ) then
726 
                        write( str, string'("Ошибка - DMA не завершён " ));
727 
                        writeline( log, str );
728 
                        error:=error+1;
729 
                end if;
730 
 
731 
        end if;
732 
 
733 
        for ii in 0 to 3 loop
734 
 
735 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
736 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
737 
                writeline( log, str );
738 
                wait for 500 ns;
739 
 
740 
        end loop;
741 
 
742 
 
743 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
744 
 
745 
        write( str, string'(" Блок 0 - прочитано: " ));
746 
        writeline( log, str );
747 
 
748 
        for ii in 0 to 15 loop
749 
 
750 
                adr:= x"00800000";
751 
                adr:=adr + ii*4;
752 
                int_mem_read( cmd, ret, adr,  data );
753 
 
754 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
755 
                writeline( log, str );
756 
 
757 
        end loop;
758 
 
759 
        writeline( log, str );
760 
 
761 
        write( str, string'(" Блок 1 - прочитано: " ));
762 
        writeline( log, str );
763 
 
764 
        for ii in 0 to 15 loop
765 
 
766 
                adr:= x"00801000";
767 
                adr:=adr + ii*4;
768 
                int_mem_read( cmd, ret, adr,  data );
769 
 
770 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
771 
                writeline( log, str );
772 
 
773 
        end loop;
774 
 
775 
        write( str, string'(" Блок 2 - прочитано: " ));
776 
        writeline( log, str );
777 
 
778 
        for ii in 0 to 15 loop
779 
 
780 
                adr:= x"00802000";
781 
                adr:=adr + ii*4;
782 
                int_mem_read( cmd, ret, adr,  data );
783 
 
784 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
785 
                writeline( log, str );
786 
 
787 
        end loop;
788 
 
789 
 
790 
        write( str, string'(" Блок 3 - прочитано: " ));
791 
        writeline( log, str );
792 
 
793 
        for ii in 0 to 15 loop
794 
 
795 
                adr:= x"00803000";
796 
                adr:=adr + ii*4;
797 
                int_mem_read( cmd, ret, adr,  data );
798 
 
799 
                write( str, ii ); write( str, string'("   " )); hwrite( str, data );
800 
                writeline( log, str );
801 
 
802 
        end loop;
803 
 
804 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
805 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
806 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
807 
 
808 
 
809 
        writeline( log, str );
810 
        if( error=0 ) then
811 
                write( str, string'(" Тест завершён успешно " ));
812 
                cnt_ok := cnt_ok + 1;
813 
        else
814 
                write( str, string'(" Тест не выполнен " ));
815 
                cnt_error := cnt_error + 1;
816 
        end if;
817 
        writeline( log, str );
818 
        writeline( log, str );
819 
 
820 
end test_adm_read_16kb;
821 
 
822 
 
823 
 
824 
 
825 
--! Запись 16 кБ с использованием двух блоков дескрипторов
826 
procedure test_adm_write_16kb (
827 
                signal  cmd:    out bh_cmd; --! команда
828 
                signal  ret:    in  bh_ret  --! ответ
829 
                )
830 
is
831 
 
832 
variable        adr                             : std_logic_vector( 31 downto 0 );
833 
variable        data                    : std_logic_vector( 31 downto 0 );
834 
variable        str                             : line;
835 
 
836 
variable        error                   : integer:=0;
837 
variable        dma_complete    : integer;
838 
variable        kk                              : integer;
839 
variable        status                  : std_logic_vector( 15 downto 0 );
840 
 
841 
begin
842 
 
843 
        write( str, string'("TEST_ADM_WRITE_16KB" ));
844 
        writeline( log, str );
845 
 
846 
        ---- Формирование блока дескрипторов ---
847 
        for ii in 0 to 256 loop
848 
                adr:= x"00100000";
849 
                adr:=adr + ii*4;
850 
                int_mem_write( cmd, ret, adr,  x"00000000" );
851 
        end loop;
852 
 
853 
        ---- Заполнение памяти ----
854 
        for ii in 0 to 256 loop
855 
                adr:= x"00800000";
856 
                adr:=adr + ii*4;
857 
                data:=x"00A00000";
858 
                data:=data + ii;
859 
                int_mem_write( cmd, ret, adr,  data );
860 
        end loop;
861 
 
862 
        for ii in 0 to 1023 loop
863 
                adr:= x"00801000";
864 
                adr:=adr + ii*4;
865 
                data:=x"00A10000";
866 
                data:=data + ii;
867 
                int_mem_write( cmd, ret, adr,  data );
868 
        end loop;
869 
 
870 
        for ii in 0 to 256 loop
871 
                adr:= x"00802000";
872 
                adr:=adr + ii*4;
873 
                data:=x"00A20000";
874 
                data:=data + ii;
875 
                int_mem_write( cmd, ret, adr,  data );
876 
        end loop;
877 
 
878 
        for ii in 0 to 256 loop
879 
                adr:= x"00803000";
880 
                adr:=adr + ii*4;
881 
                data:=x"00A30000";
882 
                data:=data + ii;
883 
                int_mem_write( cmd, ret, adr,  data );
884 
        end loop;
885 
 
886 
        --- Блок 0 ---
887 
 
888 
        --- Дескриптор 0 ---
889 
        int_mem_write( cmd, ret, x"00100000",  x"00008000" );
890 
        int_mem_write( cmd, ret, x"00100004",  x"00000011" );   -- переход к следующему дескриптору
891 
 
892 
        --- Дескриптор 1 ---
893 
        int_mem_write( cmd, ret, x"00100008",  x"00008010" );
894 
        int_mem_write( cmd, ret, x"0010000C",  x"00000012" );   -- переход к следующему блоку
895 
 
896 
        --- Дескриптор 2 ---
897 
        int_mem_write( cmd, ret, x"00100010",  x"00001002" );   -- адрес следующего дескриптора
898 
        int_mem_write( cmd, ret, x"00100014",  x"00000000" );
899 
 
900 
 
901 
        int_mem_write( cmd, ret, x"001001F8",  x"00000000" );
902 
        int_mem_write( cmd, ret, x"001001FC",  x"14A44953" );
903 
 
904 
 
905 
        --- Блок 1 ---
906 
 
907 
        --- Дескриптор 0 ---
908 
        int_mem_write( cmd, ret, x"00100200",  x"00008020" );
909 
        int_mem_write( cmd, ret, x"00100204",  x"00000011" );   -- переход к следующему дескриптору
910 
 
911 
        --- Дескриптор 1 ---
912 
        int_mem_write( cmd, ret, x"00100208",  x"00008030" );
913 
        int_mem_write( cmd, ret, x"0010020C",  x"00000010" );   -- остановка
914 
 
915 
 
916 
        int_mem_write( cmd, ret, x"001003F8",  x"00000000" );
917 
        int_mem_write( cmd, ret, x"001003FC",  x"D6BC4953" );
918 
 
919 
 
920 
 
921 
        ---- Программирование канала DMA ----
922 
        block_write( cmd, ret, 4, 8, x"00000023" );             -- DMA_MODE
923 
        block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
924 
 
925 
        block_write( cmd, ret, 4, 20, x"00100000" );    -- PCI_ADRL
926 
        block_write( cmd, ret, 4, 21, x"00100000" );    -- PCI_ADRH
927 
        block_write( cmd, ret, 4, 23, x"0001D000" );    -- LOCAL_ADR
928 
 
929 
 
930 
        ---- Подготовка тетрады ----
931 
        trd_test_mode( cmd, ret, 0 );    -- переход в рабочий режим --
932 
        trd_wait_cmd( cmd, ret, 0, 16, x"1700" );                -- DMAR0 - от тетрады 7 --
933 
 
934 
        trd_wait_cmd( cmd, ret, 1, 16#1D#, x"0001" );   -- Размер блока = 4 кБ --
935 
 
936 
        block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
937 
 
938 
        trd_wait_cmd( cmd, ret, 1, 16#0F#, x"0001" );   -- Подключение выхода генератора к DIO_IN --
939 
 
940 
        trd_wait_cmd( cmd, ret, 7,      0, x"2038" );            -- запуск тетрады DIO_OUT
941 
 
942 
        trd_wait_cmd( cmd, ret, 1, 16#1C#, x"0020" );   -- Запуск тестовой последовательности --
943 
 
944 
        wait for 20 us;
945 
 
946 
 
947 
        for ii in 0 to 20 loop
948 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
949 
 
950 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
951 
                if( data( 8 )='1' ) then
952 
                        write( str, string'(" - Дескриптор правильный" ));
953 
                        error := 0;
954 
                        exit;
955 
                else
956 
                        write( str, string'(" - Ошибка чтения дескриптора" ));
957 
                        error := error + 1;
958 
                        wait for 10 us;
959 
                end if;
960 
 
961 
                writeline( log, str );
962 
        end loop;
963 
 
964 
 
965 
        if( error=0 ) then
966 
 
967 
                kk:=0;
968 
                loop
969 
 
970 
                trd_status( cmd, ret, 6, status );
971 
                write( str, string'("TRD_STATUS: " )); hwrite( str, status );
972 
 
973 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
974 
                write( str, string'("    STATUS: " )); hwrite( str, data( 15 downto 0 ) );
975 
 
976 
                        if( data(4)='1' ) then
977 
                                write( str, string'(" - завершено чтение блока " ));
978 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
979 
                                kk:=kk+1;
980 
                                if( kk=4 ) then
981 
                                        exit;
982 
                                end if;
983 
                        end if;
984 
                        writeline( log, str );
985 
 
986 
                        wait for 500 ns;
987 
 
988 
 
989 
                end loop;
990 
 
991 
                ---- Ожидание завершения DMA ----
992 
                dma_complete := 0;
993 
                for ii in 0 to 100 loop
994 
 
995 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
996 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
997 
                        if( data(5)='1' ) then
998 
                                write( str, string'(" - DMA завершён " ));
999 
                                dma_complete := 1;
1000 
 
1001 
                                block_write( cmd, ret, 4, 16#11#, x"00000010" );                -- FLAG_CLR - сброс EOT
1002 
 
1003 
                        end if;
1004 
                        writeline( log, str );
1005 
 
1006 
                        if( dma_complete=1 ) then
1007 
                                exit;
1008 
                        end if;
1009 
 
1010 
                        wait for 1 us;
1011 
 
1012 
                end loop;
1013 
 
1014 
                writeline( log, str );
1015 
 
1016 
                if( dma_complete=0 ) then
1017 
                        write( str, string'("Ошибка - DMA не завершён " ));
1018 
                        writeline( log, str );
1019 
                        error:=error+1;
1020 
                end if;
1021 
 
1022 
        end if;
1023 
 
1024 
        for ii in 0 to 3 loop
1025 
 
1026 
                block_read( cmd, ret, 4, 16, data );                    -- STATUS
1027 
                write( str, string'("STATUS: " )); hwrite( str, data( 15 downto 0 ) );
1028 
                writeline( log, str );
1029 
                wait for 500 ns;
1030 
 
1031 
        end loop;
1032 
 
1033 
 
1034 
        block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL - STOP
1035 
 
1036 
 
1037 
--      block_write( cmd, ret, 4, 9, x"00000010" );             -- DMA_CTRL - RESET FIFO
1038 
--      block_write( cmd, ret, 4, 9, x"00000000" );             -- DMA_CTRL
1039 
--      block_write( cmd, ret, 4, 9, x"00000001" );             -- DMA_CTRL - START
1040 
 
1041 
 
1042 
        writeline( log, str );
1043 
        if( error=0 ) then
1044 
                write( str, string'(" Тест завершён успешно " ));
1045 
                cnt_ok := cnt_ok + 1;
1046 
        else
1047 
                write( str, string'(" Тест не выполнен " ));
1048 
                cnt_error := cnt_error + 1;
1049 
        end if;
1050 
        writeline( log, str );
1051 
        writeline( log, str );
1052 
 
1053 
end test_adm_write_16kb;
1054 
 
1055 
end package     body test_pkg;
1056 
 
1057 
 

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