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Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [soft/] [linux/] [common/] [pex/] [pex_board.cpp] - Blame information for rev 35

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1 2 dsmv 
 
2 
#ifndef __PEX_BOARD_H__
3 
#include "pex_board.h"
4 
#endif
5 
 
6 
//-----------------------------------------------------------------------------
7 
 
8 
#include <stdio.h>
9 
#include <stdlib.h>
10 
#include <fcntl.h>
11 
#include <errno.h>
12 35 v.karak 
#include <unistd.h>
13 2 dsmv 
#include <sys/mman.h>
14 
#include <sys/ioctl.h>
15 
 
16 
#include <cassert>
17 
#include <cstdlib>
18 
#include <cstring>
19 
#include <iostream>
20 
#include <iomanip>
21 
#include <climits>
22 
 
23 
//-----------------------------------------------------------------------------
24 
 
25 
using namespace std;
26 
 
27 
//-----------------------------------------------------------------------------
28 
 
29 
pex_board::pex_board()
30 
{
31 
    fd = -1;
32 
    bar0 = bar1 = NULL;
33 
    memset(&bi, 0, sizeof(bi));
34 6 v.karak 
    //m_dma = new dma_memory();
35 2 dsmv 
}
36 
 
37 
//-----------------------------------------------------------------------------
38 
 
39 
pex_board::~pex_board()
40 
{
41 6 v.karak 
    //if(m_dma) delete m_dma;
42 2 dsmv 
    core_close();
43 
}
44 
 
45 
//-----------------------------------------------------------------------------
46 
 
47 
int pex_board::core_open(const char *name)
48 
{
49 
    int error = 0;
50 
 
51 
    if(fd > 0)
52 
        return 0;
53 
 
54 
    fd = open(name, S_IROTH | S_IWOTH );
55 
    if(fd < 0) {
56 
        std::cerr << __FUNCTION__ << "(): " << " error open device: " << name << endl;
57 
        goto do_out;
58 
    }
59 
 
60 
    error = core_board_info();
61 
    if(error < 0) {
62 
        std::cerr << __FUNCTION__ << "(): " << " error get board info" << endl;
63 
        goto do_close;
64 
    }
65 
 
66 
    bar0 = (u32*)mmap(NULL, bi.Size[0], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[0]);
67 
    if( bar0 == MAP_FAILED ) {
68 
        std::cerr << __FUNCTION__ << "(): " << " error map bar0 address" << endl;
69 
        error = -EINVAL;
70 
        goto do_close;
71 
    }
72 
 
73 
    bar1 = (u32*)mmap(NULL, bi.Size[1], PROT_READ|PROT_WRITE, MAP_SHARED, fd, (off_t)bi.PhysAddress[1]);
74 
    if( bar1== MAP_FAILED ) {
75 
        std::cerr << __FUNCTION__ << "(): " << " error map bar1 address" << endl;
76 
        error = -EINVAL;
77 
        goto do_unmap_bar0;
78 
    }
79 
 
80 
    std::cout << "Map BAR0: 0x" << hex << bi.PhysAddress[0] << " -> " << bar0 << dec << endl;
81 
    std::cout << "Map BAR1: 0x" << hex << bi.PhysAddress[1] << " -> " << bar1 << dec << endl;
82 
 
83 
    return 0;
84 
 
85 
do_unmap_bar0:
86 
    munmap(bar0, bi.Size[0]);
87 
 
88 
do_close:
89 
    close(fd);
90 
 
91 
do_out:
92 
    return error;
93 
}
94 
 
95 
//-----------------------------------------------------------------------------
96 
 
97 
int pex_board::core_init()
98 
{
99 
    uint16_t temp = 0;
100 
    uint16_t blockId = 0;
101 
    uint16_t blockVer = 0;
102 
    uint16_t deviceID = 0;
103 
    uint16_t deviceRev = 0;
104 
    int i = 0;
105 
 
106 
    fprintf(stderr,"%s()\n", __FUNCTION__);
107 
 
108 
    blockId =  core_block_read( 0, 0 );
109 
    blockVer = core_block_read( 0, 1 );
110 
 
111 
    fprintf(stderr,"%s(): BlockID = 0x%X, BlockVER = 0x%X.\n", __FUNCTION__, blockId, blockVer);
112 
 
113 
    deviceID = core_block_read(  0, 2 );
114 
    deviceRev = core_block_read( 0, 3 );
115 
 
116 
    fprintf(stderr,"%s(): DeviceID = 0x%X, DeviceRev = 0x%X.\n", __FUNCTION__, deviceID, deviceRev);
117 
 
118 
    temp = core_block_read( 0, 4 );
119 
    int m_BlockCnt = core_block_read( 0, 5 );
120 
 
121 
    if( m_BlockCnt>8 ) {
122 
        m_BlockCnt=8;
123 
    }
124 
 
125 
    fprintf(stderr,"%s(): PldVER = 0x%X.\n", __FUNCTION__, temp);
126 
    fprintf(stderr,"%s(): Block count = %d.\n", __FUNCTION__, m_BlockCnt);
127 
 
128 
    // определим какие каналы ПДП присутствуют и их характеристики:
129 
    // направление передачи данных, размер FIFO, максимальный размер блока ПДП
130 
 
131 
    FIFO_ID FifoId;
132 
    int m_DmaFifoSize[4] = {0};
133 
    int m_MaxDmaSize[4] = {0};
134 
    int m_DmaDir[4] = {0};
135 
    int m_DmaChanMask = 0;
136 
 
137 
    for(int iBlock = 0; iBlock < m_BlockCnt; iBlock++)
138 
    {
139 
        uint16_t block_id = 0;
140 
 
141 
        block_id=core_block_read( iBlock, 0 );
142 
        block_id &=0xFFF;
143 
 
144 
        if(block_id == PE_EXT_FIFO_ID)
145 
        {
146 
            u32 resource_id = 0;
147 
            uint16_t iChan = core_block_read( iBlock, 3 );
148 
            m_DmaChanMask |= (1 << iChan);
149 
            FifoId.AsWhole = core_block_read( iBlock, 2 );
150 
            m_DmaFifoSize[iChan] = FifoId.ByBits.Size;
151 
            m_DmaDir[iChan] = FifoId.ByBits.Dir;
152 
            m_MaxDmaSize[iChan] = 0x40000000; // макс. размер ПДП пусть будет 1 Гбайт
153 
            resource_id = core_block_read( iBlock, 4 ); // RESOURCE
154 
            fprintf(stderr,"%s(): Channel(ID) = %d(0x%x), FIFO size = %d Bytes, DMA Dir = %d, Max DMA size = %d MBytes, resource = 0x%x.\n", __FUNCTION__,
155 
                    iChan, block_id, m_DmaFifoSize[iChan] * 4, m_DmaDir[iChan], m_MaxDmaSize[iChan] / 1024 / 1024, resource_id);
156 
        }
157 
    }
158 
 
159 
    // подготовим к работе ПЛИС ADM
160 
    fprintf(stderr,"%s(): Prepare ADM PLD.\n", __FUNCTION__);
161 
    core_block_write( 0, 8, 0);
162 6 v.karak 
    core_delay(100);    // pause ~ 100 msec
163 2 dsmv 
    for(i = 0; i < 10; i++)
164 
    {
165 
        core_block_write( 0, 8, 1);
166 6 v.karak 
        core_delay(100);        // pause ~ 100 msec
167 2 dsmv 
        core_block_write( 0, 8, 3);
168 6 v.karak 
        core_delay(100);        // pause ~ 100 msec
169 2 dsmv 
        core_block_write( 0, 8, 7);
170 6 v.karak 
        core_delay(100);        // pause ~ 100 msec
171 2 dsmv 
        temp = core_block_read( 0, 010 ) & 0x01;
172 
        if(temp)
173 
            break;
174 
    }
175 
    core_block_write( 0, 8, 0xF );
176 6 v.karak 
    core_delay(100);    // pause ~ 100 msec
177 2 dsmv 
 
178 
    return 0;
179 
}
180 
 
181 
//-----------------------------------------------------------------------------
182 
 
183 
int pex_board::core_reset()
184 
{
185 
    return 0;
186 
}
187 
 
188 
//-----------------------------------------------------------------------------
189 
 
190 
int pex_board::core_close()
191 
{
192 
    if(bar0) {
193 
        munmap(bar0, bi.Size[0]);
194 
        bar0 = NULL;
195 
    }
196 
    if(bar1) {
197 
        munmap(bar1, bi.Size[1]);
198 
        bar1 = NULL;
199 
    }
200 
 
201 
    close(fd);
202 
    fd = -1;
203 
 
204 
 
205 
    return 0;
206 
}
207 
 
208 
//-----------------------------------------------------------------------------
209 
 
210 
int pex_board::core_load_dsp()
211 
{
212 
    return 0;
213 
}
214 
 
215 
//-----------------------------------------------------------------------------
216 
 
217 
int pex_board::core_load_pld()
218 
{
219 
    return 0;
220 
}
221 
 
222 
//-----------------------------------------------------------------------------
223 
 
224 
int pex_board::core_board_info()
225 
{
226 
    int error = ioctl(fd, IOCTL_PEX_BOARD_INFO, &bi);
227 
    if(error < 0) {
228 
        std::cerr << __FUNCTION__ << "(): " << " error get board info" << endl;
229 
        return -1;
230 
    }
231 
/*
232 
    fprintf(stderr, "VENDOR ID: 0x%X\n", bi.vendor_id);
233 
    fprintf(stderr, "DEVICE ID: 0x%X\n", bi.device_id);
234 
    fprintf(stderr, "BAR0: 0x%zX\n", bi.PhysAddress[0]);
235 
    fprintf(stderr, "SIZE: 0x%zX\n", bi.Size[0]);
236 
    fprintf(stderr, "BAR1 0x%zX\n", bi.PhysAddress[1]);
237 
    fprintf(stderr, "SIZE: 0x%zX\n", bi.Size[1]);
238 
    fprintf(stderr, "IRQ: 0x%zX\n", bi.InterruptVector);
239 
*/
240 
    return 0;
241 
}
242 
 
243 
//-----------------------------------------------------------------------------
244 
 
245 
int pex_board::core_pld_info()
246 
{
247 
    u32 d = 0;
248 
    u32 d1 = 0;
249 
    u32 d2 = 0;
250 
    u32 d3 = 0;
251 
    u32 d4 = 0;
252 
    u32 d5 = 0;
253 
    int ii = 0;
254 
 
255 
    if(!bar1)
256 
        return -1;
257 
 
258 
    fprintf(stderr," Firmware PLD ADM\n" );
259 
    core_reg_poke_dir(0, 1, 1);
260 
    core_reg_poke_dir(0, 1, 1);
261 
 
262 
    d=core_reg_peek_ind( 0, 0x108 );
263 
    if( d==0x4953 ) {
264 
        fprintf(stderr, " SIG = 0x%.4X - Ok\n", d );
265 
    } else {
266 
        fprintf(stderr, " SIG = 0x%.4X - Error, waiting 0x4953\n", d );
267 
        return -1;
268 
    }
269 
 
270 
    d=core_reg_peek_ind(  0, 0x109 );  fprintf(stderr, " ADM interface version:  %d.%d\n", d>>8, d&0xFF );
271 
    d=core_reg_peek_ind(  0, 0x110 ); d1=core_reg_peek_ind(  0, 0x111 );
272 
    fprintf(stderr,  " Base module: 0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
273 
 
274 
    d=core_reg_peek_ind(  0, 0x112 ); d1=core_reg_peek_ind(  0, 0x113 );
275 
    fprintf(stderr,  " Submodule: 0x%.4X  v%d.%d\n", d, d1>>8, d1&0xFF );
276 
 
277 
    d=core_reg_peek_ind(  0, 0x10B );  fprintf(stderr,  " Firmware modificaton:  %d \n", d );
278 
    d=core_reg_peek_ind(  0, 0x10A );  fprintf(stderr,  " Firmware version:       %d.%d\n", d>>8, d&0xFF );
279 
    d=core_reg_peek_ind(  0, 0x114 );  fprintf(stderr,  " Firmware build number: 0x%.4X\n", d );
280 
 
281 
    fprintf(stderr,  "\n Information about the tetrads:\n\n" );
282 
    for( ii=0; ii<8; ii++ ) {
283 
 
284 
        const char *str;
285 
 
286 
        d=core_reg_peek_ind(  ii, 0x100 );
287 
        d1=core_reg_peek_ind(  ii, 0x101 );
288 
        d2=core_reg_peek_ind(  ii, 0x102 );
289 
        d3=core_reg_peek_ind(  ii, 0x103 );
290 
        d4=core_reg_peek_ind(  ii, 0x104 );
291 
        d5=core_reg_peek_ind(  ii, 0x105 );
292 
 
293 
        switch( d ) {
294 6 v.karak 
        case 1: str="TRD_MAIN         "; break;
295 
        case 2: str="TRD_BASE_DAC     "; break;
296 
        case 3: str="TRD_PIO_STD      "; break;
297 2 dsmv 
        case 0:    str=" -            "; break;
298 
        case 0x47: str="SBSRAM_IN     "; break;
299 
        case 0x48: str="SBSRAM_OUT    "; break;
300 
        case 0x12: str="DIO64_OUT     "; break;
301 
        case 0x13: str="DIO64_IN      "; break;
302 
        case 0x14: str="ADM212x200M   "; break;
303 
        case 0x5D: str="ADM212x500M   "; break;
304 
        case 0x41: str="DDS9956       "; break;
305 
        case 0x4F: str="TEST_CTRL     "; break;
306 
        case 0x3F: str="ADM214x200M   "; break;
307 
        case 0x40: str="ADM216x100    "; break;
308 
        case 0x2F: str="ADM28x1G      "; break;
309 
        case 0x2D: str="TRD128_OUT    "; break;
310 
        case 0x4C: str="TRD128_IN     "; break;
311 
        case 0x30: str="ADMDDC5016    "; break;
312 
        case 0x2E: str="ADMFOTR2G     "; break;
313 
        case 0x49: str="ADMFOTR3G     "; break;
314 
        case 0x67: str="DDS9912       "; break;
315 
        case 0x70: str="AMBPEX5_SDRAM "; break;
316 
        case 0x71: str="TRD_MSG       "; break;
317 
        case 0x72: str="TRD_TS201     "; break;
318 
        case 0x73: str="TRD_STREAM_IN "; break;
319 
        case 0x74: str="TRD_STREAM_OUT"; break;
320 6 v.karak 
        case 0xA0: str="TRD_ADC       "; break;
321 
        case 0xA1: str="TRD_DAC       "; break;
322 
        case 0x91: str="TRD_EMAC      "; break;
323 2 dsmv 
 
324 
 
325 
        default: str="UNKNOWN"; break;
326 
        }
327 
        fprintf(stderr,  " %d  0x%.4X %s ", ii, d, str );
328 
        if( d>0 ) {
329 
            fprintf(stderr,  " MOD: %-2d VER: %d.%d ", d1, d2>>8, d2&0xFF );
330 
            if( d3 & 0x10 ) {
331 
                fprintf(stderr,  "FIFO IN   %dx%d\n", d4, d5 );
332 
            } else if( d3 & 0x20 ) {
333 
                fprintf(stderr,  "FIFO OUT  %dx%d\n", d4, d5 );
334 
            } else {
335 
                fprintf(stderr,  "\n" );
336 
            }
337 
        } else {
338 
            fprintf(stderr,  "\n" );
339 
        }
340 
 
341 
    }
342 
 
343 
    return 0;
344 
}
345 
 
346 
//-----------------------------------------------------------------------------
347 
 
348 
int pex_board::core_resource()
349 
{
350 
    return 0;
351 
}
352 
 
353 
//-----------------------------------------------------------------------------
354 
 
355 6 v.karak 
void pex_board::core_delay(int ms)
356 2 dsmv 
{
357 
    struct timeval tv = {0, 0};
358 
    tv.tv_usec = 1000*ms;
359 
 
360 
    select(0,NULL,NULL,NULL,&tv);
361 
}
362 
 
363 
//-----------------------------------------------------------------------------
364 
 
365 
u32 pex_board::core_reg_peek_dir( u32 trd, u32 reg )
366 
{
367 
    if( (trd>15) || (reg>3) )
368 
        return -1;
369 
 
370 
    u32 offset = trd*0x4000 + reg*0x1000;
371 
    u32 ret = *(bar1 + offset/4);
372 
 
373 
    return ret;
374 
}
375 
 
376 
//-----------------------------------------------------------------------------
377 
 
378 
u32 pex_board::core_reg_peek_ind( u32 trd, u32 reg )
379 
{
380 
    if( (trd>15) || (reg>0x3FF) )
381 
        return -1;
382 
 
383 
    u32 status;
384 
    u32 Status  = trd*0x4000;
385 
    u32 CmdAdr  = trd*0x4000 + 0x2000;
386 
    u32 CmdData = trd*0x4000 + 0x3000;
387 
    u32 ret;
388 
 
389 
    bar1[CmdAdr/4] = reg;
390 
 
391 
    for( int ii=0; ; ii++ ) {
392 
 
393 
        status = bar1[Status/4];
394 
        if( status & 1 )
395 
            break;
396 
 
397 
        if( ii>10000 )
398 6 v.karak 
            core_delay( 1 );
399 2 dsmv 
        if( ii>20000 ) {
400 
            return 0xFFFF;
401 
        }
402 
    }
403 
 
404 
    ret = bar1[CmdData/4];
405 
    ret &= 0xFFFF;
406 
 
407 
    return ret;
408 
}
409 
 
410 
//-----------------------------------------------------------------------------
411 
 
412 
void pex_board::core_reg_poke_dir( u32 trd, u32 reg, u32 val )
413 
{
414 
    if( (trd>15) || (reg>3) )
415 
        return;
416 
 
417 
    u32 offset = trd*0x4000+reg*0x1000;
418 
 
419 
    bar1[offset/4]=val;
420 
}
421 
 
422 
//-----------------------------------------------------------------------------
423 
 
424 
void pex_board::core_reg_poke_ind( u32 trd, u32 reg, u32 val )
425 
{
426 
    if( (trd>15) || (reg>0x3FF) )
427 
        return;
428 
 
429 
    u32 status;
430 
    u32 Status  = trd*0x4000;
431 
    u32 CmdAdr  = trd*0x4000 + 0x2000;
432 
    u32 CmdData = trd*0x4000 + 0x3000;
433 
 
434 
    bar1[CmdAdr/4] = reg;
435 
 
436 
    for( int ii=0; ; ii++ ) {
437 
 
438 
        status = bar1[Status/4];
439 
        if( status & 1 )
440 
            break;
441 
 
442 
        if( ii>10000 )
443 6 v.karak 
            core_delay( 1 );
444 2 dsmv 
        if( ii>20000 ) {
445 
            return;
446 
        }
447 
    }
448 
 
449 
    bar1[CmdData/4] = val;
450 
}
451 
 
452 
//-----------------------------------------------------------------------------
453 
 
454 
u32  pex_board::core_bar0_read( u32 offset )
455 
{
456 6 v.karak 
    return bar0[2*offset];
457 2 dsmv 
}
458 
 
459 
//-----------------------------------------------------------------------------
460 
 
461 
void pex_board::core_bar0_write( u32 offset, u32 val )
462 
{
463 6 v.karak 
    bar0[2*offset] = val;
464 2 dsmv 
}
465 
 
466 
//-----------------------------------------------------------------------------
467 
 
468 
u32  pex_board::core_bar1_read( u32 offset )
469 
{
470 6 v.karak 
    return bar1[2*offset];
471 2 dsmv 
}
472 
 
473 
//-----------------------------------------------------------------------------
474 
 
475 
void pex_board::core_bar1_write( u32 offset, u32 val )
476 
{
477 19 dsmv 
    bar1[2*offset] = val;
478 2 dsmv 
}
479 
 
480 
//-----------------------------------------------------------------------------
481 
 
482 
void pex_board::core_block_write( u32 nb, u32 reg, u32 val )
483 
{
484 
    if( (nb>7) || (reg>31) )
485 
        return;
486 
 
487 
    *(bar0+nb*64+reg*2)=val;
488 
}
489 
 
490 
//-----------------------------------------------------------------------------
491 
 
492 
u32  pex_board::core_block_read( u32 nb, u32 reg )
493 
{
494 
    if( (nb>7) || (reg>31) )
495 
        return -1;
496 
 
497 
    u32 ret = 0;
498 
 
499 
    ret=*(bar0+nb*64+reg*2);
500 
    if( reg<8 )
501 
        ret&=0xFFFF;
502 
 
503 
    return ret;
504 
}
505 
 
506 
//-----------------------------------------------------------------------------
507 
 
508 
u32 pex_board::core_alloc(int DmaChan, BRDctrl_StreamCBufAlloc* sSCA)
509 
{
510 
    m_DescrSize[DmaChan] = sizeof(AMB_MEM_DMA_CHANNEL) + (sSCA->blkNum - 1) * sizeof(void*);
511 
    m_Descr[DmaChan] = (AMB_MEM_DMA_CHANNEL*) new u8[m_DescrSize[DmaChan]];
512 
 
513 
    m_Descr[DmaChan]->DmaChanNum = DmaChan;
514 
    m_Descr[DmaChan]->Direction = sSCA->dir;
515 
    m_Descr[DmaChan]->LocalAddr = 0;
516 
    m_Descr[DmaChan]->MemType = sSCA->isCont;
517 
    m_Descr[DmaChan]->BlockCnt = sSCA->blkNum;
518 
    m_Descr[DmaChan]->BlockSize = sSCA->blkSize;
519 
    m_Descr[DmaChan]->pStub = NULL;
520 
 
521 
    for(u32 iBlk = 0; iBlk < sSCA->blkNum; iBlk++) {
522 
            m_Descr[DmaChan]->pBlock[iBlk] = NULL;
523 
    }
524 
 
525 
    if( ioctl(fd, IOCTL_AMB_SET_MEMIO, m_Descr[DmaChan]) < 0 ) {
526 
        fprintf(stderr, "%s(): Error allocate memory\n", __FUNCTION__ );
527 
        return -1;
528 
    }
529 
 
530 
    for(u32 iBlk = 0; iBlk < m_Descr[DmaChan]->BlockCnt; iBlk++) {
531 
 
532 
        void *MappedAddress = mmap( NULL,
533 
                                    m_Descr[DmaChan]->BlockSize,
534 
                                    PROT_READ | PROT_WRITE,
535 
                                    MAP_SHARED,
536 
                                    fd,
537 
                                    (off_t)m_Descr[DmaChan]->pBlock[iBlk] );
538 
 
539 
        if(MappedAddress == MAP_FAILED) {
540 
            fprintf(stderr, "%s(): Error map memory\n", __FUNCTION__ );
541 
            return -1;
542 
        }
543 
 
544 
        fprintf(stderr,"%d: %p -> %p\n", iBlk, (void*)m_Descr[DmaChan]->pBlock[iBlk], MappedAddress);
545 
 
546 
        //сохраним отображенный в процесс физический адрес текущего блока
547 
        m_Descr[DmaChan]->pBlock[iBlk] = MappedAddress;
548 
        sSCA->ppBlk[iBlk] = MappedAddress;
549 
/*
550 
        u32 *buffer = (u32*)MappedAddress;
551 
        for(u32 jj=0; jj<m_Descr[DmaChan]->BlockSize/4; jj+=0x100) {
552 
            fprintf(stdout,"%x ", buffer[jj]);
553 
        }
554 
        fprintf(stdout,"\n");
555 
*/
556 
    }
557 
 
558 
    if(m_Descr[DmaChan]->pStub) {
559 
 
560 
        void *StubAddress = mmap( NULL,
561 
                                  sizeof(AMB_STUB),
562 
                                  PROT_READ | PROT_WRITE,
563 
                                  MAP_SHARED,
564 
                                  fd,
565 
                                  (off_t)m_Descr[DmaChan]->pStub );
566 
 
567 
        if(StubAddress == MAP_FAILED) {
568 
            fprintf(stderr, "%s(): Error map stub\n", __FUNCTION__ );
569 
            return -1;
570 
        }
571 
 
572 
        fprintf(stderr,"Stub: %p -> %p\n", (void*)m_Descr[DmaChan]->pStub, StubAddress);
573 
 
574 
        m_Descr[DmaChan]->pStub = StubAddress;
575 
        sSCA->pStub = (BRDstrm_Stub*)m_Descr[DmaChan]->pStub;
576 
    }
577 
 
578 
    //сохраним информацию в буфере пользователя
579 
    sSCA->blkNum = m_Descr[DmaChan]->BlockCnt;
580 
 
581 
    return 0;
582 
}
583 
 
584 
//-----------------------------------------------------------------------------
585 
 
586 6 v.karak 
u32 pex_board::core_allocate_memory(int DmaChan,
587 
                                    void** pBuf,
588 
                                    u32 blkSize,
589 
                                    u32 blkNum,
590 
                                    u32 isSysMem,
591 
                                    u32 dir,
592 
                                    u32 addr,
593 
                                    BRDstrm_Stub **pStub )
594 2 dsmv 
{
595 
    m_DescrSize[DmaChan] = sizeof(AMB_MEM_DMA_CHANNEL) + (blkNum - 1) * sizeof(void*);
596 
    m_Descr[DmaChan] = (AMB_MEM_DMA_CHANNEL*) new u8[m_DescrSize[DmaChan]];
597 
 
598 
    m_Descr[DmaChan]->DmaChanNum = DmaChan;
599 
    m_Descr[DmaChan]->Direction = dir;
600 
    m_Descr[DmaChan]->LocalAddr = addr;
601 
    m_Descr[DmaChan]->MemType = isSysMem;
602 
    m_Descr[DmaChan]->BlockCnt = blkNum;
603 
    m_Descr[DmaChan]->BlockSize = blkSize;
604 
    m_Descr[DmaChan]->pStub = NULL;
605 
 
606 
    for(u32 iBlk = 0; iBlk < blkNum; iBlk++) {
607 
            m_Descr[DmaChan]->pBlock[iBlk] = NULL;
608 
    }
609 
 
610 
    if( ioctl(fd, IOCTL_AMB_SET_MEMIO, m_Descr[DmaChan]) < 0 ) {
611 
        fprintf(stderr, "%s(): Error allocate memory\n", __FUNCTION__ );
612 
        return -1;
613 
    }
614 
 
615 
    for(u32 iBlk = 0; iBlk < blkNum; iBlk++) {
616 
 
617 
        void *MappedAddress = mmap( NULL,
618 
                                    m_Descr[DmaChan]->BlockSize,
619 
                                    PROT_READ | PROT_WRITE,
620 
                                    MAP_SHARED,
621 
                                    fd,
622 
                                    (off_t)m_Descr[DmaChan]->pBlock[iBlk] );
623 
 
624 
        if(MappedAddress == MAP_FAILED) {
625 
            fprintf(stderr, "%s(): Error map memory\n", __FUNCTION__ );
626 
            return -1;
627 
        }
628 
 
629 
        fprintf(stderr,"%d: %p -> %p\n", iBlk, (void*)m_Descr[DmaChan]->pBlock[iBlk], MappedAddress);
630 
 
631 
        //сохраним отображенный в процесс физический адрес текущего блока
632 
        m_Descr[DmaChan]->pBlock[iBlk] = MappedAddress;
633 
    }
634 
 
635 
    if(m_Descr[DmaChan]->pStub) {
636 
 
637 
        void *StubAddress = mmap( NULL,
638 
                                  sizeof(AMB_STUB),
639 
                                  PROT_READ | PROT_WRITE,
640 
                                  MAP_SHARED,
641 
                                  fd,
642 
                                  (off_t)m_Descr[DmaChan]->pStub );
643 
 
644 
        if(StubAddress == MAP_FAILED) {
645 
            fprintf(stderr, "%s(): Error map stub\n", __FUNCTION__ );
646 
            return -1;
647 
        }
648 
 
649 
        fprintf(stderr,"Stub: %p -> %p\n", (void*)m_Descr[DmaChan]->pStub, StubAddress);
650 
 
651 
        m_Descr[DmaChan]->pStub = StubAddress;
652 
    }
653 
 
654 
    *pBuf = &m_Descr[DmaChan]->pBlock[0];
655 6 v.karak 
    *pStub = (BRDstrm_Stub*)m_Descr[DmaChan]->pStub;
656 2 dsmv 
 
657 
    return 0;
658 
}
659 
 
660 
//-----------------------------------------------------------------------------
661 
 
662 
u32  pex_board::core_free_memory(int DmaChan)
663 
{
664 
    for(u32 iBlk = 0; iBlk < m_Descr[DmaChan]->BlockCnt; iBlk++) {
665 
 
666 
        munmap( m_Descr[DmaChan]->pBlock[iBlk], m_Descr[DmaChan]->BlockSize );
667 
    }
668 
 
669 
    munmap( m_Descr[DmaChan]->pStub, sizeof(AMB_STUB) );
670 
 
671 
    if(ioctl(fd, IOCTL_AMB_FREE_MEMIO, m_Descr[DmaChan]) < 0) {
672 
        fprintf(stderr, "%s(): Error free memory\n", __FUNCTION__ );
673 
        return -1;
674 
    }
675 
 
676 
    delete m_Descr[DmaChan];
677 
    m_Descr[DmaChan] = NULL;
678 
 
679 
    return 0;
680 
}
681 
 
682 
//-----------------------------------------------------------------------------
683 
 
684 
u32  pex_board::core_start_dma(int DmaChan, int IsCycling)
685 
{
686 19 dsmv 
 
687 
fprintf(stderr, "%s(): DmaChan=%d IsCycling=%d \n", __FUNCTION__, DmaChan, IsCycling );
688 2 dsmv 
    if(m_Descr[DmaChan])
689 
    {
690 
        AMB_START_DMA_CHANNEL StartDescrip;
691 
        StartDescrip.DmaChanNum = DmaChan;
692 
        StartDescrip.IsCycling = IsCycling;
693 
 
694 19 dsmv 
        fprintf(stderr, "%s(): IOCTL_AMB_START_MEMIO  ", __FUNCTION__ );
695 
 
696 2 dsmv 
        if (ioctl(fd,IOCTL_AMB_START_MEMIO,&StartDescrip) < 0) {
697 
            fprintf(stderr, "%s(): Error start DMA\n", __FUNCTION__ );
698 
            return -1;
699 
        }
700 19 dsmv 
        fprintf(stderr, " %s - OK \n", __FUNCTION__ );
701 2 dsmv 
    }
702 
    return 0;
703 
}
704 
 
705 
//-----------------------------------------------------------------------------
706 
 
707 
u32  pex_board::core_stop_dma(int DmaChan)
708 
{
709 
    if(m_Descr[DmaChan])
710 
    {
711 
        AMB_STUB* pStub = (AMB_STUB*)m_Descr[DmaChan]->pStub;
712 
        if(pStub->state == STATE_RUN)
713 
        {
714 
            AMB_STATE_DMA_CHANNEL StateDescrip;
715 
            StateDescrip.DmaChanNum = DmaChan;
716 
            StateDescrip.Timeout = 0;//pState->timeout; останавливает немедленно (в 0-кольце оставлю пока возможность ожидания)
717 
 
718 
            if (ioctl(fd, IOCTL_AMB_STOP_MEMIO, &StateDescrip) < 0) {
719 
                fprintf(stderr, "%s(): Error stop DMA\n", __FUNCTION__ );
720 
                return -1;
721 
            }
722 
        }
723 
    }
724 
    return 0;
725 
}
726 
 
727 
//-----------------------------------------------------------------------------
728 
 
729 
u32  pex_board::core_state_dma(int DmaChan, u32 msTimeout, int& state, u32& blkNum)
730 
{
731 
    AMB_STATE_DMA_CHANNEL StateDescrip;
732 
    StateDescrip.DmaChanNum = DmaChan;
733 
    StateDescrip.Timeout = msTimeout;
734 
 
735 
    if (0 > ioctl(fd, IOCTL_AMB_STATE_MEMIO, &StateDescrip)) {
736 
        fprintf(stderr, "%s(): Error state DMA\n", __FUNCTION__ );
737 
        return -1;
738 
    }
739 
    blkNum = StateDescrip.BlockCntTotal;
740 
    state = StateDescrip.DmaChanState;
741 
 
742 
    return 0;
743 
}
744 
 
745 
//-----------------------------------------------------------------------------
746 
 
747 
u32  pex_board::core_wait_buffer(int DmaChan, u32 msTimeout)
748 
{
749 
    AMB_STATE_DMA_CHANNEL WaitDmaDescr;
750 
    WaitDmaDescr.DmaChanNum = DmaChan;
751 
    WaitDmaDescr.Timeout = msTimeout;
752 
 
753 
    if(m_Descr[DmaChan])
754 
    {
755 
        if (0 > ioctl(fd, IOCTL_AMB_WAIT_DMA_BUFFER, &WaitDmaDescr)) {
756 
            fprintf(stderr, "%s(): Error wait buffer DMA\n", __FUNCTION__ );
757 
            return -1;
758 
        }
759 
    }
760 
 
761 
    return 0;
762 
}
763 
 
764 
//-----------------------------------------------------------------------------
765 
 
766 
u32  pex_board::core_wait_block(int DmaChan, u32 msTimeout)
767 
{
768 
    AMB_STATE_DMA_CHANNEL WaitDmaDescr;
769 
    WaitDmaDescr.DmaChanNum = DmaChan;
770 
    WaitDmaDescr.Timeout = msTimeout;
771 
 
772 
    if(m_Descr[DmaChan])
773 
    {
774 
        if (0 > ioctl(fd, IOCTL_AMB_WAIT_DMA_BLOCK, &WaitDmaDescr)) {
775 
            fprintf(stderr, "%s(): Error wait block DMA\n", __FUNCTION__ );
776 
            return -1;
777 
        }
778 
    }
779 
 
780 
    return 0;
781 
}
782 
 
783 
//-----------------------------------------------------------------------------
784 
 
785 
u32 pex_board::core_reset_fifo(int DmaChan)
786 
{
787 
    AMB_SET_DMA_CHANNEL DmaParam;
788 
    DmaParam.DmaChanNum = DmaChan;
789 
    DmaParam.Param = 0;
790 
 
791 
    if(m_Descr[DmaChan])
792 
    {
793 
        if (0 > ioctl(fd, IOCTL_AMB_RESET_FIFO, &DmaParam)) {
794 
            fprintf(stderr, "%s(): Error reset FIFO\n", __FUNCTION__ );
795 
            return -1;
796 
        }
797 
    }
798 
 
799 
    return 0;
800 
}
801 
 
802 
//-----------------------------------------------------------------------------
803 
 
804 
u32 pex_board::core_set_local_addr(int DmaChan, u32 addr)
805 
{
806 
    AMB_SET_DMA_CHANNEL DmaParam;
807 
    DmaParam.DmaChanNum = DmaChan;
808 5 v.karak 
    DmaParam.Param = addr;
809 2 dsmv 
 
810 19 dsmv 
fprintf(stderr, "%s(): DmaChan=%d addr=0x%.8X \n", __FUNCTION__, DmaChan, addr );
811 
 
812 
 
813 2 dsmv 
    if(m_Descr[DmaChan])
814 
    {
815 
        if (0 > ioctl(fd, IOCTL_AMB_SET_SRC_MEM, &DmaParam)) {
816 
            fprintf(stderr, "%s(): Error set source for DMA\n", __FUNCTION__ );
817 
            return -1;
818 
        }
819 19 dsmv 
 
820 
 
821 
       DmaParam.Param = m_Descr[DmaChan]->Direction;
822 
 
823 
          if (0 > ioctl(fd, IOCTL_AMB_SET_DIR_MEM, &DmaParam)) {
824 
              fprintf(stderr, "%s(): Error set dir for DMA\n", __FUNCTION__ );
825 
              return -1;
826 
          }
827 
 
828 
 
829 2 dsmv 
    }
830 
 
831 
    return 0;
832 
}
833 
 
834 
//-----------------------------------------------------------------------------
835 
 
836 
u32 pex_board::core_adjust(int DmaChan, u32 mode)
837 
{
838 
    AMB_SET_DMA_CHANNEL DmaParam;
839 
    DmaParam.DmaChanNum = DmaChan;
840 
    DmaParam.Param = mode;
841 
 
842 
    if(m_Descr[DmaChan])
843 
    {
844 
        if (0 > ioctl(fd, IOCTL_AMB_ADJUST, &DmaParam)) {
845 
            fprintf(stderr, "%s(): Error adjust DMA\n", __FUNCTION__ );
846 
            return -1;
847 
        }
848 
    }
849 
 
850 
    return 0;
851 
}
852 
 
853 
//-----------------------------------------------------------------------------
854 
 
855 
u32 pex_board::core_done(int DmaChan, u32 blockNumber)
856 
{
857 
    AMB_SET_DMA_CHANNEL DmaParam;
858 
    DmaParam.DmaChanNum = DmaChan;
859 
    DmaParam.Param = blockNumber;
860 
 
861 
    if(m_Descr[DmaChan])
862 
    {
863 
        if (0 > ioctl(fd, IOCTL_AMB_DONE, &DmaParam)) {
864 
            fprintf(stderr, "%s(): Error done DMA\n", __FUNCTION__ );
865 
            return -1;
866 
        }
867 
    }
868 
 
869 
    return 0;
870 
}
871 
 
872 
//-----------------------------------------------------------------------------

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