URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE12.3/] [MySysGen/] [PCIe_UserLogic_00_sysgen_error.log] - Blame information for rev 11

Line No.	Rev	Author	Line
1	11	barabba	`--------------------------------- Version Log ----------------------------------`
2			`Version Path`
3			`System Generator 12.3 C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen`
4			`Matlab 7.10.0.499 (R2010a) C:/Programmi/MATLAB/R2010a`
5			`ISE C:/Programmi/Xilinx/12.3/ISE_DS/ISE`
6			`--------------------------------------------------------------------------------`
7			`Summary of Errors:`
8			`Error 0001: Undriven input port`
9			`Block: 'PCIe_UserLogic_00/USER_LOGIC/Inverter5'`
10			`--------------------------------------------------------------------------------`
11
12			`Error 0001:`
13
14			`Reported by:`
15			`'PCIe_UserLogic_00/USER_LOGIC/Inverter5'`
16
17			`Details:`
18			`The input ports on this block must be driven by other Xilinx blocks`
19			`--------------------------------------------------------------------------------`