1 |
11 |
barabba |
|
2 |
|
|
open(PIDFILE, '> pidfile.txt') || die 'Couldn\'t write process ID to file.';
|
3 |
|
|
print PIDFILE "$$\n";
|
4 |
|
|
close(PIDFILE);
|
5 |
|
|
|
6 |
|
|
eval {
|
7 |
|
|
# Call script(s).
|
8 |
|
|
my $instrs;
|
9 |
|
|
my $results = [];
|
10 |
|
|
$ENV{'SYSGEN'} = 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen';
|
11 |
|
|
use Sg;
|
12 |
|
|
$instrs = {
|
13 |
|
|
'HDLCodeGenStatus' => 0.0,
|
14 |
|
|
'HDL_PATH' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen',
|
15 |
|
|
'Impl_file' => 'ISE Defaults',
|
16 |
|
|
'Impl_file_sgadvanced' => '',
|
17 |
|
|
'Synth_file' => 'XST Defaults',
|
18 |
|
|
'Synth_file_sgadvanced' => '',
|
19 |
|
|
'TEMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
|
20 |
|
|
'TMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
|
21 |
|
|
'Temp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
|
22 |
|
|
'Tmp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
|
23 |
|
|
'base_system_period_hardware' => 5.0,
|
24 |
|
|
'base_system_period_simulink' => 8.0E-9,
|
25 |
|
|
'block_icon_display' => 'Default',
|
26 |
|
|
'block_type' => 'sysgen',
|
27 |
|
|
'block_version' => '',
|
28 |
|
|
'ce_clr' => 0.0,
|
29 |
|
|
'clock_loc' => '',
|
30 |
|
|
'clock_wrapper' => 'Clock Enables',
|
31 |
|
|
'clock_wrapper_sgadvanced' => '',
|
32 |
|
|
'compilation' => 'NGC Netlist',
|
33 |
|
|
'compilation_lut' => {
|
34 |
|
|
'keys' => [
|
35 |
|
|
'HDL Netlist',
|
36 |
|
|
'Bitstream',
|
37 |
|
|
'NGC Netlist',
|
38 |
|
|
],
|
39 |
|
|
'values' => [
|
40 |
|
|
'target1',
|
41 |
|
|
'target2',
|
42 |
|
|
'target3',
|
43 |
|
|
],
|
44 |
|
|
},
|
45 |
|
|
'compilation_target' => 'NGC Netlist',
|
46 |
|
|
'core_generation' => 1.0,
|
47 |
|
|
'core_generation_sgadvanced' => '',
|
48 |
|
|
'core_is_deployed' => 0.0,
|
49 |
|
|
'coregen_core_generation_tmpdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root/cg_wk/c00613f6911dfdaa6',
|
50 |
|
|
'coregen_part_family' => 'virtex6',
|
51 |
|
|
'createTestbench' => 0,
|
52 |
|
|
'create_interface_document' => 'off',
|
53 |
|
|
'dbl_ovrd' => -1.0,
|
54 |
|
|
'dbl_ovrd_sgadvanced' => '',
|
55 |
|
|
'dcm_input_clock_period' => 5.0,
|
56 |
|
|
'deprecated_control' => 'off',
|
57 |
|
|
'deprecated_control_sgadvanced' => '',
|
58 |
|
|
'design' => 'PCIe_UserLogic_00',
|
59 |
|
|
'design_full_path' => 'C:\\Temp\\Xilinx PCI Express\\pcie-v6-ml605_ISE12_OpenCores\\MySysGen\\PCIe_UserLogic_00.mdl',
|
60 |
|
|
'device' => 'xc6vlx240t-3ff784',
|
61 |
|
|
'device_speed' => '-3',
|
62 |
|
|
'directory' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC',
|
63 |
|
|
'dsp_cache_root_path' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
|
64 |
|
|
'eval_field' => '0',
|
65 |
|
|
'fileDeliveryDefaults' => [
|
66 |
|
|
[
|
67 |
|
|
'(?i)\\.vhd$',
|
68 |
|
|
{ 'fileName' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/perl_results.vhd', },
|
69 |
|
|
],
|
70 |
|
|
[
|
71 |
|
|
'(?i)\\.v$',
|
72 |
|
|
{ 'fileName' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/perl_results.v', },
|
73 |
|
|
],
|
74 |
|
|
],
|
75 |
|
|
'fxdptinstalled' => 1.0,
|
76 |
|
|
'generateUsing71FrontEnd' => 1,
|
77 |
|
|
'generating_island_subsystem_handle' => 4.0009765625,
|
78 |
|
|
'generating_subsystem_handle' => 4.0009765625,
|
79 |
|
|
'generation_directory' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC',
|
80 |
|
|
'has_advanced_control' => '0',
|
81 |
|
|
'hdlDir' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen/hdl',
|
82 |
|
|
'hdlKind' => 'vhdl',
|
83 |
|
|
'hdl_path' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen',
|
84 |
|
|
'impl_file' => 'ISE Defaults*',
|
85 |
|
|
'incr_netlist' => 'off',
|
86 |
|
|
'incr_netlist_sgadvanced' => '',
|
87 |
|
|
'infoedit' => ' System Generator',
|
88 |
|
|
'isdeployed' => 0,
|
89 |
|
|
'ise_version' => '12.3i',
|
90 |
|
|
'master_sysgen_token_handle' => 5.0009765625,
|
91 |
|
|
'matlab' => 'C:/Programmi/MATLAB/R2010a',
|
92 |
|
|
'matlab_fixedpoint' => 1.0,
|
93 |
|
|
'mdlHandle' => 3.0009765625,
|
94 |
|
|
'mdlPath' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen/PCIe_UserLogic_00.mdl',
|
95 |
|
|
'modelDiagnostics' => [
|
96 |
|
|
{
|
97 |
|
|
'count' => 339.0,
|
98 |
|
|
'isMask' => 0.0,
|
99 |
|
|
'type' => 'PCIe_UserLogic_00 Total blocks',
|
100 |
|
|
},
|
101 |
|
|
{
|
102 |
|
|
'count' => 4.0,
|
103 |
|
|
'isMask' => 0.0,
|
104 |
|
|
'type' => 'DiscretePulseGenerator',
|
105 |
|
|
},
|
106 |
|
|
{
|
107 |
|
|
'count' => 327.0,
|
108 |
|
|
'isMask' => 0.0,
|
109 |
|
|
'type' => 'S-Function',
|
110 |
|
|
},
|
111 |
|
|
{
|
112 |
|
|
'count' => 4.0,
|
113 |
|
|
'isMask' => 0.0,
|
114 |
|
|
'type' => 'SubSystem',
|
115 |
|
|
},
|
116 |
|
|
{
|
117 |
|
|
'count' => 4.0,
|
118 |
|
|
'isMask' => 0.0,
|
119 |
|
|
'type' => 'Terminator',
|
120 |
|
|
},
|
121 |
|
|
{
|
122 |
|
|
'count' => 23.0,
|
123 |
|
|
'isMask' => 1.0,
|
124 |
|
|
'type' => 'Xilinx Constant Block Block',
|
125 |
|
|
},
|
126 |
|
|
{
|
127 |
|
|
'count' => 1.0,
|
128 |
|
|
'isMask' => 1.0,
|
129 |
|
|
'type' => 'Xilinx Counter Block',
|
130 |
|
|
},
|
131 |
|
|
{
|
132 |
|
|
'count' => 44.0,
|
133 |
|
|
'isMask' => 1.0,
|
134 |
|
|
'type' => 'Xilinx Gateway In Block',
|
135 |
|
|
},
|
136 |
|
|
{
|
137 |
|
|
'count' => 39.0,
|
138 |
|
|
'isMask' => 1.0,
|
139 |
|
|
'type' => 'Xilinx Gateway Out Block',
|
140 |
|
|
},
|
141 |
|
|
{
|
142 |
|
|
'count' => 2.0,
|
143 |
|
|
'isMask' => 1.0,
|
144 |
|
|
'type' => 'Xilinx Inverter Block',
|
145 |
|
|
},
|
146 |
|
|
{
|
147 |
|
|
'count' => 1.0,
|
148 |
|
|
'isMask' => 1.0,
|
149 |
|
|
'type' => 'Xilinx Logical Block Block',
|
150 |
|
|
},
|
151 |
|
|
{
|
152 |
|
|
'count' => 78.0,
|
153 |
|
|
'isMask' => 1.0,
|
154 |
|
|
'type' => 'Xilinx Register Block',
|
155 |
|
|
},
|
156 |
|
|
{
|
157 |
|
|
'count' => 62.0,
|
158 |
|
|
'isMask' => 1.0,
|
159 |
|
|
'type' => 'Xilinx Shared Memory Based From Register Block',
|
160 |
|
|
},
|
161 |
|
|
{
|
162 |
|
|
'count' => 62.0,
|
163 |
|
|
'isMask' => 1.0,
|
164 |
|
|
'type' => 'Xilinx Shared Memory Based To Register Block',
|
165 |
|
|
},
|
166 |
|
|
{
|
167 |
|
|
'count' => 1.0,
|
168 |
|
|
'isMask' => 1.0,
|
169 |
|
|
'type' => 'Xilinx Subsystem Generator Block',
|
170 |
|
|
},
|
171 |
|
|
{
|
172 |
|
|
'count' => 2.0,
|
173 |
|
|
'isMask' => 1.0,
|
174 |
|
|
'type' => 'Xilinx System Generator Block',
|
175 |
|
|
},
|
176 |
|
|
{
|
177 |
|
|
'count' => 14.0,
|
178 |
|
|
'isMask' => 1.0,
|
179 |
|
|
'type' => 'Xilinx Type Converter Block',
|
180 |
|
|
},
|
181 |
|
|
],
|
182 |
|
|
'model_globals_initialized' => 1.0,
|
183 |
|
|
'model_path' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen/PCIe_UserLogic_00.mdl',
|
184 |
|
|
'myxilinx' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE',
|
185 |
|
|
'ngc_config' => {
|
186 |
|
|
'include_cf' => 1,
|
187 |
|
|
'include_clockwrapper' => 1.0,
|
188 |
|
|
},
|
189 |
|
|
'ngc_files' => [ 'xlpersistentdff.ngc', ],
|
190 |
|
|
'num_sim_cycles' => '1250000000',
|
191 |
|
|
'package' => 'ff784',
|
192 |
|
|
'part' => 'xc6vlx240t',
|
193 |
|
|
'partFamily' => 'virtex6',
|
194 |
|
|
'port_data_types_enabled' => 1.0,
|
195 |
|
|
'postgeneration_fcn' => 'xlNGCPostGeneration',
|
196 |
|
|
'preserve_hierarchy' => 0.0,
|
197 |
|
|
'proj_type' => 'Project Navigator',
|
198 |
|
|
'proj_type_sgadvanced' => '',
|
199 |
|
|
'run_coregen' => 'off',
|
200 |
|
|
'run_coregen_sgadvanced' => '',
|
201 |
|
|
'sample_time_colors_enabled' => 1.0,
|
202 |
|
|
'sampletimecolors' => 1.0,
|
203 |
|
|
'settings_fcn' => 'xlngcsettings',
|
204 |
|
|
'sg_blockgui_xml' => '',
|
205 |
|
|
'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
|
206 |
|
|
'sg_list_contents' => '',
|
207 |
|
|
'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
|
208 |
|
|
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
|
209 |
|
|
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
|
210 |
|
|
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
|
211 |
|
|
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
|
212 |
|
|
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
|
213 |
|
|
fprintf(\'\',\'COMMENT: end icon graphics\');
|
214 |
|
|
fprintf(\'\',\'COMMENT: begin icon text\');
|
215 |
|
|
fprintf(\'\',\'COMMENT: end icon text\');',
|
216 |
|
|
'sg_version' => '',
|
217 |
|
|
'sggui_pos' => '-1,-1,-1,-1',
|
218 |
|
|
'simulation_island_subsystem_handle' => 4.0009765625,
|
219 |
|
|
'simulink_accelerator_running' => 0.0,
|
220 |
|
|
'simulink_debugger_running' => 0.0,
|
221 |
|
|
'simulink_period' => 8.0E-9,
|
222 |
|
|
'speed' => '-3',
|
223 |
|
|
'synth_file' => 'XST Defaults*',
|
224 |
|
|
'synthesisTool' => 'XST',
|
225 |
|
|
'synthesis_language' => 'vhdl',
|
226 |
|
|
'synthesis_tool' => 'XST',
|
227 |
|
|
'synthesis_tool_sgadvanced' => '',
|
228 |
|
|
'sysclk_period' => 5.0,
|
229 |
|
|
'sysgen' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen',
|
230 |
|
|
'sysgenRoot' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen',
|
231 |
|
|
'sysgenTokenSettings' => {
|
232 |
|
|
'Impl_file' => 'ISE Defaults',
|
233 |
|
|
'Impl_file_sgadvanced' => '',
|
234 |
|
|
'Synth_file' => 'XST Defaults',
|
235 |
|
|
'Synth_file_sgadvanced' => '',
|
236 |
|
|
'base_system_period_hardware' => 5.0,
|
237 |
|
|
'base_system_period_simulink' => 8.0E-9,
|
238 |
|
|
'block_icon_display' => 'Default',
|
239 |
|
|
'block_type' => 'sysgen',
|
240 |
|
|
'block_version' => '',
|
241 |
|
|
'ce_clr' => 0.0,
|
242 |
|
|
'clock_loc' => '',
|
243 |
|
|
'clock_wrapper' => 'Clock Enables',
|
244 |
|
|
'clock_wrapper_sgadvanced' => '',
|
245 |
|
|
'compilation' => 'NGC Netlist',
|
246 |
|
|
'compilation_lut' => {
|
247 |
|
|
'keys' => [
|
248 |
|
|
'HDL Netlist',
|
249 |
|
|
'Bitstream',
|
250 |
|
|
'NGC Netlist',
|
251 |
|
|
],
|
252 |
|
|
'values' => [
|
253 |
|
|
'target1',
|
254 |
|
|
'target2',
|
255 |
|
|
'target3',
|
256 |
|
|
],
|
257 |
|
|
},
|
258 |
|
|
'core_generation' => 1.0,
|
259 |
|
|
'core_generation_sgadvanced' => '',
|
260 |
|
|
'coregen_part_family' => 'virtex6',
|
261 |
|
|
'create_interface_document' => 'off',
|
262 |
|
|
'dbl_ovrd' => -1.0,
|
263 |
|
|
'dbl_ovrd_sgadvanced' => '',
|
264 |
|
|
'dcm_input_clock_period' => 5.0,
|
265 |
|
|
'deprecated_control' => 'off',
|
266 |
|
|
'deprecated_control_sgadvanced' => '',
|
267 |
|
|
'directory' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC',
|
268 |
|
|
'eval_field' => '0',
|
269 |
|
|
'has_advanced_control' => '0',
|
270 |
|
|
'impl_file' => 'ISE Defaults*',
|
271 |
|
|
'incr_netlist' => 'off',
|
272 |
|
|
'incr_netlist_sgadvanced' => '',
|
273 |
|
|
'infoedit' => ' System Generator',
|
274 |
|
|
'master_sysgen_token_handle' => 5.0009765625,
|
275 |
|
|
'ngc_config' => {
|
276 |
|
|
'include_cf' => 1,
|
277 |
|
|
'include_clockwrapper' => 1.0,
|
278 |
|
|
},
|
279 |
|
|
'package' => 'ff784',
|
280 |
|
|
'part' => 'xc6vlx240t',
|
281 |
|
|
'postgeneration_fcn' => 'xlNGCPostGeneration',
|
282 |
|
|
'preserve_hierarchy' => 0.0,
|
283 |
|
|
'proj_type' => 'Project Navigator',
|
284 |
|
|
'proj_type_sgadvanced' => '',
|
285 |
|
|
'run_coregen' => 'off',
|
286 |
|
|
'run_coregen_sgadvanced' => '',
|
287 |
|
|
'settings_fcn' => 'xlngcsettings',
|
288 |
|
|
'sg_blockgui_xml' => '',
|
289 |
|
|
'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
|
290 |
|
|
'sg_list_contents' => '',
|
291 |
|
|
'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
|
292 |
|
|
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
|
293 |
|
|
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
|
294 |
|
|
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
|
295 |
|
|
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
|
296 |
|
|
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
|
297 |
|
|
fprintf(\'\',\'COMMENT: end icon graphics\');
|
298 |
|
|
fprintf(\'\',\'COMMENT: begin icon text\');
|
299 |
|
|
fprintf(\'\',\'COMMENT: end icon text\');',
|
300 |
|
|
'sggui_pos' => '-1,-1,-1,-1',
|
301 |
|
|
'simulation_island_subsystem_handle' => 4.0009765625,
|
302 |
|
|
'simulink_period' => 8.0E-9,
|
303 |
|
|
'speed' => '-3',
|
304 |
|
|
'synth_file' => 'XST Defaults*',
|
305 |
|
|
'synthesis_language' => 'vhdl',
|
306 |
|
|
'synthesis_tool' => 'XST',
|
307 |
|
|
'synthesis_tool_sgadvanced' => '',
|
308 |
|
|
'sysclk_period' => 5.0,
|
309 |
|
|
'testbench' => 0,
|
310 |
|
|
'testbench_sgadvanced' => '',
|
311 |
|
|
'trim_vbits' => 1.0,
|
312 |
|
|
'trim_vbits_sgadvanced' => '',
|
313 |
|
|
'xilinx_device' => 'xc6vlx240t-3ff784',
|
314 |
|
|
'xilinxfamily' => 'virtex6',
|
315 |
|
|
},
|
316 |
|
|
'sysgen_Root' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen',
|
317 |
|
|
'systemClockPeriod' => 5.0,
|
318 |
|
|
'tempdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
|
319 |
|
|
'testbench' => 0,
|
320 |
|
|
'testbench_sgadvanced' => '',
|
321 |
|
|
'tmpDir' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen',
|
322 |
|
|
'trim_vbits' => 1.0,
|
323 |
|
|
'trim_vbits_sgadvanced' => '',
|
324 |
|
|
'use_ce_syn_keep' => 1,
|
325 |
|
|
'use_strict_names' => 1,
|
326 |
|
|
'user_tips_enabled' => 0.0,
|
327 |
|
|
'usertemp' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
|
328 |
|
|
'using71Netlister' => 1,
|
329 |
|
|
'verilog_files' => [
|
330 |
|
|
'conv_pkg.v',
|
331 |
|
|
'synth_reg.v',
|
332 |
|
|
'synth_reg_w_init.v',
|
333 |
|
|
'convert_type.v',
|
334 |
|
|
],
|
335 |
|
|
'version' => '',
|
336 |
|
|
'vhdl_files' => [
|
337 |
|
|
'conv_pkg.vhd',
|
338 |
|
|
'synth_reg.vhd',
|
339 |
|
|
'synth_reg_w_init.vhd',
|
340 |
|
|
],
|
341 |
|
|
'vsimtime' => '6875000275.000000 ns',
|
342 |
|
|
'xilinx' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE',
|
343 |
|
|
'xilinx_device' => 'xc6vlx240t-3ff784',
|
344 |
|
|
'xilinx_family' => 'virtex6',
|
345 |
|
|
'xilinx_package' => 'ff784',
|
346 |
|
|
'xilinx_part' => 'xc6vlx240t',
|
347 |
|
|
'xilinxdevice' => 'xc6vlx240t-3ff784',
|
348 |
|
|
'xilinxfamily' => 'virtex6',
|
349 |
|
|
'xilinxpart' => 'xc6vlx240t',
|
350 |
|
|
};
|
351 |
|
|
push(@$results, &Sg::setAttributes($instrs));
|
352 |
|
|
use SgDeliverFile;
|
353 |
|
|
$instrs = {
|
354 |
|
|
'collaborationName' => 'conv_pkg.vhd',
|
355 |
|
|
'sourceFile' => 'hdl/conv_pkg.vhd',
|
356 |
|
|
'templateKeyValues' => {},
|
357 |
|
|
};
|
358 |
|
|
push(@$results, &SgDeliverFile::saveCollaborationInfo($instrs));
|
359 |
|
|
$instrs = {
|
360 |
|
|
'collaborationName' => 'synth_reg.vhd',
|
361 |
|
|
'sourceFile' => 'hdl/synth_reg.vhd',
|
362 |
|
|
'templateKeyValues' => {},
|
363 |
|
|
};
|
364 |
|
|
push(@$results, &SgDeliverFile::saveCollaborationInfo($instrs));
|
365 |
|
|
$instrs = {
|
366 |
|
|
'collaborationName' => 'synth_reg_w_init.vhd',
|
367 |
|
|
'sourceFile' => 'hdl/synth_reg_w_init.vhd',
|
368 |
|
|
'templateKeyValues' => {},
|
369 |
|
|
};
|
370 |
|
|
push(@$results, &SgDeliverFile::saveCollaborationInfo($instrs));
|
371 |
|
|
$instrs = {
|
372 |
|
|
'collaborationName' => 'xlpersistentdff.ngc',
|
373 |
|
|
'sourceFile' => 'hdl/xlpersistentdff.ngc',
|
374 |
|
|
'templateKeyValues' => {},
|
375 |
|
|
};
|
376 |
|
|
push(@$results, &SgDeliverFile::saveCollaborationInfo($instrs));
|
377 |
|
|
$instrs = {
|
378 |
|
|
'entity_declaration_hash' => '13366d021ddc9f5413827bc05cb9e24f',
|
379 |
|
|
'sourceFile' => 'hdl/xlmcode.vhd',
|
380 |
|
|
'templateKeyValues' => {
|
381 |
|
|
'crippled_architecture' => 'is
|
382 |
|
|
begin
|
383 |
|
|
op <= "1";
|
384 |
|
|
end',
|
385 |
|
|
'crippled_entity' => 'is
|
386 |
|
|
port (
|
387 |
|
|
op : out std_logic_vector((1 - 1) downto 0);
|
388 |
|
|
clk : in std_logic;
|
389 |
|
|
ce : in std_logic;
|
390 |
|
|
clr : in std_logic);
|
391 |
|
|
end',
|
392 |
|
|
'entity_name' => 'constant_6293007044',
|
393 |
|
|
},
|
394 |
|
|
};
|
395 |
|
|
push(@$results, &SgDeliverFile::deliverFile($instrs));
|
396 |
|
|
local *wrapup = $Sg::{'wrapup'};
|
397 |
|
|
push(@$results, &Sg::wrapup()) if (defined(&wrapup));
|
398 |
|
|
local *wrapup = $SgDeliverFile::{'wrapup'};
|
399 |
|
|
push(@$results, &SgDeliverFile::wrapup()) if (defined(&wrapup));
|
400 |
|
|
use Carp qw(croak);
|
401 |
|
|
$ENV{'SYSGEN'} = 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen';
|
402 |
|
|
open(RESULTS, '> C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/script_results997511115660607887') ||
|
403 |
|
|
croak 'couldn\'t open C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/script_results997511115660607887';
|
404 |
|
|
binmode(RESULTS);
|
405 |
|
|
print RESULTS &Sg::toString($results) . "\n";
|
406 |
|
|
close(RESULTS) ||
|
407 |
|
|
croak 'trouble writing C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/script_results997511115660607887';
|
408 |
|
|
};
|
409 |
|
|
|
410 |
|
|
if ($@) {
|
411 |
|
|
open(RESULTS, '> C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/script_results997511115660607887') ||
|
412 |
|
|
croak 'couldn\'t open C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/script_results997511115660607887';
|
413 |
|
|
binmode(RESULTS);
|
414 |
|
|
print RESULTS $@ . "\n";
|
415 |
|
|
close(RESULTS) ||
|
416 |
|
|
croak 'trouble writing C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/sysgen/script_results997511115660607887';
|
417 |
|
|
exit(1);
|
418 |
|
|
}
|
419 |
|
|
|
420 |
|
|
exit(0);
|