OpenCores
URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE12.3/] [MyUserLogic/] [top_level_0_PCIe_UserLogic_00_INOUT_LOGIC/] [sysgen/] [synopsis.2] - Blame information for rev 11

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Line No. Rev Author Line
1 11 barabba 
{
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fprintf(\'\',\'COMMENT: end icon graphics\');
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478 
    },
479 
    'constant5_op_net_x5' => {
480 
      'hdlType' => 'std_logic',
481 
      'width' => 1,
482 
    },
483 
    'constant5_op_net_x6' => {
484 
      'hdlType' => 'std_logic',
485 
      'width' => 1,
486 
    },
487 
    'constant5_op_net_x7' => {
488 
      'hdlType' => 'std_logic',
489 
      'width' => 1,
490 
    },
491 
    'constant5_op_net_x8' => {
492 
      'hdlType' => 'std_logic',
493 
      'width' => 1,
494 
    },
495 
    'constant5_op_net_x9' => {
496 
      'hdlType' => 'std_logic',
497 
      'width' => 1,
498 
    },
499 
    'debug_in_1i_net' => {
500 
      'hdlType' => 'std_logic_vector(31 downto 0)',
501 
      'width' => 32,
502 
    },
503 
    'debug_in_1i_net_x0' => {
504 
      'hdlType' => 'std_logic_vector(31 downto 0)',
505 
      'width' => 32,
506 
    },
507 
    'debug_in_2i_net' => {
508 
      'hdlType' => 'std_logic_vector(31 downto 0)',
509 
      'width' => 32,
510 
    },
511 
    'debug_in_2i_net_x0' => {
512 
      'hdlType' => 'std_logic_vector(31 downto 0)',
513 
      'width' => 32,
514 
    },
515 
    'debug_in_3i_net' => {
516 
      'hdlType' => 'std_logic_vector(31 downto 0)',
517 
      'width' => 32,
518 
    },
519 
    'debug_in_3i_net_x0' => {
520 
      'hdlType' => 'std_logic_vector(31 downto 0)',
521 
      'width' => 32,
522 
    },
523 
    'debug_in_4i_net' => {
524 
      'hdlType' => 'std_logic_vector(31 downto 0)',
525 
      'width' => 32,
526 
    },
527 
    'debug_in_4i_net_x0' => {
528 
      'hdlType' => 'std_logic_vector(31 downto 0)',
529 
      'width' => 32,
530 
    },
531 
    'dma_host2board_busy_net' => {
532 
      'hdlType' => 'std_logic',
533 
      'width' => 1,
534 
    },
535 
    'dma_host2board_busy_net_x0' => {
536 
      'hdlType' => 'std_logic',
537 
      'width' => 1,
538 
    },
539 
    'dma_host2board_done_net' => {
540 
      'hdlType' => 'std_logic',
541 
      'width' => 1,
542 
    },
543 
    'dma_host2board_done_net_x0' => {
544 
      'hdlType' => 'std_logic',
545 
      'width' => 1,
546 
    },
547 
    'from_register10_data_out_net' => {
548 
      'hdlType' => 'std_logic_vector(31 downto 0)',
549 
      'width' => 32,
550 
    },
551 
    'from_register10_data_out_net_x0' => {
552 
      'hdlType' => 'std_logic_vector(31 downto 0)',
553 
      'width' => 32,
554 
    },
555 
    'from_register11_data_out_net' => {
556 
      'hdlType' => 'std_logic_vector(31 downto 0)',
557 
      'width' => 32,
558 
    },
559 
    'from_register11_data_out_net_x0' => {
560 
      'hdlType' => 'std_logic_vector(31 downto 0)',
561 
      'width' => 32,
562 
    },
563 
    'from_register12_data_out_net' => {
564 
      'hdlType' => 'std_logic',
565 
      'width' => 1,
566 
    },
567 
    'from_register12_data_out_net_x0' => {
568 
      'hdlType' => 'std_logic',
569 
      'width' => 1,
570 
    },
571 
    'from_register13_data_out_net' => {
572 
      'hdlType' => 'std_logic_vector(31 downto 0)',
573 
      'width' => 32,
574 
    },
575 
    'from_register13_data_out_net_x0' => {
576 
      'hdlType' => 'std_logic_vector(31 downto 0)',
577 
      'width' => 32,
578 
    },
579 
    'from_register14_data_out_net' => {
580 
      'hdlType' => 'std_logic',
581 
      'width' => 1,
582 
    },
583 
    'from_register14_data_out_net_x0' => {
584 
      'hdlType' => 'std_logic',
585 
      'width' => 1,
586 
    },
587 
    'from_register15_data_out_net' => {
588 
      'hdlType' => 'std_logic_vector(31 downto 0)',
589 
      'width' => 32,
590 
    },
591 
    'from_register15_data_out_net_x0' => {
592 
      'hdlType' => 'std_logic_vector(31 downto 0)',
593 
      'width' => 32,
594 
    },
595 
    'from_register16_data_out_net' => {
596 
      'hdlType' => 'std_logic',
597 
      'width' => 1,
598 
    },
599 
    'from_register16_data_out_net_x0' => {
600 
      'hdlType' => 'std_logic',
601 
      'width' => 1,
602 
    },
603 
    'from_register17_data_out_net' => {
604 
      'hdlType' => 'std_logic_vector(31 downto 0)',
605 
      'width' => 32,
606 
    },
607 
    'from_register17_data_out_net_x0' => {
608 
      'hdlType' => 'std_logic_vector(31 downto 0)',
609 
      'width' => 32,
610 
    },
611 
    'from_register18_data_out_net' => {
612 
      'hdlType' => 'std_logic',
613 
      'width' => 1,
614 
    },
615 
    'from_register18_data_out_net_x0' => {
616 
      'hdlType' => 'std_logic',
617 
      'width' => 1,
618 
    },
619 
    'from_register19_data_out_net' => {
620 
      'hdlType' => 'std_logic_vector(31 downto 0)',
621 
      'width' => 32,
622 
    },
623 
    'from_register19_data_out_net_x0' => {
624 
      'hdlType' => 'std_logic_vector(31 downto 0)',
625 
      'width' => 32,
626 
    },
627 
    'from_register1_data_out_net' => {
628 
      'hdlType' => 'std_logic',
629 
      'width' => 1,
630 
    },
631 
    'from_register1_data_out_net_x0' => {
632 
      'hdlType' => 'std_logic',
633 
      'width' => 1,
634 
    },
635 
    'from_register20_data_out_net' => {
636 
      'hdlType' => 'std_logic',
637 
      'width' => 1,
638 
    },
639 
    'from_register20_data_out_net_x0' => {
640 
      'hdlType' => 'std_logic',
641 
      'width' => 1,
642 
    },
643 
    'from_register21_data_out_net' => {
644 
      'hdlType' => 'std_logic_vector(31 downto 0)',
645 
      'width' => 32,
646 
    },
647 
    'from_register21_data_out_net_x0' => {
648 
      'hdlType' => 'std_logic_vector(31 downto 0)',
649 
      'width' => 32,
650 
    },
651 
    'from_register22_data_out_net' => {
652 
      'hdlType' => 'std_logic',
653 
      'width' => 1,
654 
    },
655 
    'from_register22_data_out_net_x0' => {
656 
      'hdlType' => 'std_logic',
657 
      'width' => 1,
658 
    },
659 
    'from_register23_data_out_net' => {
660 
      'hdlType' => 'std_logic_vector(31 downto 0)',
661 
      'width' => 32,
662 
    },
663 
    'from_register23_data_out_net_x0' => {
664 
      'hdlType' => 'std_logic_vector(31 downto 0)',
665 
      'width' => 32,
666 
    },
667 
    'from_register24_data_out_net' => {
668 
      'hdlType' => 'std_logic',
669 
      'width' => 1,
670 
    },
671 
    'from_register24_data_out_net_x0' => {
672 
      'hdlType' => 'std_logic',
673 
      'width' => 1,
674 
    },
675 
    'from_register25_data_out_net' => {
676 
      'hdlType' => 'std_logic_vector(31 downto 0)',
677 
      'width' => 32,
678 
    },
679 
    'from_register25_data_out_net_x0' => {
680 
      'hdlType' => 'std_logic_vector(31 downto 0)',
681 
      'width' => 32,
682 
    },
683 
    'from_register26_data_out_net' => {
684 
      'hdlType' => 'std_logic',
685 
      'width' => 1,
686 
    },
687 
    'from_register26_data_out_net_x0' => {
688 
      'hdlType' => 'std_logic',
689 
      'width' => 1,
690 
    },
691 
    'from_register27_data_out_net' => {
692 
      'hdlType' => 'std_logic_vector(31 downto 0)',
693 
      'width' => 32,
694 
    },
695 
    'from_register27_data_out_net_x0' => {
696 
      'hdlType' => 'std_logic_vector(31 downto 0)',
697 
      'width' => 32,
698 
    },
699 
    'from_register28_data_out_net' => {
700 
      'hdlType' => 'std_logic',
701 
      'width' => 1,
702 
    },
703 
    'from_register28_data_out_net_x0' => {
704 
      'hdlType' => 'std_logic',
705 
      'width' => 1,
706 
    },
707 
    'from_register2_data_out_net' => {
708 
      'hdlType' => 'std_logic',
709 
      'width' => 1,
710 
    },
711 
    'from_register2_data_out_net_x0' => {
712 
      'hdlType' => 'std_logic',
713 
      'width' => 1,
714 
    },
715 
    'from_register3_data_out_net' => {
716 
      'hdlType' => 'std_logic_vector(31 downto 0)',
717 
      'width' => 32,
718 
    },
719 
    'from_register3_data_out_net_x0' => {
720 
      'hdlType' => 'std_logic_vector(31 downto 0)',
721 
      'width' => 32,
722 
    },
723 
    'from_register4_data_out_net' => {
724 
      'hdlType' => 'std_logic',
725 
      'width' => 1,
726 
    },
727 
    'from_register4_data_out_net_x0' => {
728 
      'hdlType' => 'std_logic',
729 
      'width' => 1,
730 
    },
731 
    'from_register5_data_out_net' => {
732 
      'hdlType' => 'std_logic_vector(31 downto 0)',
733 
      'width' => 32,
734 
    },
735 
    'from_register5_data_out_net_x0' => {
736 
      'hdlType' => 'std_logic_vector(31 downto 0)',
737 
      'width' => 32,
738 
    },
739 
    'from_register6_data_out_net' => {
740 
      'hdlType' => 'std_logic',
741 
      'width' => 1,
742 
    },
743 
    'from_register6_data_out_net_x0' => {
744 
      'hdlType' => 'std_logic',
745 
      'width' => 1,
746 
    },
747 
    'from_register7_data_out_net' => {
748 
      'hdlType' => 'std_logic_vector(31 downto 0)',
749 
      'width' => 32,
750 
    },
751 
    'from_register7_data_out_net_x0' => {
752 
      'hdlType' => 'std_logic_vector(31 downto 0)',
753 
      'width' => 32,
754 
    },
755 
    'from_register8_data_out_net' => {
756 
      'hdlType' => 'std_logic_vector(31 downto 0)',
757 
      'width' => 32,
758 
    },
759 
    'from_register8_data_out_net_x0' => {
760 
      'hdlType' => 'std_logic_vector(31 downto 0)',
761 
      'width' => 32,
762 
    },
763 
    'from_register9_data_out_net' => {
764 
      'hdlType' => 'std_logic',
765 
      'width' => 1,
766 
    },
767 
    'from_register9_data_out_net_x0' => {
768 
      'hdlType' => 'std_logic',
769 
      'width' => 1,
770 
    },
771 
    'reg01_td_net' => {
772 
      'hdlType' => 'std_logic_vector(31 downto 0)',
773 
      'width' => 32,
774 
    },
775 
    'reg01_td_net_x0' => {
776 
      'hdlType' => 'std_logic_vector(31 downto 0)',
777 
      'width' => 32,
778 
    },
779 
    'reg01_tv_net' => {
780 
      'hdlType' => 'std_logic',
781 
      'width' => 1,
782 
    },
783 
    'reg01_tv_net_x0' => {
784 
      'hdlType' => 'std_logic',
785 
      'width' => 1,
786 
    },
787 
    'reg02_td_net' => {
788 
      'hdlType' => 'std_logic_vector(31 downto 0)',
789 
      'width' => 32,
790 
    },
791 
    'reg02_td_net_x0' => {
792 
      'hdlType' => 'std_logic_vector(31 downto 0)',
793 
      'width' => 32,
794 
    },
795 
    'reg02_tv_net' => {
796 
      'hdlType' => 'std_logic',
797 
      'width' => 1,
798 
    },
799 
    'reg02_tv_net_x0' => {
800 
      'hdlType' => 'std_logic',
801 
      'width' => 1,
802 
    },
803 
    'reg03_td_net' => {
804 
      'hdlType' => 'std_logic_vector(31 downto 0)',
805 
      'width' => 32,
806 
    },
807 
    'reg03_td_net_x0' => {
808 
      'hdlType' => 'std_logic_vector(31 downto 0)',
809 
      'width' => 32,
810 
    },
811 
    'reg03_tv_net' => {
812 
      'hdlType' => 'std_logic',
813 
      'width' => 1,
814 
    },
815 
    'reg03_tv_net_x0' => {
816 
      'hdlType' => 'std_logic',
817 
      'width' => 1,
818 
    },
819 
    'reg04_td_net' => {
820 
      'hdlType' => 'std_logic_vector(31 downto 0)',
821 
      'width' => 32,
822 
    },
823 
    'reg04_td_net_x0' => {
824 
      'hdlType' => 'std_logic_vector(31 downto 0)',
825 
      'width' => 32,
826 
    },
827 
    'reg04_tv_net' => {
828 
      'hdlType' => 'std_logic',
829 
      'width' => 1,
830 
    },
831 
    'reg04_tv_net_x0' => {
832 
      'hdlType' => 'std_logic',
833 
      'width' => 1,
834 
    },
835 
    'reg05_td_net' => {
836 
      'hdlType' => 'std_logic_vector(31 downto 0)',
837 
      'width' => 32,
838 
    },
839 
    'reg05_td_net_x0' => {
840 
      'hdlType' => 'std_logic_vector(31 downto 0)',
841 
      'width' => 32,
842 
    },
843 
    'reg05_tv_net' => {
844 
      'hdlType' => 'std_logic',
845 
      'width' => 1,
846 
    },
847 
    'reg05_tv_net_x0' => {
848 
      'hdlType' => 'std_logic',
849 
      'width' => 1,
850 
    },
851 
    'reg06_td_net' => {
852 
      'hdlType' => 'std_logic_vector(31 downto 0)',
853 
      'width' => 32,
854 
    },
855 
    'reg06_td_net_x0' => {
856 
      'hdlType' => 'std_logic_vector(31 downto 0)',
857 
      'width' => 32,
858 
    },
859 
    'reg06_tv_net' => {
860 
      'hdlType' => 'std_logic',
861 
      'width' => 1,
862 
    },
863 
    'reg06_tv_net_x0' => {
864 
      'hdlType' => 'std_logic',
865 
      'width' => 1,
866 
    },
867 
    'reg07_td_net' => {
868 
      'hdlType' => 'std_logic_vector(31 downto 0)',
869 
      'width' => 32,
870 
    },
871 
    'reg07_td_net_x0' => {
872 
      'hdlType' => 'std_logic_vector(31 downto 0)',
873 
      'width' => 32,
874 
    },
875 
    'reg07_tv_net' => {
876 
      'hdlType' => 'std_logic',
877 
      'width' => 1,
878 
    },
879 
    'reg07_tv_net_x0' => {
880 
      'hdlType' => 'std_logic',
881 
      'width' => 1,
882 
    },
883 
    'reg08_td_net' => {
884 
      'hdlType' => 'std_logic_vector(31 downto 0)',
885 
      'width' => 32,
886 
    },
887 
    'reg08_td_net_x0' => {
888 
      'hdlType' => 'std_logic_vector(31 downto 0)',
889 
      'width' => 32,
890 
    },
891 
    'reg08_tv_net' => {
892 
      'hdlType' => 'std_logic',
893 
      'width' => 1,
894 
    },
895 
    'reg08_tv_net_x0' => {
896 
      'hdlType' => 'std_logic',
897 
      'width' => 1,
898 
    },
899 
    'reg09_td_net' => {
900 
      'hdlType' => 'std_logic_vector(31 downto 0)',
901 
      'width' => 32,
902 
    },
903 
    'reg09_td_net_x0' => {
904 
      'hdlType' => 'std_logic_vector(31 downto 0)',
905 
      'width' => 32,
906 
    },
907 
    'reg09_tv_net' => {
908 
      'hdlType' => 'std_logic',
909 
      'width' => 1,
910 
    },
911 
    'reg09_tv_net_x0' => {
912 
      'hdlType' => 'std_logic',
913 
      'width' => 1,
914 
    },
915 
    'reg10_td_net' => {
916 
      'hdlType' => 'std_logic_vector(31 downto 0)',
917 
      'width' => 32,
918 
    },
919 
    'reg10_td_net_x0' => {
920 
      'hdlType' => 'std_logic_vector(31 downto 0)',
921 
      'width' => 32,
922 
    },
923 
    'reg10_tv_net' => {
924 
      'hdlType' => 'std_logic',
925 
      'width' => 1,
926 
    },
927 
    'reg10_tv_net_x0' => {
928 
      'hdlType' => 'std_logic',
929 
      'width' => 1,
930 
    },
931 
    'reg11_td_net' => {
932 
      'hdlType' => 'std_logic_vector(31 downto 0)',
933 
      'width' => 32,
934 
    },
935 
    'reg11_td_net_x0' => {
936 
      'hdlType' => 'std_logic_vector(31 downto 0)',
937 
      'width' => 32,
938 
    },
939 
    'reg11_tv_net' => {
940 
      'hdlType' => 'std_logic',
941 
      'width' => 1,
942 
    },
943 
    'reg11_tv_net_x0' => {
944 
      'hdlType' => 'std_logic',
945 
      'width' => 1,
946 
    },
947 
    'reg12_td_net' => {
948 
      'hdlType' => 'std_logic_vector(31 downto 0)',
949 
      'width' => 32,
950 
    },
951 
    'reg12_td_net_x0' => {
952 
      'hdlType' => 'std_logic_vector(31 downto 0)',
953 
      'width' => 32,
954 
    },
955 
    'reg12_tv_net' => {
956 
      'hdlType' => 'std_logic',
957 
      'width' => 1,
958 
    },
959 
    'reg12_tv_net_x0' => {
960 
      'hdlType' => 'std_logic',
961 
      'width' => 1,
962 
    },
963 
    'reg13_td_net' => {
964 
      'hdlType' => 'std_logic_vector(31 downto 0)',
965 
      'width' => 32,
966 
    },
967 
    'reg13_td_net_x0' => {
968 
      'hdlType' => 'std_logic_vector(31 downto 0)',
969 
      'width' => 32,
970 
    },
971 
    'reg13_tv_net' => {
972 
      'hdlType' => 'std_logic',
973 
      'width' => 1,
974 
    },
975 
    'reg13_tv_net_x0' => {
976 
      'hdlType' => 'std_logic',
977 
      'width' => 1,
978 
    },
979 
    'reg14_td_net' => {
980 
      'hdlType' => 'std_logic_vector(31 downto 0)',
981 
      'width' => 32,
982 
    },
983 
    'reg14_td_net_x0' => {
984 
      'hdlType' => 'std_logic_vector(31 downto 0)',
985 
      'width' => 32,
986 
    },
987 
    'reg14_tv_net' => {
988 
      'hdlType' => 'std_logic',
989 
      'width' => 1,
990 
    },
991 
    'reg14_tv_net_x0' => {
992 
      'hdlType' => 'std_logic',
993 
      'width' => 1,
994 
    },
995 
    'to_register10_dout_net' => {
996 
      'hdlType' => 'std_logic',
997 
      'width' => 1,
998 
    },
999 
    'to_register11_dout_net' => {
1000 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1001 
      'width' => 32,
1002 
    },
1003 
    'to_register12_dout_net' => {
1004 
      'hdlType' => 'std_logic',
1005 
      'width' => 1,
1006 
    },
1007 
    'to_register13_dout_net' => {
1008 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1009 
      'width' => 32,
1010 
    },
1011 
    'to_register14_dout_net' => {
1012 
      'hdlType' => 'std_logic',
1013 
      'width' => 1,
1014 
    },
1015 
    'to_register15_dout_net' => {
1016 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1017 
      'width' => 32,
1018 
    },
1019 
    'to_register16_dout_net' => {
1020 
      'hdlType' => 'std_logic',
1021 
      'width' => 1,
1022 
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2942 
        'data_out_x5' => 'from_register15_data_out_net',
2943 
        'data_out_x6' => 'from_register16_data_out_net',
2944 
        'data_out_x7' => 'from_register17_data_out_net',
2945 
        'data_out_x8' => 'from_register18_data_out_net',
2946 
        'data_out_x9' => 'from_register19_data_out_net',
2947 
        'debug_in_1i' => 'debug_in_1i_net',
2948 
        'debug_in_2i' => 'debug_in_2i_net',
2949 
        'debug_in_3i' => 'debug_in_3i_net',
2950 
        'debug_in_4i' => 'debug_in_4i_net',
2951 
        'dma_host2board_busy' => 'dma_host2board_busy_net',
2952 
        'dma_host2board_done' => 'dma_host2board_done_net',
2953 
        'en' => 'constant5_op_net_x0',
2954 
        'en_x0' => 'constant5_op_net_x1',
2955 
        'en_x1' => 'constant5_op_net_x2',
2956 
        'en_x10' => 'constant5_op_net_x11',
2957 
        'en_x11' => 'constant5_op_net_x12',
2958 
        'en_x12' => 'constant1_op_net_x0',
2959 
        'en_x13' => 'constant1_op_net_x1',
2960 
        'en_x14' => 'constant1_op_net_x2',
2961 
        'en_x15' => 'constant1_op_net_x3',
2962 
        'en_x16' => 'constant1_op_net_x4',
2963 
        'en_x17' => 'constant1_op_net_x5',
2964 
        'en_x18' => 'constant1_op_net_x6',
2965 
        'en_x19' => 'constant1_op_net_x7',
2966 
        'en_x2' => 'constant5_op_net_x3',
2967 
        'en_x20' => 'constant1_op_net_x8',
2968 
        'en_x21' => 'constant5_op_net_x13',
2969 
        'en_x22' => 'constant1_op_net_x9',
2970 
        'en_x23' => 'constant1_op_net_x10',
2971 
        'en_x24' => 'constant1_op_net_x11',
2972 
        'en_x25' => 'constant1_op_net_x12',
2973 
        'en_x26' => 'constant1_op_net_x13',
2974 
        'en_x27' => 'constant5_op_net_x14',
2975 
        'en_x28' => 'constant5_op_net_x15',
2976 
        'en_x29' => 'constant5_op_net_x16',
2977 
        'en_x3' => 'constant5_op_net_x4',
2978 
        'en_x30' => 'constant5_op_net_x17',
2979 
        'en_x31' => 'constant5_op_net_x18',
2980 
        'en_x32' => 'constant5_op_net_x19',
2981 
        'en_x4' => 'constant5_op_net_x5',
2982 
        'en_x5' => 'constant5_op_net_x6',
2983 
        'en_x6' => 'constant5_op_net_x7',
2984 
        'en_x7' => 'constant5_op_net_x8',
2985 
        'en_x8' => 'constant5_op_net_x9',
2986 
        'en_x9' => 'constant5_op_net_x10',
2987 
        'reg01_rd' => 'from_register3_data_out_net_x0',
2988 
        'reg01_rv' => 'from_register1_data_out_net_x0',
2989 
        'reg01_td' => 'reg01_td_net',
2990 
        'reg01_tv' => 'reg01_tv_net',
2991 
        'reg02_rd' => 'from_register5_data_out_net_x0',
2992 
        'reg02_rv' => 'from_register2_data_out_net_x0',
2993 
        'reg02_td' => 'reg02_td_net',
2994 
        'reg02_tv' => 'reg02_tv_net',
2995 
        'reg03_rd' => 'from_register7_data_out_net_x0',
2996 
        'reg03_rv' => 'from_register6_data_out_net_x0',
2997 
        'reg03_td' => 'reg03_td_net',
2998 
        'reg03_tv' => 'reg03_tv_net',
2999 
        'reg04_rd' => 'from_register8_data_out_net_x0',
3000 
        'reg04_rv' => 'from_register4_data_out_net_x0',
3001 
        'reg04_td' => 'reg04_td_net',
3002 
        'reg04_tv' => 'reg04_tv_net',
3003 
        'reg05_rd' => 'from_register10_data_out_net_x0',
3004 
        'reg05_rv' => 'from_register9_data_out_net_x0',
3005 
        'reg05_td' => 'reg05_td_net',
3006 
        'reg05_tv' => 'reg05_tv_net',
3007 
        'reg06_rd' => 'from_register11_data_out_net_x0',
3008 
        'reg06_rv' => 'from_register12_data_out_net_x0',
3009 
        'reg06_td' => 'reg06_td_net',
3010 
        'reg06_tv' => 'reg06_tv_net',
3011 
        'reg07_rd' => 'from_register13_data_out_net_x0',
3012 
        'reg07_rv' => 'from_register14_data_out_net_x0',
3013 
        'reg07_td' => 'reg07_td_net',
3014 
        'reg07_tv' => 'reg07_tv_net',
3015 
        'reg08_rd' => 'from_register15_data_out_net_x0',
3016 
        'reg08_rv' => 'from_register16_data_out_net_x0',
3017 
        'reg08_td' => 'reg08_td_net',
3018 
        'reg08_tv' => 'reg08_tv_net',
3019 
        'reg09_rd' => 'from_register17_data_out_net_x0',
3020 
        'reg09_rv' => 'from_register18_data_out_net_x0',
3021 
        'reg09_td' => 'reg09_td_net',
3022 
        'reg09_tv' => 'reg09_tv_net',
3023 
        'reg10_rd' => 'from_register19_data_out_net_x0',
3024 
        'reg10_rv' => 'from_register20_data_out_net_x0',
3025 
        'reg10_td' => 'reg10_td_net',
3026 
        'reg10_tv' => 'reg10_tv_net',
3027 
        'reg11_rd' => 'from_register21_data_out_net_x0',
3028 
        'reg11_rv' => 'from_register22_data_out_net_x0',
3029 
        'reg11_td' => 'reg11_td_net',
3030 
        'reg11_tv' => 'reg11_tv_net',
3031 
        'reg12_rd' => 'from_register23_data_out_net_x0',
3032 
        'reg12_rv' => 'from_register24_data_out_net_x0',
3033 
        'reg12_td' => 'reg12_td_net',
3034 
        'reg12_tv' => 'reg12_tv_net',
3035 
        'reg13_rd' => 'from_register25_data_out_net_x0',
3036 
        'reg13_rv' => 'from_register26_data_out_net_x0',
3037 
        'reg13_td' => 'reg13_td_net',
3038 
        'reg13_tv' => 'reg13_tv_net',
3039 
        'reg14_rd' => 'from_register27_data_out_net_x0',
3040 
        'reg14_rv' => 'from_register28_data_out_net_x0',
3041 
        'reg14_td' => 'reg14_td_net',
3042 
        'reg14_tv' => 'reg14_tv_net',
3043 
      },
3044 
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3045 
        'attributes' => {
3046 
          'entityAlreadyNetlisted' => 1,
3047 
          'hdlKind' => 'vhdl',
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          'isDesign' => 1,
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        },
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          'simulinkName' => 'PCIe_UserLogic_00/INOUT_LOGIC/To Register9',
11696 
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11697 
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11698 
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11699 
          'ce' => {
11700 
            'attributes' => {
11701 
              'domain' => '',
11702 
              'group' => 1,
11703 
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11704 
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11705 
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11706 
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11707 
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11708 
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11709 
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11710 
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11711 
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11712 
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11713 
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11714 
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11715 
              'group' => 1,
11716 
              'isClk' => 1,
11717 
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11718 
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11719 
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11720 
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11721 
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11722 
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11723 
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11724 
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11725 
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11726 
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11727 
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11728 
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11729 
              'isClr' => 1,
11730 
              'is_floating_block' => 1,
11731 
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11732 
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11733 
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11734 
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11735 
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11736 
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11737 
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11738 
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11739 
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11740 
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11741 
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11742 
              'is_floating_block' => 1,
11743 
              'must_be_hdl_vector' => 1,
11744 
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11745 
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11746 
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11747 
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11748 
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11749 
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11750 
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11751 
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11752 
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11753 
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11754 
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11755 
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11756 
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11757 
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11758 
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11759 
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11760 
              'simulinkName' => 'PCIe_UserLogic_00/INOUT_LOGIC/To Register9/dout',
11761 
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11762 
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11763 
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11764 
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11765 
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11766 
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11767 
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11768 
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11769 
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11770 
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11771 
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11772 
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11773 
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11774 
              'simulinkName' => 'PCIe_UserLogic_00/INOUT_LOGIC/To Register9/en',
11775 
              'type' => 'Bool',
11776 
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11777 
            'direction' => 'in',
11778 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11779 
            'width' => 1,
11780 
          },
11781 
        },
11782 
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11783 
      'entityName' => 'x_x32',
11784 
    },
11785 
  },
11786 
}

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