OpenCores
URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE12.3/] [MyUserLogic/] [top_level_1_PCIe_UserLogic_00_USER_LOGIC/] [synopsis] - Blame information for rev 11

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Line No. Rev Author Line
1 11 barabba 
{
2 
  'attributes' => {
3 
    'HDLCodeGenStatus' => 0,
4 
    'HDL_PATH' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen',
5 
    'Impl_file' => 'ISE Defaults',
6 
    'Impl_file_sgadvanced' => '',
7 
    'Synth_file' => 'XST Defaults',
8 
    'Synth_file_sgadvanced' => '',
9 
    'TEMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
10 
    'TMP' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
11 
    'Temp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
12 
    'Tmp' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
13 
    'base_system_period_hardware' => 5,
14 
    'base_system_period_simulink' => '5e-009',
15 
    'block_icon_display' => 'Default',
16 
    'block_type' => 'sysgen',
17 
    'block_version' => '',
18 
    'ce_clr' => 0,
19 
    'clkWrapper' => 'user_logic_cw',
20 
    'clkWrapperFile' => 'user_logic_cw.vhd',
21 
    'clock_loc' => '',
22 
    'clock_wrapper' => 'Clock Enables',
23 
    'clock_wrapper_sgadvanced' => '',
24 
    'compilation' => 'NGC Netlist',
25 
    'compilation_lut' => {
26 
      'keys' => [
27 
        'HDL Netlist',
28 
        'Bitstream',
29 
        'NGC Netlist',
30 
      ],
31 
      'values' => [
32 
        'target1',
33 
        'target2',
34 
        'target3',
35 
      ],
36 
    },
37 
    'compilation_target' => 'NGC Netlist',
38 
    'core_generation' => 1,
39 
    'core_generation_sgadvanced' => '',
40 
    'core_is_deployed' => 0,
41 
    'coregen_core_generation_tmpdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root/cg_wk/c03f93279696b19bd',
42 
    'coregen_part_family' => 'virtex6',
43 
    'createTestbench' => 0,
44 
    'create_interface_document' => 'off',
45 
    'dbl_ovrd' => -1,
46 
    'dbl_ovrd_sgadvanced' => '',
47 
    'dcm_info' => {
48 
    },
49 
    'dcm_input_clock_period' => 5,
50 
    'deprecated_control' => 'off',
51 
    'deprecated_control_sgadvanced' => '',
52 
    'design' => 'user_logic',
53 
    'designFile' => 'user_logic.vhd',
54 
    'design_full_path' => 'C:\\Temp\\Xilinx PCI Express\\pcie-v6-ml605_ISE12_OpenCores\\MySysGen\\PCIe_UserLogic_00.mdl',
55 
    'device' => 'xc6vlx240t-3ff784',
56 
    'device_speed' => -3,
57 
    'directory' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
58 
    'dsp_cache_root_path' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
59 
    'entityNamingInstrs' => {
60 
      'nameMap' => undef,
61 
      'namesAlreadyUsed' => {
62 
        'default_clock_driver' => 1,
63 
        'user_logic_cw' => 1,
64 
      },
65 
    },
66 
    'eval_field' => 0,
67 
    'fileAttributes' => {
68 
      'cntr_11_0_1a411d6ef586e892.ngc' => {
69 
        'producer' => 'coregen',
70 
      },
71 
    },
72 
    'files' => [
73 
      'cntr_11_0_1a411d6ef586e892.ngc',
74 
      'xlpersistentdff.ngc',
75 
      'synopsis',
76 
      'user_logic.vhd',
77 
      'xlpersistentdff.ngc',
78 
      'user_logic_cw.vhd',
79 
      'user_logic_cw.ucf',
80 
      'user_logic_cw.xcf',
81 
      'user_logic_cw.sdc',
82 
      'xst_user_logic.prj',
83 
      'xst_user_logic.scr',
84 
      'vcom.do',
85 
      'isim_user_logic.prj',
86 
      'globals',
87 
      'hdlFiles',
88 
      'user_logic_cw.xise',
89 
      'user_logic_cw.gise',
90 
      'user_logic_cw.sgp',
91 
    ],
92 
    'fxdptinstalled' => 1,
93 
    'generateUsing71FrontEnd' => 1,
94 
    'generating_island_subsystem_handle' => 261.0009765625,
95 
    'generating_subsystem_handle' => 261.0009765625,
96 
    'generation_directory' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
97 
    'has_advanced_control' => 0,
98 
    'hdlDir' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen/hdl',
99 
    'hdlKind' => 'vhdl',
100 
    'hdl_path' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen',
101 
    'impl_file' => 'ISE Defaults*',
102 
    'incr_netlist' => 'off',
103 
    'incr_netlist_sgadvanced' => '',
104 
    'infoedit' => ' System Generator',
105 
    'isdeployed' => 0,
106 
    'ise_version' => '12.3i',
107 
    'master_sysgen_token_handle' => 262.0009765625,
108 
    'matlab' => 'C:/Programmi/MATLAB/R2010a',
109 
    'matlab_fixedpoint' => 1,
110 
    'mdlHandle' => 3.0009765625,
111 
    'mdlPath' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen/PCIe_UserLogic_00.mdl',
112 
    'modelDiagnostics' => [
113 
      {
114 
        'count' => 339,
115 
        'isMask' => 0,
116 
        'type' => 'PCIe_UserLogic_00 Total blocks',
117 
      },
118 
      {
119 
        'count' => 4,
120 
        'isMask' => 0,
121 
        'type' => 'DiscretePulseGenerator',
122 
      },
123 
      {
124 
        'count' => 327,
125 
        'isMask' => 0,
126 
        'type' => 'S-Function',
127 
      },
128 
      {
129 
        'count' => 4,
130 
        'isMask' => 0,
131 
        'type' => 'SubSystem',
132 
      },
133 
      {
134 
        'count' => 4,
135 
        'isMask' => 0,
136 
        'type' => 'Terminator',
137 
      },
138 
      {
139 
        'count' => 23,
140 
        'isMask' => 1,
141 
        'type' => 'Xilinx Constant Block Block',
142 
      },
143 
      {
144 
        'count' => 1,
145 
        'isMask' => 1,
146 
        'type' => 'Xilinx Counter Block',
147 
      },
148 
      {
149 
        'count' => 44,
150 
        'isMask' => 1,
151 
        'type' => 'Xilinx Gateway In Block',
152 
      },
153 
      {
154 
        'count' => 39,
155 
        'isMask' => 1,
156 
        'type' => 'Xilinx Gateway Out Block',
157 
      },
158 
      {
159 
        'count' => 2,
160 
        'isMask' => 1,
161 
        'type' => 'Xilinx Inverter Block',
162 
      },
163 
      {
164 
        'count' => 1,
165 
        'isMask' => 1,
166 
        'type' => 'Xilinx Logical Block Block',
167 
      },
168 
      {
169 
        'count' => 78,
170 
        'isMask' => 1,
171 
        'type' => 'Xilinx Register Block',
172 
      },
173 
      {
174 
        'count' => 62,
175 
        'isMask' => 1,
176 
        'type' => 'Xilinx Shared Memory Based From Register Block',
177 
      },
178 
      {
179 
        'count' => 62,
180 
        'isMask' => 1,
181 
        'type' => 'Xilinx Shared Memory Based To Register Block',
182 
      },
183 
      {
184 
        'count' => 1,
185 
        'isMask' => 1,
186 
        'type' => 'Xilinx Subsystem Generator Block',
187 
      },
188 
      {
189 
        'count' => 2,
190 
        'isMask' => 1,
191 
        'type' => 'Xilinx System Generator Block',
192 
      },
193 
      {
194 
        'count' => 14,
195 
        'isMask' => 1,
196 
        'type' => 'Xilinx Type Converter Block',
197 
      },
198 
    ],
199 
    'model_globals_initialized' => 1,
200 
    'model_path' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MySysGen/PCIe_UserLogic_00.mdl',
201 
    'myxilinx' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE',
202 
    'netlistingWrapupScript' => 'java:com.xilinx.sysgen.netlister.DefaultWrapupNetlister',
203 
    'ngc_config' => {
204 
      'include_cf' => 1,
205 
      'include_clockwrapper' => 1,
206 
    },
207 
    'ngc_files' => [
208 
      'xlpersistentdff.ngc',
209 
    ],
210 
    'num_sim_cycles' => 2000000000,
211 
    'package' => 'ff784',
212 
    'part' => 'xc6vlx240t',
213 
    'partFamily' => 'virtex6',
214 
    'port_data_types_enabled' => 1,
215 
    'postgeneration_fcn' => 'xlNGCPostGeneration',
216 
    'preserve_hierarchy' => 0,
217 
    'proj_type' => 'Project Navigator',
218 
    'proj_type_sgadvanced' => '',
219 
    'run_coregen' => 'off',
220 
    'run_coregen_sgadvanced' => '',
221 
    'sample_time_colors_enabled' => 1,
222 
    'sampletimecolors' => 1,
223 
    'sdcFile' => 'user_logic_cw.sdc',
224 
    'settings_fcn' => 'xlngcsettings',
225 
    'sg_blockgui_xml' => '',
226 
    'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
227 
    'sg_list_contents' => '',
228 
    'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
229 
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
230 
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
231 
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
232 
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
233 
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
234 
fprintf(\'\',\'COMMENT: end icon graphics\');
235 
fprintf(\'\',\'COMMENT: begin icon text\');
236 
fprintf(\'\',\'COMMENT: end icon text\');',
237 
    'sg_version' => '',
238 
    'sggui_pos' => '-1,-1,-1,-1',
239 
    'simulation_island_subsystem_handle' => 261.0009765625,
240 
    'simulinkName' => 'parking_lot',
241 
    'simulink_accelerator_running' => 0,
242 
    'simulink_debugger_running' => 0,
243 
    'simulink_period' => '5e-009',
244 
    'speed' => -3,
245 
    'synth_file' => 'XST Defaults*',
246 
    'synthesisTool' => 'XST',
247 
    'synthesis_language' => 'vhdl',
248 
    'synthesis_tool' => 'XST',
249 
    'synthesis_tool_sgadvanced' => '',
250 
    'sysclk_period' => 5,
251 
    'sysgen' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen',
252 
    'sysgenRoot' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen',
253 
    'sysgenTokenSettings' => {
254 
      'Impl_file' => 'ISE Defaults',
255 
      'Impl_file_sgadvanced' => '',
256 
      'Synth_file' => 'XST Defaults',
257 
      'Synth_file_sgadvanced' => '',
258 
      'base_system_period_hardware' => 5,
259 
      'base_system_period_simulink' => '5e-009',
260 
      'block_icon_display' => 'Default',
261 
      'block_type' => 'sysgen',
262 
      'block_version' => '',
263 
      'ce_clr' => 0,
264 
      'clock_loc' => '',
265 
      'clock_wrapper' => 'Clock Enables',
266 
      'clock_wrapper_sgadvanced' => '',
267 
      'compilation' => 'NGC Netlist',
268 
      'compilation_lut' => {
269 
        'keys' => [
270 
          'HDL Netlist',
271 
          'Bitstream',
272 
          'NGC Netlist',
273 
        ],
274 
        'values' => [
275 
          'target1',
276 
          'target2',
277 
          'target3',
278 
        ],
279 
      },
280 
      'core_generation' => 1,
281 
      'core_generation_sgadvanced' => '',
282 
      'coregen_part_family' => 'virtex6',
283 
      'create_interface_document' => 'off',
284 
      'dbl_ovrd' => -1,
285 
      'dbl_ovrd_sgadvanced' => '',
286 
      'dcm_input_clock_period' => 5,
287 
      'deprecated_control' => 'off',
288 
      'deprecated_control_sgadvanced' => '',
289 
      'directory' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_1_PCIe_UserLogic_00_USER_LOGIC',
290 
      'eval_field' => 0,
291 
      'has_advanced_control' => 0,
292 
      'impl_file' => 'ISE Defaults*',
293 
      'incr_netlist' => 'off',
294 
      'incr_netlist_sgadvanced' => '',
295 
      'infoedit' => ' System Generator',
296 
      'master_sysgen_token_handle' => 262.0009765625,
297 
      'ngc_config' => {
298 
        'include_cf' => 1,
299 
        'include_clockwrapper' => 1,
300 
      },
301 
      'package' => 'ff784',
302 
      'part' => 'xc6vlx240t',
303 
      'postgeneration_fcn' => 'xlNGCPostGeneration',
304 
      'preserve_hierarchy' => 0,
305 
      'proj_type' => 'Project Navigator',
306 
      'proj_type_sgadvanced' => '',
307 
      'run_coregen' => 'off',
308 
      'run_coregen_sgadvanced' => '',
309 
      'settings_fcn' => 'xlngcsettings',
310 
      'sg_blockgui_xml' => '',
311 
      'sg_icon_stat' => '50,50,-1,-1,token,white,0,07734,right,,[ ],[ ]',
312 
      'sg_list_contents' => '',
313 
      'sg_mask_display' => 'fprintf(\'\',\'COMMENT: begin icon graphics\');
314 
patch([0 50 50 0 0 ],[0 0 50 50 0 ],[1 1 1 ]);
315 
patch([1.6375 16.81 27.31 37.81 48.31 27.31 12.1375 1.6375 ],[36.655 36.655 47.155 36.655 47.155 47.155 47.155 36.655 ],[0.933333 0.203922 0.141176 ]);
316 
patch([12.1375 27.31 16.81 1.6375 12.1375 ],[26.155 26.155 36.655 36.655 26.155 ],[0.698039 0.0313725 0.219608 ]);
317 
patch([1.6375 16.81 27.31 12.1375 1.6375 ],[15.655 15.655 26.155 26.155 15.655 ],[0.933333 0.203922 0.141176 ]);
318 
patch([12.1375 48.31 37.81 27.31 16.81 1.6375 12.1375 ],[5.155 5.155 15.655 5.155 15.655 15.655 5.155 ],[0.698039 0.0313725 0.219608 ]);
319 
fprintf(\'\',\'COMMENT: end icon graphics\');
320 
fprintf(\'\',\'COMMENT: begin icon text\');
321 
fprintf(\'\',\'COMMENT: end icon text\');',
322 
      'sggui_pos' => '-1,-1,-1,-1',
323 
      'simulation_island_subsystem_handle' => 261.0009765625,
324 
      'simulink_period' => '5e-009',
325 
      'speed' => -3,
326 
      'synth_file' => 'XST Defaults*',
327 
      'synthesis_language' => 'vhdl',
328 
      'synthesis_tool' => 'XST',
329 
      'synthesis_tool_sgadvanced' => '',
330 
      'sysclk_period' => 5,
331 
      'testbench' => 0,
332 
      'testbench_sgadvanced' => '',
333 
      'trim_vbits' => 1,
334 
      'trim_vbits_sgadvanced' => '',
335 
      'xilinx_device' => 'xc6vlx240t-3ff784',
336 
      'xilinxfamily' => 'virtex6',
337 
    },
338 
    'sysgen_Root' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE/sysgen',
339 
    'systemClockPeriod' => 5,
340 
    'tempdir' => 'C:/DOCUME~1/root/IMPOST~1/Temp',
341 
    'testbench' => 0,
342 
    'testbench_sgadvanced' => '',
343 
    'tmpDir' => 'C:/Temp/Xilinx PCI Express/pcie-v6-ml605_ISE12_OpenCores/MyUserLogic/top_level_1_PCIe_UserLogic_00_USER_LOGIC/sysgen',
344 
    'trim_vbits' => 1,
345 
    'trim_vbits_sgadvanced' => '',
346 
    'ucfFile' => 'user_logic_cw.ucf',
347 
    'use_ce_syn_keep' => 1,
348 
    'use_strict_names' => 1,
349 
    'user_tips_enabled' => 0,
350 
    'usertemp' => 'C:/DOCUME~1/root/IMPOST~1/Temp/sysgentmp-root',
351 
    'using71Netlister' => 1,
352 
    'verilog_files' => [
353 
      'conv_pkg.v',
354 
      'synth_reg.v',
355 
      'synth_reg_w_init.v',
356 
      'convert_type.v',
357 
    ],
358 
    'version' => '',
359 
    'vhdl_files' => [
360 
      'conv_pkg.vhd',
361 
      'synth_reg.vhd',
362 
      'synth_reg_w_init.vhd',
363 
    ],
364 
    'vsimtime' => '11000000275.000000 ns',
365 
    'xcfFile' => 'user_logic_cw.xcf',
366 
    'xilinx' => 'C:/Programmi/Xilinx/12.3/ISE_DS/ISE',
367 
    'xilinx_device' => 'xc6vlx240t-3ff784',
368 
    'xilinx_family' => 'virtex6',
369 
    'xilinx_package' => 'ff784',
370 
    'xilinx_part' => 'xc6vlx240t',
371 
    'xilinxdevice' => 'xc6vlx240t-3ff784',
372 
    'xilinxfamily' => 'virtex6',
373 
    'xilinxpart' => 'xc6vlx240t',
374 
  },
375 
  'entityName' => '',
376 
  'nets' => {
377 
    '.bram_rd_dout' => {
378 
      'hdlType' => 'std_logic_vector(63 downto 0)',
379 
      'width' => 64,
380 
    },
381 
    '.clk' => {
382 
      'hdlType' => 'std_logic',
383 
      'width' => 1,
384 
    },
385 
    '.fifo_rd_count' => {
386 
      'hdlType' => 'std_logic_vector(14 downto 0)',
387 
      'width' => 15,
388 
    },
389 
    '.fifo_rd_dout' => {
390 
      'hdlType' => 'std_logic_vector(71 downto 0)',
391 
      'width' => 72,
392 
    },
393 
    '.fifo_rd_empty' => {
394 
      'hdlType' => 'std_logic',
395 
      'width' => 1,
396 
    },
397 
    '.fifo_rd_pempty' => {
398 
      'hdlType' => 'std_logic',
399 
      'width' => 1,
400 
    },
401 
    '.fifo_rd_valid' => {
402 
      'hdlType' => 'std_logic',
403 
      'width' => 1,
404 
    },
405 
    '.fifo_wr_count' => {
406 
      'hdlType' => 'std_logic_vector(14 downto 0)',
407 
      'width' => 15,
408 
    },
409 
    '.fifo_wr_full' => {
410 
      'hdlType' => 'std_logic',
411 
      'width' => 1,
412 
    },
413 
    '.fifo_wr_pfull' => {
414 
      'hdlType' => 'std_logic',
415 
      'width' => 1,
416 
    },
417 
    '.rst_i' => {
418 
      'hdlType' => 'std_logic',
419 
      'width' => 1,
420 
    },
421 
    'from_register.data_out' => {
422 
      'hdlType' => 'std_logic_vector(31 downto 0)',
423 
      'width' => 32,
424 
    },
425 
    'from_register1.data_out' => {
426 
      'hdlType' => 'std_logic_vector(31 downto 0)',
427 
      'width' => 32,
428 
    },
429 
    'from_register10.data_out' => {
430 
      'hdlType' => 'std_logic',
431 
      'width' => 1,
432 
    },
433 
    'from_register11.data_out' => {
434 
      'hdlType' => 'std_logic_vector(31 downto 0)',
435 
      'width' => 32,
436 
    },
437 
    'from_register12.data_out' => {
438 
      'hdlType' => 'std_logic',
439 
      'width' => 1,
440 
    },
441 
    'from_register13.data_out' => {
442 
      'hdlType' => 'std_logic_vector(31 downto 0)',
443 
      'width' => 32,
444 
    },
445 
    'from_register14.data_out' => {
446 
      'hdlType' => 'std_logic',
447 
      'width' => 1,
448 
    },
449 
    'from_register15.data_out' => {
450 
      'hdlType' => 'std_logic',
451 
      'width' => 1,
452 
    },
453 
    'from_register16.data_out' => {
454 
      'hdlType' => 'std_logic',
455 
      'width' => 1,
456 
    },
457 
    'from_register17.data_out' => {
458 
      'hdlType' => 'std_logic_vector(31 downto 0)',
459 
      'width' => 32,
460 
    },
461 
    'from_register18.data_out' => {
462 
      'hdlType' => 'std_logic',
463 
      'width' => 1,
464 
    },
465 
    'from_register19.data_out' => {
466 
      'hdlType' => 'std_logic_vector(31 downto 0)',
467 
      'width' => 32,
468 
    },
469 
    'from_register2.data_out' => {
470 
      'hdlType' => 'std_logic_vector(31 downto 0)',
471 
      'width' => 32,
472 
    },
473 
    'from_register20.data_out' => {
474 
      'hdlType' => 'std_logic_vector(31 downto 0)',
475 
      'width' => 32,
476 
    },
477 
    'from_register21.data_out' => {
478 
      'hdlType' => 'std_logic',
479 
      'width' => 1,
480 
    },
481 
    'from_register22.data_out' => {
482 
      'hdlType' => 'std_logic_vector(31 downto 0)',
483 
      'width' => 32,
484 
    },
485 
    'from_register23.data_out' => {
486 
      'hdlType' => 'std_logic',
487 
      'width' => 1,
488 
    },
489 
    'from_register24.data_out' => {
490 
      'hdlType' => 'std_logic_vector(31 downto 0)',
491 
      'width' => 32,
492 
    },
493 
    'from_register25.data_out' => {
494 
      'hdlType' => 'std_logic',
495 
      'width' => 1,
496 
    },
497 
    'from_register26.data_out' => {
498 
      'hdlType' => 'std_logic_vector(31 downto 0)',
499 
      'width' => 32,
500 
    },
501 
    'from_register27.data_out' => {
502 
      'hdlType' => 'std_logic',
503 
      'width' => 1,
504 
    },
505 
    'from_register28.data_out' => {
506 
      'hdlType' => 'std_logic_vector(31 downto 0)',
507 
      'width' => 32,
508 
    },
509 
    'from_register29.data_out' => {
510 
      'hdlType' => 'std_logic',
511 
      'width' => 1,
512 
    },
513 
    'from_register3.data_out' => {
514 
      'hdlType' => 'std_logic_vector(31 downto 0)',
515 
      'width' => 32,
516 
    },
517 
    'from_register30.data_out' => {
518 
      'hdlType' => 'std_logic_vector(31 downto 0)',
519 
      'width' => 32,
520 
    },
521 
    'from_register31.data_out' => {
522 
      'hdlType' => 'std_logic',
523 
      'width' => 1,
524 
    },
525 
    'from_register32.data_out' => {
526 
      'hdlType' => 'std_logic_vector(31 downto 0)',
527 
      'width' => 32,
528 
    },
529 
    'from_register33.data_out' => {
530 
      'hdlType' => 'std_logic',
531 
      'width' => 1,
532 
    },
533 
    'from_register4.data_out' => {
534 
      'hdlType' => 'std_logic',
535 
      'width' => 1,
536 
    },
537 
    'from_register5.data_out' => {
538 
      'hdlType' => 'std_logic_vector(31 downto 0)',
539 
      'width' => 32,
540 
    },
541 
    'from_register6.data_out' => {
542 
      'hdlType' => 'std_logic',
543 
      'width' => 1,
544 
    },
545 
    'from_register7.data_out' => {
546 
      'hdlType' => 'std_logic_vector(31 downto 0)',
547 
      'width' => 32,
548 
    },
549 
    'from_register8.data_out' => {
550 
      'hdlType' => 'std_logic',
551 
      'width' => 1,
552 
    },
553 
    'from_register9.data_out' => {
554 
      'hdlType' => 'std_logic_vector(31 downto 0)',
555 
      'width' => 32,
556 
    },
557 
    'sysgen_dut.bram_rd_addr' => {
558 
      'hdlType' => 'std_logic_vector(11 downto 0)',
559 
      'width' => 12,
560 
    },
561 
    'sysgen_dut.bram_wr_addr' => {
562 
      'hdlType' => 'std_logic_vector(11 downto 0)',
563 
      'width' => 12,
564 
    },
565 
    'sysgen_dut.bram_wr_din' => {
566 
      'hdlType' => 'std_logic_vector(63 downto 0)',
567 
      'width' => 64,
568 
    },
569 
    'sysgen_dut.bram_wr_en' => {
570 
      'hdlType' => 'std_logic_vector(7 downto 0)',
571 
      'width' => 8,
572 
    },
573 
    'sysgen_dut.fifo_rd_en' => {
574 
      'hdlType' => 'std_logic',
575 
      'width' => 1,
576 
    },
577 
    'sysgen_dut.fifo_wr_din' => {
578 
      'hdlType' => 'std_logic_vector(71 downto 0)',
579 
      'width' => 72,
580 
    },
581 
    'sysgen_dut.fifo_wr_en' => {
582 
      'hdlType' => 'std_logic',
583 
      'width' => 1,
584 
    },
585 
    'sysgen_dut.rst_o' => {
586 
      'hdlType' => 'std_logic',
587 
      'width' => 1,
588 
    },
589 
    'sysgen_dut.to_register10_ce' => {
590 
      'hdlType' => 'std_logic',
591 
      'width' => 1,
592 
    },
593 
    'sysgen_dut.to_register10_clk' => {
594 
      'hdlType' => 'std_logic',
595 
      'width' => 1,
596 
    },
597 
    'sysgen_dut.to_register10_clr' => {
598 
      'hdlType' => 'std_logic',
599 
      'width' => 1,
600 
    },
601 
    'sysgen_dut.to_register10_data_in' => {
602 
      'hdlType' => 'std_logic',
603 
      'width' => 1,
604 
    },
605 
    'sysgen_dut.to_register10_en' => {
606 
      'hdlType' => 'std_logic',
607 
      'width' => 1,
608 
    },
609 
    'sysgen_dut.to_register11_ce' => {
610 
      'hdlType' => 'std_logic',
611 
      'width' => 1,
612 
    },
613 
    'sysgen_dut.to_register11_clk' => {
614 
      'hdlType' => 'std_logic',
615 
      'width' => 1,
616 
    },
617 
    'sysgen_dut.to_register11_clr' => {
618 
      'hdlType' => 'std_logic',
619 
      'width' => 1,
620 
    },
621 
    'sysgen_dut.to_register11_data_in' => {
622 
      'hdlType' => 'std_logic',
623 
      'width' => 1,
624 
    },
625 
    'sysgen_dut.to_register11_en' => {
626 
      'hdlType' => 'std_logic',
627 
      'width' => 1,
628 
    },
629 
    'sysgen_dut.to_register12_ce' => {
630 
      'hdlType' => 'std_logic',
631 
      'width' => 1,
632 
    },
633 
    'sysgen_dut.to_register12_clk' => {
634 
      'hdlType' => 'std_logic',
635 
      'width' => 1,
636 
    },
637 
    'sysgen_dut.to_register12_clr' => {
638 
      'hdlType' => 'std_logic',
639 
      'width' => 1,
640 
    },
641 
    'sysgen_dut.to_register12_data_in' => {
642 
      'hdlType' => 'std_logic',
643 
      'width' => 1,
644 
    },
645 
    'sysgen_dut.to_register12_en' => {
646 
      'hdlType' => 'std_logic',
647 
      'width' => 1,
648 
    },
649 
    'sysgen_dut.to_register13_ce' => {
650 
      'hdlType' => 'std_logic',
651 
      'width' => 1,
652 
    },
653 
    'sysgen_dut.to_register13_clk' => {
654 
      'hdlType' => 'std_logic',
655 
      'width' => 1,
656 
    },
657 
    'sysgen_dut.to_register13_clr' => {
658 
      'hdlType' => 'std_logic',
659 
      'width' => 1,
660 
    },
661 
    'sysgen_dut.to_register13_data_in' => {
662 
      'hdlType' => 'std_logic_vector(31 downto 0)',
663 
      'width' => 32,
664 
    },
665 
    'sysgen_dut.to_register13_en' => {
666 
      'hdlType' => 'std_logic',
667 
      'width' => 1,
668 
    },
669 
    'sysgen_dut.to_register14_ce' => {
670 
      'hdlType' => 'std_logic',
671 
      'width' => 1,
672 
    },
673 
    'sysgen_dut.to_register14_clk' => {
674 
      'hdlType' => 'std_logic',
675 
      'width' => 1,
676 
    },
677 
    'sysgen_dut.to_register14_clr' => {
678 
      'hdlType' => 'std_logic',
679 
      'width' => 1,
680 
    },
681 
    'sysgen_dut.to_register14_data_in' => {
682 
      'hdlType' => 'std_logic',
683 
      'width' => 1,
684 
    },
685 
    'sysgen_dut.to_register14_en' => {
686 
      'hdlType' => 'std_logic',
687 
      'width' => 1,
688 
    },
689 
    'sysgen_dut.to_register15_ce' => {
690 
      'hdlType' => 'std_logic',
691 
      'width' => 1,
692 
    },
693 
    'sysgen_dut.to_register15_clk' => {
694 
      'hdlType' => 'std_logic',
695 
      'width' => 1,
696 
    },
697 
    'sysgen_dut.to_register15_clr' => {
698 
      'hdlType' => 'std_logic',
699 
      'width' => 1,
700 
    },
701 
    'sysgen_dut.to_register15_data_in' => {
702 
      'hdlType' => 'std_logic_vector(31 downto 0)',
703 
      'width' => 32,
704 
    },
705 
    'sysgen_dut.to_register15_en' => {
706 
      'hdlType' => 'std_logic',
707 
      'width' => 1,
708 
    },
709 
    'sysgen_dut.to_register16_ce' => {
710 
      'hdlType' => 'std_logic',
711 
      'width' => 1,
712 
    },
713 
    'sysgen_dut.to_register16_clk' => {
714 
      'hdlType' => 'std_logic',
715 
      'width' => 1,
716 
    },
717 
    'sysgen_dut.to_register16_clr' => {
718 
      'hdlType' => 'std_logic',
719 
      'width' => 1,
720 
    },
721 
    'sysgen_dut.to_register16_data_in' => {
722 
      'hdlType' => 'std_logic',
723 
      'width' => 1,
724 
    },
725 
    'sysgen_dut.to_register16_en' => {
726 
      'hdlType' => 'std_logic',
727 
      'width' => 1,
728 
    },
729 
    'sysgen_dut.to_register17_ce' => {
730 
      'hdlType' => 'std_logic',
731 
      'width' => 1,
732 
    },
733 
    'sysgen_dut.to_register17_clk' => {
734 
      'hdlType' => 'std_logic',
735 
      'width' => 1,
736 
    },
737 
    'sysgen_dut.to_register17_clr' => {
738 
      'hdlType' => 'std_logic',
739 
      'width' => 1,
740 
    },
741 
    'sysgen_dut.to_register17_data_in' => {
742 
      'hdlType' => 'std_logic_vector(31 downto 0)',
743 
      'width' => 32,
744 
    },
745 
    'sysgen_dut.to_register17_en' => {
746 
      'hdlType' => 'std_logic',
747 
      'width' => 1,
748 
    },
749 
    'sysgen_dut.to_register18_ce' => {
750 
      'hdlType' => 'std_logic',
751 
      'width' => 1,
752 
    },
753 
    'sysgen_dut.to_register18_clk' => {
754 
      'hdlType' => 'std_logic',
755 
      'width' => 1,
756 
    },
757 
    'sysgen_dut.to_register18_clr' => {
758 
      'hdlType' => 'std_logic',
759 
      'width' => 1,
760 
    },
761 
    'sysgen_dut.to_register18_data_in' => {
762 
      'hdlType' => 'std_logic',
763 
      'width' => 1,
764 
    },
765 
    'sysgen_dut.to_register18_en' => {
766 
      'hdlType' => 'std_logic',
767 
      'width' => 1,
768 
    },
769 
    'sysgen_dut.to_register19_ce' => {
770 
      'hdlType' => 'std_logic',
771 
      'width' => 1,
772 
    },
773 
    'sysgen_dut.to_register19_clk' => {
774 
      'hdlType' => 'std_logic',
775 
      'width' => 1,
776 
    },
777 
    'sysgen_dut.to_register19_clr' => {
778 
      'hdlType' => 'std_logic',
779 
      'width' => 1,
780 
    },
781 
    'sysgen_dut.to_register19_data_in' => {
782 
      'hdlType' => 'std_logic_vector(31 downto 0)',
783 
      'width' => 32,
784 
    },
785 
    'sysgen_dut.to_register19_en' => {
786 
      'hdlType' => 'std_logic',
787 
      'width' => 1,
788 
    },
789 
    'sysgen_dut.to_register1_ce' => {
790 
      'hdlType' => 'std_logic',
791 
      'width' => 1,
792 
    },
793 
    'sysgen_dut.to_register1_clk' => {
794 
      'hdlType' => 'std_logic',
795 
      'width' => 1,
796 
    },
797 
    'sysgen_dut.to_register1_clr' => {
798 
      'hdlType' => 'std_logic',
799 
      'width' => 1,
800 
    },
801 
    'sysgen_dut.to_register1_data_in' => {
802 
      'hdlType' => 'std_logic',
803 
      'width' => 1,
804 
    },
805 
    'sysgen_dut.to_register1_en' => {
806 
      'hdlType' => 'std_logic',
807 
      'width' => 1,
808 
    },
809 
    'sysgen_dut.to_register20_ce' => {
810 
      'hdlType' => 'std_logic',
811 
      'width' => 1,
812 
    },
813 
    'sysgen_dut.to_register20_clk' => {
814 
      'hdlType' => 'std_logic',
815 
      'width' => 1,
816 
    },
817 
    'sysgen_dut.to_register20_clr' => {
818 
      'hdlType' => 'std_logic',
819 
      'width' => 1,
820 
    },
821 
    'sysgen_dut.to_register20_data_in' => {
822 
      'hdlType' => 'std_logic',
823 
      'width' => 1,
824 
    },
825 
    'sysgen_dut.to_register20_en' => {
826 
      'hdlType' => 'std_logic',
827 
      'width' => 1,
828 
    },
829 
    'sysgen_dut.to_register21_ce' => {
830 
      'hdlType' => 'std_logic',
831 
      'width' => 1,
832 
    },
833 
    'sysgen_dut.to_register21_clk' => {
834 
      'hdlType' => 'std_logic',
835 
      'width' => 1,
836 
    },
837 
    'sysgen_dut.to_register21_clr' => {
838 
      'hdlType' => 'std_logic',
839 
      'width' => 1,
840 
    },
841 
    'sysgen_dut.to_register21_data_in' => {
842 
      'hdlType' => 'std_logic_vector(31 downto 0)',
843 
      'width' => 32,
844 
    },
845 
    'sysgen_dut.to_register21_en' => {
846 
      'hdlType' => 'std_logic',
847 
      'width' => 1,
848 
    },
849 
    'sysgen_dut.to_register22_ce' => {
850 
      'hdlType' => 'std_logic',
851 
      'width' => 1,
852 
    },
853 
    'sysgen_dut.to_register22_clk' => {
854 
      'hdlType' => 'std_logic',
855 
      'width' => 1,
856 
    },
857 
    'sysgen_dut.to_register22_clr' => {
858 
      'hdlType' => 'std_logic',
859 
      'width' => 1,
860 
    },
861 
    'sysgen_dut.to_register22_data_in' => {
862 
      'hdlType' => 'std_logic',
863 
      'width' => 1,
864 
    },
865 
    'sysgen_dut.to_register22_en' => {
866 
      'hdlType' => 'std_logic',
867 
      'width' => 1,
868 
    },
869 
    'sysgen_dut.to_register23_ce' => {
870 
      'hdlType' => 'std_logic',
871 
      'width' => 1,
872 
    },
873 
    'sysgen_dut.to_register23_clk' => {
874 
      'hdlType' => 'std_logic',
875 
      'width' => 1,
876 
    },
877 
    'sysgen_dut.to_register23_clr' => {
878 
      'hdlType' => 'std_logic',
879 
      'width' => 1,
880 
    },
881 
    'sysgen_dut.to_register23_data_in' => {
882 
      'hdlType' => 'std_logic_vector(31 downto 0)',
883 
      'width' => 32,
884 
    },
885 
    'sysgen_dut.to_register23_en' => {
886 
      'hdlType' => 'std_logic',
887 
      'width' => 1,
888 
    },
889 
    'sysgen_dut.to_register24_ce' => {
890 
      'hdlType' => 'std_logic',
891 
      'width' => 1,
892 
    },
893 
    'sysgen_dut.to_register24_clk' => {
894 
      'hdlType' => 'std_logic',
895 
      'width' => 1,
896 
    },
897 
    'sysgen_dut.to_register24_clr' => {
898 
      'hdlType' => 'std_logic',
899 
      'width' => 1,
900 
    },
901 
    'sysgen_dut.to_register24_data_in' => {
902 
      'hdlType' => 'std_logic',
903 
      'width' => 1,
904 
    },
905 
    'sysgen_dut.to_register24_en' => {
906 
      'hdlType' => 'std_logic',
907 
      'width' => 1,
908 
    },
909 
    'sysgen_dut.to_register25_ce' => {
910 
      'hdlType' => 'std_logic',
911 
      'width' => 1,
912 
    },
913 
    'sysgen_dut.to_register25_clk' => {
914 
      'hdlType' => 'std_logic',
915 
      'width' => 1,
916 
    },
917 
    'sysgen_dut.to_register25_clr' => {
918 
      'hdlType' => 'std_logic',
919 
      'width' => 1,
920 
    },
921 
    'sysgen_dut.to_register25_data_in' => {
922 
      'hdlType' => 'std_logic_vector(31 downto 0)',
923 
      'width' => 32,
924 
    },
925 
    'sysgen_dut.to_register25_en' => {
926 
      'hdlType' => 'std_logic',
927 
      'width' => 1,
928 
    },
929 
    'sysgen_dut.to_register26_ce' => {
930 
      'hdlType' => 'std_logic',
931 
      'width' => 1,
932 
    },
933 
    'sysgen_dut.to_register26_clk' => {
934 
      'hdlType' => 'std_logic',
935 
      'width' => 1,
936 
    },
937 
    'sysgen_dut.to_register26_clr' => {
938 
      'hdlType' => 'std_logic',
939 
      'width' => 1,
940 
    },
941 
    'sysgen_dut.to_register26_data_in' => {
942 
      'hdlType' => 'std_logic',
943 
      'width' => 1,
944 
    },
945 
    'sysgen_dut.to_register26_en' => {
946 
      'hdlType' => 'std_logic',
947 
      'width' => 1,
948 
    },
949 
    'sysgen_dut.to_register27_ce' => {
950 
      'hdlType' => 'std_logic',
951 
      'width' => 1,
952 
    },
953 
    'sysgen_dut.to_register27_clk' => {
954 
      'hdlType' => 'std_logic',
955 
      'width' => 1,
956 
    },
957 
    'sysgen_dut.to_register27_clr' => {
958 
      'hdlType' => 'std_logic',
959 
      'width' => 1,
960 
    },
961 
    'sysgen_dut.to_register27_data_in' => {
962 
      'hdlType' => 'std_logic_vector(31 downto 0)',
963 
      'width' => 32,
964 
    },
965 
    'sysgen_dut.to_register27_en' => {
966 
      'hdlType' => 'std_logic',
967 
      'width' => 1,
968 
    },
969 
    'sysgen_dut.to_register2_ce' => {
970 
      'hdlType' => 'std_logic',
971 
      'width' => 1,
972 
    },
973 
    'sysgen_dut.to_register2_clk' => {
974 
      'hdlType' => 'std_logic',
975 
      'width' => 1,
976 
    },
977 
    'sysgen_dut.to_register2_clr' => {
978 
      'hdlType' => 'std_logic',
979 
      'width' => 1,
980 
    },
981 
    'sysgen_dut.to_register2_data_in' => {
982 
      'hdlType' => 'std_logic_vector(31 downto 0)',
983 
      'width' => 32,
984 
    },
985 
    'sysgen_dut.to_register2_en' => {
986 
      'hdlType' => 'std_logic',
987 
      'width' => 1,
988 
    },
989 
    'sysgen_dut.to_register3_ce' => {
990 
      'hdlType' => 'std_logic',
991 
      'width' => 1,
992 
    },
993 
    'sysgen_dut.to_register3_clk' => {
994 
      'hdlType' => 'std_logic',
995 
      'width' => 1,
996 
    },
997 
    'sysgen_dut.to_register3_clr' => {
998 
      'hdlType' => 'std_logic',
999 
      'width' => 1,
1000 
    },
1001 
    'sysgen_dut.to_register3_data_in' => {
1002 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1003 
      'width' => 32,
1004 
    },
1005 
    'sysgen_dut.to_register3_en' => {
1006 
      'hdlType' => 'std_logic',
1007 
      'width' => 1,
1008 
    },
1009 
    'sysgen_dut.to_register4_ce' => {
1010 
      'hdlType' => 'std_logic',
1011 
      'width' => 1,
1012 
    },
1013 
    'sysgen_dut.to_register4_clk' => {
1014 
      'hdlType' => 'std_logic',
1015 
      'width' => 1,
1016 
    },
1017 
    'sysgen_dut.to_register4_clr' => {
1018 
      'hdlType' => 'std_logic',
1019 
      'width' => 1,
1020 
    },
1021 
    'sysgen_dut.to_register4_data_in' => {
1022 
      'hdlType' => 'std_logic',
1023 
      'width' => 1,
1024 
    },
1025 
    'sysgen_dut.to_register4_en' => {
1026 
      'hdlType' => 'std_logic',
1027 
      'width' => 1,
1028 
    },
1029 
    'sysgen_dut.to_register5_ce' => {
1030 
      'hdlType' => 'std_logic',
1031 
      'width' => 1,
1032 
    },
1033 
    'sysgen_dut.to_register5_clk' => {
1034 
      'hdlType' => 'std_logic',
1035 
      'width' => 1,
1036 
    },
1037 
    'sysgen_dut.to_register5_clr' => {
1038 
      'hdlType' => 'std_logic',
1039 
      'width' => 1,
1040 
    },
1041 
    'sysgen_dut.to_register5_data_in' => {
1042 
      'hdlType' => 'std_logic',
1043 
      'width' => 1,
1044 
    },
1045 
    'sysgen_dut.to_register5_en' => {
1046 
      'hdlType' => 'std_logic',
1047 
      'width' => 1,
1048 
    },
1049 
    'sysgen_dut.to_register6_ce' => {
1050 
      'hdlType' => 'std_logic',
1051 
      'width' => 1,
1052 
    },
1053 
    'sysgen_dut.to_register6_clk' => {
1054 
      'hdlType' => 'std_logic',
1055 
      'width' => 1,
1056 
    },
1057 
    'sysgen_dut.to_register6_clr' => {
1058 
      'hdlType' => 'std_logic',
1059 
      'width' => 1,
1060 
    },
1061 
    'sysgen_dut.to_register6_data_in' => {
1062 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1063 
      'width' => 32,
1064 
    },
1065 
    'sysgen_dut.to_register6_en' => {
1066 
      'hdlType' => 'std_logic',
1067 
      'width' => 1,
1068 
    },
1069 
    'sysgen_dut.to_register7_ce' => {
1070 
      'hdlType' => 'std_logic',
1071 
      'width' => 1,
1072 
    },
1073 
    'sysgen_dut.to_register7_clk' => {
1074 
      'hdlType' => 'std_logic',
1075 
      'width' => 1,
1076 
    },
1077 
    'sysgen_dut.to_register7_clr' => {
1078 
      'hdlType' => 'std_logic',
1079 
      'width' => 1,
1080 
    },
1081 
    'sysgen_dut.to_register7_data_in' => {
1082 
      'hdlType' => 'std_logic',
1083 
      'width' => 1,
1084 
    },
1085 
    'sysgen_dut.to_register7_en' => {
1086 
      'hdlType' => 'std_logic',
1087 
      'width' => 1,
1088 
    },
1089 
    'sysgen_dut.to_register8_ce' => {
1090 
      'hdlType' => 'std_logic',
1091 
      'width' => 1,
1092 
    },
1093 
    'sysgen_dut.to_register8_clk' => {
1094 
      'hdlType' => 'std_logic',
1095 
      'width' => 1,
1096 
    },
1097 
    'sysgen_dut.to_register8_clr' => {
1098 
      'hdlType' => 'std_logic',
1099 
      'width' => 1,
1100 
    },
1101 
    'sysgen_dut.to_register8_data_in' => {
1102 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1103 
      'width' => 32,
1104 
    },
1105 
    'sysgen_dut.to_register8_en' => {
1106 
      'hdlType' => 'std_logic',
1107 
      'width' => 1,
1108 
    },
1109 
    'sysgen_dut.to_register9_ce' => {
1110 
      'hdlType' => 'std_logic',
1111 
      'width' => 1,
1112 
    },
1113 
    'sysgen_dut.to_register9_clk' => {
1114 
      'hdlType' => 'std_logic',
1115 
      'width' => 1,
1116 
    },
1117 
    'sysgen_dut.to_register9_clr' => {
1118 
      'hdlType' => 'std_logic',
1119 
      'width' => 1,
1120 
    },
1121 
    'sysgen_dut.to_register9_data_in' => {
1122 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1123 
      'width' => 32,
1124 
    },
1125 
    'sysgen_dut.to_register9_en' => {
1126 
      'hdlType' => 'std_logic',
1127 
      'width' => 1,
1128 
    },
1129 
    'sysgen_dut.to_register_ce' => {
1130 
      'hdlType' => 'std_logic',
1131 
      'width' => 1,
1132 
    },
1133 
    'sysgen_dut.to_register_clk' => {
1134 
      'hdlType' => 'std_logic',
1135 
      'width' => 1,
1136 
    },
1137 
    'sysgen_dut.to_register_clr' => {
1138 
      'hdlType' => 'std_logic',
1139 
      'width' => 1,
1140 
    },
1141 
    'sysgen_dut.to_register_data_in' => {
1142 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1143 
      'width' => 32,
1144 
    },
1145 
    'sysgen_dut.to_register_en' => {
1146 
      'hdlType' => 'std_logic',
1147 
      'width' => 1,
1148 
    },
1149 
    'sysgen_dut.user_int_1o' => {
1150 
      'hdlType' => 'std_logic',
1151 
      'width' => 1,
1152 
    },
1153 
    'sysgen_dut.user_int_2o' => {
1154 
      'hdlType' => 'std_logic',
1155 
      'width' => 1,
1156 
    },
1157 
    'sysgen_dut.user_int_3o' => {
1158 
      'hdlType' => 'std_logic',
1159 
      'width' => 1,
1160 
    },
1161 
    'to_register.dout' => {
1162 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1163 
      'width' => 32,
1164 
    },
1165 
    'to_register1.dout' => {
1166 
      'hdlType' => 'std_logic',
1167 
      'width' => 1,
1168 
    },
1169 
    'to_register10.dout' => {
1170 
      'hdlType' => 'std_logic',
1171 
      'width' => 1,
1172 
    },
1173 
    'to_register11.dout' => {
1174 
      'hdlType' => 'std_logic',
1175 
      'width' => 1,
1176 
    },
1177 
    'to_register12.dout' => {
1178 
      'hdlType' => 'std_logic',
1179 
      'width' => 1,
1180 
    },
1181 
    'to_register13.dout' => {
1182 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1183 
      'width' => 32,
1184 
    },
1185 
    'to_register14.dout' => {
1186 
      'hdlType' => 'std_logic',
1187 
      'width' => 1,
1188 
    },
1189 
    'to_register15.dout' => {
1190 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1191 
      'width' => 32,
1192 
    },
1193 
    'to_register16.dout' => {
1194 
      'hdlType' => 'std_logic',
1195 
      'width' => 1,
1196 
    },
1197 
    'to_register17.dout' => {
1198 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1199 
      'width' => 32,
1200 
    },
1201 
    'to_register18.dout' => {
1202 
      'hdlType' => 'std_logic',
1203 
      'width' => 1,
1204 
    },
1205 
    'to_register19.dout' => {
1206 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1207 
      'width' => 32,
1208 
    },
1209 
    'to_register2.dout' => {
1210 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1211 
      'width' => 32,
1212 
    },
1213 
    'to_register20.dout' => {
1214 
      'hdlType' => 'std_logic',
1215 
      'width' => 1,
1216 
    },
1217 
    'to_register21.dout' => {
1218 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1219 
      'width' => 32,
1220 
    },
1221 
    'to_register22.dout' => {
1222 
      'hdlType' => 'std_logic',
1223 
      'width' => 1,
1224 
    },
1225 
    'to_register23.dout' => {
1226 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1227 
      'width' => 32,
1228 
    },
1229 
    'to_register24.dout' => {
1230 
      'hdlType' => 'std_logic',
1231 
      'width' => 1,
1232 
    },
1233 
    'to_register25.dout' => {
1234 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1235 
      'width' => 32,
1236 
    },
1237 
    'to_register26.dout' => {
1238 
      'hdlType' => 'std_logic',
1239 
      'width' => 1,
1240 
    },
1241 
    'to_register27.dout' => {
1242 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1243 
      'width' => 32,
1244 
    },
1245 
    'to_register3.dout' => {
1246 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1247 
      'width' => 32,
1248 
    },
1249 
    'to_register4.dout' => {
1250 
      'hdlType' => 'std_logic',
1251 
      'width' => 1,
1252 
    },
1253 
    'to_register5.dout' => {
1254 
      'hdlType' => 'std_logic',
1255 
      'width' => 1,
1256 
    },
1257 
    'to_register6.dout' => {
1258 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1259 
      'width' => 32,
1260 
    },
1261 
    'to_register7.dout' => {
1262 
      'hdlType' => 'std_logic',
1263 
      'width' => 1,
1264 
    },
1265 
    'to_register8.dout' => {
1266 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1267 
      'width' => 32,
1268 
    },
1269 
    'to_register9.dout' => {
1270 
      'hdlType' => 'std_logic_vector(31 downto 0)',
1271 
      'width' => 32,
1272 
    },
1273 
  },
1274 
  'subblocks' => {
1275 
    'bram_rd_addr' => {
1276 
      'connections' => {
1277 
        'bram_rd_addr' => 'sysgen_dut.bram_rd_addr',
1278 
      },
1279 
      'entity' => {
1280 
        'attributes' => {
1281 
          'entityAlreadyNetlisted' => 1,
1282 
          'isGateway' => 1,
1283 
          'is_floating_block' => 1,
1284 
        },
1285 
        'entityName' => 'bram_rd_addr',
1286 
        'ports' => {
1287 
          'bram_rd_addr' => {
1288 
            'attributes' => {
1289 
              'bin_pt' => 0,
1290 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
1291 
              'is_floating_block' => 1,
1292 
              'is_gateway_port' => 1,
1293 
              'must_be_hdl_vector' => 1,
1294 
              'period' => 1,
1295 
              'port_id' => 0,
1296 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr/BRAM_rd_addr',
1297 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr',
1298 
              'timingConstraint' => 'none',
1299 
              'type' => 'UFix_12_0',
1300 
            },
1301 
            'direction' => 'in',
1302 
            'hdlType' => 'std_logic_vector(11 downto 0)',
1303 
            'width' => 12,
1304 
          },
1305 
        },
1306 
      },
1307 
      'entityName' => 'bram_rd_addr',
1308 
    },
1309 
    'bram_rd_dout' => {
1310 
      'connections' => {
1311 
        'bram_rd_dout' => '.bram_rd_dout',
1312 
      },
1313 
      'entity' => {
1314 
        'attributes' => {
1315 
          'entityAlreadyNetlisted' => 1,
1316 
          'isGateway' => 1,
1317 
          'is_floating_block' => 1,
1318 
        },
1319 
        'entityName' => 'bram_rd_dout',
1320 
        'ports' => {
1321 
          'bram_rd_dout' => {
1322 
            'attributes' => {
1323 
              'bin_pt' => 0,
1324 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
1325 
              'is_floating_block' => 1,
1326 
              'is_gateway_port' => 1,
1327 
              'must_be_hdl_vector' => 1,
1328 
              'period' => 1,
1329 
              'port_id' => 0,
1330 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout/BRAM_rd_dout',
1331 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout',
1332 
              'timingConstraint' => 'none',
1333 
              'type' => 'UFix_64_0',
1334 
            },
1335 
            'direction' => 'out',
1336 
            'hdlType' => 'std_logic_vector(63 downto 0)',
1337 
            'width' => 64,
1338 
          },
1339 
        },
1340 
      },
1341 
      'entityName' => 'bram_rd_dout',
1342 
    },
1343 
    'bram_wr_addr' => {
1344 
      'connections' => {
1345 
        'bram_wr_addr' => 'sysgen_dut.bram_wr_addr',
1346 
      },
1347 
      'entity' => {
1348 
        'attributes' => {
1349 
          'entityAlreadyNetlisted' => 1,
1350 
          'isGateway' => 1,
1351 
          'is_floating_block' => 1,
1352 
        },
1353 
        'entityName' => 'bram_wr_addr',
1354 
        'ports' => {
1355 
          'bram_wr_addr' => {
1356 
            'attributes' => {
1357 
              'bin_pt' => 0,
1358 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
1359 
              'is_floating_block' => 1,
1360 
              'is_gateway_port' => 1,
1361 
              'must_be_hdl_vector' => 1,
1362 
              'period' => 1,
1363 
              'port_id' => 0,
1364 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr/BRAM_wr_addr',
1365 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr',
1366 
              'timingConstraint' => 'none',
1367 
              'type' => 'UFix_12_0',
1368 
            },
1369 
            'direction' => 'in',
1370 
            'hdlType' => 'std_logic_vector(11 downto 0)',
1371 
            'width' => 12,
1372 
          },
1373 
        },
1374 
      },
1375 
      'entityName' => 'bram_wr_addr',
1376 
    },
1377 
    'bram_wr_din' => {
1378 
      'connections' => {
1379 
        'bram_wr_din' => 'sysgen_dut.bram_wr_din',
1380 
      },
1381 
      'entity' => {
1382 
        'attributes' => {
1383 
          'entityAlreadyNetlisted' => 1,
1384 
          'isGateway' => 1,
1385 
          'is_floating_block' => 1,
1386 
        },
1387 
        'entityName' => 'bram_wr_din',
1388 
        'ports' => {
1389 
          'bram_wr_din' => {
1390 
            'attributes' => {
1391 
              'bin_pt' => 0,
1392 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
1393 
              'is_floating_block' => 1,
1394 
              'is_gateway_port' => 1,
1395 
              'must_be_hdl_vector' => 1,
1396 
              'period' => 1,
1397 
              'port_id' => 0,
1398 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din/BRAM_wr_din',
1399 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din',
1400 
              'timingConstraint' => 'none',
1401 
              'type' => 'UFix_64_0',
1402 
            },
1403 
            'direction' => 'in',
1404 
            'hdlType' => 'std_logic_vector(63 downto 0)',
1405 
            'width' => 64,
1406 
          },
1407 
        },
1408 
      },
1409 
      'entityName' => 'bram_wr_din',
1410 
    },
1411 
    'bram_wr_en' => {
1412 
      'connections' => {
1413 
        'bram_wr_en' => 'sysgen_dut.bram_wr_en',
1414 
      },
1415 
      'entity' => {
1416 
        'attributes' => {
1417 
          'entityAlreadyNetlisted' => 1,
1418 
          'isGateway' => 1,
1419 
          'is_floating_block' => 1,
1420 
        },
1421 
        'entityName' => 'bram_wr_en',
1422 
        'ports' => {
1423 
          'bram_wr_en' => {
1424 
            'attributes' => {
1425 
              'bin_pt' => 0,
1426 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
1427 
              'is_floating_block' => 1,
1428 
              'is_gateway_port' => 1,
1429 
              'must_be_hdl_vector' => 1,
1430 
              'period' => 1,
1431 
              'port_id' => 0,
1432 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en/BRAM_wr_en',
1433 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en',
1434 
              'timingConstraint' => 'none',
1435 
              'type' => 'UFix_8_0',
1436 
            },
1437 
            'direction' => 'in',
1438 
            'hdlType' => 'std_logic_vector(7 downto 0)',
1439 
            'width' => 8,
1440 
          },
1441 
        },
1442 
      },
1443 
      'entityName' => 'bram_wr_en',
1444 
    },
1445 
    'fifo_rd_count' => {
1446 
      'connections' => {
1447 
        'fifo_rd_count' => '.fifo_rd_count',
1448 
      },
1449 
      'entity' => {
1450 
        'attributes' => {
1451 
          'entityAlreadyNetlisted' => 1,
1452 
          'isGateway' => 1,
1453 
          'is_floating_block' => 1,
1454 
        },
1455 
        'entityName' => 'fifo_rd_count',
1456 
        'ports' => {
1457 
          'fifo_rd_count' => {
1458 
            'attributes' => {
1459 
              'bin_pt' => 0,
1460 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
1461 
              'is_floating_block' => 1,
1462 
              'is_gateway_port' => 1,
1463 
              'must_be_hdl_vector' => 1,
1464 
              'period' => 1,
1465 
              'port_id' => 0,
1466 
              'simulinkName' => 'fifo_rd_count',
1467 
              'source_block' => '',
1468 
              'timingConstraint' => 'none',
1469 
              'type' => 'UFix_15_0',
1470 
            },
1471 
            'direction' => 'out',
1472 
            'hdlType' => 'std_logic_vector(14 downto 0)',
1473 
            'width' => 15,
1474 
          },
1475 
        },
1476 
      },
1477 
      'entityName' => 'fifo_rd_count',
1478 
    },
1479 
    'fifo_rd_dout' => {
1480 
      'connections' => {
1481 
        'fifo_rd_dout' => '.fifo_rd_dout',
1482 
      },
1483 
      'entity' => {
1484 
        'attributes' => {
1485 
          'entityAlreadyNetlisted' => 1,
1486 
          'isGateway' => 1,
1487 
          'is_floating_block' => 1,
1488 
        },
1489 
        'entityName' => 'fifo_rd_dout',
1490 
        'ports' => {
1491 
          'fifo_rd_dout' => {
1492 
            'attributes' => {
1493 
              'bin_pt' => 0,
1494 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
1495 
              'is_floating_block' => 1,
1496 
              'is_gateway_port' => 1,
1497 
              'must_be_hdl_vector' => 1,
1498 
              'period' => 1,
1499 
              'port_id' => 0,
1500 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout/FIFO_rd_dout',
1501 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout',
1502 
              'timingConstraint' => 'none',
1503 
              'type' => 'UFix_72_0',
1504 
            },
1505 
            'direction' => 'out',
1506 
            'hdlType' => 'std_logic_vector(71 downto 0)',
1507 
            'width' => 72,
1508 
          },
1509 
        },
1510 
      },
1511 
      'entityName' => 'fifo_rd_dout',
1512 
    },
1513 
    'fifo_rd_empty' => {
1514 
      'connections' => {
1515 
        'fifo_rd_empty' => '.fifo_rd_empty',
1516 
      },
1517 
      'entity' => {
1518 
        'attributes' => {
1519 
          'entityAlreadyNetlisted' => 1,
1520 
          'isGateway' => 1,
1521 
          'is_floating_block' => 1,
1522 
        },
1523 
        'entityName' => 'fifo_rd_empty',
1524 
        'ports' => {
1525 
          'fifo_rd_empty' => {
1526 
            'attributes' => {
1527 
              'bin_pt' => 0,
1528 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
1529 
              'is_floating_block' => 1,
1530 
              'is_gateway_port' => 1,
1531 
              'must_be_hdl_vector' => 1,
1532 
              'period' => 1,
1533 
              'port_id' => 0,
1534 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty/FIFO_rd_empty',
1535 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty',
1536 
              'timingConstraint' => 'none',
1537 
              'type' => 'Bool',
1538 
            },
1539 
            'direction' => 'out',
1540 
            'hdlType' => 'std_logic',
1541 
            'width' => 1,
1542 
          },
1543 
        },
1544 
      },
1545 
      'entityName' => 'fifo_rd_empty',
1546 
    },
1547 
    'fifo_rd_en' => {
1548 
      'connections' => {
1549 
        'fifo_rd_en' => 'sysgen_dut.fifo_rd_en',
1550 
      },
1551 
      'entity' => {
1552 
        'attributes' => {
1553 
          'entityAlreadyNetlisted' => 1,
1554 
          'isGateway' => 1,
1555 
          'is_floating_block' => 1,
1556 
        },
1557 
        'entityName' => 'fifo_rd_en',
1558 
        'ports' => {
1559 
          'fifo_rd_en' => {
1560 
            'attributes' => {
1561 
              'bin_pt' => 0,
1562 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
1563 
              'is_floating_block' => 1,
1564 
              'is_gateway_port' => 1,
1565 
              'must_be_hdl_vector' => 1,
1566 
              'period' => 1,
1567 
              'port_id' => 0,
1568 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en/FIFO_rd_en',
1569 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en',
1570 
              'timingConstraint' => 'none',
1571 
              'type' => 'Bool',
1572 
            },
1573 
            'direction' => 'in',
1574 
            'hdlType' => 'std_logic',
1575 
            'width' => 1,
1576 
          },
1577 
        },
1578 
      },
1579 
      'entityName' => 'fifo_rd_en',
1580 
    },
1581 
    'fifo_rd_pempty' => {
1582 
      'connections' => {
1583 
        'fifo_rd_pempty' => '.fifo_rd_pempty',
1584 
      },
1585 
      'entity' => {
1586 
        'attributes' => {
1587 
          'entityAlreadyNetlisted' => 1,
1588 
          'isGateway' => 1,
1589 
          'is_floating_block' => 1,
1590 
        },
1591 
        'entityName' => 'fifo_rd_pempty',
1592 
        'ports' => {
1593 
          'fifo_rd_pempty' => {
1594 
            'attributes' => {
1595 
              'bin_pt' => 0,
1596 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
1597 
              'is_floating_block' => 1,
1598 
              'is_gateway_port' => 1,
1599 
              'must_be_hdl_vector' => 1,
1600 
              'period' => 1,
1601 
              'port_id' => 0,
1602 
              'simulinkName' => 'fifo_rd_pempty',
1603 
              'source_block' => '',
1604 
              'timingConstraint' => 'none',
1605 
              'type' => 'Bool',
1606 
            },
1607 
            'direction' => 'out',
1608 
            'hdlType' => 'std_logic',
1609 
            'width' => 1,
1610 
          },
1611 
        },
1612 
      },
1613 
      'entityName' => 'fifo_rd_pempty',
1614 
    },
1615 
    'fifo_rd_valid' => {
1616 
      'connections' => {
1617 
        'fifo_rd_valid' => '.fifo_rd_valid',
1618 
      },
1619 
      'entity' => {
1620 
        'attributes' => {
1621 
          'entityAlreadyNetlisted' => 1,
1622 
          'isGateway' => 1,
1623 
          'is_floating_block' => 1,
1624 
        },
1625 
        'entityName' => 'fifo_rd_valid',
1626 
        'ports' => {
1627 
          'fifo_rd_valid' => {
1628 
            'attributes' => {
1629 
              'bin_pt' => 0,
1630 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
1631 
              'is_floating_block' => 1,
1632 
              'is_gateway_port' => 1,
1633 
              'must_be_hdl_vector' => 1,
1634 
              'period' => 1,
1635 
              'port_id' => 0,
1636 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid/FIFO_rd_valid',
1637 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid',
1638 
              'timingConstraint' => 'none',
1639 
              'type' => 'Bool',
1640 
            },
1641 
            'direction' => 'out',
1642 
            'hdlType' => 'std_logic',
1643 
            'width' => 1,
1644 
          },
1645 
        },
1646 
      },
1647 
      'entityName' => 'fifo_rd_valid',
1648 
    },
1649 
    'fifo_wr_count' => {
1650 
      'connections' => {
1651 
        'fifo_wr_count' => '.fifo_wr_count',
1652 
      },
1653 
      'entity' => {
1654 
        'attributes' => {
1655 
          'entityAlreadyNetlisted' => 1,
1656 
          'isGateway' => 1,
1657 
          'is_floating_block' => 1,
1658 
        },
1659 
        'entityName' => 'fifo_wr_count',
1660 
        'ports' => {
1661 
          'fifo_wr_count' => {
1662 
            'attributes' => {
1663 
              'bin_pt' => 0,
1664 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
1665 
              'is_floating_block' => 1,
1666 
              'is_gateway_port' => 1,
1667 
              'must_be_hdl_vector' => 1,
1668 
              'period' => 1,
1669 
              'port_id' => 0,
1670 
              'simulinkName' => 'fifo_wr_count',
1671 
              'source_block' => '',
1672 
              'timingConstraint' => 'none',
1673 
              'type' => 'UFix_15_0',
1674 
            },
1675 
            'direction' => 'out',
1676 
            'hdlType' => 'std_logic_vector(14 downto 0)',
1677 
            'width' => 15,
1678 
          },
1679 
        },
1680 
      },
1681 
      'entityName' => 'fifo_wr_count',
1682 
    },
1683 
    'fifo_wr_din' => {
1684 
      'connections' => {
1685 
        'fifo_wr_din' => 'sysgen_dut.fifo_wr_din',
1686 
      },
1687 
      'entity' => {
1688 
        'attributes' => {
1689 
          'entityAlreadyNetlisted' => 1,
1690 
          'isGateway' => 1,
1691 
          'is_floating_block' => 1,
1692 
        },
1693 
        'entityName' => 'fifo_wr_din',
1694 
        'ports' => {
1695 
          'fifo_wr_din' => {
1696 
            'attributes' => {
1697 
              'bin_pt' => 0,
1698 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
1699 
              'is_floating_block' => 1,
1700 
              'is_gateway_port' => 1,
1701 
              'must_be_hdl_vector' => 1,
1702 
              'period' => 1,
1703 
              'port_id' => 0,
1704 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din/FIFO_wr_din',
1705 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din',
1706 
              'timingConstraint' => 'none',
1707 
              'type' => 'UFix_72_0',
1708 
            },
1709 
            'direction' => 'in',
1710 
            'hdlType' => 'std_logic_vector(71 downto 0)',
1711 
            'width' => 72,
1712 
          },
1713 
        },
1714 
      },
1715 
      'entityName' => 'fifo_wr_din',
1716 
    },
1717 
    'fifo_wr_en' => {
1718 
      'connections' => {
1719 
        'fifo_wr_en' => 'sysgen_dut.fifo_wr_en',
1720 
      },
1721 
      'entity' => {
1722 
        'attributes' => {
1723 
          'entityAlreadyNetlisted' => 1,
1724 
          'isGateway' => 1,
1725 
          'is_floating_block' => 1,
1726 
        },
1727 
        'entityName' => 'fifo_wr_en',
1728 
        'ports' => {
1729 
          'fifo_wr_en' => {
1730 
            'attributes' => {
1731 
              'bin_pt' => 0,
1732 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
1733 
              'is_floating_block' => 1,
1734 
              'is_gateway_port' => 1,
1735 
              'must_be_hdl_vector' => 1,
1736 
              'period' => 1,
1737 
              'port_id' => 0,
1738 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en/FIFO_wr_en',
1739 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en',
1740 
              'timingConstraint' => 'none',
1741 
              'type' => 'Bool',
1742 
            },
1743 
            'direction' => 'in',
1744 
            'hdlType' => 'std_logic',
1745 
            'width' => 1,
1746 
          },
1747 
        },
1748 
      },
1749 
      'entityName' => 'fifo_wr_en',
1750 
    },
1751 
    'fifo_wr_full' => {
1752 
      'connections' => {
1753 
        'fifo_wr_full' => '.fifo_wr_full',
1754 
      },
1755 
      'entity' => {
1756 
        'attributes' => {
1757 
          'entityAlreadyNetlisted' => 1,
1758 
          'isGateway' => 1,
1759 
          'is_floating_block' => 1,
1760 
        },
1761 
        'entityName' => 'fifo_wr_full',
1762 
        'ports' => {
1763 
          'fifo_wr_full' => {
1764 
            'attributes' => {
1765 
              'bin_pt' => 0,
1766 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
1767 
              'is_floating_block' => 1,
1768 
              'is_gateway_port' => 1,
1769 
              'must_be_hdl_vector' => 1,
1770 
              'period' => 1,
1771 
              'port_id' => 0,
1772 
              'simulinkName' => 'fifo_wr_full',
1773 
              'source_block' => '',
1774 
              'timingConstraint' => 'none',
1775 
              'type' => 'Bool',
1776 
            },
1777 
            'direction' => 'out',
1778 
            'hdlType' => 'std_logic',
1779 
            'width' => 1,
1780 
          },
1781 
        },
1782 
      },
1783 
      'entityName' => 'fifo_wr_full',
1784 
    },
1785 
    'fifo_wr_pfull' => {
1786 
      'connections' => {
1787 
        'fifo_wr_pfull' => '.fifo_wr_pfull',
1788 
      },
1789 
      'entity' => {
1790 
        'attributes' => {
1791 
          'entityAlreadyNetlisted' => 1,
1792 
          'isGateway' => 1,
1793 
          'is_floating_block' => 1,
1794 
        },
1795 
        'entityName' => 'fifo_wr_pfull',
1796 
        'ports' => {
1797 
          'fifo_wr_pfull' => {
1798 
            'attributes' => {
1799 
              'bin_pt' => 0,
1800 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
1801 
              'is_floating_block' => 1,
1802 
              'is_gateway_port' => 1,
1803 
              'must_be_hdl_vector' => 1,
1804 
              'period' => 1,
1805 
              'port_id' => 0,
1806 
              'simulinkName' => 'fifo_wr_pfull',
1807 
              'source_block' => '',
1808 
              'timingConstraint' => 'none',
1809 
              'type' => 'Bool',
1810 
            },
1811 
            'direction' => 'out',
1812 
            'hdlType' => 'std_logic',
1813 
            'width' => 1,
1814 
          },
1815 
        },
1816 
      },
1817 
      'entityName' => 'fifo_wr_pfull',
1818 
    },
1819 
    'from_register' => {
1820 
      'connections' => {
1821 
        'data_out' => 'from_register.data_out',
1822 
      },
1823 
      'entity' => {
1824 
        'attributes' => {
1825 
          'entityAlreadyNetlisted' => 1,
1826 
          'generics' => [
1827 
          ],
1828 
          'is_floating_block' => 1,
1829 
          'mask' => {
1830 
            'Block_Handle' => 2524.00183105469,
1831 
            'Block_handle' => 2524.00183105469,
1832 
            'MDL_Handle' => 3.0009765625,
1833 
            'MDL_handle' => 3.0009765625,
1834 
            'arith_type' => 2,
1835 
            'bin_pt' => 0,
1836 
            'block_config' => 'sysgen_blockset:fromreg_config',
1837 
            'block_handle' => 2524.00183105469,
1838 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register',
1839 
            'block_type' => 'fromreg',
1840 
            'dbl_ovrd' => 0,
1841 
            'init' => 0,
1842 
            'init_bit_vector' => '00000000000000000000000000000000b',
1843 
            'mdl_handle' => 3.0009765625,
1844 
            'model_handle' => 3.0009765625,
1845 
            'n_bits' => 32,
1846 
            'ownership' => 2,
1847 
            'period' => '5e-009',
1848 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1849 
            'shared_memory_name' => 'debug1i',
1850 
          },
1851 
          'needs_vhdl_wrapper' => 0,
1852 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register',
1853 
        },
1854 
        'entityName' => 'x_x119',
1855 
        'ports' => {
1856 
          'data_out' => {
1857 
            'attributes' => {
1858 
              'bin_pt' => 0,
1859 
              'is_floating_block' => 1,
1860 
              'must_be_hdl_vector' => 1,
1861 
              'period' => 1,
1862 
              'port_id' => 0,
1863 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register/data_out',
1864 
              'type' => 'UFix_32_0',
1865 
            },
1866 
            'direction' => 'out',
1867 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1868 
            'width' => 32,
1869 
          },
1870 
        },
1871 
      },
1872 
      'entityName' => 'x_x119',
1873 
    },
1874 
    'from_register1' => {
1875 
      'connections' => {
1876 
        'data_out' => 'from_register1.data_out',
1877 
      },
1878 
      'entity' => {
1879 
        'attributes' => {
1880 
          'entityAlreadyNetlisted' => 1,
1881 
          'generics' => [
1882 
          ],
1883 
          'is_floating_block' => 1,
1884 
          'mask' => {
1885 
            'Block_Handle' => 2525.35266113281,
1886 
            'Block_handle' => 2525.35266113281,
1887 
            'MDL_Handle' => 3.0009765625,
1888 
            'MDL_handle' => 3.0009765625,
1889 
            'arith_type' => 2,
1890 
            'bin_pt' => 0,
1891 
            'block_config' => 'sysgen_blockset:fromreg_config',
1892 
            'block_handle' => 2525.35266113281,
1893 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1',
1894 
            'block_type' => 'fromreg',
1895 
            'dbl_ovrd' => 0,
1896 
            'init' => 0,
1897 
            'init_bit_vector' => '00000000000000000000000000000000b',
1898 
            'mdl_handle' => 3.0009765625,
1899 
            'model_handle' => 3.0009765625,
1900 
            'n_bits' => 32,
1901 
            'ownership' => 2,
1902 
            'period' => '5e-009',
1903 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1904 
            'shared_memory_name' => 'debug2i',
1905 
          },
1906 
          'needs_vhdl_wrapper' => 0,
1907 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1',
1908 
        },
1909 
        'entityName' => 'x_x120',
1910 
        'ports' => {
1911 
          'data_out' => {
1912 
            'attributes' => {
1913 
              'bin_pt' => 0,
1914 
              'is_floating_block' => 1,
1915 
              'must_be_hdl_vector' => 1,
1916 
              'period' => 1,
1917 
              'port_id' => 0,
1918 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1/data_out',
1919 
              'type' => 'UFix_32_0',
1920 
            },
1921 
            'direction' => 'out',
1922 
            'hdlType' => 'std_logic_vector(31 downto 0)',
1923 
            'width' => 32,
1924 
          },
1925 
        },
1926 
      },
1927 
      'entityName' => 'x_x120',
1928 
    },
1929 
    'from_register10' => {
1930 
      'connections' => {
1931 
        'data_out' => 'from_register10.data_out',
1932 
      },
1933 
      'entity' => {
1934 
        'attributes' => {
1935 
          'entityAlreadyNetlisted' => 1,
1936 
          'generics' => [
1937 
          ],
1938 
          'is_floating_block' => 1,
1939 
          'mask' => {
1940 
            'Block_Handle' => 385.0009765625,
1941 
            'Block_handle' => 385.0009765625,
1942 
            'MDL_Handle' => 3.0009765625,
1943 
            'MDL_handle' => 3.0009765625,
1944 
            'arith_type' => 2,
1945 
            'bin_pt' => 0,
1946 
            'block_config' => 'sysgen_blockset:fromreg_config',
1947 
            'block_handle' => 385.0009765625,
1948 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10',
1949 
            'block_type' => 'fromreg',
1950 
            'dbl_ovrd' => 0,
1951 
            'init' => 0,
1952 
            'init_bit_vector' => '0b',
1953 
            'mdl_handle' => 3.0009765625,
1954 
            'model_handle' => 3.0009765625,
1955 
            'n_bits' => 1,
1956 
            'ownership' => 2,
1957 
            'period' => '5e-009',
1958 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
1959 
            'shared_memory_name' => 'register04tv',
1960 
          },
1961 
          'needs_vhdl_wrapper' => 0,
1962 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10',
1963 
        },
1964 
        'entityName' => 'x_x89',
1965 
        'ports' => {
1966 
          'data_out' => {
1967 
            'attributes' => {
1968 
              'bin_pt' => 0,
1969 
              'is_floating_block' => 1,
1970 
              'must_be_hdl_vector' => 1,
1971 
              'period' => 1,
1972 
              'port_id' => 0,
1973 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10/data_out',
1974 
              'type' => 'UFix_1_0',
1975 
            },
1976 
            'direction' => 'out',
1977 
            'hdlType' => 'std_logic_vector(0 downto 0)',
1978 
            'width' => 1,
1979 
          },
1980 
        },
1981 
      },
1982 
      'entityName' => 'x_x89',
1983 
    },
1984 
    'from_register11' => {
1985 
      'connections' => {
1986 
        'data_out' => 'from_register11.data_out',
1987 
      },
1988 
      'entity' => {
1989 
        'attributes' => {
1990 
          'entityAlreadyNetlisted' => 1,
1991 
          'generics' => [
1992 
          ],
1993 
          'is_floating_block' => 1,
1994 
          'mask' => {
1995 
            'Block_Handle' => 386.0009765625,
1996 
            'Block_handle' => 386.0009765625,
1997 
            'MDL_Handle' => 3.0009765625,
1998 
            'MDL_handle' => 3.0009765625,
1999 
            'arith_type' => 2,
2000 
            'bin_pt' => 0,
2001 
            'block_config' => 'sysgen_blockset:fromreg_config',
2002 
            'block_handle' => 386.0009765625,
2003 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11',
2004 
            'block_type' => 'fromreg',
2005 
            'dbl_ovrd' => 0,
2006 
            'init' => 0,
2007 
            'init_bit_vector' => '00000000000000000000000000000000b',
2008 
            'mdl_handle' => 3.0009765625,
2009 
            'model_handle' => 3.0009765625,
2010 
            'n_bits' => 32,
2011 
            'ownership' => 2,
2012 
            'period' => '5e-009',
2013 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2014 
            'shared_memory_name' => 'register05td',
2015 
          },
2016 
          'needs_vhdl_wrapper' => 0,
2017 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11',
2018 
        },
2019 
        'entityName' => 'x_x90',
2020 
        'ports' => {
2021 
          'data_out' => {
2022 
            'attributes' => {
2023 
              'bin_pt' => 0,
2024 
              'is_floating_block' => 1,
2025 
              'must_be_hdl_vector' => 1,
2026 
              'period' => 1,
2027 
              'port_id' => 0,
2028 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11/data_out',
2029 
              'type' => 'UFix_32_0',
2030 
            },
2031 
            'direction' => 'out',
2032 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2033 
            'width' => 32,
2034 
          },
2035 
        },
2036 
      },
2037 
      'entityName' => 'x_x90',
2038 
    },
2039 
    'from_register12' => {
2040 
      'connections' => {
2041 
        'data_out' => 'from_register12.data_out',
2042 
      },
2043 
      'entity' => {
2044 
        'attributes' => {
2045 
          'entityAlreadyNetlisted' => 1,
2046 
          'generics' => [
2047 
          ],
2048 
          'is_floating_block' => 1,
2049 
          'mask' => {
2050 
            'Block_Handle' => 387.0009765625,
2051 
            'Block_handle' => 387.0009765625,
2052 
            'MDL_Handle' => 3.0009765625,
2053 
            'MDL_handle' => 3.0009765625,
2054 
            'arith_type' => 2,
2055 
            'bin_pt' => 0,
2056 
            'block_config' => 'sysgen_blockset:fromreg_config',
2057 
            'block_handle' => 387.0009765625,
2058 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12',
2059 
            'block_type' => 'fromreg',
2060 
            'dbl_ovrd' => 0,
2061 
            'init' => 0,
2062 
            'init_bit_vector' => '0b',
2063 
            'mdl_handle' => 3.0009765625,
2064 
            'model_handle' => 3.0009765625,
2065 
            'n_bits' => 1,
2066 
            'ownership' => 2,
2067 
            'period' => '5e-009',
2068 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2069 
            'shared_memory_name' => 'register05tv',
2070 
          },
2071 
          'needs_vhdl_wrapper' => 0,
2072 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12',
2073 
        },
2074 
        'entityName' => 'x_x91',
2075 
        'ports' => {
2076 
          'data_out' => {
2077 
            'attributes' => {
2078 
              'bin_pt' => 0,
2079 
              'is_floating_block' => 1,
2080 
              'must_be_hdl_vector' => 1,
2081 
              'period' => 1,
2082 
              'port_id' => 0,
2083 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12/data_out',
2084 
              'type' => 'UFix_1_0',
2085 
            },
2086 
            'direction' => 'out',
2087 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2088 
            'width' => 1,
2089 
          },
2090 
        },
2091 
      },
2092 
      'entityName' => 'x_x91',
2093 
    },
2094 
    'from_register13' => {
2095 
      'connections' => {
2096 
        'data_out' => 'from_register13.data_out',
2097 
      },
2098 
      'entity' => {
2099 
        'attributes' => {
2100 
          'entityAlreadyNetlisted' => 1,
2101 
          'generics' => [
2102 
          ],
2103 
          'is_floating_block' => 1,
2104 
          'mask' => {
2105 
            'Block_Handle' => 388.0009765625,
2106 
            'Block_handle' => 388.0009765625,
2107 
            'MDL_Handle' => 3.0009765625,
2108 
            'MDL_handle' => 3.0009765625,
2109 
            'arith_type' => 2,
2110 
            'bin_pt' => 0,
2111 
            'block_config' => 'sysgen_blockset:fromreg_config',
2112 
            'block_handle' => 388.0009765625,
2113 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13',
2114 
            'block_type' => 'fromreg',
2115 
            'dbl_ovrd' => 0,
2116 
            'init' => 0,
2117 
            'init_bit_vector' => '00000000000000000000000000000000b',
2118 
            'mdl_handle' => 3.0009765625,
2119 
            'model_handle' => 3.0009765625,
2120 
            'n_bits' => 32,
2121 
            'ownership' => 2,
2122 
            'period' => '5e-009',
2123 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2124 
            'shared_memory_name' => 'register06td',
2125 
          },
2126 
          'needs_vhdl_wrapper' => 0,
2127 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13',
2128 
        },
2129 
        'entityName' => 'x_x92',
2130 
        'ports' => {
2131 
          'data_out' => {
2132 
            'attributes' => {
2133 
              'bin_pt' => 0,
2134 
              'is_floating_block' => 1,
2135 
              'must_be_hdl_vector' => 1,
2136 
              'period' => 1,
2137 
              'port_id' => 0,
2138 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13/data_out',
2139 
              'type' => 'UFix_32_0',
2140 
            },
2141 
            'direction' => 'out',
2142 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2143 
            'width' => 32,
2144 
          },
2145 
        },
2146 
      },
2147 
      'entityName' => 'x_x92',
2148 
    },
2149 
    'from_register14' => {
2150 
      'connections' => {
2151 
        'data_out' => 'from_register14.data_out',
2152 
      },
2153 
      'entity' => {
2154 
        'attributes' => {
2155 
          'entityAlreadyNetlisted' => 1,
2156 
          'generics' => [
2157 
          ],
2158 
          'is_floating_block' => 1,
2159 
          'mask' => {
2160 
            'Block_Handle' => 389.0009765625,
2161 
            'Block_handle' => 389.0009765625,
2162 
            'MDL_Handle' => 3.0009765625,
2163 
            'MDL_handle' => 3.0009765625,
2164 
            'arith_type' => 2,
2165 
            'bin_pt' => 0,
2166 
            'block_config' => 'sysgen_blockset:fromreg_config',
2167 
            'block_handle' => 389.0009765625,
2168 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14',
2169 
            'block_type' => 'fromreg',
2170 
            'dbl_ovrd' => 0,
2171 
            'init' => 0,
2172 
            'init_bit_vector' => '0b',
2173 
            'mdl_handle' => 3.0009765625,
2174 
            'model_handle' => 3.0009765625,
2175 
            'n_bits' => 1,
2176 
            'ownership' => 2,
2177 
            'period' => '5e-009',
2178 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2179 
            'shared_memory_name' => 'register06tv',
2180 
          },
2181 
          'needs_vhdl_wrapper' => 0,
2182 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14',
2183 
        },
2184 
        'entityName' => 'x_x93',
2185 
        'ports' => {
2186 
          'data_out' => {
2187 
            'attributes' => {
2188 
              'bin_pt' => 0,
2189 
              'is_floating_block' => 1,
2190 
              'must_be_hdl_vector' => 1,
2191 
              'period' => 1,
2192 
              'port_id' => 0,
2193 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14/data_out',
2194 
              'type' => 'UFix_1_0',
2195 
            },
2196 
            'direction' => 'out',
2197 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2198 
            'width' => 1,
2199 
          },
2200 
        },
2201 
      },
2202 
      'entityName' => 'x_x93',
2203 
    },
2204 
    'from_register15' => {
2205 
      'connections' => {
2206 
        'data_out' => 'from_register15.data_out',
2207 
      },
2208 
      'entity' => {
2209 
        'attributes' => {
2210 
          'entityAlreadyNetlisted' => 1,
2211 
          'generics' => [
2212 
          ],
2213 
          'is_floating_block' => 1,
2214 
          'mask' => {
2215 
            'Block_Handle' => 390.0009765625,
2216 
            'Block_handle' => 390.0009765625,
2217 
            'MDL_Handle' => 3.0009765625,
2218 
            'MDL_handle' => 3.0009765625,
2219 
            'arith_type' => 2,
2220 
            'bin_pt' => 0,
2221 
            'block_config' => 'sysgen_blockset:fromreg_config',
2222 
            'block_handle' => 390.0009765625,
2223 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15',
2224 
            'block_type' => 'fromreg',
2225 
            'dbl_ovrd' => 0,
2226 
            'init' => 0,
2227 
            'init_bit_vector' => '0b',
2228 
            'mdl_handle' => 3.0009765625,
2229 
            'model_handle' => 3.0009765625,
2230 
            'n_bits' => 1,
2231 
            'ownership' => 2,
2232 
            'period' => '5e-009',
2233 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2234 
            'shared_memory_name' => 'DMA_Host2Board_Done',
2235 
          },
2236 
          'needs_vhdl_wrapper' => 0,
2237 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15',
2238 
        },
2239 
        'entityName' => 'x_x94',
2240 
        'ports' => {
2241 
          'data_out' => {
2242 
            'attributes' => {
2243 
              'bin_pt' => 0,
2244 
              'is_floating_block' => 1,
2245 
              'must_be_hdl_vector' => 1,
2246 
              'period' => 1,
2247 
              'port_id' => 0,
2248 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15/data_out',
2249 
              'type' => 'UFix_1_0',
2250 
            },
2251 
            'direction' => 'out',
2252 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2253 
            'width' => 1,
2254 
          },
2255 
        },
2256 
      },
2257 
      'entityName' => 'x_x94',
2258 
    },
2259 
    'from_register16' => {
2260 
      'connections' => {
2261 
        'data_out' => 'from_register16.data_out',
2262 
      },
2263 
      'entity' => {
2264 
        'attributes' => {
2265 
          'entityAlreadyNetlisted' => 1,
2266 
          'generics' => [
2267 
          ],
2268 
          'is_floating_block' => 1,
2269 
          'mask' => {
2270 
            'Block_Handle' => 391.0009765625,
2271 
            'Block_handle' => 391.0009765625,
2272 
            'MDL_Handle' => 3.0009765625,
2273 
            'MDL_handle' => 3.0009765625,
2274 
            'arith_type' => 2,
2275 
            'bin_pt' => 0,
2276 
            'block_config' => 'sysgen_blockset:fromreg_config',
2277 
            'block_handle' => 391.0009765625,
2278 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16',
2279 
            'block_type' => 'fromreg',
2280 
            'dbl_ovrd' => 0,
2281 
            'init' => 0,
2282 
            'init_bit_vector' => '0b',
2283 
            'mdl_handle' => 3.0009765625,
2284 
            'model_handle' => 3.0009765625,
2285 
            'n_bits' => 1,
2286 
            'ownership' => 2,
2287 
            'period' => '5e-009',
2288 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2289 
            'shared_memory_name' => 'DMA_Host2Board_Busy',
2290 
          },
2291 
          'needs_vhdl_wrapper' => 0,
2292 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16',
2293 
        },
2294 
        'entityName' => 'x_x95',
2295 
        'ports' => {
2296 
          'data_out' => {
2297 
            'attributes' => {
2298 
              'bin_pt' => 0,
2299 
              'is_floating_block' => 1,
2300 
              'must_be_hdl_vector' => 1,
2301 
              'period' => 1,
2302 
              'port_id' => 0,
2303 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16/data_out',
2304 
              'type' => 'UFix_1_0',
2305 
            },
2306 
            'direction' => 'out',
2307 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2308 
            'width' => 1,
2309 
          },
2310 
        },
2311 
      },
2312 
      'entityName' => 'x_x95',
2313 
    },
2314 
    'from_register17' => {
2315 
      'connections' => {
2316 
        'data_out' => 'from_register17.data_out',
2317 
      },
2318 
      'entity' => {
2319 
        'attributes' => {
2320 
          'entityAlreadyNetlisted' => 1,
2321 
          'generics' => [
2322 
          ],
2323 
          'is_floating_block' => 1,
2324 
          'mask' => {
2325 
            'Block_Handle' => 392.0009765625,
2326 
            'Block_handle' => 392.0009765625,
2327 
            'MDL_Handle' => 3.0009765625,
2328 
            'MDL_handle' => 3.0009765625,
2329 
            'arith_type' => 2,
2330 
            'bin_pt' => 0,
2331 
            'block_config' => 'sysgen_blockset:fromreg_config',
2332 
            'block_handle' => 392.0009765625,
2333 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17',
2334 
            'block_type' => 'fromreg',
2335 
            'dbl_ovrd' => 0,
2336 
            'init' => 0,
2337 
            'init_bit_vector' => '00000000000000000000000000000000b',
2338 
            'mdl_handle' => 3.0009765625,
2339 
            'model_handle' => 3.0009765625,
2340 
            'n_bits' => 32,
2341 
            'ownership' => 2,
2342 
            'period' => '5e-009',
2343 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2344 
            'shared_memory_name' => 'register07td',
2345 
          },
2346 
          'needs_vhdl_wrapper' => 0,
2347 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17',
2348 
        },
2349 
        'entityName' => 'x_x96',
2350 
        'ports' => {
2351 
          'data_out' => {
2352 
            'attributes' => {
2353 
              'bin_pt' => 0,
2354 
              'is_floating_block' => 1,
2355 
              'must_be_hdl_vector' => 1,
2356 
              'period' => 1,
2357 
              'port_id' => 0,
2358 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17/data_out',
2359 
              'type' => 'UFix_32_0',
2360 
            },
2361 
            'direction' => 'out',
2362 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2363 
            'width' => 32,
2364 
          },
2365 
        },
2366 
      },
2367 
      'entityName' => 'x_x96',
2368 
    },
2369 
    'from_register18' => {
2370 
      'connections' => {
2371 
        'data_out' => 'from_register18.data_out',
2372 
      },
2373 
      'entity' => {
2374 
        'attributes' => {
2375 
          'entityAlreadyNetlisted' => 1,
2376 
          'generics' => [
2377 
          ],
2378 
          'is_floating_block' => 1,
2379 
          'mask' => {
2380 
            'Block_Handle' => 393.0009765625,
2381 
            'Block_handle' => 393.0009765625,
2382 
            'MDL_Handle' => 3.0009765625,
2383 
            'MDL_handle' => 3.0009765625,
2384 
            'arith_type' => 2,
2385 
            'bin_pt' => 0,
2386 
            'block_config' => 'sysgen_blockset:fromreg_config',
2387 
            'block_handle' => 393.0009765625,
2388 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18',
2389 
            'block_type' => 'fromreg',
2390 
            'dbl_ovrd' => 0,
2391 
            'init' => 0,
2392 
            'init_bit_vector' => '0b',
2393 
            'mdl_handle' => 3.0009765625,
2394 
            'model_handle' => 3.0009765625,
2395 
            'n_bits' => 1,
2396 
            'ownership' => 2,
2397 
            'period' => '5e-009',
2398 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2399 
            'shared_memory_name' => 'register07tv',
2400 
          },
2401 
          'needs_vhdl_wrapper' => 0,
2402 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18',
2403 
        },
2404 
        'entityName' => 'x_x97',
2405 
        'ports' => {
2406 
          'data_out' => {
2407 
            'attributes' => {
2408 
              'bin_pt' => 0,
2409 
              'is_floating_block' => 1,
2410 
              'must_be_hdl_vector' => 1,
2411 
              'period' => 1,
2412 
              'port_id' => 0,
2413 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18/data_out',
2414 
              'type' => 'UFix_1_0',
2415 
            },
2416 
            'direction' => 'out',
2417 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2418 
            'width' => 1,
2419 
          },
2420 
        },
2421 
      },
2422 
      'entityName' => 'x_x97',
2423 
    },
2424 
    'from_register19' => {
2425 
      'connections' => {
2426 
        'data_out' => 'from_register19.data_out',
2427 
      },
2428 
      'entity' => {
2429 
        'attributes' => {
2430 
          'entityAlreadyNetlisted' => 1,
2431 
          'generics' => [
2432 
          ],
2433 
          'is_floating_block' => 1,
2434 
          'mask' => {
2435 
            'Block_Handle' => 2526.06408691406,
2436 
            'Block_handle' => 2526.06408691406,
2437 
            'MDL_Handle' => 3.0009765625,
2438 
            'MDL_handle' => 3.0009765625,
2439 
            'arith_type' => 2,
2440 
            'bin_pt' => 0,
2441 
            'block_config' => 'sysgen_blockset:fromreg_config',
2442 
            'block_handle' => 2526.06408691406,
2443 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19',
2444 
            'block_type' => 'fromreg',
2445 
            'dbl_ovrd' => 0,
2446 
            'init' => 0,
2447 
            'init_bit_vector' => '00000000000000000000000000000000b',
2448 
            'mdl_handle' => 3.0009765625,
2449 
            'model_handle' => 3.0009765625,
2450 
            'n_bits' => 32,
2451 
            'ownership' => 2,
2452 
            'period' => '5e-009',
2453 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2454 
            'shared_memory_name' => 'debug4i',
2455 
          },
2456 
          'needs_vhdl_wrapper' => 0,
2457 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19',
2458 
        },
2459 
        'entityName' => 'x_x121',
2460 
        'ports' => {
2461 
          'data_out' => {
2462 
            'attributes' => {
2463 
              'bin_pt' => 0,
2464 
              'is_floating_block' => 1,
2465 
              'must_be_hdl_vector' => 1,
2466 
              'period' => 1,
2467 
              'port_id' => 0,
2468 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19/data_out',
2469 
              'type' => 'UFix_32_0',
2470 
            },
2471 
            'direction' => 'out',
2472 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2473 
            'width' => 32,
2474 
          },
2475 
        },
2476 
      },
2477 
      'entityName' => 'x_x121',
2478 
    },
2479 
    'from_register2' => {
2480 
      'connections' => {
2481 
        'data_out' => 'from_register2.data_out',
2482 
      },
2483 
      'entity' => {
2484 
        'attributes' => {
2485 
          'entityAlreadyNetlisted' => 1,
2486 
          'generics' => [
2487 
          ],
2488 
          'is_floating_block' => 1,
2489 
          'mask' => {
2490 
            'Block_Handle' => 2527.00158691406,
2491 
            'Block_handle' => 2527.00158691406,
2492 
            'MDL_Handle' => 3.0009765625,
2493 
            'MDL_handle' => 3.0009765625,
2494 
            'arith_type' => 2,
2495 
            'bin_pt' => 0,
2496 
            'block_config' => 'sysgen_blockset:fromreg_config',
2497 
            'block_handle' => 2527.00158691406,
2498 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2',
2499 
            'block_type' => 'fromreg',
2500 
            'dbl_ovrd' => 0,
2501 
            'init' => 0,
2502 
            'init_bit_vector' => '00000000000000000000000000000000b',
2503 
            'mdl_handle' => 3.0009765625,
2504 
            'model_handle' => 3.0009765625,
2505 
            'n_bits' => 32,
2506 
            'ownership' => 2,
2507 
            'period' => '5e-009',
2508 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2509 
            'shared_memory_name' => 'debug3i',
2510 
          },
2511 
          'needs_vhdl_wrapper' => 0,
2512 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2',
2513 
        },
2514 
        'entityName' => 'x_x122',
2515 
        'ports' => {
2516 
          'data_out' => {
2517 
            'attributes' => {
2518 
              'bin_pt' => 0,
2519 
              'is_floating_block' => 1,
2520 
              'must_be_hdl_vector' => 1,
2521 
              'period' => 1,
2522 
              'port_id' => 0,
2523 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2/data_out',
2524 
              'type' => 'UFix_32_0',
2525 
            },
2526 
            'direction' => 'out',
2527 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2528 
            'width' => 32,
2529 
          },
2530 
        },
2531 
      },
2532 
      'entityName' => 'x_x122',
2533 
    },
2534 
    'from_register20' => {
2535 
      'connections' => {
2536 
        'data_out' => 'from_register20.data_out',
2537 
      },
2538 
      'entity' => {
2539 
        'attributes' => {
2540 
          'entityAlreadyNetlisted' => 1,
2541 
          'generics' => [
2542 
          ],
2543 
          'is_floating_block' => 1,
2544 
          'mask' => {
2545 
            'Block_Handle' => 396.0009765625,
2546 
            'Block_handle' => 396.0009765625,
2547 
            'MDL_Handle' => 3.0009765625,
2548 
            'MDL_handle' => 3.0009765625,
2549 
            'arith_type' => 2,
2550 
            'bin_pt' => 0,
2551 
            'block_config' => 'sysgen_blockset:fromreg_config',
2552 
            'block_handle' => 396.0009765625,
2553 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20',
2554 
            'block_type' => 'fromreg',
2555 
            'dbl_ovrd' => 0,
2556 
            'init' => 0,
2557 
            'init_bit_vector' => '00000000000000000000000000000000b',
2558 
            'mdl_handle' => 3.0009765625,
2559 
            'model_handle' => 3.0009765625,
2560 
            'n_bits' => 32,
2561 
            'ownership' => 2,
2562 
            'period' => '5e-009',
2563 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2564 
            'shared_memory_name' => 'register08td',
2565 
          },
2566 
          'needs_vhdl_wrapper' => 0,
2567 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20',
2568 
        },
2569 
        'entityName' => 'x_x98',
2570 
        'ports' => {
2571 
          'data_out' => {
2572 
            'attributes' => {
2573 
              'bin_pt' => 0,
2574 
              'is_floating_block' => 1,
2575 
              'must_be_hdl_vector' => 1,
2576 
              'period' => 1,
2577 
              'port_id' => 0,
2578 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20/data_out',
2579 
              'type' => 'UFix_32_0',
2580 
            },
2581 
            'direction' => 'out',
2582 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2583 
            'width' => 32,
2584 
          },
2585 
        },
2586 
      },
2587 
      'entityName' => 'x_x98',
2588 
    },
2589 
    'from_register21' => {
2590 
      'connections' => {
2591 
        'data_out' => 'from_register21.data_out',
2592 
      },
2593 
      'entity' => {
2594 
        'attributes' => {
2595 
          'entityAlreadyNetlisted' => 1,
2596 
          'generics' => [
2597 
          ],
2598 
          'is_floating_block' => 1,
2599 
          'mask' => {
2600 
            'Block_Handle' => 397.0009765625,
2601 
            'Block_handle' => 397.0009765625,
2602 
            'MDL_Handle' => 3.0009765625,
2603 
            'MDL_handle' => 3.0009765625,
2604 
            'arith_type' => 2,
2605 
            'bin_pt' => 0,
2606 
            'block_config' => 'sysgen_blockset:fromreg_config',
2607 
            'block_handle' => 397.0009765625,
2608 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21',
2609 
            'block_type' => 'fromreg',
2610 
            'dbl_ovrd' => 0,
2611 
            'init' => 0,
2612 
            'init_bit_vector' => '0b',
2613 
            'mdl_handle' => 3.0009765625,
2614 
            'model_handle' => 3.0009765625,
2615 
            'n_bits' => 1,
2616 
            'ownership' => 2,
2617 
            'period' => '5e-009',
2618 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2619 
            'shared_memory_name' => 'register08tv',
2620 
          },
2621 
          'needs_vhdl_wrapper' => 0,
2622 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21',
2623 
        },
2624 
        'entityName' => 'x_x99',
2625 
        'ports' => {
2626 
          'data_out' => {
2627 
            'attributes' => {
2628 
              'bin_pt' => 0,
2629 
              'is_floating_block' => 1,
2630 
              'must_be_hdl_vector' => 1,
2631 
              'period' => 1,
2632 
              'port_id' => 0,
2633 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21/data_out',
2634 
              'type' => 'UFix_1_0',
2635 
            },
2636 
            'direction' => 'out',
2637 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2638 
            'width' => 1,
2639 
          },
2640 
        },
2641 
      },
2642 
      'entityName' => 'x_x99',
2643 
    },
2644 
    'from_register22' => {
2645 
      'connections' => {
2646 
        'data_out' => 'from_register22.data_out',
2647 
      },
2648 
      'entity' => {
2649 
        'attributes' => {
2650 
          'entityAlreadyNetlisted' => 1,
2651 
          'generics' => [
2652 
          ],
2653 
          'is_floating_block' => 1,
2654 
          'mask' => {
2655 
            'Block_Handle' => 398.0009765625,
2656 
            'Block_handle' => 398.0009765625,
2657 
            'MDL_Handle' => 3.0009765625,
2658 
            'MDL_handle' => 3.0009765625,
2659 
            'arith_type' => 2,
2660 
            'bin_pt' => 0,
2661 
            'block_config' => 'sysgen_blockset:fromreg_config',
2662 
            'block_handle' => 398.0009765625,
2663 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22',
2664 
            'block_type' => 'fromreg',
2665 
            'dbl_ovrd' => 0,
2666 
            'init' => 0,
2667 
            'init_bit_vector' => '00000000000000000000000000000000b',
2668 
            'mdl_handle' => 3.0009765625,
2669 
            'model_handle' => 3.0009765625,
2670 
            'n_bits' => 32,
2671 
            'ownership' => 2,
2672 
            'period' => '5e-009',
2673 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2674 
            'shared_memory_name' => 'register09td',
2675 
          },
2676 
          'needs_vhdl_wrapper' => 0,
2677 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22',
2678 
        },
2679 
        'entityName' => 'x_x100',
2680 
        'ports' => {
2681 
          'data_out' => {
2682 
            'attributes' => {
2683 
              'bin_pt' => 0,
2684 
              'is_floating_block' => 1,
2685 
              'must_be_hdl_vector' => 1,
2686 
              'period' => 1,
2687 
              'port_id' => 0,
2688 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22/data_out',
2689 
              'type' => 'UFix_32_0',
2690 
            },
2691 
            'direction' => 'out',
2692 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2693 
            'width' => 32,
2694 
          },
2695 
        },
2696 
      },
2697 
      'entityName' => 'x_x100',
2698 
    },
2699 
    'from_register23' => {
2700 
      'connections' => {
2701 
        'data_out' => 'from_register23.data_out',
2702 
      },
2703 
      'entity' => {
2704 
        'attributes' => {
2705 
          'entityAlreadyNetlisted' => 1,
2706 
          'generics' => [
2707 
          ],
2708 
          'is_floating_block' => 1,
2709 
          'mask' => {
2710 
            'Block_Handle' => 399.0009765625,
2711 
            'Block_handle' => 399.0009765625,
2712 
            'MDL_Handle' => 3.0009765625,
2713 
            'MDL_handle' => 3.0009765625,
2714 
            'arith_type' => 2,
2715 
            'bin_pt' => 0,
2716 
            'block_config' => 'sysgen_blockset:fromreg_config',
2717 
            'block_handle' => 399.0009765625,
2718 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23',
2719 
            'block_type' => 'fromreg',
2720 
            'dbl_ovrd' => 0,
2721 
            'init' => 0,
2722 
            'init_bit_vector' => '0b',
2723 
            'mdl_handle' => 3.0009765625,
2724 
            'model_handle' => 3.0009765625,
2725 
            'n_bits' => 1,
2726 
            'ownership' => 2,
2727 
            'period' => '5e-009',
2728 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2729 
            'shared_memory_name' => 'register09tv',
2730 
          },
2731 
          'needs_vhdl_wrapper' => 0,
2732 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23',
2733 
        },
2734 
        'entityName' => 'x_x101',
2735 
        'ports' => {
2736 
          'data_out' => {
2737 
            'attributes' => {
2738 
              'bin_pt' => 0,
2739 
              'is_floating_block' => 1,
2740 
              'must_be_hdl_vector' => 1,
2741 
              'period' => 1,
2742 
              'port_id' => 0,
2743 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23/data_out',
2744 
              'type' => 'UFix_1_0',
2745 
            },
2746 
            'direction' => 'out',
2747 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2748 
            'width' => 1,
2749 
          },
2750 
        },
2751 
      },
2752 
      'entityName' => 'x_x101',
2753 
    },
2754 
    'from_register24' => {
2755 
      'connections' => {
2756 
        'data_out' => 'from_register24.data_out',
2757 
      },
2758 
      'entity' => {
2759 
        'attributes' => {
2760 
          'entityAlreadyNetlisted' => 1,
2761 
          'generics' => [
2762 
          ],
2763 
          'is_floating_block' => 1,
2764 
          'mask' => {
2765 
            'Block_Handle' => 400.0009765625,
2766 
            'Block_handle' => 400.0009765625,
2767 
            'MDL_Handle' => 3.0009765625,
2768 
            'MDL_handle' => 3.0009765625,
2769 
            'arith_type' => 2,
2770 
            'bin_pt' => 0,
2771 
            'block_config' => 'sysgen_blockset:fromreg_config',
2772 
            'block_handle' => 400.0009765625,
2773 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24',
2774 
            'block_type' => 'fromreg',
2775 
            'dbl_ovrd' => 0,
2776 
            'init' => 0,
2777 
            'init_bit_vector' => '00000000000000000000000000000000b',
2778 
            'mdl_handle' => 3.0009765625,
2779 
            'model_handle' => 3.0009765625,
2780 
            'n_bits' => 32,
2781 
            'ownership' => 2,
2782 
            'period' => '5e-009',
2783 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2784 
            'shared_memory_name' => 'register10td',
2785 
          },
2786 
          'needs_vhdl_wrapper' => 0,
2787 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24',
2788 
        },
2789 
        'entityName' => 'x_x102',
2790 
        'ports' => {
2791 
          'data_out' => {
2792 
            'attributes' => {
2793 
              'bin_pt' => 0,
2794 
              'is_floating_block' => 1,
2795 
              'must_be_hdl_vector' => 1,
2796 
              'period' => 1,
2797 
              'port_id' => 0,
2798 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24/data_out',
2799 
              'type' => 'UFix_32_0',
2800 
            },
2801 
            'direction' => 'out',
2802 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2803 
            'width' => 32,
2804 
          },
2805 
        },
2806 
      },
2807 
      'entityName' => 'x_x102',
2808 
    },
2809 
    'from_register25' => {
2810 
      'connections' => {
2811 
        'data_out' => 'from_register25.data_out',
2812 
      },
2813 
      'entity' => {
2814 
        'attributes' => {
2815 
          'entityAlreadyNetlisted' => 1,
2816 
          'generics' => [
2817 
          ],
2818 
          'is_floating_block' => 1,
2819 
          'mask' => {
2820 
            'Block_Handle' => 401.0009765625,
2821 
            'Block_handle' => 401.0009765625,
2822 
            'MDL_Handle' => 3.0009765625,
2823 
            'MDL_handle' => 3.0009765625,
2824 
            'arith_type' => 2,
2825 
            'bin_pt' => 0,
2826 
            'block_config' => 'sysgen_blockset:fromreg_config',
2827 
            'block_handle' => 401.0009765625,
2828 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25',
2829 
            'block_type' => 'fromreg',
2830 
            'dbl_ovrd' => 0,
2831 
            'init' => 0,
2832 
            'init_bit_vector' => '0b',
2833 
            'mdl_handle' => 3.0009765625,
2834 
            'model_handle' => 3.0009765625,
2835 
            'n_bits' => 1,
2836 
            'ownership' => 2,
2837 
            'period' => '5e-009',
2838 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2839 
            'shared_memory_name' => 'register10tv',
2840 
          },
2841 
          'needs_vhdl_wrapper' => 0,
2842 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25',
2843 
        },
2844 
        'entityName' => 'x_x103',
2845 
        'ports' => {
2846 
          'data_out' => {
2847 
            'attributes' => {
2848 
              'bin_pt' => 0,
2849 
              'is_floating_block' => 1,
2850 
              'must_be_hdl_vector' => 1,
2851 
              'period' => 1,
2852 
              'port_id' => 0,
2853 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25/data_out',
2854 
              'type' => 'UFix_1_0',
2855 
            },
2856 
            'direction' => 'out',
2857 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2858 
            'width' => 1,
2859 
          },
2860 
        },
2861 
      },
2862 
      'entityName' => 'x_x103',
2863 
    },
2864 
    'from_register26' => {
2865 
      'connections' => {
2866 
        'data_out' => 'from_register26.data_out',
2867 
      },
2868 
      'entity' => {
2869 
        'attributes' => {
2870 
          'entityAlreadyNetlisted' => 1,
2871 
          'generics' => [
2872 
          ],
2873 
          'is_floating_block' => 1,
2874 
          'mask' => {
2875 
            'Block_Handle' => 402.0009765625,
2876 
            'Block_handle' => 402.0009765625,
2877 
            'MDL_Handle' => 3.0009765625,
2878 
            'MDL_handle' => 3.0009765625,
2879 
            'arith_type' => 2,
2880 
            'bin_pt' => 0,
2881 
            'block_config' => 'sysgen_blockset:fromreg_config',
2882 
            'block_handle' => 402.0009765625,
2883 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26',
2884 
            'block_type' => 'fromreg',
2885 
            'dbl_ovrd' => 0,
2886 
            'init' => 0,
2887 
            'init_bit_vector' => '00000000000000000000000000000000b',
2888 
            'mdl_handle' => 3.0009765625,
2889 
            'model_handle' => 3.0009765625,
2890 
            'n_bits' => 32,
2891 
            'ownership' => 2,
2892 
            'period' => '5e-009',
2893 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2894 
            'shared_memory_name' => 'register11td',
2895 
          },
2896 
          'needs_vhdl_wrapper' => 0,
2897 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26',
2898 
        },
2899 
        'entityName' => 'x_x104',
2900 
        'ports' => {
2901 
          'data_out' => {
2902 
            'attributes' => {
2903 
              'bin_pt' => 0,
2904 
              'is_floating_block' => 1,
2905 
              'must_be_hdl_vector' => 1,
2906 
              'period' => 1,
2907 
              'port_id' => 0,
2908 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26/data_out',
2909 
              'type' => 'UFix_32_0',
2910 
            },
2911 
            'direction' => 'out',
2912 
            'hdlType' => 'std_logic_vector(31 downto 0)',
2913 
            'width' => 32,
2914 
          },
2915 
        },
2916 
      },
2917 
      'entityName' => 'x_x104',
2918 
    },
2919 
    'from_register27' => {
2920 
      'connections' => {
2921 
        'data_out' => 'from_register27.data_out',
2922 
      },
2923 
      'entity' => {
2924 
        'attributes' => {
2925 
          'entityAlreadyNetlisted' => 1,
2926 
          'generics' => [
2927 
          ],
2928 
          'is_floating_block' => 1,
2929 
          'mask' => {
2930 
            'Block_Handle' => 403.0009765625,
2931 
            'Block_handle' => 403.0009765625,
2932 
            'MDL_Handle' => 3.0009765625,
2933 
            'MDL_handle' => 3.0009765625,
2934 
            'arith_type' => 2,
2935 
            'bin_pt' => 0,
2936 
            'block_config' => 'sysgen_blockset:fromreg_config',
2937 
            'block_handle' => 403.0009765625,
2938 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27',
2939 
            'block_type' => 'fromreg',
2940 
            'dbl_ovrd' => 0,
2941 
            'init' => 0,
2942 
            'init_bit_vector' => '0b',
2943 
            'mdl_handle' => 3.0009765625,
2944 
            'model_handle' => 3.0009765625,
2945 
            'n_bits' => 1,
2946 
            'ownership' => 2,
2947 
            'period' => '5e-009',
2948 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
2949 
            'shared_memory_name' => 'register11tv',
2950 
          },
2951 
          'needs_vhdl_wrapper' => 0,
2952 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27',
2953 
        },
2954 
        'entityName' => 'x_x105',
2955 
        'ports' => {
2956 
          'data_out' => {
2957 
            'attributes' => {
2958 
              'bin_pt' => 0,
2959 
              'is_floating_block' => 1,
2960 
              'must_be_hdl_vector' => 1,
2961 
              'period' => 1,
2962 
              'port_id' => 0,
2963 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27/data_out',
2964 
              'type' => 'UFix_1_0',
2965 
            },
2966 
            'direction' => 'out',
2967 
            'hdlType' => 'std_logic_vector(0 downto 0)',
2968 
            'width' => 1,
2969 
          },
2970 
        },
2971 
      },
2972 
      'entityName' => 'x_x105',
2973 
    },
2974 
    'from_register28' => {
2975 
      'connections' => {
2976 
        'data_out' => 'from_register28.data_out',
2977 
      },
2978 
      'entity' => {
2979 
        'attributes' => {
2980 
          'entityAlreadyNetlisted' => 1,
2981 
          'generics' => [
2982 
          ],
2983 
          'is_floating_block' => 1,
2984 
          'mask' => {
2985 
            'Block_Handle' => 404.0009765625,
2986 
            'Block_handle' => 404.0009765625,
2987 
            'MDL_Handle' => 3.0009765625,
2988 
            'MDL_handle' => 3.0009765625,
2989 
            'arith_type' => 2,
2990 
            'bin_pt' => 0,
2991 
            'block_config' => 'sysgen_blockset:fromreg_config',
2992 
            'block_handle' => 404.0009765625,
2993 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28',
2994 
            'block_type' => 'fromreg',
2995 
            'dbl_ovrd' => 0,
2996 
            'init' => 0,
2997 
            'init_bit_vector' => '00000000000000000000000000000000b',
2998 
            'mdl_handle' => 3.0009765625,
2999 
            'model_handle' => 3.0009765625,
3000 
            'n_bits' => 32,
3001 
            'ownership' => 2,
3002 
            'period' => '5e-009',
3003 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3004 
            'shared_memory_name' => 'register12td',
3005 
          },
3006 
          'needs_vhdl_wrapper' => 0,
3007 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28',
3008 
        },
3009 
        'entityName' => 'x_x106',
3010 
        'ports' => {
3011 
          'data_out' => {
3012 
            'attributes' => {
3013 
              'bin_pt' => 0,
3014 
              'is_floating_block' => 1,
3015 
              'must_be_hdl_vector' => 1,
3016 
              'period' => 1,
3017 
              'port_id' => 0,
3018 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28/data_out',
3019 
              'type' => 'UFix_32_0',
3020 
            },
3021 
            'direction' => 'out',
3022 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3023 
            'width' => 32,
3024 
          },
3025 
        },
3026 
      },
3027 
      'entityName' => 'x_x106',
3028 
    },
3029 
    'from_register29' => {
3030 
      'connections' => {
3031 
        'data_out' => 'from_register29.data_out',
3032 
      },
3033 
      'entity' => {
3034 
        'attributes' => {
3035 
          'entityAlreadyNetlisted' => 1,
3036 
          'generics' => [
3037 
          ],
3038 
          'is_floating_block' => 1,
3039 
          'mask' => {
3040 
            'Block_Handle' => 405.0009765625,
3041 
            'Block_handle' => 405.0009765625,
3042 
            'MDL_Handle' => 3.0009765625,
3043 
            'MDL_handle' => 3.0009765625,
3044 
            'arith_type' => 2,
3045 
            'bin_pt' => 0,
3046 
            'block_config' => 'sysgen_blockset:fromreg_config',
3047 
            'block_handle' => 405.0009765625,
3048 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29',
3049 
            'block_type' => 'fromreg',
3050 
            'dbl_ovrd' => 0,
3051 
            'init' => 0,
3052 
            'init_bit_vector' => '0b',
3053 
            'mdl_handle' => 3.0009765625,
3054 
            'model_handle' => 3.0009765625,
3055 
            'n_bits' => 1,
3056 
            'ownership' => 2,
3057 
            'period' => '5e-009',
3058 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3059 
            'shared_memory_name' => 'register12tv',
3060 
          },
3061 
          'needs_vhdl_wrapper' => 0,
3062 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29',
3063 
        },
3064 
        'entityName' => 'x_x107',
3065 
        'ports' => {
3066 
          'data_out' => {
3067 
            'attributes' => {
3068 
              'bin_pt' => 0,
3069 
              'is_floating_block' => 1,
3070 
              'must_be_hdl_vector' => 1,
3071 
              'period' => 1,
3072 
              'port_id' => 0,
3073 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29/data_out',
3074 
              'type' => 'UFix_1_0',
3075 
            },
3076 
            'direction' => 'out',
3077 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3078 
            'width' => 1,
3079 
          },
3080 
        },
3081 
      },
3082 
      'entityName' => 'x_x107',
3083 
    },
3084 
    'from_register3' => {
3085 
      'connections' => {
3086 
        'data_out' => 'from_register3.data_out',
3087 
      },
3088 
      'entity' => {
3089 
        'attributes' => {
3090 
          'entityAlreadyNetlisted' => 1,
3091 
          'generics' => [
3092 
          ],
3093 
          'is_floating_block' => 1,
3094 
          'mask' => {
3095 
            'Block_Handle' => 406.0009765625,
3096 
            'Block_handle' => 406.0009765625,
3097 
            'MDL_Handle' => 3.0009765625,
3098 
            'MDL_handle' => 3.0009765625,
3099 
            'arith_type' => 2,
3100 
            'bin_pt' => 0,
3101 
            'block_config' => 'sysgen_blockset:fromreg_config',
3102 
            'block_handle' => 406.0009765625,
3103 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3',
3104 
            'block_type' => 'fromreg',
3105 
            'dbl_ovrd' => 0,
3106 
            'init' => 0,
3107 
            'init_bit_vector' => '00000000000000000000000000000000b',
3108 
            'mdl_handle' => 3.0009765625,
3109 
            'model_handle' => 3.0009765625,
3110 
            'n_bits' => 32,
3111 
            'ownership' => 2,
3112 
            'period' => '5e-009',
3113 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3114 
            'shared_memory_name' => 'register01td',
3115 
          },
3116 
          'needs_vhdl_wrapper' => 0,
3117 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3',
3118 
        },
3119 
        'entityName' => 'x_x108',
3120 
        'ports' => {
3121 
          'data_out' => {
3122 
            'attributes' => {
3123 
              'bin_pt' => 0,
3124 
              'is_floating_block' => 1,
3125 
              'must_be_hdl_vector' => 1,
3126 
              'period' => 1,
3127 
              'port_id' => 0,
3128 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3/data_out',
3129 
              'type' => 'UFix_32_0',
3130 
            },
3131 
            'direction' => 'out',
3132 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3133 
            'width' => 32,
3134 
          },
3135 
        },
3136 
      },
3137 
      'entityName' => 'x_x108',
3138 
    },
3139 
    'from_register30' => {
3140 
      'connections' => {
3141 
        'data_out' => 'from_register30.data_out',
3142 
      },
3143 
      'entity' => {
3144 
        'attributes' => {
3145 
          'entityAlreadyNetlisted' => 1,
3146 
          'generics' => [
3147 
          ],
3148 
          'is_floating_block' => 1,
3149 
          'mask' => {
3150 
            'Block_Handle' => 407.0009765625,
3151 
            'Block_handle' => 407.0009765625,
3152 
            'MDL_Handle' => 3.0009765625,
3153 
            'MDL_handle' => 3.0009765625,
3154 
            'arith_type' => 2,
3155 
            'bin_pt' => 0,
3156 
            'block_config' => 'sysgen_blockset:fromreg_config',
3157 
            'block_handle' => 407.0009765625,
3158 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30',
3159 
            'block_type' => 'fromreg',
3160 
            'dbl_ovrd' => 0,
3161 
            'init' => 0,
3162 
            'init_bit_vector' => '00000000000000000000000000000000b',
3163 
            'mdl_handle' => 3.0009765625,
3164 
            'model_handle' => 3.0009765625,
3165 
            'n_bits' => 32,
3166 
            'ownership' => 2,
3167 
            'period' => '5e-009',
3168 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3169 
            'shared_memory_name' => 'register13td',
3170 
          },
3171 
          'needs_vhdl_wrapper' => 0,
3172 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30',
3173 
        },
3174 
        'entityName' => 'x_x109',
3175 
        'ports' => {
3176 
          'data_out' => {
3177 
            'attributes' => {
3178 
              'bin_pt' => 0,
3179 
              'is_floating_block' => 1,
3180 
              'must_be_hdl_vector' => 1,
3181 
              'period' => 1,
3182 
              'port_id' => 0,
3183 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30/data_out',
3184 
              'type' => 'UFix_32_0',
3185 
            },
3186 
            'direction' => 'out',
3187 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3188 
            'width' => 32,
3189 
          },
3190 
        },
3191 
      },
3192 
      'entityName' => 'x_x109',
3193 
    },
3194 
    'from_register31' => {
3195 
      'connections' => {
3196 
        'data_out' => 'from_register31.data_out',
3197 
      },
3198 
      'entity' => {
3199 
        'attributes' => {
3200 
          'entityAlreadyNetlisted' => 1,
3201 
          'generics' => [
3202 
          ],
3203 
          'is_floating_block' => 1,
3204 
          'mask' => {
3205 
            'Block_Handle' => 408.0009765625,
3206 
            'Block_handle' => 408.0009765625,
3207 
            'MDL_Handle' => 3.0009765625,
3208 
            'MDL_handle' => 3.0009765625,
3209 
            'arith_type' => 2,
3210 
            'bin_pt' => 0,
3211 
            'block_config' => 'sysgen_blockset:fromreg_config',
3212 
            'block_handle' => 408.0009765625,
3213 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31',
3214 
            'block_type' => 'fromreg',
3215 
            'dbl_ovrd' => 0,
3216 
            'init' => 0,
3217 
            'init_bit_vector' => '0b',
3218 
            'mdl_handle' => 3.0009765625,
3219 
            'model_handle' => 3.0009765625,
3220 
            'n_bits' => 1,
3221 
            'ownership' => 2,
3222 
            'period' => '5e-009',
3223 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3224 
            'shared_memory_name' => 'register13tv',
3225 
          },
3226 
          'needs_vhdl_wrapper' => 0,
3227 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31',
3228 
        },
3229 
        'entityName' => 'x_x110',
3230 
        'ports' => {
3231 
          'data_out' => {
3232 
            'attributes' => {
3233 
              'bin_pt' => 0,
3234 
              'is_floating_block' => 1,
3235 
              'must_be_hdl_vector' => 1,
3236 
              'period' => 1,
3237 
              'port_id' => 0,
3238 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31/data_out',
3239 
              'type' => 'UFix_1_0',
3240 
            },
3241 
            'direction' => 'out',
3242 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3243 
            'width' => 1,
3244 
          },
3245 
        },
3246 
      },
3247 
      'entityName' => 'x_x110',
3248 
    },
3249 
    'from_register32' => {
3250 
      'connections' => {
3251 
        'data_out' => 'from_register32.data_out',
3252 
      },
3253 
      'entity' => {
3254 
        'attributes' => {
3255 
          'entityAlreadyNetlisted' => 1,
3256 
          'generics' => [
3257 
          ],
3258 
          'is_floating_block' => 1,
3259 
          'mask' => {
3260 
            'Block_Handle' => 409.0009765625,
3261 
            'Block_handle' => 409.0009765625,
3262 
            'MDL_Handle' => 3.0009765625,
3263 
            'MDL_handle' => 3.0009765625,
3264 
            'arith_type' => 2,
3265 
            'bin_pt' => 0,
3266 
            'block_config' => 'sysgen_blockset:fromreg_config',
3267 
            'block_handle' => 409.0009765625,
3268 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32',
3269 
            'block_type' => 'fromreg',
3270 
            'dbl_ovrd' => 0,
3271 
            'init' => 0,
3272 
            'init_bit_vector' => '00000000000000000000000000000000b',
3273 
            'mdl_handle' => 3.0009765625,
3274 
            'model_handle' => 3.0009765625,
3275 
            'n_bits' => 32,
3276 
            'ownership' => 2,
3277 
            'period' => '5e-009',
3278 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3279 
            'shared_memory_name' => 'register14td',
3280 
          },
3281 
          'needs_vhdl_wrapper' => 0,
3282 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32',
3283 
        },
3284 
        'entityName' => 'x_x111',
3285 
        'ports' => {
3286 
          'data_out' => {
3287 
            'attributes' => {
3288 
              'bin_pt' => 0,
3289 
              'is_floating_block' => 1,
3290 
              'must_be_hdl_vector' => 1,
3291 
              'period' => 1,
3292 
              'port_id' => 0,
3293 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32/data_out',
3294 
              'type' => 'UFix_32_0',
3295 
            },
3296 
            'direction' => 'out',
3297 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3298 
            'width' => 32,
3299 
          },
3300 
        },
3301 
      },
3302 
      'entityName' => 'x_x111',
3303 
    },
3304 
    'from_register33' => {
3305 
      'connections' => {
3306 
        'data_out' => 'from_register33.data_out',
3307 
      },
3308 
      'entity' => {
3309 
        'attributes' => {
3310 
          'entityAlreadyNetlisted' => 1,
3311 
          'generics' => [
3312 
          ],
3313 
          'is_floating_block' => 1,
3314 
          'mask' => {
3315 
            'Block_Handle' => 410.0009765625,
3316 
            'Block_handle' => 410.0009765625,
3317 
            'MDL_Handle' => 3.0009765625,
3318 
            'MDL_handle' => 3.0009765625,
3319 
            'arith_type' => 2,
3320 
            'bin_pt' => 0,
3321 
            'block_config' => 'sysgen_blockset:fromreg_config',
3322 
            'block_handle' => 410.0009765625,
3323 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33',
3324 
            'block_type' => 'fromreg',
3325 
            'dbl_ovrd' => 0,
3326 
            'init' => 0,
3327 
            'init_bit_vector' => '0b',
3328 
            'mdl_handle' => 3.0009765625,
3329 
            'model_handle' => 3.0009765625,
3330 
            'n_bits' => 1,
3331 
            'ownership' => 2,
3332 
            'period' => '5e-009',
3333 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3334 
            'shared_memory_name' => 'register14tv',
3335 
          },
3336 
          'needs_vhdl_wrapper' => 0,
3337 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33',
3338 
        },
3339 
        'entityName' => 'x_x112',
3340 
        'ports' => {
3341 
          'data_out' => {
3342 
            'attributes' => {
3343 
              'bin_pt' => 0,
3344 
              'is_floating_block' => 1,
3345 
              'must_be_hdl_vector' => 1,
3346 
              'period' => 1,
3347 
              'port_id' => 0,
3348 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33/data_out',
3349 
              'type' => 'UFix_1_0',
3350 
            },
3351 
            'direction' => 'out',
3352 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3353 
            'width' => 1,
3354 
          },
3355 
        },
3356 
      },
3357 
      'entityName' => 'x_x112',
3358 
    },
3359 
    'from_register4' => {
3360 
      'connections' => {
3361 
        'data_out' => 'from_register4.data_out',
3362 
      },
3363 
      'entity' => {
3364 
        'attributes' => {
3365 
          'entityAlreadyNetlisted' => 1,
3366 
          'generics' => [
3367 
          ],
3368 
          'is_floating_block' => 1,
3369 
          'mask' => {
3370 
            'Block_Handle' => 411.0009765625,
3371 
            'Block_handle' => 411.0009765625,
3372 
            'MDL_Handle' => 3.0009765625,
3373 
            'MDL_handle' => 3.0009765625,
3374 
            'arith_type' => 2,
3375 
            'bin_pt' => 0,
3376 
            'block_config' => 'sysgen_blockset:fromreg_config',
3377 
            'block_handle' => 411.0009765625,
3378 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4',
3379 
            'block_type' => 'fromreg',
3380 
            'dbl_ovrd' => 0,
3381 
            'init' => 0,
3382 
            'init_bit_vector' => '0b',
3383 
            'mdl_handle' => 3.0009765625,
3384 
            'model_handle' => 3.0009765625,
3385 
            'n_bits' => 1,
3386 
            'ownership' => 2,
3387 
            'period' => '5e-009',
3388 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3389 
            'shared_memory_name' => 'register01tv',
3390 
          },
3391 
          'needs_vhdl_wrapper' => 0,
3392 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4',
3393 
        },
3394 
        'entityName' => 'x_x113',
3395 
        'ports' => {
3396 
          'data_out' => {
3397 
            'attributes' => {
3398 
              'bin_pt' => 0,
3399 
              'is_floating_block' => 1,
3400 
              'must_be_hdl_vector' => 1,
3401 
              'period' => 1,
3402 
              'port_id' => 0,
3403 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4/data_out',
3404 
              'type' => 'UFix_1_0',
3405 
            },
3406 
            'direction' => 'out',
3407 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3408 
            'width' => 1,
3409 
          },
3410 
        },
3411 
      },
3412 
      'entityName' => 'x_x113',
3413 
    },
3414 
    'from_register5' => {
3415 
      'connections' => {
3416 
        'data_out' => 'from_register5.data_out',
3417 
      },
3418 
      'entity' => {
3419 
        'attributes' => {
3420 
          'entityAlreadyNetlisted' => 1,
3421 
          'generics' => [
3422 
          ],
3423 
          'is_floating_block' => 1,
3424 
          'mask' => {
3425 
            'Block_Handle' => 412.0009765625,
3426 
            'Block_handle' => 412.0009765625,
3427 
            'MDL_Handle' => 3.0009765625,
3428 
            'MDL_handle' => 3.0009765625,
3429 
            'arith_type' => 2,
3430 
            'bin_pt' => 0,
3431 
            'block_config' => 'sysgen_blockset:fromreg_config',
3432 
            'block_handle' => 412.0009765625,
3433 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5',
3434 
            'block_type' => 'fromreg',
3435 
            'dbl_ovrd' => 0,
3436 
            'init' => 0,
3437 
            'init_bit_vector' => '00000000000000000000000000000000b',
3438 
            'mdl_handle' => 3.0009765625,
3439 
            'model_handle' => 3.0009765625,
3440 
            'n_bits' => 32,
3441 
            'ownership' => 2,
3442 
            'period' => '5e-009',
3443 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3444 
            'shared_memory_name' => 'register02td',
3445 
          },
3446 
          'needs_vhdl_wrapper' => 0,
3447 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5',
3448 
        },
3449 
        'entityName' => 'x_x114',
3450 
        'ports' => {
3451 
          'data_out' => {
3452 
            'attributes' => {
3453 
              'bin_pt' => 0,
3454 
              'is_floating_block' => 1,
3455 
              'must_be_hdl_vector' => 1,
3456 
              'period' => 1,
3457 
              'port_id' => 0,
3458 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5/data_out',
3459 
              'type' => 'UFix_32_0',
3460 
            },
3461 
            'direction' => 'out',
3462 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3463 
            'width' => 32,
3464 
          },
3465 
        },
3466 
      },
3467 
      'entityName' => 'x_x114',
3468 
    },
3469 
    'from_register6' => {
3470 
      'connections' => {
3471 
        'data_out' => 'from_register6.data_out',
3472 
      },
3473 
      'entity' => {
3474 
        'attributes' => {
3475 
          'entityAlreadyNetlisted' => 1,
3476 
          'generics' => [
3477 
          ],
3478 
          'is_floating_block' => 1,
3479 
          'mask' => {
3480 
            'Block_Handle' => 413.0009765625,
3481 
            'Block_handle' => 413.0009765625,
3482 
            'MDL_Handle' => 3.0009765625,
3483 
            'MDL_handle' => 3.0009765625,
3484 
            'arith_type' => 2,
3485 
            'bin_pt' => 0,
3486 
            'block_config' => 'sysgen_blockset:fromreg_config',
3487 
            'block_handle' => 413.0009765625,
3488 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6',
3489 
            'block_type' => 'fromreg',
3490 
            'dbl_ovrd' => 0,
3491 
            'init' => 0,
3492 
            'init_bit_vector' => '0b',
3493 
            'mdl_handle' => 3.0009765625,
3494 
            'model_handle' => 3.0009765625,
3495 
            'n_bits' => 1,
3496 
            'ownership' => 2,
3497 
            'period' => '5e-009',
3498 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3499 
            'shared_memory_name' => 'register02tv',
3500 
          },
3501 
          'needs_vhdl_wrapper' => 0,
3502 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6',
3503 
        },
3504 
        'entityName' => 'x_x115',
3505 
        'ports' => {
3506 
          'data_out' => {
3507 
            'attributes' => {
3508 
              'bin_pt' => 0,
3509 
              'is_floating_block' => 1,
3510 
              'must_be_hdl_vector' => 1,
3511 
              'period' => 1,
3512 
              'port_id' => 0,
3513 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6/data_out',
3514 
              'type' => 'UFix_1_0',
3515 
            },
3516 
            'direction' => 'out',
3517 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3518 
            'width' => 1,
3519 
          },
3520 
        },
3521 
      },
3522 
      'entityName' => 'x_x115',
3523 
    },
3524 
    'from_register7' => {
3525 
      'connections' => {
3526 
        'data_out' => 'from_register7.data_out',
3527 
      },
3528 
      'entity' => {
3529 
        'attributes' => {
3530 
          'entityAlreadyNetlisted' => 1,
3531 
          'generics' => [
3532 
          ],
3533 
          'is_floating_block' => 1,
3534 
          'mask' => {
3535 
            'Block_Handle' => 414.0009765625,
3536 
            'Block_handle' => 414.0009765625,
3537 
            'MDL_Handle' => 3.0009765625,
3538 
            'MDL_handle' => 3.0009765625,
3539 
            'arith_type' => 2,
3540 
            'bin_pt' => 0,
3541 
            'block_config' => 'sysgen_blockset:fromreg_config',
3542 
            'block_handle' => 414.0009765625,
3543 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7',
3544 
            'block_type' => 'fromreg',
3545 
            'dbl_ovrd' => 0,
3546 
            'init' => 0,
3547 
            'init_bit_vector' => '00000000000000000000000000000000b',
3548 
            'mdl_handle' => 3.0009765625,
3549 
            'model_handle' => 3.0009765625,
3550 
            'n_bits' => 32,
3551 
            'ownership' => 2,
3552 
            'period' => '5e-009',
3553 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3554 
            'shared_memory_name' => 'register03td',
3555 
          },
3556 
          'needs_vhdl_wrapper' => 0,
3557 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7',
3558 
        },
3559 
        'entityName' => 'x_x116',
3560 
        'ports' => {
3561 
          'data_out' => {
3562 
            'attributes' => {
3563 
              'bin_pt' => 0,
3564 
              'is_floating_block' => 1,
3565 
              'must_be_hdl_vector' => 1,
3566 
              'period' => 1,
3567 
              'port_id' => 0,
3568 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7/data_out',
3569 
              'type' => 'UFix_32_0',
3570 
            },
3571 
            'direction' => 'out',
3572 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3573 
            'width' => 32,
3574 
          },
3575 
        },
3576 
      },
3577 
      'entityName' => 'x_x116',
3578 
    },
3579 
    'from_register8' => {
3580 
      'connections' => {
3581 
        'data_out' => 'from_register8.data_out',
3582 
      },
3583 
      'entity' => {
3584 
        'attributes' => {
3585 
          'entityAlreadyNetlisted' => 1,
3586 
          'generics' => [
3587 
          ],
3588 
          'is_floating_block' => 1,
3589 
          'mask' => {
3590 
            'Block_Handle' => 415.0009765625,
3591 
            'Block_handle' => 415.0009765625,
3592 
            'MDL_Handle' => 3.0009765625,
3593 
            'MDL_handle' => 3.0009765625,
3594 
            'arith_type' => 2,
3595 
            'bin_pt' => 0,
3596 
            'block_config' => 'sysgen_blockset:fromreg_config',
3597 
            'block_handle' => 415.0009765625,
3598 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8',
3599 
            'block_type' => 'fromreg',
3600 
            'dbl_ovrd' => 0,
3601 
            'init' => 0,
3602 
            'init_bit_vector' => '0b',
3603 
            'mdl_handle' => 3.0009765625,
3604 
            'model_handle' => 3.0009765625,
3605 
            'n_bits' => 1,
3606 
            'ownership' => 2,
3607 
            'period' => '5e-009',
3608 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3609 
            'shared_memory_name' => 'register03tv',
3610 
          },
3611 
          'needs_vhdl_wrapper' => 0,
3612 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8',
3613 
        },
3614 
        'entityName' => 'x_x117',
3615 
        'ports' => {
3616 
          'data_out' => {
3617 
            'attributes' => {
3618 
              'bin_pt' => 0,
3619 
              'is_floating_block' => 1,
3620 
              'must_be_hdl_vector' => 1,
3621 
              'period' => 1,
3622 
              'port_id' => 0,
3623 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8/data_out',
3624 
              'type' => 'UFix_1_0',
3625 
            },
3626 
            'direction' => 'out',
3627 
            'hdlType' => 'std_logic_vector(0 downto 0)',
3628 
            'width' => 1,
3629 
          },
3630 
        },
3631 
      },
3632 
      'entityName' => 'x_x117',
3633 
    },
3634 
    'from_register9' => {
3635 
      'connections' => {
3636 
        'data_out' => 'from_register9.data_out',
3637 
      },
3638 
      'entity' => {
3639 
        'attributes' => {
3640 
          'entityAlreadyNetlisted' => 1,
3641 
          'generics' => [
3642 
          ],
3643 
          'is_floating_block' => 1,
3644 
          'mask' => {
3645 
            'Block_Handle' => 416.0009765625,
3646 
            'Block_handle' => 416.0009765625,
3647 
            'MDL_Handle' => 3.0009765625,
3648 
            'MDL_handle' => 3.0009765625,
3649 
            'arith_type' => 2,
3650 
            'bin_pt' => 0,
3651 
            'block_config' => 'sysgen_blockset:fromreg_config',
3652 
            'block_handle' => 416.0009765625,
3653 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9',
3654 
            'block_type' => 'fromreg',
3655 
            'dbl_ovrd' => 0,
3656 
            'init' => 0,
3657 
            'init_bit_vector' => '00000000000000000000000000000000b',
3658 
            'mdl_handle' => 3.0009765625,
3659 
            'model_handle' => 3.0009765625,
3660 
            'n_bits' => 32,
3661 
            'ownership' => 2,
3662 
            'period' => '5e-009',
3663 
            'sg_icon_stat' => '55,22,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]',
3664 
            'shared_memory_name' => 'register04td',
3665 
          },
3666 
          'needs_vhdl_wrapper' => 0,
3667 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9',
3668 
        },
3669 
        'entityName' => 'x_x118',
3670 
        'ports' => {
3671 
          'data_out' => {
3672 
            'attributes' => {
3673 
              'bin_pt' => 0,
3674 
              'is_floating_block' => 1,
3675 
              'must_be_hdl_vector' => 1,
3676 
              'period' => 1,
3677 
              'port_id' => 0,
3678 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9/data_out',
3679 
              'type' => 'UFix_32_0',
3680 
            },
3681 
            'direction' => 'out',
3682 
            'hdlType' => 'std_logic_vector(31 downto 0)',
3683 
            'width' => 32,
3684 
          },
3685 
        },
3686 
      },
3687 
      'entityName' => 'x_x118',
3688 
    },
3689 
    'rst_i' => {
3690 
      'connections' => {
3691 
        'rst_i' => '.rst_i',
3692 
      },
3693 
      'entity' => {
3694 
        'attributes' => {
3695 
          'entityAlreadyNetlisted' => 1,
3696 
          'isGateway' => 1,
3697 
          'is_floating_block' => 1,
3698 
        },
3699 
        'entityName' => 'rst_i',
3700 
        'ports' => {
3701 
          'rst_i' => {
3702 
            'attributes' => {
3703 
              'bin_pt' => 0,
3704 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
3705 
              'is_floating_block' => 1,
3706 
              'is_gateway_port' => 1,
3707 
              'must_be_hdl_vector' => 1,
3708 
              'period' => 1,
3709 
              'port_id' => 0,
3710 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i/rst_i',
3711 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i',
3712 
              'timingConstraint' => 'none',
3713 
              'type' => 'Bool',
3714 
            },
3715 
            'direction' => 'out',
3716 
            'hdlType' => 'std_logic',
3717 
            'width' => 1,
3718 
          },
3719 
        },
3720 
      },
3721 
      'entityName' => 'rst_i',
3722 
    },
3723 
    'rst_o' => {
3724 
      'connections' => {
3725 
        'rst_o' => 'sysgen_dut.rst_o',
3726 
      },
3727 
      'entity' => {
3728 
        'attributes' => {
3729 
          'entityAlreadyNetlisted' => 1,
3730 
          'isGateway' => 1,
3731 
          'is_floating_block' => 1,
3732 
        },
3733 
        'entityName' => 'rst_o',
3734 
        'ports' => {
3735 
          'rst_o' => {
3736 
            'attributes' => {
3737 
              'bin_pt' => 0,
3738 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
3739 
              'is_floating_block' => 1,
3740 
              'is_gateway_port' => 1,
3741 
              'must_be_hdl_vector' => 1,
3742 
              'period' => 1,
3743 
              'port_id' => 0,
3744 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o/rst_o',
3745 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o',
3746 
              'timingConstraint' => 'none',
3747 
              'type' => 'Bool',
3748 
            },
3749 
            'direction' => 'in',
3750 
            'hdlType' => 'std_logic',
3751 
            'width' => 1,
3752 
          },
3753 
        },
3754 
      },
3755 
      'entityName' => 'rst_o',
3756 
    },
3757 
    'sysgen_dut' => {
3758 
      'connections' => {
3759 
        'bram_rd_addr' => 'sysgen_dut.bram_rd_addr',
3760 
        'bram_rd_dout' => '.bram_rd_dout',
3761 
        'bram_wr_addr' => 'sysgen_dut.bram_wr_addr',
3762 
        'bram_wr_din' => 'sysgen_dut.bram_wr_din',
3763 
        'bram_wr_en' => 'sysgen_dut.bram_wr_en',
3764 
        'clk' => '.clk',
3765 
        'fifo_rd_count' => '.fifo_rd_count',
3766 
        'fifo_rd_dout' => '.fifo_rd_dout',
3767 
        'fifo_rd_empty' => '.fifo_rd_empty',
3768 
        'fifo_rd_en' => 'sysgen_dut.fifo_rd_en',
3769 
        'fifo_rd_pempty' => '.fifo_rd_pempty',
3770 
        'fifo_rd_valid' => '.fifo_rd_valid',
3771 
        'fifo_wr_count' => '.fifo_wr_count',
3772 
        'fifo_wr_din' => 'sysgen_dut.fifo_wr_din',
3773 
        'fifo_wr_en' => 'sysgen_dut.fifo_wr_en',
3774 
        'fifo_wr_full' => '.fifo_wr_full',
3775 
        'fifo_wr_pfull' => '.fifo_wr_pfull',
3776 
        'from_register10_data_out' => 'from_register10.data_out',
3777 
        'from_register11_data_out' => 'from_register11.data_out',
3778 
        'from_register12_data_out' => 'from_register12.data_out',
3779 
        'from_register13_data_out' => 'from_register13.data_out',
3780 
        'from_register14_data_out' => 'from_register14.data_out',
3781 
        'from_register15_data_out' => 'from_register15.data_out',
3782 
        'from_register16_data_out' => 'from_register16.data_out',
3783 
        'from_register17_data_out' => 'from_register17.data_out',
3784 
        'from_register18_data_out' => 'from_register18.data_out',
3785 
        'from_register19_data_out' => 'from_register19.data_out',
3786 
        'from_register1_data_out' => 'from_register1.data_out',
3787 
        'from_register20_data_out' => 'from_register20.data_out',
3788 
        'from_register21_data_out' => 'from_register21.data_out',
3789 
        'from_register22_data_out' => 'from_register22.data_out',
3790 
        'from_register23_data_out' => 'from_register23.data_out',
3791 
        'from_register24_data_out' => 'from_register24.data_out',
3792 
        'from_register25_data_out' => 'from_register25.data_out',
3793 
        'from_register26_data_out' => 'from_register26.data_out',
3794 
        'from_register27_data_out' => 'from_register27.data_out',
3795 
        'from_register28_data_out' => 'from_register28.data_out',
3796 
        'from_register29_data_out' => 'from_register29.data_out',
3797 
        'from_register2_data_out' => 'from_register2.data_out',
3798 
        'from_register30_data_out' => 'from_register30.data_out',
3799 
        'from_register31_data_out' => 'from_register31.data_out',
3800 
        'from_register32_data_out' => 'from_register32.data_out',
3801 
        'from_register33_data_out' => 'from_register33.data_out',
3802 
        'from_register3_data_out' => 'from_register3.data_out',
3803 
        'from_register4_data_out' => 'from_register4.data_out',
3804 
        'from_register5_data_out' => 'from_register5.data_out',
3805 
        'from_register6_data_out' => 'from_register6.data_out',
3806 
        'from_register7_data_out' => 'from_register7.data_out',
3807 
        'from_register8_data_out' => 'from_register8.data_out',
3808 
        'from_register9_data_out' => 'from_register9.data_out',
3809 
        'from_register_data_out' => 'from_register.data_out',
3810 
        'rst_i' => '.rst_i',
3811 
        'rst_o' => 'sysgen_dut.rst_o',
3812 
        'to_register10_ce' => 'sysgen_dut.to_register10_ce',
3813 
        'to_register10_clk' => 'sysgen_dut.to_register10_clk',
3814 
        'to_register10_clr' => 'sysgen_dut.to_register10_clr',
3815 
        'to_register10_data_in' => 'sysgen_dut.to_register10_data_in',
3816 
        'to_register10_dout' => 'to_register10.dout',
3817 
        'to_register10_en' => 'sysgen_dut.to_register10_en',
3818 
        'to_register11_ce' => 'sysgen_dut.to_register11_ce',
3819 
        'to_register11_clk' => 'sysgen_dut.to_register11_clk',
3820 
        'to_register11_clr' => 'sysgen_dut.to_register11_clr',
3821 
        'to_register11_data_in' => 'sysgen_dut.to_register11_data_in',
3822 
        'to_register11_dout' => 'to_register11.dout',
3823 
        'to_register11_en' => 'sysgen_dut.to_register11_en',
3824 
        'to_register12_ce' => 'sysgen_dut.to_register12_ce',
3825 
        'to_register12_clk' => 'sysgen_dut.to_register12_clk',
3826 
        'to_register12_clr' => 'sysgen_dut.to_register12_clr',
3827 
        'to_register12_data_in' => 'sysgen_dut.to_register12_data_in',
3828 
        'to_register12_dout' => 'to_register12.dout',
3829 
        'to_register12_en' => 'sysgen_dut.to_register12_en',
3830 
        'to_register13_ce' => 'sysgen_dut.to_register13_ce',
3831 
        'to_register13_clk' => 'sysgen_dut.to_register13_clk',
3832 
        'to_register13_clr' => 'sysgen_dut.to_register13_clr',
3833 
        'to_register13_data_in' => 'sysgen_dut.to_register13_data_in',
3834 
        'to_register13_dout' => 'to_register13.dout',
3835 
        'to_register13_en' => 'sysgen_dut.to_register13_en',
3836 
        'to_register14_ce' => 'sysgen_dut.to_register14_ce',
3837 
        'to_register14_clk' => 'sysgen_dut.to_register14_clk',
3838 
        'to_register14_clr' => 'sysgen_dut.to_register14_clr',
3839 
        'to_register14_data_in' => 'sysgen_dut.to_register14_data_in',
3840 
        'to_register14_dout' => 'to_register14.dout',
3841 
        'to_register14_en' => 'sysgen_dut.to_register14_en',
3842 
        'to_register15_ce' => 'sysgen_dut.to_register15_ce',
3843 
        'to_register15_clk' => 'sysgen_dut.to_register15_clk',
3844 
        'to_register15_clr' => 'sysgen_dut.to_register15_clr',
3845 
        'to_register15_data_in' => 'sysgen_dut.to_register15_data_in',
3846 
        'to_register15_dout' => 'to_register15.dout',
3847 
        'to_register15_en' => 'sysgen_dut.to_register15_en',
3848 
        'to_register16_ce' => 'sysgen_dut.to_register16_ce',
3849 
        'to_register16_clk' => 'sysgen_dut.to_register16_clk',
3850 
        'to_register16_clr' => 'sysgen_dut.to_register16_clr',
3851 
        'to_register16_data_in' => 'sysgen_dut.to_register16_data_in',
3852 
        'to_register16_dout' => 'to_register16.dout',
3853 
        'to_register16_en' => 'sysgen_dut.to_register16_en',
3854 
        'to_register17_ce' => 'sysgen_dut.to_register17_ce',
3855 
        'to_register17_clk' => 'sysgen_dut.to_register17_clk',
3856 
        'to_register17_clr' => 'sysgen_dut.to_register17_clr',
3857 
        'to_register17_data_in' => 'sysgen_dut.to_register17_data_in',
3858 
        'to_register17_dout' => 'to_register17.dout',
3859 
        'to_register17_en' => 'sysgen_dut.to_register17_en',
3860 
        'to_register18_ce' => 'sysgen_dut.to_register18_ce',
3861 
        'to_register18_clk' => 'sysgen_dut.to_register18_clk',
3862 
        'to_register18_clr' => 'sysgen_dut.to_register18_clr',
3863 
        'to_register18_data_in' => 'sysgen_dut.to_register18_data_in',
3864 
        'to_register18_dout' => 'to_register18.dout',
3865 
        'to_register18_en' => 'sysgen_dut.to_register18_en',
3866 
        'to_register19_ce' => 'sysgen_dut.to_register19_ce',
3867 
        'to_register19_clk' => 'sysgen_dut.to_register19_clk',
3868 
        'to_register19_clr' => 'sysgen_dut.to_register19_clr',
3869 
        'to_register19_data_in' => 'sysgen_dut.to_register19_data_in',
3870 
        'to_register19_dout' => 'to_register19.dout',
3871 
        'to_register19_en' => 'sysgen_dut.to_register19_en',
3872 
        'to_register1_ce' => 'sysgen_dut.to_register1_ce',
3873 
        'to_register1_clk' => 'sysgen_dut.to_register1_clk',
3874 
        'to_register1_clr' => 'sysgen_dut.to_register1_clr',
3875 
        'to_register1_data_in' => 'sysgen_dut.to_register1_data_in',
3876 
        'to_register1_dout' => 'to_register1.dout',
3877 
        'to_register1_en' => 'sysgen_dut.to_register1_en',
3878 
        'to_register20_ce' => 'sysgen_dut.to_register20_ce',
3879 
        'to_register20_clk' => 'sysgen_dut.to_register20_clk',
3880 
        'to_register20_clr' => 'sysgen_dut.to_register20_clr',
3881 
        'to_register20_data_in' => 'sysgen_dut.to_register20_data_in',
3882 
        'to_register20_dout' => 'to_register20.dout',
3883 
        'to_register20_en' => 'sysgen_dut.to_register20_en',
3884 
        'to_register21_ce' => 'sysgen_dut.to_register21_ce',
3885 
        'to_register21_clk' => 'sysgen_dut.to_register21_clk',
3886 
        'to_register21_clr' => 'sysgen_dut.to_register21_clr',
3887 
        'to_register21_data_in' => 'sysgen_dut.to_register21_data_in',
3888 
        'to_register21_dout' => 'to_register21.dout',
3889 
        'to_register21_en' => 'sysgen_dut.to_register21_en',
3890 
        'to_register22_ce' => 'sysgen_dut.to_register22_ce',
3891 
        'to_register22_clk' => 'sysgen_dut.to_register22_clk',
3892 
        'to_register22_clr' => 'sysgen_dut.to_register22_clr',
3893 
        'to_register22_data_in' => 'sysgen_dut.to_register22_data_in',
3894 
        'to_register22_dout' => 'to_register22.dout',
3895 
        'to_register22_en' => 'sysgen_dut.to_register22_en',
3896 
        'to_register23_ce' => 'sysgen_dut.to_register23_ce',
3897 
        'to_register23_clk' => 'sysgen_dut.to_register23_clk',
3898 
        'to_register23_clr' => 'sysgen_dut.to_register23_clr',
3899 
        'to_register23_data_in' => 'sysgen_dut.to_register23_data_in',
3900 
        'to_register23_dout' => 'to_register23.dout',
3901 
        'to_register23_en' => 'sysgen_dut.to_register23_en',
3902 
        'to_register24_ce' => 'sysgen_dut.to_register24_ce',
3903 
        'to_register24_clk' => 'sysgen_dut.to_register24_clk',
3904 
        'to_register24_clr' => 'sysgen_dut.to_register24_clr',
3905 
        'to_register24_data_in' => 'sysgen_dut.to_register24_data_in',
3906 
        'to_register24_dout' => 'to_register24.dout',
3907 
        'to_register24_en' => 'sysgen_dut.to_register24_en',
3908 
        'to_register25_ce' => 'sysgen_dut.to_register25_ce',
3909 
        'to_register25_clk' => 'sysgen_dut.to_register25_clk',
3910 
        'to_register25_clr' => 'sysgen_dut.to_register25_clr',
3911 
        'to_register25_data_in' => 'sysgen_dut.to_register25_data_in',
3912 
        'to_register25_dout' => 'to_register25.dout',
3913 
        'to_register25_en' => 'sysgen_dut.to_register25_en',
3914 
        'to_register26_ce' => 'sysgen_dut.to_register26_ce',
3915 
        'to_register26_clk' => 'sysgen_dut.to_register26_clk',
3916 
        'to_register26_clr' => 'sysgen_dut.to_register26_clr',
3917 
        'to_register26_data_in' => 'sysgen_dut.to_register26_data_in',
3918 
        'to_register26_dout' => 'to_register26.dout',
3919 
        'to_register26_en' => 'sysgen_dut.to_register26_en',
3920 
        'to_register27_ce' => 'sysgen_dut.to_register27_ce',
3921 
        'to_register27_clk' => 'sysgen_dut.to_register27_clk',
3922 
        'to_register27_clr' => 'sysgen_dut.to_register27_clr',
3923 
        'to_register27_data_in' => 'sysgen_dut.to_register27_data_in',
3924 
        'to_register27_dout' => 'to_register27.dout',
3925 
        'to_register27_en' => 'sysgen_dut.to_register27_en',
3926 
        'to_register2_ce' => 'sysgen_dut.to_register2_ce',
3927 
        'to_register2_clk' => 'sysgen_dut.to_register2_clk',
3928 
        'to_register2_clr' => 'sysgen_dut.to_register2_clr',
3929 
        'to_register2_data_in' => 'sysgen_dut.to_register2_data_in',
3930 
        'to_register2_dout' => 'to_register2.dout',
3931 
        'to_register2_en' => 'sysgen_dut.to_register2_en',
3932 
        'to_register3_ce' => 'sysgen_dut.to_register3_ce',
3933 
        'to_register3_clk' => 'sysgen_dut.to_register3_clk',
3934 
        'to_register3_clr' => 'sysgen_dut.to_register3_clr',
3935 
        'to_register3_data_in' => 'sysgen_dut.to_register3_data_in',
3936 
        'to_register3_dout' => 'to_register3.dout',
3937 
        'to_register3_en' => 'sysgen_dut.to_register3_en',
3938 
        'to_register4_ce' => 'sysgen_dut.to_register4_ce',
3939 
        'to_register4_clk' => 'sysgen_dut.to_register4_clk',
3940 
        'to_register4_clr' => 'sysgen_dut.to_register4_clr',
3941 
        'to_register4_data_in' => 'sysgen_dut.to_register4_data_in',
3942 
        'to_register4_dout' => 'to_register4.dout',
3943 
        'to_register4_en' => 'sysgen_dut.to_register4_en',
3944 
        'to_register5_ce' => 'sysgen_dut.to_register5_ce',
3945 
        'to_register5_clk' => 'sysgen_dut.to_register5_clk',
3946 
        'to_register5_clr' => 'sysgen_dut.to_register5_clr',
3947 
        'to_register5_data_in' => 'sysgen_dut.to_register5_data_in',
3948 
        'to_register5_dout' => 'to_register5.dout',
3949 
        'to_register5_en' => 'sysgen_dut.to_register5_en',
3950 
        'to_register6_ce' => 'sysgen_dut.to_register6_ce',
3951 
        'to_register6_clk' => 'sysgen_dut.to_register6_clk',
3952 
        'to_register6_clr' => 'sysgen_dut.to_register6_clr',
3953 
        'to_register6_data_in' => 'sysgen_dut.to_register6_data_in',
3954 
        'to_register6_dout' => 'to_register6.dout',
3955 
        'to_register6_en' => 'sysgen_dut.to_register6_en',
3956 
        'to_register7_ce' => 'sysgen_dut.to_register7_ce',
3957 
        'to_register7_clk' => 'sysgen_dut.to_register7_clk',
3958 
        'to_register7_clr' => 'sysgen_dut.to_register7_clr',
3959 
        'to_register7_data_in' => 'sysgen_dut.to_register7_data_in',
3960 
        'to_register7_dout' => 'to_register7.dout',
3961 
        'to_register7_en' => 'sysgen_dut.to_register7_en',
3962 
        'to_register8_ce' => 'sysgen_dut.to_register8_ce',
3963 
        'to_register8_clk' => 'sysgen_dut.to_register8_clk',
3964 
        'to_register8_clr' => 'sysgen_dut.to_register8_clr',
3965 
        'to_register8_data_in' => 'sysgen_dut.to_register8_data_in',
3966 
        'to_register8_dout' => 'to_register8.dout',
3967 
        'to_register8_en' => 'sysgen_dut.to_register8_en',
3968 
        'to_register9_ce' => 'sysgen_dut.to_register9_ce',
3969 
        'to_register9_clk' => 'sysgen_dut.to_register9_clk',
3970 
        'to_register9_clr' => 'sysgen_dut.to_register9_clr',
3971 
        'to_register9_data_in' => 'sysgen_dut.to_register9_data_in',
3972 
        'to_register9_dout' => 'to_register9.dout',
3973 
        'to_register9_en' => 'sysgen_dut.to_register9_en',
3974 
        'to_register_ce' => 'sysgen_dut.to_register_ce',
3975 
        'to_register_clk' => 'sysgen_dut.to_register_clk',
3976 
        'to_register_clr' => 'sysgen_dut.to_register_clr',
3977 
        'to_register_data_in' => 'sysgen_dut.to_register_data_in',
3978 
        'to_register_dout' => 'to_register.dout',
3979 
        'to_register_en' => 'sysgen_dut.to_register_en',
3980 
        'user_int_1o' => 'sysgen_dut.user_int_1o',
3981 
        'user_int_2o' => 'sysgen_dut.user_int_2o',
3982 
        'user_int_3o' => 'sysgen_dut.user_int_3o',
3983 
      },
3984 
      'entity' => {
3985 
        'attributes' => {
3986 
          'entityAlreadyNetlisted' => 1,
3987 
          'hdlArchAttributes' => [
3988 
          ],
3989 
          'hdlEntityAttributes' => [
3990 
          ],
3991 
          'isClkWrapper' => 1,
3992 
        },
3993 
        'connections' => {
3994 
          'bram_rd_addr' => 'bram_rd_addr_net',
3995 
          'bram_rd_dout' => 'bram_rd_dout_net',
3996 
          'bram_wr_addr' => 'bram_wr_addr_net',
3997 
          'bram_wr_din' => 'bram_wr_din_net',
3998 
          'bram_wr_en' => 'bram_wr_en_net',
3999 
          'clk' => 'clkNet',
4000 
          'fifo_rd_count' => 'fifo_rd_count_net',
4001 
          'fifo_rd_dout' => 'fifo_rd_dout_net',
4002 
          'fifo_rd_empty' => 'fifo_rd_empty_net',
4003 
          'fifo_rd_en' => 'fifo_rd_en_net',
4004 
          'fifo_rd_pempty' => 'fifo_rd_pempty_net',
4005 
          'fifo_rd_valid' => 'fifo_rd_valid_net',
4006 
          'fifo_wr_count' => 'fifo_wr_count_net',
4007 
          'fifo_wr_din' => 'fifo_wr_din_net',
4008 
          'fifo_wr_en' => 'fifo_wr_en_net',
4009 
          'fifo_wr_full' => 'fifo_wr_full_net',
4010 
          'fifo_wr_pfull' => 'fifo_wr_pfull_net',
4011 
          'from_register10_data_out' => 'data_out_net',
4012 
          'from_register11_data_out' => 'data_out_x0_net',
4013 
          'from_register12_data_out' => 'data_out_x1_net',
4014 
          'from_register13_data_out' => 'data_out_x2_net',
4015 
          'from_register14_data_out' => 'data_out_x3_net',
4016 
          'from_register15_data_out' => 'from_register15_data_out_net',
4017 
          'from_register16_data_out' => 'from_register16_data_out_net',
4018 
          'from_register17_data_out' => 'data_out_x6_net',
4019 
          'from_register18_data_out' => 'data_out_x7_net',
4020 
          'from_register19_data_out' => 'from_register19_data_out_net',
4021 
          'from_register1_data_out' => 'from_register1_data_out_net',
4022 
          'from_register20_data_out' => 'data_out_x8_net',
4023 
          'from_register21_data_out' => 'data_out_x9_net',
4024 
          'from_register22_data_out' => 'data_out_x10_net',
4025 
          'from_register23_data_out' => 'data_out_x11_net',
4026 
          'from_register24_data_out' => 'data_out_x12_net',
4027 
          'from_register25_data_out' => 'data_out_x13_net',
4028 
          'from_register26_data_out' => 'data_out_x14_net',
4029 
          'from_register27_data_out' => 'data_out_x15_net',
4030 
          'from_register28_data_out' => 'data_out_x16_net',
4031 
          'from_register29_data_out' => 'data_out_x17_net',
4032 
          'from_register2_data_out' => 'from_register2_data_out_net',
4033 
          'from_register30_data_out' => 'data_out_x19_net',
4034 
          'from_register31_data_out' => 'data_out_x20_net',
4035 
          'from_register32_data_out' => 'data_out_x21_net',
4036 
          'from_register33_data_out' => 'data_out_x22_net',
4037 
          'from_register3_data_out' => 'data_out_x18_net',
4038 
          'from_register4_data_out' => 'data_out_x23_net',
4039 
          'from_register5_data_out' => 'data_out_x24_net',
4040 
          'from_register6_data_out' => 'data_out_x25_net',
4041 
          'from_register7_data_out' => 'data_out_x26_net',
4042 
          'from_register8_data_out' => 'data_out_x27_net',
4043 
          'from_register9_data_out' => 'data_out_x28_net',
4044 
          'from_register_data_out' => 'from_register_data_out_net',
4045 
          'rst_i' => 'rst_i_net',
4046 
          'rst_o' => 'rst_o_net',
4047 
          'to_register10_ce' => 'ce_1_sg_x0',
4048 
          'to_register10_clk' => 'clk_1_sg_x0',
4049 
          'to_register10_clr' => [
4050 
            'constant',
4051 
            '\'0\'',
4052 
          ],
4053 
          'to_register10_data_in' => 'data_in_x1_net',
4054 
          'to_register10_dout' => 'to_register10_dout_net',
4055 
          'to_register10_en' => 'constant6_op_net_x2',
4056 
          'to_register11_ce' => 'ce_1_sg_x0',
4057 
          'to_register11_clk' => 'clk_1_sg_x0',
4058 
          'to_register11_clr' => [
4059 
            'constant',
4060 
            '\'0\'',
4061 
          ],
4062 
          'to_register11_data_in' => 'data_in_x2_net',
4063 
          'to_register11_dout' => 'to_register11_dout_net',
4064 
          'to_register11_en' => 'constant6_op_net_x3',
4065 
          'to_register12_ce' => 'ce_1_sg_x0',
4066 
          'to_register12_clk' => 'clk_1_sg_x0',
4067 
          'to_register12_clr' => [
4068 
            'constant',
4069 
            '\'0\'',
4070 
          ],
4071 
          'to_register12_data_in' => 'data_in_x3_net',
4072 
          'to_register12_dout' => 'to_register12_dout_net',
4073 
          'to_register12_en' => 'constant6_op_net_x4',
4074 
          'to_register13_ce' => 'ce_1_sg_x0',
4075 
          'to_register13_clk' => 'clk_1_sg_x0',
4076 
          'to_register13_clr' => [
4077 
            'constant',
4078 
            '\'0\'',
4079 
          ],
4080 
          'to_register13_data_in' => 'data_in_x4_net',
4081 
          'to_register13_dout' => 'to_register13_dout_net',
4082 
          'to_register13_en' => 'constant6_op_net_x5',
4083 
          'to_register14_ce' => 'ce_1_sg_x0',
4084 
          'to_register14_clk' => 'clk_1_sg_x0',
4085 
          'to_register14_clr' => [
4086 
            'constant',
4087 
            '\'0\'',
4088 
          ],
4089 
          'to_register14_data_in' => 'data_in_x5_net',
4090 
          'to_register14_dout' => 'to_register14_dout_net',
4091 
          'to_register14_en' => 'constant6_op_net_x6',
4092 
          'to_register15_ce' => 'ce_1_sg_x0',
4093 
          'to_register15_clk' => 'clk_1_sg_x0',
4094 
          'to_register15_clr' => [
4095 
            'constant',
4096 
            '\'0\'',
4097 
          ],
4098 
          'to_register15_data_in' => 'data_in_x6_net',
4099 
          'to_register15_dout' => 'to_register15_dout_net',
4100 
          'to_register15_en' => 'constant6_op_net_x7',
4101 
          'to_register16_ce' => 'ce_1_sg_x0',
4102 
          'to_register16_clk' => 'clk_1_sg_x0',
4103 
          'to_register16_clr' => [
4104 
            'constant',
4105 
            '\'0\'',
4106 
          ],
4107 
          'to_register16_data_in' => 'data_in_x7_net',
4108 
          'to_register16_dout' => 'to_register16_dout_net',
4109 
          'to_register16_en' => 'constant6_op_net_x8',
4110 
          'to_register17_ce' => 'ce_1_sg_x0',
4111 
          'to_register17_clk' => 'clk_1_sg_x0',
4112 
          'to_register17_clr' => [
4113 
            'constant',
4114 
            '\'0\'',
4115 
          ],
4116 
          'to_register17_data_in' => 'data_in_x8_net',
4117 
          'to_register17_dout' => 'to_register17_dout_net',
4118 
          'to_register17_en' => 'constant6_op_net_x9',
4119 
          'to_register18_ce' => 'ce_1_sg_x0',
4120 
          'to_register18_clk' => 'clk_1_sg_x0',
4121 
          'to_register18_clr' => [
4122 
            'constant',
4123 
            '\'0\'',
4124 
          ],
4125 
          'to_register18_data_in' => 'data_in_x9_net',
4126 
          'to_register18_dout' => 'to_register18_dout_net',
4127 
          'to_register18_en' => 'constant6_op_net_x10',
4128 
          'to_register19_ce' => 'ce_1_sg_x0',
4129 
          'to_register19_clk' => 'clk_1_sg_x0',
4130 
          'to_register19_clr' => [
4131 
            'constant',
4132 
            '\'0\'',
4133 
          ],
4134 
          'to_register19_data_in' => 'data_in_x10_net',
4135 
          'to_register19_dout' => 'to_register19_dout_net',
4136 
          'to_register19_en' => 'constant6_op_net_x11',
4137 
          'to_register1_ce' => 'ce_1_sg_x0',
4138 
          'to_register1_clk' => 'clk_1_sg_x0',
4139 
          'to_register1_clr' => [
4140 
            'constant',
4141 
            '\'0\'',
4142 
          ],
4143 
          'to_register1_data_in' => 'data_in_x0_net',
4144 
          'to_register1_dout' => 'to_register1_dout_net',
4145 
          'to_register1_en' => 'constant6_op_net_x1',
4146 
          'to_register20_ce' => 'ce_1_sg_x0',
4147 
          'to_register20_clk' => 'clk_1_sg_x0',
4148 
          'to_register20_clr' => [
4149 
            'constant',
4150 
            '\'0\'',
4151 
          ],
4152 
          'to_register20_data_in' => 'data_in_x12_net',
4153 
          'to_register20_dout' => 'to_register20_dout_net',
4154 
          'to_register20_en' => 'constant6_op_net_x13',
4155 
          'to_register21_ce' => 'ce_1_sg_x0',
4156 
          'to_register21_clk' => 'clk_1_sg_x0',
4157 
          'to_register21_clr' => [
4158 
            'constant',
4159 
            '\'0\'',
4160 
          ],
4161 
          'to_register21_data_in' => 'data_in_x13_net',
4162 
          'to_register21_dout' => 'to_register21_dout_net',
4163 
          'to_register21_en' => 'constant6_op_net_x14',
4164 
          'to_register22_ce' => 'ce_1_sg_x0',
4165 
          'to_register22_clk' => 'clk_1_sg_x0',
4166 
          'to_register22_clr' => [
4167 
            'constant',
4168 
            '\'0\'',
4169 
          ],
4170 
          'to_register22_data_in' => 'data_in_x14_net',
4171 
          'to_register22_dout' => 'to_register22_dout_net',
4172 
          'to_register22_en' => 'constant6_op_net_x15',
4173 
          'to_register23_ce' => 'ce_1_sg_x0',
4174 
          'to_register23_clk' => 'clk_1_sg_x0',
4175 
          'to_register23_clr' => [
4176 
            'constant',
4177 
            '\'0\'',
4178 
          ],
4179 
          'to_register23_data_in' => 'data_in_x15_net',
4180 
          'to_register23_dout' => 'to_register23_dout_net',
4181 
          'to_register23_en' => 'constant6_op_net_x16',
4182 
          'to_register24_ce' => 'ce_1_sg_x0',
4183 
          'to_register24_clk' => 'clk_1_sg_x0',
4184 
          'to_register24_clr' => [
4185 
            'constant',
4186 
            '\'0\'',
4187 
          ],
4188 
          'to_register24_data_in' => 'data_in_x16_net',
4189 
          'to_register24_dout' => 'to_register24_dout_net',
4190 
          'to_register24_en' => 'constant6_op_net_x17',
4191 
          'to_register25_ce' => 'ce_1_sg_x0',
4192 
          'to_register25_clk' => 'clk_1_sg_x0',
4193 
          'to_register25_clr' => [
4194 
            'constant',
4195 
            '\'0\'',
4196 
          ],
4197 
          'to_register25_data_in' => 'data_in_x17_net',
4198 
          'to_register25_dout' => 'to_register25_dout_net',
4199 
          'to_register25_en' => 'constant6_op_net_x18',
4200 
          'to_register26_ce' => 'ce_1_sg_x0',
4201 
          'to_register26_clk' => 'clk_1_sg_x0',
4202 
          'to_register26_clr' => [
4203 
            'constant',
4204 
            '\'0\'',
4205 
          ],
4206 
          'to_register26_data_in' => 'data_in_x18_net',
4207 
          'to_register26_dout' => 'to_register26_dout_net',
4208 
          'to_register26_en' => 'constant6_op_net_x19',
4209 
          'to_register27_ce' => 'ce_1_sg_x0',
4210 
          'to_register27_clk' => 'clk_1_sg_x0',
4211 
          'to_register27_clr' => [
4212 
            'constant',
4213 
            '\'0\'',
4214 
          ],
4215 
          'to_register27_data_in' => 'data_in_x19_net',
4216 
          'to_register27_dout' => 'to_register27_dout_net',
4217 
          'to_register27_en' => 'constant6_op_net_x20',
4218 
          'to_register2_ce' => 'ce_1_sg_x0',
4219 
          'to_register2_clk' => 'clk_1_sg_x0',
4220 
          'to_register2_clr' => [
4221 
            'constant',
4222 
            '\'0\'',
4223 
          ],
4224 
          'to_register2_data_in' => 'data_in_x11_net',
4225 
          'to_register2_dout' => 'to_register2_dout_net',
4226 
          'to_register2_en' => 'constant6_op_net_x12',
4227 
          'to_register3_ce' => 'ce_1_sg_x0',
4228 
          'to_register3_clk' => 'clk_1_sg_x0',
4229 
          'to_register3_clr' => [
4230 
            'constant',
4231 
            '\'0\'',
4232 
          ],
4233 
          'to_register3_data_in' => 'data_in_x20_net',
4234 
          'to_register3_dout' => 'to_register3_dout_net',
4235 
          'to_register3_en' => 'constant6_op_net_x21',
4236 
          'to_register4_ce' => 'ce_1_sg_x0',
4237 
          'to_register4_clk' => 'clk_1_sg_x0',
4238 
          'to_register4_clr' => [
4239 
            'constant',
4240 
            '\'0\'',
4241 
          ],
4242 
          'to_register4_data_in' => 'data_in_x21_net',
4243 
          'to_register4_dout' => 'to_register4_dout_net',
4244 
          'to_register4_en' => 'constant6_op_net_x22',
4245 
          'to_register5_ce' => 'ce_1_sg_x0',
4246 
          'to_register5_clk' => 'clk_1_sg_x0',
4247 
          'to_register5_clr' => [
4248 
            'constant',
4249 
            '\'0\'',
4250 
          ],
4251 
          'to_register5_data_in' => 'data_in_x22_net',
4252 
          'to_register5_dout' => 'to_register5_dout_net',
4253 
          'to_register5_en' => 'constant6_op_net_x23',
4254 
          'to_register6_ce' => 'ce_1_sg_x0',
4255 
          'to_register6_clk' => 'clk_1_sg_x0',
4256 
          'to_register6_clr' => [
4257 
            'constant',
4258 
            '\'0\'',
4259 
          ],
4260 
          'to_register6_data_in' => 'data_in_x23_net',
4261 
          'to_register6_dout' => 'to_register6_dout_net',
4262 
          'to_register6_en' => 'constant6_op_net_x24',
4263 
          'to_register7_ce' => 'ce_1_sg_x0',
4264 
          'to_register7_clk' => 'clk_1_sg_x0',
4265 
          'to_register7_clr' => [
4266 
            'constant',
4267 
            '\'0\'',
4268 
          ],
4269 
          'to_register7_data_in' => 'data_in_x24_net',
4270 
          'to_register7_dout' => 'to_register7_dout_net',
4271 
          'to_register7_en' => 'constant6_op_net_x25',
4272 
          'to_register8_ce' => 'ce_1_sg_x0',
4273 
          'to_register8_clk' => 'clk_1_sg_x0',
4274 
          'to_register8_clr' => [
4275 
            'constant',
4276 
            '\'0\'',
4277 
          ],
4278 
          'to_register8_data_in' => 'data_in_x25_net',
4279 
          'to_register8_dout' => 'to_register8_dout_net',
4280 
          'to_register8_en' => 'constant6_op_net_x26',
4281 
          'to_register9_ce' => 'ce_1_sg_x0',
4282 
          'to_register9_clk' => 'clk_1_sg_x0',
4283 
          'to_register9_clr' => [
4284 
            'constant',
4285 
            '\'0\'',
4286 
          ],
4287 
          'to_register9_data_in' => 'data_in_x26_net',
4288 
          'to_register9_dout' => 'to_register9_dout_net',
4289 
          'to_register9_en' => 'constant6_op_net_x27',
4290 
          'to_register_ce' => 'ce_1_sg_x0',
4291 
          'to_register_clk' => 'clk_1_sg_x0',
4292 
          'to_register_clr' => [
4293 
            'constant',
4294 
            '\'0\'',
4295 
          ],
4296 
          'to_register_data_in' => 'data_in_net',
4297 
          'to_register_dout' => 'to_register_dout_net',
4298 
          'to_register_en' => 'constant6_op_net_x0',
4299 
          'user_int_1o' => 'user_int_1o_net',
4300 
          'user_int_2o' => 'user_int_2o_net',
4301 
          'user_int_3o' => 'user_int_3o_net',
4302 
        },
4303 
        'entityName' => 'user_logic_cw',
4304 
        'nets' => {
4305 
          'bram_rd_addr_net' => {
4306 
            'attributes' => {
4307 
              'hdlNetAttributes' => [
4308 
              ],
4309 
            },
4310 
            'hdlType' => 'std_logic_vector(11 downto 0)',
4311 
            'width' => 12,
4312 
          },
4313 
          'bram_rd_dout_net' => {
4314 
            'attributes' => {
4315 
              'hdlNetAttributes' => [
4316 
              ],
4317 
            },
4318 
            'hdlType' => 'std_logic_vector(63 downto 0)',
4319 
            'width' => 64,
4320 
          },
4321 
          'bram_wr_addr_net' => {
4322 
            'attributes' => {
4323 
              'hdlNetAttributes' => [
4324 
              ],
4325 
            },
4326 
            'hdlType' => 'std_logic_vector(11 downto 0)',
4327 
            'width' => 12,
4328 
          },
4329 
          'bram_wr_din_net' => {
4330 
            'attributes' => {
4331 
              'hdlNetAttributes' => [
4332 
              ],
4333 
            },
4334 
            'hdlType' => 'std_logic_vector(63 downto 0)',
4335 
            'width' => 64,
4336 
          },
4337 
          'bram_wr_en_net' => {
4338 
            'attributes' => {
4339 
              'hdlNetAttributes' => [
4340 
              ],
4341 
            },
4342 
            'hdlType' => 'std_logic_vector(7 downto 0)',
4343 
            'width' => 8,
4344 
          },
4345 
          'ce_1_sg_x0' => {
4346 
            'attributes' => {
4347 
              'hdlNetAttributes' => [
4348 
                [
4349 
                  'MAX_FANOUT',
4350 
                  'string',
4351 
                  '"REDUCE"',
4352 
                ],
4353 
              ],
4354 
            },
4355 
            'hdlType' => 'std_logic',
4356 
            'width' => 1,
4357 
          },
4358 
          'clkNet' => {
4359 
            'attributes' => {
4360 
              'hdlNetAttributes' => [
4361 
              ],
4362 
            },
4363 
            'hdlType' => 'std_logic',
4364 
            'width' => 1,
4365 
          },
4366 
          'clk_1_sg_x0' => {
4367 
            'attributes' => {
4368 
              'hdlNetAttributes' => [
4369 
              ],
4370 
            },
4371 
            'hdlType' => 'std_logic',
4372 
            'width' => 1,
4373 
          },
4374 
          'constant6_op_net_x0' => {
4375 
            'attributes' => {
4376 
              'hdlNetAttributes' => [
4377 
              ],
4378 
            },
4379 
            'hdlType' => 'std_logic',
4380 
            'width' => 1,
4381 
          },
4382 
          'constant6_op_net_x1' => {
4383 
            'attributes' => {
4384 
              'hdlNetAttributes' => [
4385 
              ],
4386 
            },
4387 
            'hdlType' => 'std_logic',
4388 
            'width' => 1,
4389 
          },
4390 
          'constant6_op_net_x10' => {
4391 
            'attributes' => {
4392 
              'hdlNetAttributes' => [
4393 
              ],
4394 
            },
4395 
            'hdlType' => 'std_logic',
4396 
            'width' => 1,
4397 
          },
4398 
          'constant6_op_net_x11' => {
4399 
            'attributes' => {
4400 
              'hdlNetAttributes' => [
4401 
              ],
4402 
            },
4403 
            'hdlType' => 'std_logic',
4404 
            'width' => 1,
4405 
          },
4406 
          'constant6_op_net_x12' => {
4407 
            'attributes' => {
4408 
              'hdlNetAttributes' => [
4409 
              ],
4410 
            },
4411 
            'hdlType' => 'std_logic',
4412 
            'width' => 1,
4413 
          },
4414 
          'constant6_op_net_x13' => {
4415 
            'attributes' => {
4416 
              'hdlNetAttributes' => [
4417 
              ],
4418 
            },
4419 
            'hdlType' => 'std_logic',
4420 
            'width' => 1,
4421 
          },
4422 
          'constant6_op_net_x14' => {
4423 
            'attributes' => {
4424 
              'hdlNetAttributes' => [
4425 
              ],
4426 
            },
4427 
            'hdlType' => 'std_logic',
4428 
            'width' => 1,
4429 
          },
4430 
          'constant6_op_net_x15' => {
4431 
            'attributes' => {
4432 
              'hdlNetAttributes' => [
4433 
              ],
4434 
            },
4435 
            'hdlType' => 'std_logic',
4436 
            'width' => 1,
4437 
          },
4438 
          'constant6_op_net_x16' => {
4439 
            'attributes' => {
4440 
              'hdlNetAttributes' => [
4441 
              ],
4442 
            },
4443 
            'hdlType' => 'std_logic',
4444 
            'width' => 1,
4445 
          },
4446 
          'constant6_op_net_x17' => {
4447 
            'attributes' => {
4448 
              'hdlNetAttributes' => [
4449 
              ],
4450 
            },
4451 
            'hdlType' => 'std_logic',
4452 
            'width' => 1,
4453 
          },
4454 
          'constant6_op_net_x18' => {
4455 
            'attributes' => {
4456 
              'hdlNetAttributes' => [
4457 
              ],
4458 
            },
4459 
            'hdlType' => 'std_logic',
4460 
            'width' => 1,
4461 
          },
4462 
          'constant6_op_net_x19' => {
4463 
            'attributes' => {
4464 
              'hdlNetAttributes' => [
4465 
              ],
4466 
            },
4467 
            'hdlType' => 'std_logic',
4468 
            'width' => 1,
4469 
          },
4470 
          'constant6_op_net_x2' => {
4471 
            'attributes' => {
4472 
              'hdlNetAttributes' => [
4473 
              ],
4474 
            },
4475 
            'hdlType' => 'std_logic',
4476 
            'width' => 1,
4477 
          },
4478 
          'constant6_op_net_x20' => {
4479 
            'attributes' => {
4480 
              'hdlNetAttributes' => [
4481 
              ],
4482 
            },
4483 
            'hdlType' => 'std_logic',
4484 
            'width' => 1,
4485 
          },
4486 
          'constant6_op_net_x21' => {
4487 
            'attributes' => {
4488 
              'hdlNetAttributes' => [
4489 
              ],
4490 
            },
4491 
            'hdlType' => 'std_logic',
4492 
            'width' => 1,
4493 
          },
4494 
          'constant6_op_net_x22' => {
4495 
            'attributes' => {
4496 
              'hdlNetAttributes' => [
4497 
              ],
4498 
            },
4499 
            'hdlType' => 'std_logic',
4500 
            'width' => 1,
4501 
          },
4502 
          'constant6_op_net_x23' => {
4503 
            'attributes' => {
4504 
              'hdlNetAttributes' => [
4505 
              ],
4506 
            },
4507 
            'hdlType' => 'std_logic',
4508 
            'width' => 1,
4509 
          },
4510 
          'constant6_op_net_x24' => {
4511 
            'attributes' => {
4512 
              'hdlNetAttributes' => [
4513 
              ],
4514 
            },
4515 
            'hdlType' => 'std_logic',
4516 
            'width' => 1,
4517 
          },
4518 
          'constant6_op_net_x25' => {
4519 
            'attributes' => {
4520 
              'hdlNetAttributes' => [
4521 
              ],
4522 
            },
4523 
            'hdlType' => 'std_logic',
4524 
            'width' => 1,
4525 
          },
4526 
          'constant6_op_net_x26' => {
4527 
            'attributes' => {
4528 
              'hdlNetAttributes' => [
4529 
              ],
4530 
            },
4531 
            'hdlType' => 'std_logic',
4532 
            'width' => 1,
4533 
          },
4534 
          'constant6_op_net_x27' => {
4535 
            'attributes' => {
4536 
              'hdlNetAttributes' => [
4537 
              ],
4538 
            },
4539 
            'hdlType' => 'std_logic',
4540 
            'width' => 1,
4541 
          },
4542 
          'constant6_op_net_x3' => {
4543 
            'attributes' => {
4544 
              'hdlNetAttributes' => [
4545 
              ],
4546 
            },
4547 
            'hdlType' => 'std_logic',
4548 
            'width' => 1,
4549 
          },
4550 
          'constant6_op_net_x4' => {
4551 
            'attributes' => {
4552 
              'hdlNetAttributes' => [
4553 
              ],
4554 
            },
4555 
            'hdlType' => 'std_logic',
4556 
            'width' => 1,
4557 
          },
4558 
          'constant6_op_net_x5' => {
4559 
            'attributes' => {
4560 
              'hdlNetAttributes' => [
4561 
              ],
4562 
            },
4563 
            'hdlType' => 'std_logic',
4564 
            'width' => 1,
4565 
          },
4566 
          'constant6_op_net_x6' => {
4567 
            'attributes' => {
4568 
              'hdlNetAttributes' => [
4569 
              ],
4570 
            },
4571 
            'hdlType' => 'std_logic',
4572 
            'width' => 1,
4573 
          },
4574 
          'constant6_op_net_x7' => {
4575 
            'attributes' => {
4576 
              'hdlNetAttributes' => [
4577 
              ],
4578 
            },
4579 
            'hdlType' => 'std_logic',
4580 
            'width' => 1,
4581 
          },
4582 
          'constant6_op_net_x8' => {
4583 
            'attributes' => {
4584 
              'hdlNetAttributes' => [
4585 
              ],
4586 
            },
4587 
            'hdlType' => 'std_logic',
4588 
            'width' => 1,
4589 
          },
4590 
          'constant6_op_net_x9' => {
4591 
            'attributes' => {
4592 
              'hdlNetAttributes' => [
4593 
              ],
4594 
            },
4595 
            'hdlType' => 'std_logic',
4596 
            'width' => 1,
4597 
          },
4598 
          'data_in_net' => {
4599 
            'attributes' => {
4600 
              'hdlNetAttributes' => [
4601 
              ],
4602 
            },
4603 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4604 
            'width' => 32,
4605 
          },
4606 
          'data_in_x0_net' => {
4607 
            'attributes' => {
4608 
              'hdlNetAttributes' => [
4609 
              ],
4610 
            },
4611 
            'hdlType' => 'std_logic',
4612 
            'width' => 1,
4613 
          },
4614 
          'data_in_x10_net' => {
4615 
            'attributes' => {
4616 
              'hdlNetAttributes' => [
4617 
              ],
4618 
            },
4619 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4620 
            'width' => 32,
4621 
          },
4622 
          'data_in_x11_net' => {
4623 
            'attributes' => {
4624 
              'hdlNetAttributes' => [
4625 
              ],
4626 
            },
4627 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4628 
            'width' => 32,
4629 
          },
4630 
          'data_in_x12_net' => {
4631 
            'attributes' => {
4632 
              'hdlNetAttributes' => [
4633 
              ],
4634 
            },
4635 
            'hdlType' => 'std_logic',
4636 
            'width' => 1,
4637 
          },
4638 
          'data_in_x13_net' => {
4639 
            'attributes' => {
4640 
              'hdlNetAttributes' => [
4641 
              ],
4642 
            },
4643 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4644 
            'width' => 32,
4645 
          },
4646 
          'data_in_x14_net' => {
4647 
            'attributes' => {
4648 
              'hdlNetAttributes' => [
4649 
              ],
4650 
            },
4651 
            'hdlType' => 'std_logic',
4652 
            'width' => 1,
4653 
          },
4654 
          'data_in_x15_net' => {
4655 
            'attributes' => {
4656 
              'hdlNetAttributes' => [
4657 
              ],
4658 
            },
4659 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4660 
            'width' => 32,
4661 
          },
4662 
          'data_in_x16_net' => {
4663 
            'attributes' => {
4664 
              'hdlNetAttributes' => [
4665 
              ],
4666 
            },
4667 
            'hdlType' => 'std_logic',
4668 
            'width' => 1,
4669 
          },
4670 
          'data_in_x17_net' => {
4671 
            'attributes' => {
4672 
              'hdlNetAttributes' => [
4673 
              ],
4674 
            },
4675 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4676 
            'width' => 32,
4677 
          },
4678 
          'data_in_x18_net' => {
4679 
            'attributes' => {
4680 
              'hdlNetAttributes' => [
4681 
              ],
4682 
            },
4683 
            'hdlType' => 'std_logic',
4684 
            'width' => 1,
4685 
          },
4686 
          'data_in_x19_net' => {
4687 
            'attributes' => {
4688 
              'hdlNetAttributes' => [
4689 
              ],
4690 
            },
4691 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4692 
            'width' => 32,
4693 
          },
4694 
          'data_in_x1_net' => {
4695 
            'attributes' => {
4696 
              'hdlNetAttributes' => [
4697 
              ],
4698 
            },
4699 
            'hdlType' => 'std_logic',
4700 
            'width' => 1,
4701 
          },
4702 
          'data_in_x20_net' => {
4703 
            'attributes' => {
4704 
              'hdlNetAttributes' => [
4705 
              ],
4706 
            },
4707 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4708 
            'width' => 32,
4709 
          },
4710 
          'data_in_x21_net' => {
4711 
            'attributes' => {
4712 
              'hdlNetAttributes' => [
4713 
              ],
4714 
            },
4715 
            'hdlType' => 'std_logic',
4716 
            'width' => 1,
4717 
          },
4718 
          'data_in_x22_net' => {
4719 
            'attributes' => {
4720 
              'hdlNetAttributes' => [
4721 
              ],
4722 
            },
4723 
            'hdlType' => 'std_logic',
4724 
            'width' => 1,
4725 
          },
4726 
          'data_in_x23_net' => {
4727 
            'attributes' => {
4728 
              'hdlNetAttributes' => [
4729 
              ],
4730 
            },
4731 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4732 
            'width' => 32,
4733 
          },
4734 
          'data_in_x24_net' => {
4735 
            'attributes' => {
4736 
              'hdlNetAttributes' => [
4737 
              ],
4738 
            },
4739 
            'hdlType' => 'std_logic',
4740 
            'width' => 1,
4741 
          },
4742 
          'data_in_x25_net' => {
4743 
            'attributes' => {
4744 
              'hdlNetAttributes' => [
4745 
              ],
4746 
            },
4747 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4748 
            'width' => 32,
4749 
          },
4750 
          'data_in_x26_net' => {
4751 
            'attributes' => {
4752 
              'hdlNetAttributes' => [
4753 
              ],
4754 
            },
4755 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4756 
            'width' => 32,
4757 
          },
4758 
          'data_in_x2_net' => {
4759 
            'attributes' => {
4760 
              'hdlNetAttributes' => [
4761 
              ],
4762 
            },
4763 
            'hdlType' => 'std_logic',
4764 
            'width' => 1,
4765 
          },
4766 
          'data_in_x3_net' => {
4767 
            'attributes' => {
4768 
              'hdlNetAttributes' => [
4769 
              ],
4770 
            },
4771 
            'hdlType' => 'std_logic',
4772 
            'width' => 1,
4773 
          },
4774 
          'data_in_x4_net' => {
4775 
            'attributes' => {
4776 
              'hdlNetAttributes' => [
4777 
              ],
4778 
            },
4779 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4780 
            'width' => 32,
4781 
          },
4782 
          'data_in_x5_net' => {
4783 
            'attributes' => {
4784 
              'hdlNetAttributes' => [
4785 
              ],
4786 
            },
4787 
            'hdlType' => 'std_logic',
4788 
            'width' => 1,
4789 
          },
4790 
          'data_in_x6_net' => {
4791 
            'attributes' => {
4792 
              'hdlNetAttributes' => [
4793 
              ],
4794 
            },
4795 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4796 
            'width' => 32,
4797 
          },
4798 
          'data_in_x7_net' => {
4799 
            'attributes' => {
4800 
              'hdlNetAttributes' => [
4801 
              ],
4802 
            },
4803 
            'hdlType' => 'std_logic',
4804 
            'width' => 1,
4805 
          },
4806 
          'data_in_x8_net' => {
4807 
            'attributes' => {
4808 
              'hdlNetAttributes' => [
4809 
              ],
4810 
            },
4811 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4812 
            'width' => 32,
4813 
          },
4814 
          'data_in_x9_net' => {
4815 
            'attributes' => {
4816 
              'hdlNetAttributes' => [
4817 
              ],
4818 
            },
4819 
            'hdlType' => 'std_logic',
4820 
            'width' => 1,
4821 
          },
4822 
          'data_out_net' => {
4823 
            'attributes' => {
4824 
              'hdlNetAttributes' => [
4825 
              ],
4826 
            },
4827 
            'hdlType' => 'std_logic',
4828 
            'width' => 1,
4829 
          },
4830 
          'data_out_x0_net' => {
4831 
            'attributes' => {
4832 
              'hdlNetAttributes' => [
4833 
              ],
4834 
            },
4835 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4836 
            'width' => 32,
4837 
          },
4838 
          'data_out_x10_net' => {
4839 
            'attributes' => {
4840 
              'hdlNetAttributes' => [
4841 
              ],
4842 
            },
4843 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4844 
            'width' => 32,
4845 
          },
4846 
          'data_out_x11_net' => {
4847 
            'attributes' => {
4848 
              'hdlNetAttributes' => [
4849 
              ],
4850 
            },
4851 
            'hdlType' => 'std_logic',
4852 
            'width' => 1,
4853 
          },
4854 
          'data_out_x12_net' => {
4855 
            'attributes' => {
4856 
              'hdlNetAttributes' => [
4857 
              ],
4858 
            },
4859 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4860 
            'width' => 32,
4861 
          },
4862 
          'data_out_x13_net' => {
4863 
            'attributes' => {
4864 
              'hdlNetAttributes' => [
4865 
              ],
4866 
            },
4867 
            'hdlType' => 'std_logic',
4868 
            'width' => 1,
4869 
          },
4870 
          'data_out_x14_net' => {
4871 
            'attributes' => {
4872 
              'hdlNetAttributes' => [
4873 
              ],
4874 
            },
4875 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4876 
            'width' => 32,
4877 
          },
4878 
          'data_out_x15_net' => {
4879 
            'attributes' => {
4880 
              'hdlNetAttributes' => [
4881 
              ],
4882 
            },
4883 
            'hdlType' => 'std_logic',
4884 
            'width' => 1,
4885 
          },
4886 
          'data_out_x16_net' => {
4887 
            'attributes' => {
4888 
              'hdlNetAttributes' => [
4889 
              ],
4890 
            },
4891 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4892 
            'width' => 32,
4893 
          },
4894 
          'data_out_x17_net' => {
4895 
            'attributes' => {
4896 
              'hdlNetAttributes' => [
4897 
              ],
4898 
            },
4899 
            'hdlType' => 'std_logic',
4900 
            'width' => 1,
4901 
          },
4902 
          'data_out_x18_net' => {
4903 
            'attributes' => {
4904 
              'hdlNetAttributes' => [
4905 
              ],
4906 
            },
4907 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4908 
            'width' => 32,
4909 
          },
4910 
          'data_out_x19_net' => {
4911 
            'attributes' => {
4912 
              'hdlNetAttributes' => [
4913 
              ],
4914 
            },
4915 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4916 
            'width' => 32,
4917 
          },
4918 
          'data_out_x1_net' => {
4919 
            'attributes' => {
4920 
              'hdlNetAttributes' => [
4921 
              ],
4922 
            },
4923 
            'hdlType' => 'std_logic',
4924 
            'width' => 1,
4925 
          },
4926 
          'data_out_x20_net' => {
4927 
            'attributes' => {
4928 
              'hdlNetAttributes' => [
4929 
              ],
4930 
            },
4931 
            'hdlType' => 'std_logic',
4932 
            'width' => 1,
4933 
          },
4934 
          'data_out_x21_net' => {
4935 
            'attributes' => {
4936 
              'hdlNetAttributes' => [
4937 
              ],
4938 
            },
4939 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4940 
            'width' => 32,
4941 
          },
4942 
          'data_out_x22_net' => {
4943 
            'attributes' => {
4944 
              'hdlNetAttributes' => [
4945 
              ],
4946 
            },
4947 
            'hdlType' => 'std_logic',
4948 
            'width' => 1,
4949 
          },
4950 
          'data_out_x23_net' => {
4951 
            'attributes' => {
4952 
              'hdlNetAttributes' => [
4953 
              ],
4954 
            },
4955 
            'hdlType' => 'std_logic',
4956 
            'width' => 1,
4957 
          },
4958 
          'data_out_x24_net' => {
4959 
            'attributes' => {
4960 
              'hdlNetAttributes' => [
4961 
              ],
4962 
            },
4963 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4964 
            'width' => 32,
4965 
          },
4966 
          'data_out_x25_net' => {
4967 
            'attributes' => {
4968 
              'hdlNetAttributes' => [
4969 
              ],
4970 
            },
4971 
            'hdlType' => 'std_logic',
4972 
            'width' => 1,
4973 
          },
4974 
          'data_out_x26_net' => {
4975 
            'attributes' => {
4976 
              'hdlNetAttributes' => [
4977 
              ],
4978 
            },
4979 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4980 
            'width' => 32,
4981 
          },
4982 
          'data_out_x27_net' => {
4983 
            'attributes' => {
4984 
              'hdlNetAttributes' => [
4985 
              ],
4986 
            },
4987 
            'hdlType' => 'std_logic',
4988 
            'width' => 1,
4989 
          },
4990 
          'data_out_x28_net' => {
4991 
            'attributes' => {
4992 
              'hdlNetAttributes' => [
4993 
              ],
4994 
            },
4995 
            'hdlType' => 'std_logic_vector(31 downto 0)',
4996 
            'width' => 32,
4997 
          },
4998 
          'data_out_x2_net' => {
4999 
            'attributes' => {
5000 
              'hdlNetAttributes' => [
5001 
              ],
5002 
            },
5003 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5004 
            'width' => 32,
5005 
          },
5006 
          'data_out_x3_net' => {
5007 
            'attributes' => {
5008 
              'hdlNetAttributes' => [
5009 
              ],
5010 
            },
5011 
            'hdlType' => 'std_logic',
5012 
            'width' => 1,
5013 
          },
5014 
          'data_out_x6_net' => {
5015 
            'attributes' => {
5016 
              'hdlNetAttributes' => [
5017 
              ],
5018 
            },
5019 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5020 
            'width' => 32,
5021 
          },
5022 
          'data_out_x7_net' => {
5023 
            'attributes' => {
5024 
              'hdlNetAttributes' => [
5025 
              ],
5026 
            },
5027 
            'hdlType' => 'std_logic',
5028 
            'width' => 1,
5029 
          },
5030 
          'data_out_x8_net' => {
5031 
            'attributes' => {
5032 
              'hdlNetAttributes' => [
5033 
              ],
5034 
            },
5035 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5036 
            'width' => 32,
5037 
          },
5038 
          'data_out_x9_net' => {
5039 
            'attributes' => {
5040 
              'hdlNetAttributes' => [
5041 
              ],
5042 
            },
5043 
            'hdlType' => 'std_logic',
5044 
            'width' => 1,
5045 
          },
5046 
          'fifo_rd_count_net' => {
5047 
            'attributes' => {
5048 
              'hdlNetAttributes' => [
5049 
              ],
5050 
            },
5051 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5052 
            'width' => 15,
5053 
          },
5054 
          'fifo_rd_dout_net' => {
5055 
            'attributes' => {
5056 
              'hdlNetAttributes' => [
5057 
              ],
5058 
            },
5059 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5060 
            'width' => 72,
5061 
          },
5062 
          'fifo_rd_empty_net' => {
5063 
            'attributes' => {
5064 
              'hdlNetAttributes' => [
5065 
              ],
5066 
            },
5067 
            'hdlType' => 'std_logic',
5068 
            'width' => 1,
5069 
          },
5070 
          'fifo_rd_en_net' => {
5071 
            'attributes' => {
5072 
              'hdlNetAttributes' => [
5073 
              ],
5074 
            },
5075 
            'hdlType' => 'std_logic',
5076 
            'width' => 1,
5077 
          },
5078 
          'fifo_rd_pempty_net' => {
5079 
            'attributes' => {
5080 
              'hdlNetAttributes' => [
5081 
              ],
5082 
            },
5083 
            'hdlType' => 'std_logic',
5084 
            'width' => 1,
5085 
          },
5086 
          'fifo_rd_valid_net' => {
5087 
            'attributes' => {
5088 
              'hdlNetAttributes' => [
5089 
              ],
5090 
            },
5091 
            'hdlType' => 'std_logic',
5092 
            'width' => 1,
5093 
          },
5094 
          'fifo_wr_count_net' => {
5095 
            'attributes' => {
5096 
              'hdlNetAttributes' => [
5097 
              ],
5098 
            },
5099 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5100 
            'width' => 15,
5101 
          },
5102 
          'fifo_wr_din_net' => {
5103 
            'attributes' => {
5104 
              'hdlNetAttributes' => [
5105 
              ],
5106 
            },
5107 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5108 
            'width' => 72,
5109 
          },
5110 
          'fifo_wr_en_net' => {
5111 
            'attributes' => {
5112 
              'hdlNetAttributes' => [
5113 
              ],
5114 
            },
5115 
            'hdlType' => 'std_logic',
5116 
            'width' => 1,
5117 
          },
5118 
          'fifo_wr_full_net' => {
5119 
            'attributes' => {
5120 
              'hdlNetAttributes' => [
5121 
              ],
5122 
            },
5123 
            'hdlType' => 'std_logic',
5124 
            'width' => 1,
5125 
          },
5126 
          'fifo_wr_pfull_net' => {
5127 
            'attributes' => {
5128 
              'hdlNetAttributes' => [
5129 
              ],
5130 
            },
5131 
            'hdlType' => 'std_logic',
5132 
            'width' => 1,
5133 
          },
5134 
          'from_register15_data_out_net' => {
5135 
            'attributes' => {
5136 
              'hdlNetAttributes' => [
5137 
              ],
5138 
            },
5139 
            'hdlType' => 'std_logic',
5140 
            'width' => 1,
5141 
          },
5142 
          'from_register16_data_out_net' => {
5143 
            'attributes' => {
5144 
              'hdlNetAttributes' => [
5145 
              ],
5146 
            },
5147 
            'hdlType' => 'std_logic',
5148 
            'width' => 1,
5149 
          },
5150 
          'from_register19_data_out_net' => {
5151 
            'attributes' => {
5152 
              'hdlNetAttributes' => [
5153 
              ],
5154 
            },
5155 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5156 
            'width' => 32,
5157 
          },
5158 
          'from_register1_data_out_net' => {
5159 
            'attributes' => {
5160 
              'hdlNetAttributes' => [
5161 
              ],
5162 
            },
5163 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5164 
            'width' => 32,
5165 
          },
5166 
          'from_register2_data_out_net' => {
5167 
            'attributes' => {
5168 
              'hdlNetAttributes' => [
5169 
              ],
5170 
            },
5171 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5172 
            'width' => 32,
5173 
          },
5174 
          'from_register_data_out_net' => {
5175 
            'attributes' => {
5176 
              'hdlNetAttributes' => [
5177 
              ],
5178 
            },
5179 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5180 
            'width' => 32,
5181 
          },
5182 
          'persistentdff_inst_q' => {
5183 
            'attributes' => {
5184 
              'hdlNetAttributes' => [
5185 
                [
5186 
                  'syn_keep',
5187 
                  'boolean',
5188 
                  'true',
5189 
                ],
5190 
                [
5191 
                  'keep',
5192 
                  'boolean',
5193 
                  'true',
5194 
                ],
5195 
                [
5196 
                  'preserve_signal',
5197 
                  'boolean',
5198 
                  'true',
5199 
                ],
5200 
              ],
5201 
            },
5202 
            'hdlType' => 'std_logic',
5203 
            'width' => 1,
5204 
          },
5205 
          'rst_i_net' => {
5206 
            'attributes' => {
5207 
              'hdlNetAttributes' => [
5208 
              ],
5209 
            },
5210 
            'hdlType' => 'std_logic',
5211 
            'width' => 1,
5212 
          },
5213 
          'rst_o_net' => {
5214 
            'attributes' => {
5215 
              'hdlNetAttributes' => [
5216 
              ],
5217 
            },
5218 
            'hdlType' => 'std_logic',
5219 
            'width' => 1,
5220 
          },
5221 
          'to_register10_dout_net' => {
5222 
            'attributes' => {
5223 
              'hdlNetAttributes' => [
5224 
              ],
5225 
            },
5226 
            'hdlType' => 'std_logic',
5227 
            'width' => 1,
5228 
          },
5229 
          'to_register11_dout_net' => {
5230 
            'attributes' => {
5231 
              'hdlNetAttributes' => [
5232 
              ],
5233 
            },
5234 
            'hdlType' => 'std_logic',
5235 
            'width' => 1,
5236 
          },
5237 
          'to_register12_dout_net' => {
5238 
            'attributes' => {
5239 
              'hdlNetAttributes' => [
5240 
              ],
5241 
            },
5242 
            'hdlType' => 'std_logic',
5243 
            'width' => 1,
5244 
          },
5245 
          'to_register13_dout_net' => {
5246 
            'attributes' => {
5247 
              'hdlNetAttributes' => [
5248 
              ],
5249 
            },
5250 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5251 
            'width' => 32,
5252 
          },
5253 
          'to_register14_dout_net' => {
5254 
            'attributes' => {
5255 
              'hdlNetAttributes' => [
5256 
              ],
5257 
            },
5258 
            'hdlType' => 'std_logic',
5259 
            'width' => 1,
5260 
          },
5261 
          'to_register15_dout_net' => {
5262 
            'attributes' => {
5263 
              'hdlNetAttributes' => [
5264 
              ],
5265 
            },
5266 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5267 
            'width' => 32,
5268 
          },
5269 
          'to_register16_dout_net' => {
5270 
            'attributes' => {
5271 
              'hdlNetAttributes' => [
5272 
              ],
5273 
            },
5274 
            'hdlType' => 'std_logic',
5275 
            'width' => 1,
5276 
          },
5277 
          'to_register17_dout_net' => {
5278 
            'attributes' => {
5279 
              'hdlNetAttributes' => [
5280 
              ],
5281 
            },
5282 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5283 
            'width' => 32,
5284 
          },
5285 
          'to_register18_dout_net' => {
5286 
            'attributes' => {
5287 
              'hdlNetAttributes' => [
5288 
              ],
5289 
            },
5290 
            'hdlType' => 'std_logic',
5291 
            'width' => 1,
5292 
          },
5293 
          'to_register19_dout_net' => {
5294 
            'attributes' => {
5295 
              'hdlNetAttributes' => [
5296 
              ],
5297 
            },
5298 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5299 
            'width' => 32,
5300 
          },
5301 
          'to_register1_dout_net' => {
5302 
            'attributes' => {
5303 
              'hdlNetAttributes' => [
5304 
              ],
5305 
            },
5306 
            'hdlType' => 'std_logic',
5307 
            'width' => 1,
5308 
          },
5309 
          'to_register20_dout_net' => {
5310 
            'attributes' => {
5311 
              'hdlNetAttributes' => [
5312 
              ],
5313 
            },
5314 
            'hdlType' => 'std_logic',
5315 
            'width' => 1,
5316 
          },
5317 
          'to_register21_dout_net' => {
5318 
            'attributes' => {
5319 
              'hdlNetAttributes' => [
5320 
              ],
5321 
            },
5322 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5323 
            'width' => 32,
5324 
          },
5325 
          'to_register22_dout_net' => {
5326 
            'attributes' => {
5327 
              'hdlNetAttributes' => [
5328 
              ],
5329 
            },
5330 
            'hdlType' => 'std_logic',
5331 
            'width' => 1,
5332 
          },
5333 
          'to_register23_dout_net' => {
5334 
            'attributes' => {
5335 
              'hdlNetAttributes' => [
5336 
              ],
5337 
            },
5338 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5339 
            'width' => 32,
5340 
          },
5341 
          'to_register24_dout_net' => {
5342 
            'attributes' => {
5343 
              'hdlNetAttributes' => [
5344 
              ],
5345 
            },
5346 
            'hdlType' => 'std_logic',
5347 
            'width' => 1,
5348 
          },
5349 
          'to_register25_dout_net' => {
5350 
            'attributes' => {
5351 
              'hdlNetAttributes' => [
5352 
              ],
5353 
            },
5354 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5355 
            'width' => 32,
5356 
          },
5357 
          'to_register26_dout_net' => {
5358 
            'attributes' => {
5359 
              'hdlNetAttributes' => [
5360 
              ],
5361 
            },
5362 
            'hdlType' => 'std_logic',
5363 
            'width' => 1,
5364 
          },
5365 
          'to_register27_dout_net' => {
5366 
            'attributes' => {
5367 
              'hdlNetAttributes' => [
5368 
              ],
5369 
            },
5370 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5371 
            'width' => 32,
5372 
          },
5373 
          'to_register2_dout_net' => {
5374 
            'attributes' => {
5375 
              'hdlNetAttributes' => [
5376 
              ],
5377 
            },
5378 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5379 
            'width' => 32,
5380 
          },
5381 
          'to_register3_dout_net' => {
5382 
            'attributes' => {
5383 
              'hdlNetAttributes' => [
5384 
              ],
5385 
            },
5386 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5387 
            'width' => 32,
5388 
          },
5389 
          'to_register4_dout_net' => {
5390 
            'attributes' => {
5391 
              'hdlNetAttributes' => [
5392 
              ],
5393 
            },
5394 
            'hdlType' => 'std_logic',
5395 
            'width' => 1,
5396 
          },
5397 
          'to_register5_dout_net' => {
5398 
            'attributes' => {
5399 
              'hdlNetAttributes' => [
5400 
              ],
5401 
            },
5402 
            'hdlType' => 'std_logic',
5403 
            'width' => 1,
5404 
          },
5405 
          'to_register6_dout_net' => {
5406 
            'attributes' => {
5407 
              'hdlNetAttributes' => [
5408 
              ],
5409 
            },
5410 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5411 
            'width' => 32,
5412 
          },
5413 
          'to_register7_dout_net' => {
5414 
            'attributes' => {
5415 
              'hdlNetAttributes' => [
5416 
              ],
5417 
            },
5418 
            'hdlType' => 'std_logic',
5419 
            'width' => 1,
5420 
          },
5421 
          'to_register8_dout_net' => {
5422 
            'attributes' => {
5423 
              'hdlNetAttributes' => [
5424 
              ],
5425 
            },
5426 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5427 
            'width' => 32,
5428 
          },
5429 
          'to_register9_dout_net' => {
5430 
            'attributes' => {
5431 
              'hdlNetAttributes' => [
5432 
              ],
5433 
            },
5434 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5435 
            'width' => 32,
5436 
          },
5437 
          'to_register_dout_net' => {
5438 
            'attributes' => {
5439 
              'hdlNetAttributes' => [
5440 
              ],
5441 
            },
5442 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5443 
            'width' => 32,
5444 
          },
5445 
          'user_int_1o_net' => {
5446 
            'attributes' => {
5447 
              'hdlNetAttributes' => [
5448 
              ],
5449 
            },
5450 
            'hdlType' => 'std_logic',
5451 
            'width' => 1,
5452 
          },
5453 
          'user_int_2o_net' => {
5454 
            'attributes' => {
5455 
              'hdlNetAttributes' => [
5456 
              ],
5457 
            },
5458 
            'hdlType' => 'std_logic',
5459 
            'width' => 1,
5460 
          },
5461 
          'user_int_3o_net' => {
5462 
            'attributes' => {
5463 
              'hdlNetAttributes' => [
5464 
              ],
5465 
            },
5466 
            'hdlType' => 'std_logic',
5467 
            'width' => 1,
5468 
          },
5469 
        },
5470 
        'ports' => {
5471 
          'bram_rd_addr' => {
5472 
            'attributes' => {
5473 
              'bin_pt' => 0,
5474 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
5475 
              'is_floating_block' => 1,
5476 
              'is_gateway_port' => 1,
5477 
              'must_be_hdl_vector' => 1,
5478 
              'period' => 1,
5479 
              'port_id' => 0,
5480 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr/BRAM_rd_addr',
5481 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_addr',
5482 
              'timingConstraint' => 'none',
5483 
              'type' => 'UFix_12_0',
5484 
            },
5485 
            'direction' => 'out',
5486 
            'hdlType' => 'std_logic_vector(11 downto 0)',
5487 
            'width' => 12,
5488 
          },
5489 
          'bram_rd_dout' => {
5490 
            'attributes' => {
5491 
              'bin_pt' => 0,
5492 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
5493 
              'is_floating_block' => 1,
5494 
              'is_gateway_port' => 1,
5495 
              'must_be_hdl_vector' => 1,
5496 
              'period' => 1,
5497 
              'port_id' => 0,
5498 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout/BRAM_rd_dout',
5499 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_rd_dout',
5500 
              'timingConstraint' => 'none',
5501 
              'type' => 'UFix_64_0',
5502 
            },
5503 
            'direction' => 'in',
5504 
            'hdlType' => 'std_logic_vector(63 downto 0)',
5505 
            'width' => 64,
5506 
          },
5507 
          'bram_wr_addr' => {
5508 
            'attributes' => {
5509 
              'bin_pt' => 0,
5510 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
5511 
              'is_floating_block' => 1,
5512 
              'is_gateway_port' => 1,
5513 
              'must_be_hdl_vector' => 1,
5514 
              'period' => 1,
5515 
              'port_id' => 0,
5516 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr/BRAM_wr_addr',
5517 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_addr',
5518 
              'timingConstraint' => 'none',
5519 
              'type' => 'UFix_12_0',
5520 
            },
5521 
            'direction' => 'out',
5522 
            'hdlType' => 'std_logic_vector(11 downto 0)',
5523 
            'width' => 12,
5524 
          },
5525 
          'bram_wr_din' => {
5526 
            'attributes' => {
5527 
              'bin_pt' => 0,
5528 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
5529 
              'is_floating_block' => 1,
5530 
              'is_gateway_port' => 1,
5531 
              'must_be_hdl_vector' => 1,
5532 
              'period' => 1,
5533 
              'port_id' => 0,
5534 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din/BRAM_wr_din',
5535 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_din',
5536 
              'timingConstraint' => 'none',
5537 
              'type' => 'UFix_64_0',
5538 
            },
5539 
            'direction' => 'out',
5540 
            'hdlType' => 'std_logic_vector(63 downto 0)',
5541 
            'width' => 64,
5542 
          },
5543 
          'bram_wr_en' => {
5544 
            'attributes' => {
5545 
              'bin_pt' => 0,
5546 
              'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
5547 
              'is_floating_block' => 1,
5548 
              'is_gateway_port' => 1,
5549 
              'must_be_hdl_vector' => 1,
5550 
              'period' => 1,
5551 
              'port_id' => 0,
5552 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en/BRAM_wr_en',
5553 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/BRAM_wr_en',
5554 
              'timingConstraint' => 'none',
5555 
              'type' => 'UFix_8_0',
5556 
            },
5557 
            'direction' => 'out',
5558 
            'hdlType' => 'std_logic_vector(7 downto 0)',
5559 
            'width' => 8,
5560 
          },
5561 
          'ce' => {
5562 
            'attributes' => {
5563 
              'defaultHdlValue' => '\'1\'',
5564 
              'domain' => 'default',
5565 
              'group' => 6,
5566 
              'isCe' => 1,
5567 
              'period' => 1,
5568 
            },
5569 
            'direction' => 'in',
5570 
            'hdlType' => 'std_logic',
5571 
            'width' => 1,
5572 
          },
5573 
          'clk' => {
5574 
            'attributes' => {
5575 
              'domain' => 'default',
5576 
              'group' => 6,
5577 
              'isClk' => 1,
5578 
              'period' => 1,
5579 
              'type' => 'logic',
5580 
            },
5581 
            'direction' => 'in',
5582 
            'hdlType' => 'std_logic',
5583 
            'width' => 1,
5584 
          },
5585 
          'fifo_rd_count' => {
5586 
            'attributes' => {
5587 
              'bin_pt' => 0,
5588 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
5589 
              'is_floating_block' => 1,
5590 
              'is_gateway_port' => 1,
5591 
              'must_be_hdl_vector' => 1,
5592 
              'period' => 1,
5593 
              'port_id' => 0,
5594 
              'simulinkName' => 'fifo_rd_count',
5595 
              'source_block' => '',
5596 
              'timingConstraint' => 'none',
5597 
              'type' => 'UFix_15_0',
5598 
            },
5599 
            'direction' => 'in',
5600 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5601 
            'width' => 15,
5602 
          },
5603 
          'fifo_rd_dout' => {
5604 
            'attributes' => {
5605 
              'bin_pt' => 0,
5606 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
5607 
              'is_floating_block' => 1,
5608 
              'is_gateway_port' => 1,
5609 
              'must_be_hdl_vector' => 1,
5610 
              'period' => 1,
5611 
              'port_id' => 0,
5612 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout/FIFO_rd_dout',
5613 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_dout',
5614 
              'timingConstraint' => 'none',
5615 
              'type' => 'UFix_72_0',
5616 
            },
5617 
            'direction' => 'in',
5618 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5619 
            'width' => 72,
5620 
          },
5621 
          'fifo_rd_empty' => {
5622 
            'attributes' => {
5623 
              'bin_pt' => 0,
5624 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
5625 
              'is_floating_block' => 1,
5626 
              'is_gateway_port' => 1,
5627 
              'must_be_hdl_vector' => 1,
5628 
              'period' => 1,
5629 
              'port_id' => 0,
5630 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty/FIFO_rd_empty',
5631 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_empty',
5632 
              'timingConstraint' => 'none',
5633 
              'type' => 'Bool',
5634 
            },
5635 
            'direction' => 'in',
5636 
            'hdlType' => 'std_logic',
5637 
            'width' => 1,
5638 
          },
5639 
          'fifo_rd_en' => {
5640 
            'attributes' => {
5641 
              'bin_pt' => 0,
5642 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
5643 
              'is_floating_block' => 1,
5644 
              'is_gateway_port' => 1,
5645 
              'must_be_hdl_vector' => 1,
5646 
              'period' => 1,
5647 
              'port_id' => 0,
5648 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en/FIFO_rd_en',
5649 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_en',
5650 
              'timingConstraint' => 'none',
5651 
              'type' => 'Bool',
5652 
            },
5653 
            'direction' => 'out',
5654 
            'hdlType' => 'std_logic',
5655 
            'width' => 1,
5656 
          },
5657 
          'fifo_rd_pempty' => {
5658 
            'attributes' => {
5659 
              'bin_pt' => 0,
5660 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
5661 
              'is_floating_block' => 1,
5662 
              'is_gateway_port' => 1,
5663 
              'must_be_hdl_vector' => 1,
5664 
              'period' => 1,
5665 
              'port_id' => 0,
5666 
              'simulinkName' => 'fifo_rd_pempty',
5667 
              'source_block' => '',
5668 
              'timingConstraint' => 'none',
5669 
              'type' => 'Bool',
5670 
            },
5671 
            'direction' => 'in',
5672 
            'hdlType' => 'std_logic',
5673 
            'width' => 1,
5674 
          },
5675 
          'fifo_rd_valid' => {
5676 
            'attributes' => {
5677 
              'bin_pt' => 0,
5678 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
5679 
              'is_floating_block' => 1,
5680 
              'is_gateway_port' => 1,
5681 
              'must_be_hdl_vector' => 1,
5682 
              'period' => 1,
5683 
              'port_id' => 0,
5684 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid/FIFO_rd_valid',
5685 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_rd_valid',
5686 
              'timingConstraint' => 'none',
5687 
              'type' => 'Bool',
5688 
            },
5689 
            'direction' => 'in',
5690 
            'hdlType' => 'std_logic',
5691 
            'width' => 1,
5692 
          },
5693 
          'fifo_wr_count' => {
5694 
            'attributes' => {
5695 
              'bin_pt' => 0,
5696 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
5697 
              'is_floating_block' => 1,
5698 
              'is_gateway_port' => 1,
5699 
              'must_be_hdl_vector' => 1,
5700 
              'period' => 1,
5701 
              'port_id' => 0,
5702 
              'simulinkName' => 'fifo_wr_count',
5703 
              'source_block' => '',
5704 
              'timingConstraint' => 'none',
5705 
              'type' => 'UFix_15_0',
5706 
            },
5707 
            'direction' => 'in',
5708 
            'hdlType' => 'std_logic_vector(14 downto 0)',
5709 
            'width' => 15,
5710 
          },
5711 
          'fifo_wr_din' => {
5712 
            'attributes' => {
5713 
              'bin_pt' => 0,
5714 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
5715 
              'is_floating_block' => 1,
5716 
              'is_gateway_port' => 1,
5717 
              'must_be_hdl_vector' => 1,
5718 
              'period' => 1,
5719 
              'port_id' => 0,
5720 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din/FIFO_wr_din',
5721 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_din',
5722 
              'timingConstraint' => 'none',
5723 
              'type' => 'UFix_72_0',
5724 
            },
5725 
            'direction' => 'out',
5726 
            'hdlType' => 'std_logic_vector(71 downto 0)',
5727 
            'width' => 72,
5728 
          },
5729 
          'fifo_wr_en' => {
5730 
            'attributes' => {
5731 
              'bin_pt' => 0,
5732 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
5733 
              'is_floating_block' => 1,
5734 
              'is_gateway_port' => 1,
5735 
              'must_be_hdl_vector' => 1,
5736 
              'period' => 1,
5737 
              'port_id' => 0,
5738 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en/FIFO_wr_en',
5739 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/FIFO_wr_en',
5740 
              'timingConstraint' => 'none',
5741 
              'type' => 'Bool',
5742 
            },
5743 
            'direction' => 'out',
5744 
            'hdlType' => 'std_logic',
5745 
            'width' => 1,
5746 
          },
5747 
          'fifo_wr_full' => {
5748 
            'attributes' => {
5749 
              'bin_pt' => 0,
5750 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
5751 
              'is_floating_block' => 1,
5752 
              'is_gateway_port' => 1,
5753 
              'must_be_hdl_vector' => 1,
5754 
              'period' => 1,
5755 
              'port_id' => 0,
5756 
              'simulinkName' => 'fifo_wr_full',
5757 
              'source_block' => '',
5758 
              'timingConstraint' => 'none',
5759 
              'type' => 'Bool',
5760 
            },
5761 
            'direction' => 'in',
5762 
            'hdlType' => 'std_logic',
5763 
            'width' => 1,
5764 
          },
5765 
          'fifo_wr_pfull' => {
5766 
            'attributes' => {
5767 
              'bin_pt' => 0,
5768 
              'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
5769 
              'is_floating_block' => 1,
5770 
              'is_gateway_port' => 1,
5771 
              'must_be_hdl_vector' => 1,
5772 
              'period' => 1,
5773 
              'port_id' => 0,
5774 
              'simulinkName' => 'fifo_wr_pfull',
5775 
              'source_block' => '',
5776 
              'timingConstraint' => 'none',
5777 
              'type' => 'Bool',
5778 
            },
5779 
            'direction' => 'in',
5780 
            'hdlType' => 'std_logic',
5781 
            'width' => 1,
5782 
          },
5783 
          'from_register10_data_out' => {
5784 
            'attributes' => {
5785 
              'bin_pt' => 0,
5786 
              'is_floating_block' => 1,
5787 
              'must_be_hdl_vector' => 1,
5788 
              'period' => 1,
5789 
              'port_id' => 0,
5790 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register10/data_out',
5791 
              'type' => 'UFix_1_0',
5792 
            },
5793 
            'direction' => 'in',
5794 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5795 
            'width' => 1,
5796 
          },
5797 
          'from_register11_data_out' => {
5798 
            'attributes' => {
5799 
              'bin_pt' => 0,
5800 
              'is_floating_block' => 1,
5801 
              'must_be_hdl_vector' => 1,
5802 
              'period' => 1,
5803 
              'port_id' => 0,
5804 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register11/data_out',
5805 
              'type' => 'UFix_32_0',
5806 
            },
5807 
            'direction' => 'in',
5808 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5809 
            'width' => 32,
5810 
          },
5811 
          'from_register12_data_out' => {
5812 
            'attributes' => {
5813 
              'bin_pt' => 0,
5814 
              'is_floating_block' => 1,
5815 
              'must_be_hdl_vector' => 1,
5816 
              'period' => 1,
5817 
              'port_id' => 0,
5818 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register12/data_out',
5819 
              'type' => 'UFix_1_0',
5820 
            },
5821 
            'direction' => 'in',
5822 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5823 
            'width' => 1,
5824 
          },
5825 
          'from_register13_data_out' => {
5826 
            'attributes' => {
5827 
              'bin_pt' => 0,
5828 
              'is_floating_block' => 1,
5829 
              'must_be_hdl_vector' => 1,
5830 
              'period' => 1,
5831 
              'port_id' => 0,
5832 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register13/data_out',
5833 
              'type' => 'UFix_32_0',
5834 
            },
5835 
            'direction' => 'in',
5836 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5837 
            'width' => 32,
5838 
          },
5839 
          'from_register14_data_out' => {
5840 
            'attributes' => {
5841 
              'bin_pt' => 0,
5842 
              'is_floating_block' => 1,
5843 
              'must_be_hdl_vector' => 1,
5844 
              'period' => 1,
5845 
              'port_id' => 0,
5846 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register14/data_out',
5847 
              'type' => 'UFix_1_0',
5848 
            },
5849 
            'direction' => 'in',
5850 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5851 
            'width' => 1,
5852 
          },
5853 
          'from_register15_data_out' => {
5854 
            'attributes' => {
5855 
              'bin_pt' => 0,
5856 
              'is_floating_block' => 1,
5857 
              'must_be_hdl_vector' => 1,
5858 
              'period' => 1,
5859 
              'port_id' => 0,
5860 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register15/data_out',
5861 
              'type' => 'UFix_1_0',
5862 
            },
5863 
            'direction' => 'in',
5864 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5865 
            'width' => 1,
5866 
          },
5867 
          'from_register16_data_out' => {
5868 
            'attributes' => {
5869 
              'bin_pt' => 0,
5870 
              'is_floating_block' => 1,
5871 
              'must_be_hdl_vector' => 1,
5872 
              'period' => 1,
5873 
              'port_id' => 0,
5874 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register16/data_out',
5875 
              'type' => 'UFix_1_0',
5876 
            },
5877 
            'direction' => 'in',
5878 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5879 
            'width' => 1,
5880 
          },
5881 
          'from_register17_data_out' => {
5882 
            'attributes' => {
5883 
              'bin_pt' => 0,
5884 
              'is_floating_block' => 1,
5885 
              'must_be_hdl_vector' => 1,
5886 
              'period' => 1,
5887 
              'port_id' => 0,
5888 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register17/data_out',
5889 
              'type' => 'UFix_32_0',
5890 
            },
5891 
            'direction' => 'in',
5892 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5893 
            'width' => 32,
5894 
          },
5895 
          'from_register18_data_out' => {
5896 
            'attributes' => {
5897 
              'bin_pt' => 0,
5898 
              'is_floating_block' => 1,
5899 
              'must_be_hdl_vector' => 1,
5900 
              'period' => 1,
5901 
              'port_id' => 0,
5902 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register18/data_out',
5903 
              'type' => 'UFix_1_0',
5904 
            },
5905 
            'direction' => 'in',
5906 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5907 
            'width' => 1,
5908 
          },
5909 
          'from_register19_data_out' => {
5910 
            'attributes' => {
5911 
              'bin_pt' => 0,
5912 
              'is_floating_block' => 1,
5913 
              'must_be_hdl_vector' => 1,
5914 
              'period' => 1,
5915 
              'port_id' => 0,
5916 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register19/data_out',
5917 
              'type' => 'UFix_32_0',
5918 
            },
5919 
            'direction' => 'in',
5920 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5921 
            'width' => 32,
5922 
          },
5923 
          'from_register1_data_out' => {
5924 
            'attributes' => {
5925 
              'bin_pt' => 0,
5926 
              'is_floating_block' => 1,
5927 
              'must_be_hdl_vector' => 1,
5928 
              'period' => 1,
5929 
              'port_id' => 0,
5930 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register1/data_out',
5931 
              'type' => 'UFix_32_0',
5932 
            },
5933 
            'direction' => 'in',
5934 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5935 
            'width' => 32,
5936 
          },
5937 
          'from_register20_data_out' => {
5938 
            'attributes' => {
5939 
              'bin_pt' => 0,
5940 
              'is_floating_block' => 1,
5941 
              'must_be_hdl_vector' => 1,
5942 
              'period' => 1,
5943 
              'port_id' => 0,
5944 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register20/data_out',
5945 
              'type' => 'UFix_32_0',
5946 
            },
5947 
            'direction' => 'in',
5948 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5949 
            'width' => 32,
5950 
          },
5951 
          'from_register21_data_out' => {
5952 
            'attributes' => {
5953 
              'bin_pt' => 0,
5954 
              'is_floating_block' => 1,
5955 
              'must_be_hdl_vector' => 1,
5956 
              'period' => 1,
5957 
              'port_id' => 0,
5958 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register21/data_out',
5959 
              'type' => 'UFix_1_0',
5960 
            },
5961 
            'direction' => 'in',
5962 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5963 
            'width' => 1,
5964 
          },
5965 
          'from_register22_data_out' => {
5966 
            'attributes' => {
5967 
              'bin_pt' => 0,
5968 
              'is_floating_block' => 1,
5969 
              'must_be_hdl_vector' => 1,
5970 
              'period' => 1,
5971 
              'port_id' => 0,
5972 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register22/data_out',
5973 
              'type' => 'UFix_32_0',
5974 
            },
5975 
            'direction' => 'in',
5976 
            'hdlType' => 'std_logic_vector(31 downto 0)',
5977 
            'width' => 32,
5978 
          },
5979 
          'from_register23_data_out' => {
5980 
            'attributes' => {
5981 
              'bin_pt' => 0,
5982 
              'is_floating_block' => 1,
5983 
              'must_be_hdl_vector' => 1,
5984 
              'period' => 1,
5985 
              'port_id' => 0,
5986 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register23/data_out',
5987 
              'type' => 'UFix_1_0',
5988 
            },
5989 
            'direction' => 'in',
5990 
            'hdlType' => 'std_logic_vector(0 downto 0)',
5991 
            'width' => 1,
5992 
          },
5993 
          'from_register24_data_out' => {
5994 
            'attributes' => {
5995 
              'bin_pt' => 0,
5996 
              'is_floating_block' => 1,
5997 
              'must_be_hdl_vector' => 1,
5998 
              'period' => 1,
5999 
              'port_id' => 0,
6000 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register24/data_out',
6001 
              'type' => 'UFix_32_0',
6002 
            },
6003 
            'direction' => 'in',
6004 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6005 
            'width' => 32,
6006 
          },
6007 
          'from_register25_data_out' => {
6008 
            'attributes' => {
6009 
              'bin_pt' => 0,
6010 
              'is_floating_block' => 1,
6011 
              'must_be_hdl_vector' => 1,
6012 
              'period' => 1,
6013 
              'port_id' => 0,
6014 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register25/data_out',
6015 
              'type' => 'UFix_1_0',
6016 
            },
6017 
            'direction' => 'in',
6018 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6019 
            'width' => 1,
6020 
          },
6021 
          'from_register26_data_out' => {
6022 
            'attributes' => {
6023 
              'bin_pt' => 0,
6024 
              'is_floating_block' => 1,
6025 
              'must_be_hdl_vector' => 1,
6026 
              'period' => 1,
6027 
              'port_id' => 0,
6028 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register26/data_out',
6029 
              'type' => 'UFix_32_0',
6030 
            },
6031 
            'direction' => 'in',
6032 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6033 
            'width' => 32,
6034 
          },
6035 
          'from_register27_data_out' => {
6036 
            'attributes' => {
6037 
              'bin_pt' => 0,
6038 
              'is_floating_block' => 1,
6039 
              'must_be_hdl_vector' => 1,
6040 
              'period' => 1,
6041 
              'port_id' => 0,
6042 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register27/data_out',
6043 
              'type' => 'UFix_1_0',
6044 
            },
6045 
            'direction' => 'in',
6046 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6047 
            'width' => 1,
6048 
          },
6049 
          'from_register28_data_out' => {
6050 
            'attributes' => {
6051 
              'bin_pt' => 0,
6052 
              'is_floating_block' => 1,
6053 
              'must_be_hdl_vector' => 1,
6054 
              'period' => 1,
6055 
              'port_id' => 0,
6056 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register28/data_out',
6057 
              'type' => 'UFix_32_0',
6058 
            },
6059 
            'direction' => 'in',
6060 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6061 
            'width' => 32,
6062 
          },
6063 
          'from_register29_data_out' => {
6064 
            'attributes' => {
6065 
              'bin_pt' => 0,
6066 
              'is_floating_block' => 1,
6067 
              'must_be_hdl_vector' => 1,
6068 
              'period' => 1,
6069 
              'port_id' => 0,
6070 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register29/data_out',
6071 
              'type' => 'UFix_1_0',
6072 
            },
6073 
            'direction' => 'in',
6074 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6075 
            'width' => 1,
6076 
          },
6077 
          'from_register2_data_out' => {
6078 
            'attributes' => {
6079 
              'bin_pt' => 0,
6080 
              'is_floating_block' => 1,
6081 
              'must_be_hdl_vector' => 1,
6082 
              'period' => 1,
6083 
              'port_id' => 0,
6084 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register2/data_out',
6085 
              'type' => 'UFix_32_0',
6086 
            },
6087 
            'direction' => 'in',
6088 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6089 
            'width' => 32,
6090 
          },
6091 
          'from_register30_data_out' => {
6092 
            'attributes' => {
6093 
              'bin_pt' => 0,
6094 
              'is_floating_block' => 1,
6095 
              'must_be_hdl_vector' => 1,
6096 
              'period' => 1,
6097 
              'port_id' => 0,
6098 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register30/data_out',
6099 
              'type' => 'UFix_32_0',
6100 
            },
6101 
            'direction' => 'in',
6102 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6103 
            'width' => 32,
6104 
          },
6105 
          'from_register31_data_out' => {
6106 
            'attributes' => {
6107 
              'bin_pt' => 0,
6108 
              'is_floating_block' => 1,
6109 
              'must_be_hdl_vector' => 1,
6110 
              'period' => 1,
6111 
              'port_id' => 0,
6112 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register31/data_out',
6113 
              'type' => 'UFix_1_0',
6114 
            },
6115 
            'direction' => 'in',
6116 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6117 
            'width' => 1,
6118 
          },
6119 
          'from_register32_data_out' => {
6120 
            'attributes' => {
6121 
              'bin_pt' => 0,
6122 
              'is_floating_block' => 1,
6123 
              'must_be_hdl_vector' => 1,
6124 
              'period' => 1,
6125 
              'port_id' => 0,
6126 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register32/data_out',
6127 
              'type' => 'UFix_32_0',
6128 
            },
6129 
            'direction' => 'in',
6130 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6131 
            'width' => 32,
6132 
          },
6133 
          'from_register33_data_out' => {
6134 
            'attributes' => {
6135 
              'bin_pt' => 0,
6136 
              'is_floating_block' => 1,
6137 
              'must_be_hdl_vector' => 1,
6138 
              'period' => 1,
6139 
              'port_id' => 0,
6140 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register33/data_out',
6141 
              'type' => 'UFix_1_0',
6142 
            },
6143 
            'direction' => 'in',
6144 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6145 
            'width' => 1,
6146 
          },
6147 
          'from_register3_data_out' => {
6148 
            'attributes' => {
6149 
              'bin_pt' => 0,
6150 
              'is_floating_block' => 1,
6151 
              'must_be_hdl_vector' => 1,
6152 
              'period' => 1,
6153 
              'port_id' => 0,
6154 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register3/data_out',
6155 
              'type' => 'UFix_32_0',
6156 
            },
6157 
            'direction' => 'in',
6158 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6159 
            'width' => 32,
6160 
          },
6161 
          'from_register4_data_out' => {
6162 
            'attributes' => {
6163 
              'bin_pt' => 0,
6164 
              'is_floating_block' => 1,
6165 
              'must_be_hdl_vector' => 1,
6166 
              'period' => 1,
6167 
              'port_id' => 0,
6168 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register4/data_out',
6169 
              'type' => 'UFix_1_0',
6170 
            },
6171 
            'direction' => 'in',
6172 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6173 
            'width' => 1,
6174 
          },
6175 
          'from_register5_data_out' => {
6176 
            'attributes' => {
6177 
              'bin_pt' => 0,
6178 
              'is_floating_block' => 1,
6179 
              'must_be_hdl_vector' => 1,
6180 
              'period' => 1,
6181 
              'port_id' => 0,
6182 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register5/data_out',
6183 
              'type' => 'UFix_32_0',
6184 
            },
6185 
            'direction' => 'in',
6186 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6187 
            'width' => 32,
6188 
          },
6189 
          'from_register6_data_out' => {
6190 
            'attributes' => {
6191 
              'bin_pt' => 0,
6192 
              'is_floating_block' => 1,
6193 
              'must_be_hdl_vector' => 1,
6194 
              'period' => 1,
6195 
              'port_id' => 0,
6196 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register6/data_out',
6197 
              'type' => 'UFix_1_0',
6198 
            },
6199 
            'direction' => 'in',
6200 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6201 
            'width' => 1,
6202 
          },
6203 
          'from_register7_data_out' => {
6204 
            'attributes' => {
6205 
              'bin_pt' => 0,
6206 
              'is_floating_block' => 1,
6207 
              'must_be_hdl_vector' => 1,
6208 
              'period' => 1,
6209 
              'port_id' => 0,
6210 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register7/data_out',
6211 
              'type' => 'UFix_32_0',
6212 
            },
6213 
            'direction' => 'in',
6214 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6215 
            'width' => 32,
6216 
          },
6217 
          'from_register8_data_out' => {
6218 
            'attributes' => {
6219 
              'bin_pt' => 0,
6220 
              'is_floating_block' => 1,
6221 
              'must_be_hdl_vector' => 1,
6222 
              'period' => 1,
6223 
              'port_id' => 0,
6224 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register8/data_out',
6225 
              'type' => 'UFix_1_0',
6226 
            },
6227 
            'direction' => 'in',
6228 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6229 
            'width' => 1,
6230 
          },
6231 
          'from_register9_data_out' => {
6232 
            'attributes' => {
6233 
              'bin_pt' => 0,
6234 
              'is_floating_block' => 1,
6235 
              'must_be_hdl_vector' => 1,
6236 
              'period' => 1,
6237 
              'port_id' => 0,
6238 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register9/data_out',
6239 
              'type' => 'UFix_32_0',
6240 
            },
6241 
            'direction' => 'in',
6242 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6243 
            'width' => 32,
6244 
          },
6245 
          'from_register_data_out' => {
6246 
            'attributes' => {
6247 
              'bin_pt' => 0,
6248 
              'is_floating_block' => 1,
6249 
              'must_be_hdl_vector' => 1,
6250 
              'period' => 1,
6251 
              'port_id' => 0,
6252 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/From Register/data_out',
6253 
              'type' => 'UFix_32_0',
6254 
            },
6255 
            'direction' => 'in',
6256 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6257 
            'width' => 32,
6258 
          },
6259 
          'rst_i' => {
6260 
            'attributes' => {
6261 
              'bin_pt' => 0,
6262 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
6263 
              'is_floating_block' => 1,
6264 
              'is_gateway_port' => 1,
6265 
              'must_be_hdl_vector' => 1,
6266 
              'period' => 1,
6267 
              'port_id' => 0,
6268 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i/rst_i',
6269 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_i',
6270 
              'timingConstraint' => 'none',
6271 
              'type' => 'Bool',
6272 
            },
6273 
            'direction' => 'in',
6274 
            'hdlType' => 'std_logic',
6275 
            'width' => 1,
6276 
          },
6277 
          'rst_o' => {
6278 
            'attributes' => {
6279 
              'bin_pt' => 0,
6280 
              'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
6281 
              'is_floating_block' => 1,
6282 
              'is_gateway_port' => 1,
6283 
              'must_be_hdl_vector' => 1,
6284 
              'period' => 1,
6285 
              'port_id' => 0,
6286 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o/rst_o',
6287 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/rst_o',
6288 
              'timingConstraint' => 'none',
6289 
              'type' => 'Bool',
6290 
            },
6291 
            'direction' => 'out',
6292 
            'hdlType' => 'std_logic',
6293 
            'width' => 1,
6294 
          },
6295 
          'to_register10_ce' => {
6296 
            'attributes' => {
6297 
              'domain' => '',
6298 
              'group' => 1,
6299 
              'isCe' => 1,
6300 
              'is_floating_block' => 1,
6301 
              'period' => 1,
6302 
              'type' => 'logic',
6303 
            },
6304 
            'direction' => 'out',
6305 
            'hdlType' => 'std_logic',
6306 
            'width' => 1,
6307 
          },
6308 
          'to_register10_clk' => {
6309 
            'attributes' => {
6310 
              'domain' => '',
6311 
              'group' => 1,
6312 
              'isClk' => 1,
6313 
              'is_floating_block' => 1,
6314 
              'period' => 1,
6315 
              'type' => 'logic',
6316 
            },
6317 
            'direction' => 'out',
6318 
            'hdlType' => 'std_logic',
6319 
            'width' => 1,
6320 
          },
6321 
          'to_register10_clr' => {
6322 
            'attributes' => {
6323 
              'domain' => '',
6324 
              'group' => 1,
6325 
              'isClr' => 1,
6326 
              'is_floating_block' => 1,
6327 
              'period' => 1,
6328 
              'type' => 'logic',
6329 
              'valid_bit_used' => 0,
6330 
            },
6331 
            'direction' => 'out',
6332 
            'hdlType' => 'std_logic',
6333 
            'width' => 1,
6334 
          },
6335 
          'to_register10_data_in' => {
6336 
            'attributes' => {
6337 
              'bin_pt' => 0,
6338 
              'is_floating_block' => 1,
6339 
              'must_be_hdl_vector' => 1,
6340 
              'period' => 1,
6341 
              'port_id' => 0,
6342 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/data_in',
6343 
              'type' => 'Bool',
6344 
            },
6345 
            'direction' => 'out',
6346 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6347 
            'width' => 1,
6348 
          },
6349 
          'to_register10_dout' => {
6350 
            'attributes' => {
6351 
              'bin_pt' => 0,
6352 
              'is_floating_block' => 1,
6353 
              'must_be_hdl_vector' => 1,
6354 
              'period' => 1,
6355 
              'port_id' => 0,
6356 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/dout',
6357 
              'type' => 'Bool',
6358 
            },
6359 
            'direction' => 'in',
6360 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6361 
            'width' => 1,
6362 
          },
6363 
          'to_register10_en' => {
6364 
            'attributes' => {
6365 
              'bin_pt' => 0,
6366 
              'is_floating_block' => 1,
6367 
              'must_be_hdl_vector' => 1,
6368 
              'period' => 1,
6369 
              'port_id' => 1,
6370 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/en',
6371 
              'type' => 'Bool',
6372 
            },
6373 
            'direction' => 'out',
6374 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6375 
            'width' => 1,
6376 
          },
6377 
          'to_register11_ce' => {
6378 
            'attributes' => {
6379 
              'domain' => '',
6380 
              'group' => 1,
6381 
              'isCe' => 1,
6382 
              'is_floating_block' => 1,
6383 
              'period' => 1,
6384 
              'type' => 'logic',
6385 
            },
6386 
            'direction' => 'out',
6387 
            'hdlType' => 'std_logic',
6388 
            'width' => 1,
6389 
          },
6390 
          'to_register11_clk' => {
6391 
            'attributes' => {
6392 
              'domain' => '',
6393 
              'group' => 1,
6394 
              'isClk' => 1,
6395 
              'is_floating_block' => 1,
6396 
              'period' => 1,
6397 
              'type' => 'logic',
6398 
            },
6399 
            'direction' => 'out',
6400 
            'hdlType' => 'std_logic',
6401 
            'width' => 1,
6402 
          },
6403 
          'to_register11_clr' => {
6404 
            'attributes' => {
6405 
              'domain' => '',
6406 
              'group' => 1,
6407 
              'isClr' => 1,
6408 
              'is_floating_block' => 1,
6409 
              'period' => 1,
6410 
              'type' => 'logic',
6411 
              'valid_bit_used' => 0,
6412 
            },
6413 
            'direction' => 'out',
6414 
            'hdlType' => 'std_logic',
6415 
            'width' => 1,
6416 
          },
6417 
          'to_register11_data_in' => {
6418 
            'attributes' => {
6419 
              'bin_pt' => 0,
6420 
              'is_floating_block' => 1,
6421 
              'must_be_hdl_vector' => 1,
6422 
              'period' => 1,
6423 
              'port_id' => 0,
6424 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/data_in',
6425 
              'type' => 'Bool',
6426 
            },
6427 
            'direction' => 'out',
6428 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6429 
            'width' => 1,
6430 
          },
6431 
          'to_register11_dout' => {
6432 
            'attributes' => {
6433 
              'bin_pt' => 0,
6434 
              'is_floating_block' => 1,
6435 
              'must_be_hdl_vector' => 1,
6436 
              'period' => 1,
6437 
              'port_id' => 0,
6438 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/dout',
6439 
              'type' => 'Bool',
6440 
            },
6441 
            'direction' => 'in',
6442 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6443 
            'width' => 1,
6444 
          },
6445 
          'to_register11_en' => {
6446 
            'attributes' => {
6447 
              'bin_pt' => 0,
6448 
              'is_floating_block' => 1,
6449 
              'must_be_hdl_vector' => 1,
6450 
              'period' => 1,
6451 
              'port_id' => 1,
6452 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/en',
6453 
              'type' => 'Bool',
6454 
            },
6455 
            'direction' => 'out',
6456 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6457 
            'width' => 1,
6458 
          },
6459 
          'to_register12_ce' => {
6460 
            'attributes' => {
6461 
              'domain' => '',
6462 
              'group' => 1,
6463 
              'isCe' => 1,
6464 
              'is_floating_block' => 1,
6465 
              'period' => 1,
6466 
              'type' => 'logic',
6467 
            },
6468 
            'direction' => 'out',
6469 
            'hdlType' => 'std_logic',
6470 
            'width' => 1,
6471 
          },
6472 
          'to_register12_clk' => {
6473 
            'attributes' => {
6474 
              'domain' => '',
6475 
              'group' => 1,
6476 
              'isClk' => 1,
6477 
              'is_floating_block' => 1,
6478 
              'period' => 1,
6479 
              'type' => 'logic',
6480 
            },
6481 
            'direction' => 'out',
6482 
            'hdlType' => 'std_logic',
6483 
            'width' => 1,
6484 
          },
6485 
          'to_register12_clr' => {
6486 
            'attributes' => {
6487 
              'domain' => '',
6488 
              'group' => 1,
6489 
              'isClr' => 1,
6490 
              'is_floating_block' => 1,
6491 
              'period' => 1,
6492 
              'type' => 'logic',
6493 
              'valid_bit_used' => 0,
6494 
            },
6495 
            'direction' => 'out',
6496 
            'hdlType' => 'std_logic',
6497 
            'width' => 1,
6498 
          },
6499 
          'to_register12_data_in' => {
6500 
            'attributes' => {
6501 
              'bin_pt' => 0,
6502 
              'is_floating_block' => 1,
6503 
              'must_be_hdl_vector' => 1,
6504 
              'period' => 1,
6505 
              'port_id' => 0,
6506 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/data_in',
6507 
              'type' => 'Bool',
6508 
            },
6509 
            'direction' => 'out',
6510 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6511 
            'width' => 1,
6512 
          },
6513 
          'to_register12_dout' => {
6514 
            'attributes' => {
6515 
              'bin_pt' => 0,
6516 
              'is_floating_block' => 1,
6517 
              'must_be_hdl_vector' => 1,
6518 
              'period' => 1,
6519 
              'port_id' => 0,
6520 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/dout',
6521 
              'type' => 'Bool',
6522 
            },
6523 
            'direction' => 'in',
6524 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6525 
            'width' => 1,
6526 
          },
6527 
          'to_register12_en' => {
6528 
            'attributes' => {
6529 
              'bin_pt' => 0,
6530 
              'is_floating_block' => 1,
6531 
              'must_be_hdl_vector' => 1,
6532 
              'period' => 1,
6533 
              'port_id' => 1,
6534 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/en',
6535 
              'type' => 'Bool',
6536 
            },
6537 
            'direction' => 'out',
6538 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6539 
            'width' => 1,
6540 
          },
6541 
          'to_register13_ce' => {
6542 
            'attributes' => {
6543 
              'domain' => '',
6544 
              'group' => 1,
6545 
              'isCe' => 1,
6546 
              'is_floating_block' => 1,
6547 
              'period' => 1,
6548 
              'type' => 'logic',
6549 
            },
6550 
            'direction' => 'out',
6551 
            'hdlType' => 'std_logic',
6552 
            'width' => 1,
6553 
          },
6554 
          'to_register13_clk' => {
6555 
            'attributes' => {
6556 
              'domain' => '',
6557 
              'group' => 1,
6558 
              'isClk' => 1,
6559 
              'is_floating_block' => 1,
6560 
              'period' => 1,
6561 
              'type' => 'logic',
6562 
            },
6563 
            'direction' => 'out',
6564 
            'hdlType' => 'std_logic',
6565 
            'width' => 1,
6566 
          },
6567 
          'to_register13_clr' => {
6568 
            'attributes' => {
6569 
              'domain' => '',
6570 
              'group' => 1,
6571 
              'isClr' => 1,
6572 
              'is_floating_block' => 1,
6573 
              'period' => 1,
6574 
              'type' => 'logic',
6575 
              'valid_bit_used' => 0,
6576 
            },
6577 
            'direction' => 'out',
6578 
            'hdlType' => 'std_logic',
6579 
            'width' => 1,
6580 
          },
6581 
          'to_register13_data_in' => {
6582 
            'attributes' => {
6583 
              'bin_pt' => 0,
6584 
              'is_floating_block' => 1,
6585 
              'must_be_hdl_vector' => 1,
6586 
              'period' => 1,
6587 
              'port_id' => 0,
6588 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/data_in',
6589 
              'type' => 'UFix_32_0',
6590 
            },
6591 
            'direction' => 'out',
6592 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6593 
            'width' => 32,
6594 
          },
6595 
          'to_register13_dout' => {
6596 
            'attributes' => {
6597 
              'bin_pt' => 0,
6598 
              'is_floating_block' => 1,
6599 
              'must_be_hdl_vector' => 1,
6600 
              'period' => 1,
6601 
              'port_id' => 0,
6602 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/dout',
6603 
              'type' => 'UFix_32_0',
6604 
            },
6605 
            'direction' => 'in',
6606 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6607 
            'width' => 32,
6608 
          },
6609 
          'to_register13_en' => {
6610 
            'attributes' => {
6611 
              'bin_pt' => 0,
6612 
              'is_floating_block' => 1,
6613 
              'must_be_hdl_vector' => 1,
6614 
              'period' => 1,
6615 
              'port_id' => 1,
6616 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/en',
6617 
              'type' => 'Bool',
6618 
            },
6619 
            'direction' => 'out',
6620 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6621 
            'width' => 1,
6622 
          },
6623 
          'to_register14_ce' => {
6624 
            'attributes' => {
6625 
              'domain' => '',
6626 
              'group' => 1,
6627 
              'isCe' => 1,
6628 
              'is_floating_block' => 1,
6629 
              'period' => 1,
6630 
              'type' => 'logic',
6631 
            },
6632 
            'direction' => 'out',
6633 
            'hdlType' => 'std_logic',
6634 
            'width' => 1,
6635 
          },
6636 
          'to_register14_clk' => {
6637 
            'attributes' => {
6638 
              'domain' => '',
6639 
              'group' => 1,
6640 
              'isClk' => 1,
6641 
              'is_floating_block' => 1,
6642 
              'period' => 1,
6643 
              'type' => 'logic',
6644 
            },
6645 
            'direction' => 'out',
6646 
            'hdlType' => 'std_logic',
6647 
            'width' => 1,
6648 
          },
6649 
          'to_register14_clr' => {
6650 
            'attributes' => {
6651 
              'domain' => '',
6652 
              'group' => 1,
6653 
              'isClr' => 1,
6654 
              'is_floating_block' => 1,
6655 
              'period' => 1,
6656 
              'type' => 'logic',
6657 
              'valid_bit_used' => 0,
6658 
            },
6659 
            'direction' => 'out',
6660 
            'hdlType' => 'std_logic',
6661 
            'width' => 1,
6662 
          },
6663 
          'to_register14_data_in' => {
6664 
            'attributes' => {
6665 
              'bin_pt' => 0,
6666 
              'is_floating_block' => 1,
6667 
              'must_be_hdl_vector' => 1,
6668 
              'period' => 1,
6669 
              'port_id' => 0,
6670 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/data_in',
6671 
              'type' => 'Bool',
6672 
            },
6673 
            'direction' => 'out',
6674 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6675 
            'width' => 1,
6676 
          },
6677 
          'to_register14_dout' => {
6678 
            'attributes' => {
6679 
              'bin_pt' => 0,
6680 
              'is_floating_block' => 1,
6681 
              'must_be_hdl_vector' => 1,
6682 
              'period' => 1,
6683 
              'port_id' => 0,
6684 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/dout',
6685 
              'type' => 'Bool',
6686 
            },
6687 
            'direction' => 'in',
6688 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6689 
            'width' => 1,
6690 
          },
6691 
          'to_register14_en' => {
6692 
            'attributes' => {
6693 
              'bin_pt' => 0,
6694 
              'is_floating_block' => 1,
6695 
              'must_be_hdl_vector' => 1,
6696 
              'period' => 1,
6697 
              'port_id' => 1,
6698 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/en',
6699 
              'type' => 'Bool',
6700 
            },
6701 
            'direction' => 'out',
6702 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6703 
            'width' => 1,
6704 
          },
6705 
          'to_register15_ce' => {
6706 
            'attributes' => {
6707 
              'domain' => '',
6708 
              'group' => 1,
6709 
              'isCe' => 1,
6710 
              'is_floating_block' => 1,
6711 
              'period' => 1,
6712 
              'type' => 'logic',
6713 
            },
6714 
            'direction' => 'out',
6715 
            'hdlType' => 'std_logic',
6716 
            'width' => 1,
6717 
          },
6718 
          'to_register15_clk' => {
6719 
            'attributes' => {
6720 
              'domain' => '',
6721 
              'group' => 1,
6722 
              'isClk' => 1,
6723 
              'is_floating_block' => 1,
6724 
              'period' => 1,
6725 
              'type' => 'logic',
6726 
            },
6727 
            'direction' => 'out',
6728 
            'hdlType' => 'std_logic',
6729 
            'width' => 1,
6730 
          },
6731 
          'to_register15_clr' => {
6732 
            'attributes' => {
6733 
              'domain' => '',
6734 
              'group' => 1,
6735 
              'isClr' => 1,
6736 
              'is_floating_block' => 1,
6737 
              'period' => 1,
6738 
              'type' => 'logic',
6739 
              'valid_bit_used' => 0,
6740 
            },
6741 
            'direction' => 'out',
6742 
            'hdlType' => 'std_logic',
6743 
            'width' => 1,
6744 
          },
6745 
          'to_register15_data_in' => {
6746 
            'attributes' => {
6747 
              'bin_pt' => 0,
6748 
              'is_floating_block' => 1,
6749 
              'must_be_hdl_vector' => 1,
6750 
              'period' => 1,
6751 
              'port_id' => 0,
6752 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/data_in',
6753 
              'type' => 'UFix_32_0',
6754 
            },
6755 
            'direction' => 'out',
6756 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6757 
            'width' => 32,
6758 
          },
6759 
          'to_register15_dout' => {
6760 
            'attributes' => {
6761 
              'bin_pt' => 0,
6762 
              'is_floating_block' => 1,
6763 
              'must_be_hdl_vector' => 1,
6764 
              'period' => 1,
6765 
              'port_id' => 0,
6766 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/dout',
6767 
              'type' => 'UFix_32_0',
6768 
            },
6769 
            'direction' => 'in',
6770 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6771 
            'width' => 32,
6772 
          },
6773 
          'to_register15_en' => {
6774 
            'attributes' => {
6775 
              'bin_pt' => 0,
6776 
              'is_floating_block' => 1,
6777 
              'must_be_hdl_vector' => 1,
6778 
              'period' => 1,
6779 
              'port_id' => 1,
6780 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/en',
6781 
              'type' => 'Bool',
6782 
            },
6783 
            'direction' => 'out',
6784 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6785 
            'width' => 1,
6786 
          },
6787 
          'to_register16_ce' => {
6788 
            'attributes' => {
6789 
              'domain' => '',
6790 
              'group' => 1,
6791 
              'isCe' => 1,
6792 
              'is_floating_block' => 1,
6793 
              'period' => 1,
6794 
              'type' => 'logic',
6795 
            },
6796 
            'direction' => 'out',
6797 
            'hdlType' => 'std_logic',
6798 
            'width' => 1,
6799 
          },
6800 
          'to_register16_clk' => {
6801 
            'attributes' => {
6802 
              'domain' => '',
6803 
              'group' => 1,
6804 
              'isClk' => 1,
6805 
              'is_floating_block' => 1,
6806 
              'period' => 1,
6807 
              'type' => 'logic',
6808 
            },
6809 
            'direction' => 'out',
6810 
            'hdlType' => 'std_logic',
6811 
            'width' => 1,
6812 
          },
6813 
          'to_register16_clr' => {
6814 
            'attributes' => {
6815 
              'domain' => '',
6816 
              'group' => 1,
6817 
              'isClr' => 1,
6818 
              'is_floating_block' => 1,
6819 
              'period' => 1,
6820 
              'type' => 'logic',
6821 
              'valid_bit_used' => 0,
6822 
            },
6823 
            'direction' => 'out',
6824 
            'hdlType' => 'std_logic',
6825 
            'width' => 1,
6826 
          },
6827 
          'to_register16_data_in' => {
6828 
            'attributes' => {
6829 
              'bin_pt' => 0,
6830 
              'is_floating_block' => 1,
6831 
              'must_be_hdl_vector' => 1,
6832 
              'period' => 1,
6833 
              'port_id' => 0,
6834 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/data_in',
6835 
              'type' => 'Bool',
6836 
            },
6837 
            'direction' => 'out',
6838 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6839 
            'width' => 1,
6840 
          },
6841 
          'to_register16_dout' => {
6842 
            'attributes' => {
6843 
              'bin_pt' => 0,
6844 
              'is_floating_block' => 1,
6845 
              'must_be_hdl_vector' => 1,
6846 
              'period' => 1,
6847 
              'port_id' => 0,
6848 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/dout',
6849 
              'type' => 'Bool',
6850 
            },
6851 
            'direction' => 'in',
6852 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6853 
            'width' => 1,
6854 
          },
6855 
          'to_register16_en' => {
6856 
            'attributes' => {
6857 
              'bin_pt' => 0,
6858 
              'is_floating_block' => 1,
6859 
              'must_be_hdl_vector' => 1,
6860 
              'period' => 1,
6861 
              'port_id' => 1,
6862 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/en',
6863 
              'type' => 'Bool',
6864 
            },
6865 
            'direction' => 'out',
6866 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6867 
            'width' => 1,
6868 
          },
6869 
          'to_register17_ce' => {
6870 
            'attributes' => {
6871 
              'domain' => '',
6872 
              'group' => 1,
6873 
              'isCe' => 1,
6874 
              'is_floating_block' => 1,
6875 
              'period' => 1,
6876 
              'type' => 'logic',
6877 
            },
6878 
            'direction' => 'out',
6879 
            'hdlType' => 'std_logic',
6880 
            'width' => 1,
6881 
          },
6882 
          'to_register17_clk' => {
6883 
            'attributes' => {
6884 
              'domain' => '',
6885 
              'group' => 1,
6886 
              'isClk' => 1,
6887 
              'is_floating_block' => 1,
6888 
              'period' => 1,
6889 
              'type' => 'logic',
6890 
            },
6891 
            'direction' => 'out',
6892 
            'hdlType' => 'std_logic',
6893 
            'width' => 1,
6894 
          },
6895 
          'to_register17_clr' => {
6896 
            'attributes' => {
6897 
              'domain' => '',
6898 
              'group' => 1,
6899 
              'isClr' => 1,
6900 
              'is_floating_block' => 1,
6901 
              'period' => 1,
6902 
              'type' => 'logic',
6903 
              'valid_bit_used' => 0,
6904 
            },
6905 
            'direction' => 'out',
6906 
            'hdlType' => 'std_logic',
6907 
            'width' => 1,
6908 
          },
6909 
          'to_register17_data_in' => {
6910 
            'attributes' => {
6911 
              'bin_pt' => 0,
6912 
              'is_floating_block' => 1,
6913 
              'must_be_hdl_vector' => 1,
6914 
              'period' => 1,
6915 
              'port_id' => 0,
6916 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/data_in',
6917 
              'type' => 'UFix_32_0',
6918 
            },
6919 
            'direction' => 'out',
6920 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6921 
            'width' => 32,
6922 
          },
6923 
          'to_register17_dout' => {
6924 
            'attributes' => {
6925 
              'bin_pt' => 0,
6926 
              'is_floating_block' => 1,
6927 
              'must_be_hdl_vector' => 1,
6928 
              'period' => 1,
6929 
              'port_id' => 0,
6930 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/dout',
6931 
              'type' => 'UFix_32_0',
6932 
            },
6933 
            'direction' => 'in',
6934 
            'hdlType' => 'std_logic_vector(31 downto 0)',
6935 
            'width' => 32,
6936 
          },
6937 
          'to_register17_en' => {
6938 
            'attributes' => {
6939 
              'bin_pt' => 0,
6940 
              'is_floating_block' => 1,
6941 
              'must_be_hdl_vector' => 1,
6942 
              'period' => 1,
6943 
              'port_id' => 1,
6944 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/en',
6945 
              'type' => 'Bool',
6946 
            },
6947 
            'direction' => 'out',
6948 
            'hdlType' => 'std_logic_vector(0 downto 0)',
6949 
            'width' => 1,
6950 
          },
6951 
          'to_register18_ce' => {
6952 
            'attributes' => {
6953 
              'domain' => '',
6954 
              'group' => 1,
6955 
              'isCe' => 1,
6956 
              'is_floating_block' => 1,
6957 
              'period' => 1,
6958 
              'type' => 'logic',
6959 
            },
6960 
            'direction' => 'out',
6961 
            'hdlType' => 'std_logic',
6962 
            'width' => 1,
6963 
          },
6964 
          'to_register18_clk' => {
6965 
            'attributes' => {
6966 
              'domain' => '',
6967 
              'group' => 1,
6968 
              'isClk' => 1,
6969 
              'is_floating_block' => 1,
6970 
              'period' => 1,
6971 
              'type' => 'logic',
6972 
            },
6973 
            'direction' => 'out',
6974 
            'hdlType' => 'std_logic',
6975 
            'width' => 1,
6976 
          },
6977 
          'to_register18_clr' => {
6978 
            'attributes' => {
6979 
              'domain' => '',
6980 
              'group' => 1,
6981 
              'isClr' => 1,
6982 
              'is_floating_block' => 1,
6983 
              'period' => 1,
6984 
              'type' => 'logic',
6985 
              'valid_bit_used' => 0,
6986 
            },
6987 
            'direction' => 'out',
6988 
            'hdlType' => 'std_logic',
6989 
            'width' => 1,
6990 
          },
6991 
          'to_register18_data_in' => {
6992 
            'attributes' => {
6993 
              'bin_pt' => 0,
6994 
              'is_floating_block' => 1,
6995 
              'must_be_hdl_vector' => 1,
6996 
              'period' => 1,
6997 
              'port_id' => 0,
6998 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/data_in',
6999 
              'type' => 'Bool',
7000 
            },
7001 
            'direction' => 'out',
7002 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7003 
            'width' => 1,
7004 
          },
7005 
          'to_register18_dout' => {
7006 
            'attributes' => {
7007 
              'bin_pt' => 0,
7008 
              'is_floating_block' => 1,
7009 
              'must_be_hdl_vector' => 1,
7010 
              'period' => 1,
7011 
              'port_id' => 0,
7012 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/dout',
7013 
              'type' => 'Bool',
7014 
            },
7015 
            'direction' => 'in',
7016 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7017 
            'width' => 1,
7018 
          },
7019 
          'to_register18_en' => {
7020 
            'attributes' => {
7021 
              'bin_pt' => 0,
7022 
              'is_floating_block' => 1,
7023 
              'must_be_hdl_vector' => 1,
7024 
              'period' => 1,
7025 
              'port_id' => 1,
7026 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/en',
7027 
              'type' => 'Bool',
7028 
            },
7029 
            'direction' => 'out',
7030 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7031 
            'width' => 1,
7032 
          },
7033 
          'to_register19_ce' => {
7034 
            'attributes' => {
7035 
              'domain' => '',
7036 
              'group' => 1,
7037 
              'isCe' => 1,
7038 
              'is_floating_block' => 1,
7039 
              'period' => 1,
7040 
              'type' => 'logic',
7041 
            },
7042 
            'direction' => 'out',
7043 
            'hdlType' => 'std_logic',
7044 
            'width' => 1,
7045 
          },
7046 
          'to_register19_clk' => {
7047 
            'attributes' => {
7048 
              'domain' => '',
7049 
              'group' => 1,
7050 
              'isClk' => 1,
7051 
              'is_floating_block' => 1,
7052 
              'period' => 1,
7053 
              'type' => 'logic',
7054 
            },
7055 
            'direction' => 'out',
7056 
            'hdlType' => 'std_logic',
7057 
            'width' => 1,
7058 
          },
7059 
          'to_register19_clr' => {
7060 
            'attributes' => {
7061 
              'domain' => '',
7062 
              'group' => 1,
7063 
              'isClr' => 1,
7064 
              'is_floating_block' => 1,
7065 
              'period' => 1,
7066 
              'type' => 'logic',
7067 
              'valid_bit_used' => 0,
7068 
            },
7069 
            'direction' => 'out',
7070 
            'hdlType' => 'std_logic',
7071 
            'width' => 1,
7072 
          },
7073 
          'to_register19_data_in' => {
7074 
            'attributes' => {
7075 
              'bin_pt' => 0,
7076 
              'is_floating_block' => 1,
7077 
              'must_be_hdl_vector' => 1,
7078 
              'period' => 1,
7079 
              'port_id' => 0,
7080 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/data_in',
7081 
              'type' => 'UFix_32_0',
7082 
            },
7083 
            'direction' => 'out',
7084 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7085 
            'width' => 32,
7086 
          },
7087 
          'to_register19_dout' => {
7088 
            'attributes' => {
7089 
              'bin_pt' => 0,
7090 
              'is_floating_block' => 1,
7091 
              'must_be_hdl_vector' => 1,
7092 
              'period' => 1,
7093 
              'port_id' => 0,
7094 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/dout',
7095 
              'type' => 'UFix_32_0',
7096 
            },
7097 
            'direction' => 'in',
7098 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7099 
            'width' => 32,
7100 
          },
7101 
          'to_register19_en' => {
7102 
            'attributes' => {
7103 
              'bin_pt' => 0,
7104 
              'is_floating_block' => 1,
7105 
              'must_be_hdl_vector' => 1,
7106 
              'period' => 1,
7107 
              'port_id' => 1,
7108 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/en',
7109 
              'type' => 'Bool',
7110 
            },
7111 
            'direction' => 'out',
7112 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7113 
            'width' => 1,
7114 
          },
7115 
          'to_register1_ce' => {
7116 
            'attributes' => {
7117 
              'domain' => '',
7118 
              'group' => 1,
7119 
              'isCe' => 1,
7120 
              'is_floating_block' => 1,
7121 
              'period' => 1,
7122 
              'type' => 'logic',
7123 
            },
7124 
            'direction' => 'out',
7125 
            'hdlType' => 'std_logic',
7126 
            'width' => 1,
7127 
          },
7128 
          'to_register1_clk' => {
7129 
            'attributes' => {
7130 
              'domain' => '',
7131 
              'group' => 1,
7132 
              'isClk' => 1,
7133 
              'is_floating_block' => 1,
7134 
              'period' => 1,
7135 
              'type' => 'logic',
7136 
            },
7137 
            'direction' => 'out',
7138 
            'hdlType' => 'std_logic',
7139 
            'width' => 1,
7140 
          },
7141 
          'to_register1_clr' => {
7142 
            'attributes' => {
7143 
              'domain' => '',
7144 
              'group' => 1,
7145 
              'isClr' => 1,
7146 
              'is_floating_block' => 1,
7147 
              'period' => 1,
7148 
              'type' => 'logic',
7149 
              'valid_bit_used' => 0,
7150 
            },
7151 
            'direction' => 'out',
7152 
            'hdlType' => 'std_logic',
7153 
            'width' => 1,
7154 
          },
7155 
          'to_register1_data_in' => {
7156 
            'attributes' => {
7157 
              'bin_pt' => 0,
7158 
              'is_floating_block' => 1,
7159 
              'must_be_hdl_vector' => 1,
7160 
              'period' => 1,
7161 
              'port_id' => 0,
7162 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/data_in',
7163 
              'type' => 'Bool',
7164 
            },
7165 
            'direction' => 'out',
7166 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7167 
            'width' => 1,
7168 
          },
7169 
          'to_register1_dout' => {
7170 
            'attributes' => {
7171 
              'bin_pt' => 0,
7172 
              'is_floating_block' => 1,
7173 
              'must_be_hdl_vector' => 1,
7174 
              'period' => 1,
7175 
              'port_id' => 0,
7176 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/dout',
7177 
              'type' => 'Bool',
7178 
            },
7179 
            'direction' => 'in',
7180 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7181 
            'width' => 1,
7182 
          },
7183 
          'to_register1_en' => {
7184 
            'attributes' => {
7185 
              'bin_pt' => 0,
7186 
              'is_floating_block' => 1,
7187 
              'must_be_hdl_vector' => 1,
7188 
              'period' => 1,
7189 
              'port_id' => 1,
7190 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/en',
7191 
              'type' => 'Bool',
7192 
            },
7193 
            'direction' => 'out',
7194 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7195 
            'width' => 1,
7196 
          },
7197 
          'to_register20_ce' => {
7198 
            'attributes' => {
7199 
              'domain' => '',
7200 
              'group' => 1,
7201 
              'isCe' => 1,
7202 
              'is_floating_block' => 1,
7203 
              'period' => 1,
7204 
              'type' => 'logic',
7205 
            },
7206 
            'direction' => 'out',
7207 
            'hdlType' => 'std_logic',
7208 
            'width' => 1,
7209 
          },
7210 
          'to_register20_clk' => {
7211 
            'attributes' => {
7212 
              'domain' => '',
7213 
              'group' => 1,
7214 
              'isClk' => 1,
7215 
              'is_floating_block' => 1,
7216 
              'period' => 1,
7217 
              'type' => 'logic',
7218 
            },
7219 
            'direction' => 'out',
7220 
            'hdlType' => 'std_logic',
7221 
            'width' => 1,
7222 
          },
7223 
          'to_register20_clr' => {
7224 
            'attributes' => {
7225 
              'domain' => '',
7226 
              'group' => 1,
7227 
              'isClr' => 1,
7228 
              'is_floating_block' => 1,
7229 
              'period' => 1,
7230 
              'type' => 'logic',
7231 
              'valid_bit_used' => 0,
7232 
            },
7233 
            'direction' => 'out',
7234 
            'hdlType' => 'std_logic',
7235 
            'width' => 1,
7236 
          },
7237 
          'to_register20_data_in' => {
7238 
            'attributes' => {
7239 
              'bin_pt' => 0,
7240 
              'is_floating_block' => 1,
7241 
              'must_be_hdl_vector' => 1,
7242 
              'period' => 1,
7243 
              'port_id' => 0,
7244 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/data_in',
7245 
              'type' => 'Bool',
7246 
            },
7247 
            'direction' => 'out',
7248 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7249 
            'width' => 1,
7250 
          },
7251 
          'to_register20_dout' => {
7252 
            'attributes' => {
7253 
              'bin_pt' => 0,
7254 
              'is_floating_block' => 1,
7255 
              'must_be_hdl_vector' => 1,
7256 
              'period' => 1,
7257 
              'port_id' => 0,
7258 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/dout',
7259 
              'type' => 'Bool',
7260 
            },
7261 
            'direction' => 'in',
7262 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7263 
            'width' => 1,
7264 
          },
7265 
          'to_register20_en' => {
7266 
            'attributes' => {
7267 
              'bin_pt' => 0,
7268 
              'is_floating_block' => 1,
7269 
              'must_be_hdl_vector' => 1,
7270 
              'period' => 1,
7271 
              'port_id' => 1,
7272 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/en',
7273 
              'type' => 'Bool',
7274 
            },
7275 
            'direction' => 'out',
7276 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7277 
            'width' => 1,
7278 
          },
7279 
          'to_register21_ce' => {
7280 
            'attributes' => {
7281 
              'domain' => '',
7282 
              'group' => 1,
7283 
              'isCe' => 1,
7284 
              'is_floating_block' => 1,
7285 
              'period' => 1,
7286 
              'type' => 'logic',
7287 
            },
7288 
            'direction' => 'out',
7289 
            'hdlType' => 'std_logic',
7290 
            'width' => 1,
7291 
          },
7292 
          'to_register21_clk' => {
7293 
            'attributes' => {
7294 
              'domain' => '',
7295 
              'group' => 1,
7296 
              'isClk' => 1,
7297 
              'is_floating_block' => 1,
7298 
              'period' => 1,
7299 
              'type' => 'logic',
7300 
            },
7301 
            'direction' => 'out',
7302 
            'hdlType' => 'std_logic',
7303 
            'width' => 1,
7304 
          },
7305 
          'to_register21_clr' => {
7306 
            'attributes' => {
7307 
              'domain' => '',
7308 
              'group' => 1,
7309 
              'isClr' => 1,
7310 
              'is_floating_block' => 1,
7311 
              'period' => 1,
7312 
              'type' => 'logic',
7313 
              'valid_bit_used' => 0,
7314 
            },
7315 
            'direction' => 'out',
7316 
            'hdlType' => 'std_logic',
7317 
            'width' => 1,
7318 
          },
7319 
          'to_register21_data_in' => {
7320 
            'attributes' => {
7321 
              'bin_pt' => 0,
7322 
              'is_floating_block' => 1,
7323 
              'must_be_hdl_vector' => 1,
7324 
              'period' => 1,
7325 
              'port_id' => 0,
7326 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/data_in',
7327 
              'type' => 'UFix_32_0',
7328 
            },
7329 
            'direction' => 'out',
7330 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7331 
            'width' => 32,
7332 
          },
7333 
          'to_register21_dout' => {
7334 
            'attributes' => {
7335 
              'bin_pt' => 0,
7336 
              'is_floating_block' => 1,
7337 
              'must_be_hdl_vector' => 1,
7338 
              'period' => 1,
7339 
              'port_id' => 0,
7340 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/dout',
7341 
              'type' => 'UFix_32_0',
7342 
            },
7343 
            'direction' => 'in',
7344 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7345 
            'width' => 32,
7346 
          },
7347 
          'to_register21_en' => {
7348 
            'attributes' => {
7349 
              'bin_pt' => 0,
7350 
              'is_floating_block' => 1,
7351 
              'must_be_hdl_vector' => 1,
7352 
              'period' => 1,
7353 
              'port_id' => 1,
7354 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/en',
7355 
              'type' => 'Bool',
7356 
            },
7357 
            'direction' => 'out',
7358 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7359 
            'width' => 1,
7360 
          },
7361 
          'to_register22_ce' => {
7362 
            'attributes' => {
7363 
              'domain' => '',
7364 
              'group' => 1,
7365 
              'isCe' => 1,
7366 
              'is_floating_block' => 1,
7367 
              'period' => 1,
7368 
              'type' => 'logic',
7369 
            },
7370 
            'direction' => 'out',
7371 
            'hdlType' => 'std_logic',
7372 
            'width' => 1,
7373 
          },
7374 
          'to_register22_clk' => {
7375 
            'attributes' => {
7376 
              'domain' => '',
7377 
              'group' => 1,
7378 
              'isClk' => 1,
7379 
              'is_floating_block' => 1,
7380 
              'period' => 1,
7381 
              'type' => 'logic',
7382 
            },
7383 
            'direction' => 'out',
7384 
            'hdlType' => 'std_logic',
7385 
            'width' => 1,
7386 
          },
7387 
          'to_register22_clr' => {
7388 
            'attributes' => {
7389 
              'domain' => '',
7390 
              'group' => 1,
7391 
              'isClr' => 1,
7392 
              'is_floating_block' => 1,
7393 
              'period' => 1,
7394 
              'type' => 'logic',
7395 
              'valid_bit_used' => 0,
7396 
            },
7397 
            'direction' => 'out',
7398 
            'hdlType' => 'std_logic',
7399 
            'width' => 1,
7400 
          },
7401 
          'to_register22_data_in' => {
7402 
            'attributes' => {
7403 
              'bin_pt' => 0,
7404 
              'is_floating_block' => 1,
7405 
              'must_be_hdl_vector' => 1,
7406 
              'period' => 1,
7407 
              'port_id' => 0,
7408 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/data_in',
7409 
              'type' => 'Bool',
7410 
            },
7411 
            'direction' => 'out',
7412 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7413 
            'width' => 1,
7414 
          },
7415 
          'to_register22_dout' => {
7416 
            'attributes' => {
7417 
              'bin_pt' => 0,
7418 
              'is_floating_block' => 1,
7419 
              'must_be_hdl_vector' => 1,
7420 
              'period' => 1,
7421 
              'port_id' => 0,
7422 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/dout',
7423 
              'type' => 'Bool',
7424 
            },
7425 
            'direction' => 'in',
7426 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7427 
            'width' => 1,
7428 
          },
7429 
          'to_register22_en' => {
7430 
            'attributes' => {
7431 
              'bin_pt' => 0,
7432 
              'is_floating_block' => 1,
7433 
              'must_be_hdl_vector' => 1,
7434 
              'period' => 1,
7435 
              'port_id' => 1,
7436 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/en',
7437 
              'type' => 'Bool',
7438 
            },
7439 
            'direction' => 'out',
7440 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7441 
            'width' => 1,
7442 
          },
7443 
          'to_register23_ce' => {
7444 
            'attributes' => {
7445 
              'domain' => '',
7446 
              'group' => 1,
7447 
              'isCe' => 1,
7448 
              'is_floating_block' => 1,
7449 
              'period' => 1,
7450 
              'type' => 'logic',
7451 
            },
7452 
            'direction' => 'out',
7453 
            'hdlType' => 'std_logic',
7454 
            'width' => 1,
7455 
          },
7456 
          'to_register23_clk' => {
7457 
            'attributes' => {
7458 
              'domain' => '',
7459 
              'group' => 1,
7460 
              'isClk' => 1,
7461 
              'is_floating_block' => 1,
7462 
              'period' => 1,
7463 
              'type' => 'logic',
7464 
            },
7465 
            'direction' => 'out',
7466 
            'hdlType' => 'std_logic',
7467 
            'width' => 1,
7468 
          },
7469 
          'to_register23_clr' => {
7470 
            'attributes' => {
7471 
              'domain' => '',
7472 
              'group' => 1,
7473 
              'isClr' => 1,
7474 
              'is_floating_block' => 1,
7475 
              'period' => 1,
7476 
              'type' => 'logic',
7477 
              'valid_bit_used' => 0,
7478 
            },
7479 
            'direction' => 'out',
7480 
            'hdlType' => 'std_logic',
7481 
            'width' => 1,
7482 
          },
7483 
          'to_register23_data_in' => {
7484 
            'attributes' => {
7485 
              'bin_pt' => 0,
7486 
              'is_floating_block' => 1,
7487 
              'must_be_hdl_vector' => 1,
7488 
              'period' => 1,
7489 
              'port_id' => 0,
7490 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/data_in',
7491 
              'type' => 'UFix_32_0',
7492 
            },
7493 
            'direction' => 'out',
7494 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7495 
            'width' => 32,
7496 
          },
7497 
          'to_register23_dout' => {
7498 
            'attributes' => {
7499 
              'bin_pt' => 0,
7500 
              'is_floating_block' => 1,
7501 
              'must_be_hdl_vector' => 1,
7502 
              'period' => 1,
7503 
              'port_id' => 0,
7504 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/dout',
7505 
              'type' => 'UFix_32_0',
7506 
            },
7507 
            'direction' => 'in',
7508 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7509 
            'width' => 32,
7510 
          },
7511 
          'to_register23_en' => {
7512 
            'attributes' => {
7513 
              'bin_pt' => 0,
7514 
              'is_floating_block' => 1,
7515 
              'must_be_hdl_vector' => 1,
7516 
              'period' => 1,
7517 
              'port_id' => 1,
7518 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/en',
7519 
              'type' => 'Bool',
7520 
            },
7521 
            'direction' => 'out',
7522 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7523 
            'width' => 1,
7524 
          },
7525 
          'to_register24_ce' => {
7526 
            'attributes' => {
7527 
              'domain' => '',
7528 
              'group' => 1,
7529 
              'isCe' => 1,
7530 
              'is_floating_block' => 1,
7531 
              'period' => 1,
7532 
              'type' => 'logic',
7533 
            },
7534 
            'direction' => 'out',
7535 
            'hdlType' => 'std_logic',
7536 
            'width' => 1,
7537 
          },
7538 
          'to_register24_clk' => {
7539 
            'attributes' => {
7540 
              'domain' => '',
7541 
              'group' => 1,
7542 
              'isClk' => 1,
7543 
              'is_floating_block' => 1,
7544 
              'period' => 1,
7545 
              'type' => 'logic',
7546 
            },
7547 
            'direction' => 'out',
7548 
            'hdlType' => 'std_logic',
7549 
            'width' => 1,
7550 
          },
7551 
          'to_register24_clr' => {
7552 
            'attributes' => {
7553 
              'domain' => '',
7554 
              'group' => 1,
7555 
              'isClr' => 1,
7556 
              'is_floating_block' => 1,
7557 
              'period' => 1,
7558 
              'type' => 'logic',
7559 
              'valid_bit_used' => 0,
7560 
            },
7561 
            'direction' => 'out',
7562 
            'hdlType' => 'std_logic',
7563 
            'width' => 1,
7564 
          },
7565 
          'to_register24_data_in' => {
7566 
            'attributes' => {
7567 
              'bin_pt' => 0,
7568 
              'is_floating_block' => 1,
7569 
              'must_be_hdl_vector' => 1,
7570 
              'period' => 1,
7571 
              'port_id' => 0,
7572 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/data_in',
7573 
              'type' => 'Bool',
7574 
            },
7575 
            'direction' => 'out',
7576 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7577 
            'width' => 1,
7578 
          },
7579 
          'to_register24_dout' => {
7580 
            'attributes' => {
7581 
              'bin_pt' => 0,
7582 
              'is_floating_block' => 1,
7583 
              'must_be_hdl_vector' => 1,
7584 
              'period' => 1,
7585 
              'port_id' => 0,
7586 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/dout',
7587 
              'type' => 'Bool',
7588 
            },
7589 
            'direction' => 'in',
7590 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7591 
            'width' => 1,
7592 
          },
7593 
          'to_register24_en' => {
7594 
            'attributes' => {
7595 
              'bin_pt' => 0,
7596 
              'is_floating_block' => 1,
7597 
              'must_be_hdl_vector' => 1,
7598 
              'period' => 1,
7599 
              'port_id' => 1,
7600 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/en',
7601 
              'type' => 'Bool',
7602 
            },
7603 
            'direction' => 'out',
7604 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7605 
            'width' => 1,
7606 
          },
7607 
          'to_register25_ce' => {
7608 
            'attributes' => {
7609 
              'domain' => '',
7610 
              'group' => 1,
7611 
              'isCe' => 1,
7612 
              'is_floating_block' => 1,
7613 
              'period' => 1,
7614 
              'type' => 'logic',
7615 
            },
7616 
            'direction' => 'out',
7617 
            'hdlType' => 'std_logic',
7618 
            'width' => 1,
7619 
          },
7620 
          'to_register25_clk' => {
7621 
            'attributes' => {
7622 
              'domain' => '',
7623 
              'group' => 1,
7624 
              'isClk' => 1,
7625 
              'is_floating_block' => 1,
7626 
              'period' => 1,
7627 
              'type' => 'logic',
7628 
            },
7629 
            'direction' => 'out',
7630 
            'hdlType' => 'std_logic',
7631 
            'width' => 1,
7632 
          },
7633 
          'to_register25_clr' => {
7634 
            'attributes' => {
7635 
              'domain' => '',
7636 
              'group' => 1,
7637 
              'isClr' => 1,
7638 
              'is_floating_block' => 1,
7639 
              'period' => 1,
7640 
              'type' => 'logic',
7641 
              'valid_bit_used' => 0,
7642 
            },
7643 
            'direction' => 'out',
7644 
            'hdlType' => 'std_logic',
7645 
            'width' => 1,
7646 
          },
7647 
          'to_register25_data_in' => {
7648 
            'attributes' => {
7649 
              'bin_pt' => 0,
7650 
              'is_floating_block' => 1,
7651 
              'must_be_hdl_vector' => 1,
7652 
              'period' => 1,
7653 
              'port_id' => 0,
7654 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/data_in',
7655 
              'type' => 'UFix_32_0',
7656 
            },
7657 
            'direction' => 'out',
7658 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7659 
            'width' => 32,
7660 
          },
7661 
          'to_register25_dout' => {
7662 
            'attributes' => {
7663 
              'bin_pt' => 0,
7664 
              'is_floating_block' => 1,
7665 
              'must_be_hdl_vector' => 1,
7666 
              'period' => 1,
7667 
              'port_id' => 0,
7668 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/dout',
7669 
              'type' => 'UFix_32_0',
7670 
            },
7671 
            'direction' => 'in',
7672 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7673 
            'width' => 32,
7674 
          },
7675 
          'to_register25_en' => {
7676 
            'attributes' => {
7677 
              'bin_pt' => 0,
7678 
              'is_floating_block' => 1,
7679 
              'must_be_hdl_vector' => 1,
7680 
              'period' => 1,
7681 
              'port_id' => 1,
7682 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/en',
7683 
              'type' => 'Bool',
7684 
            },
7685 
            'direction' => 'out',
7686 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7687 
            'width' => 1,
7688 
          },
7689 
          'to_register26_ce' => {
7690 
            'attributes' => {
7691 
              'domain' => '',
7692 
              'group' => 1,
7693 
              'isCe' => 1,
7694 
              'is_floating_block' => 1,
7695 
              'period' => 1,
7696 
              'type' => 'logic',
7697 
            },
7698 
            'direction' => 'out',
7699 
            'hdlType' => 'std_logic',
7700 
            'width' => 1,
7701 
          },
7702 
          'to_register26_clk' => {
7703 
            'attributes' => {
7704 
              'domain' => '',
7705 
              'group' => 1,
7706 
              'isClk' => 1,
7707 
              'is_floating_block' => 1,
7708 
              'period' => 1,
7709 
              'type' => 'logic',
7710 
            },
7711 
            'direction' => 'out',
7712 
            'hdlType' => 'std_logic',
7713 
            'width' => 1,
7714 
          },
7715 
          'to_register26_clr' => {
7716 
            'attributes' => {
7717 
              'domain' => '',
7718 
              'group' => 1,
7719 
              'isClr' => 1,
7720 
              'is_floating_block' => 1,
7721 
              'period' => 1,
7722 
              'type' => 'logic',
7723 
              'valid_bit_used' => 0,
7724 
            },
7725 
            'direction' => 'out',
7726 
            'hdlType' => 'std_logic',
7727 
            'width' => 1,
7728 
          },
7729 
          'to_register26_data_in' => {
7730 
            'attributes' => {
7731 
              'bin_pt' => 0,
7732 
              'is_floating_block' => 1,
7733 
              'must_be_hdl_vector' => 1,
7734 
              'period' => 1,
7735 
              'port_id' => 0,
7736 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/data_in',
7737 
              'type' => 'Bool',
7738 
            },
7739 
            'direction' => 'out',
7740 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7741 
            'width' => 1,
7742 
          },
7743 
          'to_register26_dout' => {
7744 
            'attributes' => {
7745 
              'bin_pt' => 0,
7746 
              'is_floating_block' => 1,
7747 
              'must_be_hdl_vector' => 1,
7748 
              'period' => 1,
7749 
              'port_id' => 0,
7750 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/dout',
7751 
              'type' => 'Bool',
7752 
            },
7753 
            'direction' => 'in',
7754 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7755 
            'width' => 1,
7756 
          },
7757 
          'to_register26_en' => {
7758 
            'attributes' => {
7759 
              'bin_pt' => 0,
7760 
              'is_floating_block' => 1,
7761 
              'must_be_hdl_vector' => 1,
7762 
              'period' => 1,
7763 
              'port_id' => 1,
7764 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/en',
7765 
              'type' => 'Bool',
7766 
            },
7767 
            'direction' => 'out',
7768 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7769 
            'width' => 1,
7770 
          },
7771 
          'to_register27_ce' => {
7772 
            'attributes' => {
7773 
              'domain' => '',
7774 
              'group' => 1,
7775 
              'isCe' => 1,
7776 
              'is_floating_block' => 1,
7777 
              'period' => 1,
7778 
              'type' => 'logic',
7779 
            },
7780 
            'direction' => 'out',
7781 
            'hdlType' => 'std_logic',
7782 
            'width' => 1,
7783 
          },
7784 
          'to_register27_clk' => {
7785 
            'attributes' => {
7786 
              'domain' => '',
7787 
              'group' => 1,
7788 
              'isClk' => 1,
7789 
              'is_floating_block' => 1,
7790 
              'period' => 1,
7791 
              'type' => 'logic',
7792 
            },
7793 
            'direction' => 'out',
7794 
            'hdlType' => 'std_logic',
7795 
            'width' => 1,
7796 
          },
7797 
          'to_register27_clr' => {
7798 
            'attributes' => {
7799 
              'domain' => '',
7800 
              'group' => 1,
7801 
              'isClr' => 1,
7802 
              'is_floating_block' => 1,
7803 
              'period' => 1,
7804 
              'type' => 'logic',
7805 
              'valid_bit_used' => 0,
7806 
            },
7807 
            'direction' => 'out',
7808 
            'hdlType' => 'std_logic',
7809 
            'width' => 1,
7810 
          },
7811 
          'to_register27_data_in' => {
7812 
            'attributes' => {
7813 
              'bin_pt' => 0,
7814 
              'is_floating_block' => 1,
7815 
              'must_be_hdl_vector' => 1,
7816 
              'period' => 1,
7817 
              'port_id' => 0,
7818 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/data_in',
7819 
              'type' => 'UFix_32_0',
7820 
            },
7821 
            'direction' => 'out',
7822 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7823 
            'width' => 32,
7824 
          },
7825 
          'to_register27_dout' => {
7826 
            'attributes' => {
7827 
              'bin_pt' => 0,
7828 
              'is_floating_block' => 1,
7829 
              'must_be_hdl_vector' => 1,
7830 
              'period' => 1,
7831 
              'port_id' => 0,
7832 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/dout',
7833 
              'type' => 'UFix_32_0',
7834 
            },
7835 
            'direction' => 'in',
7836 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7837 
            'width' => 32,
7838 
          },
7839 
          'to_register27_en' => {
7840 
            'attributes' => {
7841 
              'bin_pt' => 0,
7842 
              'is_floating_block' => 1,
7843 
              'must_be_hdl_vector' => 1,
7844 
              'period' => 1,
7845 
              'port_id' => 1,
7846 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/en',
7847 
              'type' => 'Bool',
7848 
            },
7849 
            'direction' => 'out',
7850 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7851 
            'width' => 1,
7852 
          },
7853 
          'to_register2_ce' => {
7854 
            'attributes' => {
7855 
              'domain' => '',
7856 
              'group' => 1,
7857 
              'isCe' => 1,
7858 
              'is_floating_block' => 1,
7859 
              'period' => 1,
7860 
              'type' => 'logic',
7861 
            },
7862 
            'direction' => 'out',
7863 
            'hdlType' => 'std_logic',
7864 
            'width' => 1,
7865 
          },
7866 
          'to_register2_clk' => {
7867 
            'attributes' => {
7868 
              'domain' => '',
7869 
              'group' => 1,
7870 
              'isClk' => 1,
7871 
              'is_floating_block' => 1,
7872 
              'period' => 1,
7873 
              'type' => 'logic',
7874 
            },
7875 
            'direction' => 'out',
7876 
            'hdlType' => 'std_logic',
7877 
            'width' => 1,
7878 
          },
7879 
          'to_register2_clr' => {
7880 
            'attributes' => {
7881 
              'domain' => '',
7882 
              'group' => 1,
7883 
              'isClr' => 1,
7884 
              'is_floating_block' => 1,
7885 
              'period' => 1,
7886 
              'type' => 'logic',
7887 
              'valid_bit_used' => 0,
7888 
            },
7889 
            'direction' => 'out',
7890 
            'hdlType' => 'std_logic',
7891 
            'width' => 1,
7892 
          },
7893 
          'to_register2_data_in' => {
7894 
            'attributes' => {
7895 
              'bin_pt' => 0,
7896 
              'is_floating_block' => 1,
7897 
              'must_be_hdl_vector' => 1,
7898 
              'period' => 1,
7899 
              'port_id' => 0,
7900 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/data_in',
7901 
              'type' => 'UFix_32_0',
7902 
            },
7903 
            'direction' => 'out',
7904 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7905 
            'width' => 32,
7906 
          },
7907 
          'to_register2_dout' => {
7908 
            'attributes' => {
7909 
              'bin_pt' => 0,
7910 
              'is_floating_block' => 1,
7911 
              'must_be_hdl_vector' => 1,
7912 
              'period' => 1,
7913 
              'port_id' => 0,
7914 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/dout',
7915 
              'type' => 'UFix_32_0',
7916 
            },
7917 
            'direction' => 'in',
7918 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7919 
            'width' => 32,
7920 
          },
7921 
          'to_register2_en' => {
7922 
            'attributes' => {
7923 
              'bin_pt' => 0,
7924 
              'is_floating_block' => 1,
7925 
              'must_be_hdl_vector' => 1,
7926 
              'period' => 1,
7927 
              'port_id' => 1,
7928 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/en',
7929 
              'type' => 'Bool',
7930 
            },
7931 
            'direction' => 'out',
7932 
            'hdlType' => 'std_logic_vector(0 downto 0)',
7933 
            'width' => 1,
7934 
          },
7935 
          'to_register3_ce' => {
7936 
            'attributes' => {
7937 
              'domain' => '',
7938 
              'group' => 1,
7939 
              'isCe' => 1,
7940 
              'is_floating_block' => 1,
7941 
              'period' => 1,
7942 
              'type' => 'logic',
7943 
            },
7944 
            'direction' => 'out',
7945 
            'hdlType' => 'std_logic',
7946 
            'width' => 1,
7947 
          },
7948 
          'to_register3_clk' => {
7949 
            'attributes' => {
7950 
              'domain' => '',
7951 
              'group' => 1,
7952 
              'isClk' => 1,
7953 
              'is_floating_block' => 1,
7954 
              'period' => 1,
7955 
              'type' => 'logic',
7956 
            },
7957 
            'direction' => 'out',
7958 
            'hdlType' => 'std_logic',
7959 
            'width' => 1,
7960 
          },
7961 
          'to_register3_clr' => {
7962 
            'attributes' => {
7963 
              'domain' => '',
7964 
              'group' => 1,
7965 
              'isClr' => 1,
7966 
              'is_floating_block' => 1,
7967 
              'period' => 1,
7968 
              'type' => 'logic',
7969 
              'valid_bit_used' => 0,
7970 
            },
7971 
            'direction' => 'out',
7972 
            'hdlType' => 'std_logic',
7973 
            'width' => 1,
7974 
          },
7975 
          'to_register3_data_in' => {
7976 
            'attributes' => {
7977 
              'bin_pt' => 0,
7978 
              'is_floating_block' => 1,
7979 
              'must_be_hdl_vector' => 1,
7980 
              'period' => 1,
7981 
              'port_id' => 0,
7982 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/data_in',
7983 
              'type' => 'UFix_32_0',
7984 
            },
7985 
            'direction' => 'out',
7986 
            'hdlType' => 'std_logic_vector(31 downto 0)',
7987 
            'width' => 32,
7988 
          },
7989 
          'to_register3_dout' => {
7990 
            'attributes' => {
7991 
              'bin_pt' => 0,
7992 
              'is_floating_block' => 1,
7993 
              'must_be_hdl_vector' => 1,
7994 
              'period' => 1,
7995 
              'port_id' => 0,
7996 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/dout',
7997 
              'type' => 'UFix_32_0',
7998 
            },
7999 
            'direction' => 'in',
8000 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8001 
            'width' => 32,
8002 
          },
8003 
          'to_register3_en' => {
8004 
            'attributes' => {
8005 
              'bin_pt' => 0,
8006 
              'is_floating_block' => 1,
8007 
              'must_be_hdl_vector' => 1,
8008 
              'period' => 1,
8009 
              'port_id' => 1,
8010 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/en',
8011 
              'type' => 'Bool',
8012 
            },
8013 
            'direction' => 'out',
8014 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8015 
            'width' => 1,
8016 
          },
8017 
          'to_register4_ce' => {
8018 
            'attributes' => {
8019 
              'domain' => '',
8020 
              'group' => 1,
8021 
              'isCe' => 1,
8022 
              'is_floating_block' => 1,
8023 
              'period' => 1,
8024 
              'type' => 'logic',
8025 
            },
8026 
            'direction' => 'out',
8027 
            'hdlType' => 'std_logic',
8028 
            'width' => 1,
8029 
          },
8030 
          'to_register4_clk' => {
8031 
            'attributes' => {
8032 
              'domain' => '',
8033 
              'group' => 1,
8034 
              'isClk' => 1,
8035 
              'is_floating_block' => 1,
8036 
              'period' => 1,
8037 
              'type' => 'logic',
8038 
            },
8039 
            'direction' => 'out',
8040 
            'hdlType' => 'std_logic',
8041 
            'width' => 1,
8042 
          },
8043 
          'to_register4_clr' => {
8044 
            'attributes' => {
8045 
              'domain' => '',
8046 
              'group' => 1,
8047 
              'isClr' => 1,
8048 
              'is_floating_block' => 1,
8049 
              'period' => 1,
8050 
              'type' => 'logic',
8051 
              'valid_bit_used' => 0,
8052 
            },
8053 
            'direction' => 'out',
8054 
            'hdlType' => 'std_logic',
8055 
            'width' => 1,
8056 
          },
8057 
          'to_register4_data_in' => {
8058 
            'attributes' => {
8059 
              'bin_pt' => 0,
8060 
              'is_floating_block' => 1,
8061 
              'must_be_hdl_vector' => 1,
8062 
              'period' => 1,
8063 
              'port_id' => 0,
8064 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/data_in',
8065 
              'type' => 'Bool',
8066 
            },
8067 
            'direction' => 'out',
8068 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8069 
            'width' => 1,
8070 
          },
8071 
          'to_register4_dout' => {
8072 
            'attributes' => {
8073 
              'bin_pt' => 0,
8074 
              'is_floating_block' => 1,
8075 
              'must_be_hdl_vector' => 1,
8076 
              'period' => 1,
8077 
              'port_id' => 0,
8078 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/dout',
8079 
              'type' => 'Bool',
8080 
            },
8081 
            'direction' => 'in',
8082 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8083 
            'width' => 1,
8084 
          },
8085 
          'to_register4_en' => {
8086 
            'attributes' => {
8087 
              'bin_pt' => 0,
8088 
              'is_floating_block' => 1,
8089 
              'must_be_hdl_vector' => 1,
8090 
              'period' => 1,
8091 
              'port_id' => 1,
8092 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/en',
8093 
              'type' => 'Bool',
8094 
            },
8095 
            'direction' => 'out',
8096 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8097 
            'width' => 1,
8098 
          },
8099 
          'to_register5_ce' => {
8100 
            'attributes' => {
8101 
              'domain' => '',
8102 
              'group' => 1,
8103 
              'isCe' => 1,
8104 
              'is_floating_block' => 1,
8105 
              'period' => 1,
8106 
              'type' => 'logic',
8107 
            },
8108 
            'direction' => 'out',
8109 
            'hdlType' => 'std_logic',
8110 
            'width' => 1,
8111 
          },
8112 
          'to_register5_clk' => {
8113 
            'attributes' => {
8114 
              'domain' => '',
8115 
              'group' => 1,
8116 
              'isClk' => 1,
8117 
              'is_floating_block' => 1,
8118 
              'period' => 1,
8119 
              'type' => 'logic',
8120 
            },
8121 
            'direction' => 'out',
8122 
            'hdlType' => 'std_logic',
8123 
            'width' => 1,
8124 
          },
8125 
          'to_register5_clr' => {
8126 
            'attributes' => {
8127 
              'domain' => '',
8128 
              'group' => 1,
8129 
              'isClr' => 1,
8130 
              'is_floating_block' => 1,
8131 
              'period' => 1,
8132 
              'type' => 'logic',
8133 
              'valid_bit_used' => 0,
8134 
            },
8135 
            'direction' => 'out',
8136 
            'hdlType' => 'std_logic',
8137 
            'width' => 1,
8138 
          },
8139 
          'to_register5_data_in' => {
8140 
            'attributes' => {
8141 
              'bin_pt' => 0,
8142 
              'is_floating_block' => 1,
8143 
              'must_be_hdl_vector' => 1,
8144 
              'period' => 1,
8145 
              'port_id' => 0,
8146 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/data_in',
8147 
              'type' => 'Bool',
8148 
            },
8149 
            'direction' => 'out',
8150 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8151 
            'width' => 1,
8152 
          },
8153 
          'to_register5_dout' => {
8154 
            'attributes' => {
8155 
              'bin_pt' => 0,
8156 
              'is_floating_block' => 1,
8157 
              'must_be_hdl_vector' => 1,
8158 
              'period' => 1,
8159 
              'port_id' => 0,
8160 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/dout',
8161 
              'type' => 'Bool',
8162 
            },
8163 
            'direction' => 'in',
8164 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8165 
            'width' => 1,
8166 
          },
8167 
          'to_register5_en' => {
8168 
            'attributes' => {
8169 
              'bin_pt' => 0,
8170 
              'is_floating_block' => 1,
8171 
              'must_be_hdl_vector' => 1,
8172 
              'period' => 1,
8173 
              'port_id' => 1,
8174 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/en',
8175 
              'type' => 'Bool',
8176 
            },
8177 
            'direction' => 'out',
8178 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8179 
            'width' => 1,
8180 
          },
8181 
          'to_register6_ce' => {
8182 
            'attributes' => {
8183 
              'domain' => '',
8184 
              'group' => 1,
8185 
              'isCe' => 1,
8186 
              'is_floating_block' => 1,
8187 
              'period' => 1,
8188 
              'type' => 'logic',
8189 
            },
8190 
            'direction' => 'out',
8191 
            'hdlType' => 'std_logic',
8192 
            'width' => 1,
8193 
          },
8194 
          'to_register6_clk' => {
8195 
            'attributes' => {
8196 
              'domain' => '',
8197 
              'group' => 1,
8198 
              'isClk' => 1,
8199 
              'is_floating_block' => 1,
8200 
              'period' => 1,
8201 
              'type' => 'logic',
8202 
            },
8203 
            'direction' => 'out',
8204 
            'hdlType' => 'std_logic',
8205 
            'width' => 1,
8206 
          },
8207 
          'to_register6_clr' => {
8208 
            'attributes' => {
8209 
              'domain' => '',
8210 
              'group' => 1,
8211 
              'isClr' => 1,
8212 
              'is_floating_block' => 1,
8213 
              'period' => 1,
8214 
              'type' => 'logic',
8215 
              'valid_bit_used' => 0,
8216 
            },
8217 
            'direction' => 'out',
8218 
            'hdlType' => 'std_logic',
8219 
            'width' => 1,
8220 
          },
8221 
          'to_register6_data_in' => {
8222 
            'attributes' => {
8223 
              'bin_pt' => 0,
8224 
              'is_floating_block' => 1,
8225 
              'must_be_hdl_vector' => 1,
8226 
              'period' => 1,
8227 
              'port_id' => 0,
8228 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/data_in',
8229 
              'type' => 'UFix_32_0',
8230 
            },
8231 
            'direction' => 'out',
8232 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8233 
            'width' => 32,
8234 
          },
8235 
          'to_register6_dout' => {
8236 
            'attributes' => {
8237 
              'bin_pt' => 0,
8238 
              'is_floating_block' => 1,
8239 
              'must_be_hdl_vector' => 1,
8240 
              'period' => 1,
8241 
              'port_id' => 0,
8242 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/dout',
8243 
              'type' => 'UFix_32_0',
8244 
            },
8245 
            'direction' => 'in',
8246 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8247 
            'width' => 32,
8248 
          },
8249 
          'to_register6_en' => {
8250 
            'attributes' => {
8251 
              'bin_pt' => 0,
8252 
              'is_floating_block' => 1,
8253 
              'must_be_hdl_vector' => 1,
8254 
              'period' => 1,
8255 
              'port_id' => 1,
8256 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/en',
8257 
              'type' => 'Bool',
8258 
            },
8259 
            'direction' => 'out',
8260 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8261 
            'width' => 1,
8262 
          },
8263 
          'to_register7_ce' => {
8264 
            'attributes' => {
8265 
              'domain' => '',
8266 
              'group' => 1,
8267 
              'isCe' => 1,
8268 
              'is_floating_block' => 1,
8269 
              'period' => 1,
8270 
              'type' => 'logic',
8271 
            },
8272 
            'direction' => 'out',
8273 
            'hdlType' => 'std_logic',
8274 
            'width' => 1,
8275 
          },
8276 
          'to_register7_clk' => {
8277 
            'attributes' => {
8278 
              'domain' => '',
8279 
              'group' => 1,
8280 
              'isClk' => 1,
8281 
              'is_floating_block' => 1,
8282 
              'period' => 1,
8283 
              'type' => 'logic',
8284 
            },
8285 
            'direction' => 'out',
8286 
            'hdlType' => 'std_logic',
8287 
            'width' => 1,
8288 
          },
8289 
          'to_register7_clr' => {
8290 
            'attributes' => {
8291 
              'domain' => '',
8292 
              'group' => 1,
8293 
              'isClr' => 1,
8294 
              'is_floating_block' => 1,
8295 
              'period' => 1,
8296 
              'type' => 'logic',
8297 
              'valid_bit_used' => 0,
8298 
            },
8299 
            'direction' => 'out',
8300 
            'hdlType' => 'std_logic',
8301 
            'width' => 1,
8302 
          },
8303 
          'to_register7_data_in' => {
8304 
            'attributes' => {
8305 
              'bin_pt' => 0,
8306 
              'is_floating_block' => 1,
8307 
              'must_be_hdl_vector' => 1,
8308 
              'period' => 1,
8309 
              'port_id' => 0,
8310 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/data_in',
8311 
              'type' => 'Bool',
8312 
            },
8313 
            'direction' => 'out',
8314 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8315 
            'width' => 1,
8316 
          },
8317 
          'to_register7_dout' => {
8318 
            'attributes' => {
8319 
              'bin_pt' => 0,
8320 
              'is_floating_block' => 1,
8321 
              'must_be_hdl_vector' => 1,
8322 
              'period' => 1,
8323 
              'port_id' => 0,
8324 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/dout',
8325 
              'type' => 'Bool',
8326 
            },
8327 
            'direction' => 'in',
8328 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8329 
            'width' => 1,
8330 
          },
8331 
          'to_register7_en' => {
8332 
            'attributes' => {
8333 
              'bin_pt' => 0,
8334 
              'is_floating_block' => 1,
8335 
              'must_be_hdl_vector' => 1,
8336 
              'period' => 1,
8337 
              'port_id' => 1,
8338 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/en',
8339 
              'type' => 'Bool',
8340 
            },
8341 
            'direction' => 'out',
8342 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8343 
            'width' => 1,
8344 
          },
8345 
          'to_register8_ce' => {
8346 
            'attributes' => {
8347 
              'domain' => '',
8348 
              'group' => 1,
8349 
              'isCe' => 1,
8350 
              'is_floating_block' => 1,
8351 
              'period' => 1,
8352 
              'type' => 'logic',
8353 
            },
8354 
            'direction' => 'out',
8355 
            'hdlType' => 'std_logic',
8356 
            'width' => 1,
8357 
          },
8358 
          'to_register8_clk' => {
8359 
            'attributes' => {
8360 
              'domain' => '',
8361 
              'group' => 1,
8362 
              'isClk' => 1,
8363 
              'is_floating_block' => 1,
8364 
              'period' => 1,
8365 
              'type' => 'logic',
8366 
            },
8367 
            'direction' => 'out',
8368 
            'hdlType' => 'std_logic',
8369 
            'width' => 1,
8370 
          },
8371 
          'to_register8_clr' => {
8372 
            'attributes' => {
8373 
              'domain' => '',
8374 
              'group' => 1,
8375 
              'isClr' => 1,
8376 
              'is_floating_block' => 1,
8377 
              'period' => 1,
8378 
              'type' => 'logic',
8379 
              'valid_bit_used' => 0,
8380 
            },
8381 
            'direction' => 'out',
8382 
            'hdlType' => 'std_logic',
8383 
            'width' => 1,
8384 
          },
8385 
          'to_register8_data_in' => {
8386 
            'attributes' => {
8387 
              'bin_pt' => 0,
8388 
              'is_floating_block' => 1,
8389 
              'must_be_hdl_vector' => 1,
8390 
              'period' => 1,
8391 
              'port_id' => 0,
8392 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/data_in',
8393 
              'type' => 'UFix_32_0',
8394 
            },
8395 
            'direction' => 'out',
8396 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8397 
            'width' => 32,
8398 
          },
8399 
          'to_register8_dout' => {
8400 
            'attributes' => {
8401 
              'bin_pt' => 0,
8402 
              'is_floating_block' => 1,
8403 
              'must_be_hdl_vector' => 1,
8404 
              'period' => 1,
8405 
              'port_id' => 0,
8406 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/dout',
8407 
              'type' => 'UFix_32_0',
8408 
            },
8409 
            'direction' => 'in',
8410 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8411 
            'width' => 32,
8412 
          },
8413 
          'to_register8_en' => {
8414 
            'attributes' => {
8415 
              'bin_pt' => 0,
8416 
              'is_floating_block' => 1,
8417 
              'must_be_hdl_vector' => 1,
8418 
              'period' => 1,
8419 
              'port_id' => 1,
8420 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/en',
8421 
              'type' => 'Bool',
8422 
            },
8423 
            'direction' => 'out',
8424 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8425 
            'width' => 1,
8426 
          },
8427 
          'to_register9_ce' => {
8428 
            'attributes' => {
8429 
              'domain' => '',
8430 
              'group' => 1,
8431 
              'isCe' => 1,
8432 
              'is_floating_block' => 1,
8433 
              'period' => 1,
8434 
              'type' => 'logic',
8435 
            },
8436 
            'direction' => 'out',
8437 
            'hdlType' => 'std_logic',
8438 
            'width' => 1,
8439 
          },
8440 
          'to_register9_clk' => {
8441 
            'attributes' => {
8442 
              'domain' => '',
8443 
              'group' => 1,
8444 
              'isClk' => 1,
8445 
              'is_floating_block' => 1,
8446 
              'period' => 1,
8447 
              'type' => 'logic',
8448 
            },
8449 
            'direction' => 'out',
8450 
            'hdlType' => 'std_logic',
8451 
            'width' => 1,
8452 
          },
8453 
          'to_register9_clr' => {
8454 
            'attributes' => {
8455 
              'domain' => '',
8456 
              'group' => 1,
8457 
              'isClr' => 1,
8458 
              'is_floating_block' => 1,
8459 
              'period' => 1,
8460 
              'type' => 'logic',
8461 
              'valid_bit_used' => 0,
8462 
            },
8463 
            'direction' => 'out',
8464 
            'hdlType' => 'std_logic',
8465 
            'width' => 1,
8466 
          },
8467 
          'to_register9_data_in' => {
8468 
            'attributes' => {
8469 
              'bin_pt' => 0,
8470 
              'is_floating_block' => 1,
8471 
              'must_be_hdl_vector' => 1,
8472 
              'period' => 1,
8473 
              'port_id' => 0,
8474 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/data_in',
8475 
              'type' => 'UFix_32_0',
8476 
            },
8477 
            'direction' => 'out',
8478 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8479 
            'width' => 32,
8480 
          },
8481 
          'to_register9_dout' => {
8482 
            'attributes' => {
8483 
              'bin_pt' => 0,
8484 
              'is_floating_block' => 1,
8485 
              'must_be_hdl_vector' => 1,
8486 
              'period' => 1,
8487 
              'port_id' => 0,
8488 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/dout',
8489 
              'type' => 'UFix_32_0',
8490 
            },
8491 
            'direction' => 'in',
8492 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8493 
            'width' => 32,
8494 
          },
8495 
          'to_register9_en' => {
8496 
            'attributes' => {
8497 
              'bin_pt' => 0,
8498 
              'is_floating_block' => 1,
8499 
              'must_be_hdl_vector' => 1,
8500 
              'period' => 1,
8501 
              'port_id' => 1,
8502 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/en',
8503 
              'type' => 'Bool',
8504 
            },
8505 
            'direction' => 'out',
8506 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8507 
            'width' => 1,
8508 
          },
8509 
          'to_register_ce' => {
8510 
            'attributes' => {
8511 
              'domain' => '',
8512 
              'group' => 1,
8513 
              'isCe' => 1,
8514 
              'is_floating_block' => 1,
8515 
              'period' => 1,
8516 
              'type' => 'logic',
8517 
            },
8518 
            'direction' => 'out',
8519 
            'hdlType' => 'std_logic',
8520 
            'width' => 1,
8521 
          },
8522 
          'to_register_clk' => {
8523 
            'attributes' => {
8524 
              'domain' => '',
8525 
              'group' => 1,
8526 
              'isClk' => 1,
8527 
              'is_floating_block' => 1,
8528 
              'period' => 1,
8529 
              'type' => 'logic',
8530 
            },
8531 
            'direction' => 'out',
8532 
            'hdlType' => 'std_logic',
8533 
            'width' => 1,
8534 
          },
8535 
          'to_register_clr' => {
8536 
            'attributes' => {
8537 
              'domain' => '',
8538 
              'group' => 1,
8539 
              'isClr' => 1,
8540 
              'is_floating_block' => 1,
8541 
              'period' => 1,
8542 
              'type' => 'logic',
8543 
              'valid_bit_used' => 0,
8544 
            },
8545 
            'direction' => 'out',
8546 
            'hdlType' => 'std_logic',
8547 
            'width' => 1,
8548 
          },
8549 
          'to_register_data_in' => {
8550 
            'attributes' => {
8551 
              'bin_pt' => 0,
8552 
              'is_floating_block' => 1,
8553 
              'must_be_hdl_vector' => 1,
8554 
              'period' => 1,
8555 
              'port_id' => 0,
8556 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/data_in',
8557 
              'type' => 'UFix_32_0',
8558 
            },
8559 
            'direction' => 'out',
8560 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8561 
            'width' => 32,
8562 
          },
8563 
          'to_register_dout' => {
8564 
            'attributes' => {
8565 
              'bin_pt' => 0,
8566 
              'is_floating_block' => 1,
8567 
              'must_be_hdl_vector' => 1,
8568 
              'period' => 1,
8569 
              'port_id' => 0,
8570 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/dout',
8571 
              'type' => 'UFix_32_0',
8572 
            },
8573 
            'direction' => 'in',
8574 
            'hdlType' => 'std_logic_vector(31 downto 0)',
8575 
            'width' => 32,
8576 
          },
8577 
          'to_register_en' => {
8578 
            'attributes' => {
8579 
              'bin_pt' => 0,
8580 
              'is_floating_block' => 1,
8581 
              'must_be_hdl_vector' => 1,
8582 
              'period' => 1,
8583 
              'port_id' => 1,
8584 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/en',
8585 
              'type' => 'Bool',
8586 
            },
8587 
            'direction' => 'out',
8588 
            'hdlType' => 'std_logic_vector(0 downto 0)',
8589 
            'width' => 1,
8590 
          },
8591 
          'user_int_1o' => {
8592 
            'attributes' => {
8593 
              'bin_pt' => 0,
8594 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
8595 
              'is_floating_block' => 1,
8596 
              'is_gateway_port' => 1,
8597 
              'must_be_hdl_vector' => 1,
8598 
              'period' => 1,
8599 
              'port_id' => 0,
8600 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o/user_int_1o',
8601 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o',
8602 
              'timingConstraint' => 'none',
8603 
              'type' => 'Bool',
8604 
            },
8605 
            'direction' => 'out',
8606 
            'hdlType' => 'std_logic',
8607 
            'width' => 1,
8608 
          },
8609 
          'user_int_2o' => {
8610 
            'attributes' => {
8611 
              'bin_pt' => 0,
8612 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
8613 
              'is_floating_block' => 1,
8614 
              'is_gateway_port' => 1,
8615 
              'must_be_hdl_vector' => 1,
8616 
              'period' => 1,
8617 
              'port_id' => 0,
8618 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o/user_int_2o',
8619 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o',
8620 
              'timingConstraint' => 'none',
8621 
              'type' => 'Bool',
8622 
            },
8623 
            'direction' => 'out',
8624 
            'hdlType' => 'std_logic',
8625 
            'width' => 1,
8626 
          },
8627 
          'user_int_3o' => {
8628 
            'attributes' => {
8629 
              'bin_pt' => 0,
8630 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
8631 
              'is_floating_block' => 1,
8632 
              'is_gateway_port' => 1,
8633 
              'must_be_hdl_vector' => 1,
8634 
              'period' => 1,
8635 
              'port_id' => 0,
8636 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o/user_int_3o',
8637 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o',
8638 
              'timingConstraint' => 'none',
8639 
              'type' => 'Bool',
8640 
            },
8641 
            'direction' => 'out',
8642 
            'hdlType' => 'std_logic',
8643 
            'width' => 1,
8644 
          },
8645 
        },
8646 
        'subblocks' => {
8647 
          'default_clock_driver_x0' => {
8648 
            'connections' => {
8649 
              'ce_1' => 'ce_1_sg_x0',
8650 
              'clk_1' => 'clk_1_sg_x0',
8651 
              'sysce' => [
8652 
                'constant',
8653 
                '\'1\'',
8654 
              ],
8655 
              'sysce_clr' => [
8656 
                'constant',
8657 
                '\'0\'',
8658 
              ],
8659 
              'sysclk' => 'clkNet',
8660 
            },
8661 
            'entity' => {
8662 
              'attributes' => {
8663 
                'domain' => 'default',
8664 
                'hdlArchAttributes' => [
8665 
                  [
8666 
                    'syn_noprune',
8667 
                    'boolean',
8668 
                    'true',
8669 
                  ],
8670 
                  [
8671 
                    'optimize_primitives',
8672 
                    'boolean',
8673 
                    'false',
8674 
                  ],
8675 
                  [
8676 
                    'dont_touch',
8677 
                    'boolean',
8678 
                    'true',
8679 
                  ],
8680 
                ],
8681 
                'hdlEntityAttributes' => [
8682 
                ],
8683 
                'isClkDriver' => 1,
8684 
              },
8685 
              'entityName' => 'default_clock_driver',
8686 
              'ports' => {
8687 
                'ce_1' => {
8688 
                  'attributes' => {
8689 
                    'domain' => 'default',
8690 
                    'group' => 1,
8691 
                    'isCe' => 1,
8692 
                    'period' => 1,
8693 
                    'type' => 'logic',
8694 
                  },
8695 
                  'direction' => 'out',
8696 
                  'hdlType' => 'std_logic',
8697 
                  'width' => 1,
8698 
                },
8699 
                'clk_1' => {
8700 
                  'attributes' => {
8701 
                    'domain' => 'default',
8702 
                    'group' => 1,
8703 
                    'isClk' => 1,
8704 
                    'period' => 1,
8705 
                    'type' => 'logic',
8706 
                  },
8707 
                  'direction' => 'out',
8708 
                  'hdlType' => 'std_logic',
8709 
                  'width' => 1,
8710 
                },
8711 
                'sysce' => {
8712 
                  'attributes' => {
8713 
                    'group' => 6,
8714 
                    'isCe' => 1,
8715 
                    'period' => 1,
8716 
                  },
8717 
                  'direction' => 'in',
8718 
                  'hdlType' => 'std_logic',
8719 
                  'width' => 1,
8720 
                },
8721 
                'sysce_clr' => {
8722 
                  'attributes' => {
8723 
                    'group' => 6,
8724 
                    'isClr' => 1,
8725 
                    'period' => 1,
8726 
                  },
8727 
                  'direction' => 'in',
8728 
                  'hdlType' => 'std_logic',
8729 
                  'width' => 1,
8730 
                },
8731 
                'sysclk' => {
8732 
                  'attributes' => {
8733 
                    'group' => 6,
8734 
                    'isClk' => 1,
8735 
                    'period' => 1,
8736 
                  },
8737 
                  'direction' => 'in',
8738 
                  'hdlType' => 'std_logic',
8739 
                  'width' => 1,
8740 
                },
8741 
              },
8742 
            },
8743 
            'entityName' => 'default_clock_driver',
8744 
          },
8745 
          'persistentdff_inst' => {
8746 
            'connections' => {
8747 
              'clk' => 'clkNet',
8748 
              'd' => 'persistentdff_inst_q',
8749 
              'q' => 'persistentdff_inst_q',
8750 
            },
8751 
            'entity' => {
8752 
              'attributes' => {
8753 
                'entityAlreadyNetlisted' => 1,
8754 
                'hdlCompAttributes' => [
8755 
                  [
8756 
                    'syn_black_box',
8757 
                    'boolean',
8758 
                    'true',
8759 
                  ],
8760 
                  [
8761 
                    'box_type',
8762 
                    'string',
8763 
                    '"black_box"',
8764 
                  ],
8765 
                ],
8766 
                'is_persistent_dff' => 1,
8767 
                'needsComponentDeclaration' => 1,
8768 
              },
8769 
              'entityName' => 'xlpersistentdff',
8770 
              'ports' => {
8771 
                'clk' => {
8772 
                  'direction' => 'in',
8773 
                  'hdlType' => 'std_logic',
8774 
                  'width' => 1,
8775 
                },
8776 
                'd' => {
8777 
                  'direction' => 'in',
8778 
                  'hdlType' => 'std_logic',
8779 
                  'width' => 1,
8780 
                },
8781 
                'q' => {
8782 
                  'direction' => 'out',
8783 
                  'hdlType' => 'std_logic',
8784 
                  'width' => 1,
8785 
                },
8786 
              },
8787 
            },
8788 
            'entityName' => 'xlpersistentdff',
8789 
          },
8790 
          'user_logic_x0' => {
8791 
            'connections' => {
8792 
              'bram_rd_addr' => 'bram_rd_addr_net',
8793 
              'bram_rd_dout' => 'bram_rd_dout_net',
8794 
              'bram_wr_addr' => 'bram_wr_addr_net',
8795 
              'bram_wr_din' => 'bram_wr_din_net',
8796 
              'bram_wr_en' => 'bram_wr_en_net',
8797 
              'ce_1' => 'ce_1_sg_x0',
8798 
              'clk_1' => 'clk_1_sg_x0',
8799 
              'data_in' => 'data_in_net',
8800 
              'data_in_x0' => 'data_in_x0_net',
8801 
              'data_in_x1' => 'data_in_x1_net',
8802 
              'data_in_x10' => 'data_in_x10_net',
8803 
              'data_in_x11' => 'data_in_x11_net',
8804 
              'data_in_x12' => 'data_in_x12_net',
8805 
              'data_in_x13' => 'data_in_x13_net',
8806 
              'data_in_x14' => 'data_in_x14_net',
8807 
              'data_in_x15' => 'data_in_x15_net',
8808 
              'data_in_x16' => 'data_in_x16_net',
8809 
              'data_in_x17' => 'data_in_x17_net',
8810 
              'data_in_x18' => 'data_in_x18_net',
8811 
              'data_in_x19' => 'data_in_x19_net',
8812 
              'data_in_x2' => 'data_in_x2_net',
8813 
              'data_in_x20' => 'data_in_x20_net',
8814 
              'data_in_x21' => 'data_in_x21_net',
8815 
              'data_in_x22' => 'data_in_x22_net',
8816 
              'data_in_x23' => 'data_in_x23_net',
8817 
              'data_in_x24' => 'data_in_x24_net',
8818 
              'data_in_x25' => 'data_in_x25_net',
8819 
              'data_in_x26' => 'data_in_x26_net',
8820 
              'data_in_x3' => 'data_in_x3_net',
8821 
              'data_in_x4' => 'data_in_x4_net',
8822 
              'data_in_x5' => 'data_in_x5_net',
8823 
              'data_in_x6' => 'data_in_x6_net',
8824 
              'data_in_x7' => 'data_in_x7_net',
8825 
              'data_in_x8' => 'data_in_x8_net',
8826 
              'data_in_x9' => 'data_in_x9_net',
8827 
              'data_out' => 'data_out_net',
8828 
              'data_out_x0' => 'data_out_x0_net',
8829 
              'data_out_x1' => 'data_out_x1_net',
8830 
              'data_out_x10' => 'data_out_x10_net',
8831 
              'data_out_x11' => 'data_out_x11_net',
8832 
              'data_out_x12' => 'data_out_x12_net',
8833 
              'data_out_x13' => 'data_out_x13_net',
8834 
              'data_out_x14' => 'data_out_x14_net',
8835 
              'data_out_x15' => 'data_out_x15_net',
8836 
              'data_out_x16' => 'data_out_x16_net',
8837 
              'data_out_x17' => 'data_out_x17_net',
8838 
              'data_out_x18' => 'data_out_x18_net',
8839 
              'data_out_x19' => 'data_out_x19_net',
8840 
              'data_out_x2' => 'data_out_x2_net',
8841 
              'data_out_x20' => 'data_out_x20_net',
8842 
              'data_out_x21' => 'data_out_x21_net',
8843 
              'data_out_x22' => 'data_out_x22_net',
8844 
              'data_out_x23' => 'data_out_x23_net',
8845 
              'data_out_x24' => 'data_out_x24_net',
8846 
              'data_out_x25' => 'data_out_x25_net',
8847 
              'data_out_x26' => 'data_out_x26_net',
8848 
              'data_out_x27' => 'data_out_x27_net',
8849 
              'data_out_x28' => 'data_out_x28_net',
8850 
              'data_out_x3' => 'data_out_x3_net',
8851 
              'data_out_x6' => 'data_out_x6_net',
8852 
              'data_out_x7' => 'data_out_x7_net',
8853 
              'data_out_x8' => 'data_out_x8_net',
8854 
              'data_out_x9' => 'data_out_x9_net',
8855 
              'en' => 'constant6_op_net_x0',
8856 
              'en_x0' => 'constant6_op_net_x1',
8857 
              'en_x1' => 'constant6_op_net_x2',
8858 
              'en_x10' => 'constant6_op_net_x11',
8859 
              'en_x11' => 'constant6_op_net_x12',
8860 
              'en_x12' => 'constant6_op_net_x13',
8861 
              'en_x13' => 'constant6_op_net_x14',
8862 
              'en_x14' => 'constant6_op_net_x15',
8863 
              'en_x15' => 'constant6_op_net_x16',
8864 
              'en_x16' => 'constant6_op_net_x17',
8865 
              'en_x17' => 'constant6_op_net_x18',
8866 
              'en_x18' => 'constant6_op_net_x19',
8867 
              'en_x19' => 'constant6_op_net_x20',
8868 
              'en_x2' => 'constant6_op_net_x3',
8869 
              'en_x20' => 'constant6_op_net_x21',
8870 
              'en_x21' => 'constant6_op_net_x22',
8871 
              'en_x22' => 'constant6_op_net_x23',
8872 
              'en_x23' => 'constant6_op_net_x24',
8873 
              'en_x24' => 'constant6_op_net_x25',
8874 
              'en_x25' => 'constant6_op_net_x26',
8875 
              'en_x26' => 'constant6_op_net_x27',
8876 
              'en_x3' => 'constant6_op_net_x4',
8877 
              'en_x4' => 'constant6_op_net_x5',
8878 
              'en_x5' => 'constant6_op_net_x6',
8879 
              'en_x6' => 'constant6_op_net_x7',
8880 
              'en_x7' => 'constant6_op_net_x8',
8881 
              'en_x8' => 'constant6_op_net_x9',
8882 
              'en_x9' => 'constant6_op_net_x10',
8883 
              'fifo_rd_count' => 'fifo_rd_count_net',
8884 
              'fifo_rd_dout' => 'fifo_rd_dout_net',
8885 
              'fifo_rd_empty' => 'fifo_rd_empty_net',
8886 
              'fifo_rd_en' => 'fifo_rd_en_net',
8887 
              'fifo_rd_pempty' => 'fifo_rd_pempty_net',
8888 
              'fifo_rd_valid' => 'fifo_rd_valid_net',
8889 
              'fifo_wr_count' => 'fifo_wr_count_net',
8890 
              'fifo_wr_din' => 'fifo_wr_din_net',
8891 
              'fifo_wr_en' => 'fifo_wr_en_net',
8892 
              'fifo_wr_full' => 'fifo_wr_full_net',
8893 
              'fifo_wr_pfull' => 'fifo_wr_pfull_net',
8894 
              'rst_i' => 'rst_i_net',
8895 
              'rst_o' => 'rst_o_net',
8896 
              'user_int_1o' => 'user_int_1o_net',
8897 
              'user_int_2o' => 'user_int_2o_net',
8898 
              'user_int_3o' => 'user_int_3o_net',
8899 
            },
8900 
            'entity' => {
8901 
              'attributes' => {
8902 
                'entityAlreadyNetlisted' => 1,
8903 
                'hdlKind' => 'vhdl',
8904 
                'isDesign' => 1,
8905 
                'simulinkName' => 'USER_LOGIC',
8906 
              },
8907 
              'entityName' => 'user_logic',
8908 
              'ports' => {
8909 
                'bram_rd_addr' => {
8910 
                  'attributes' => {
8911 
                    'bin_pt' => 0,
8912 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_addr.dat',
8913 
                    'is_floating_block' => 1,
8914 
                    'is_gateway_port' => 1,
8915 
                    'must_be_hdl_vector' => 1,
8916 
                    'period' => 1,
8917 
                    'port_id' => 15,
8918 
                    'simulinkName' => 'USER_LOGIC/BRAM_rd_addr',
8919 
                    'source_block' => 'USER_LOGIC',
8920 
                    'timingConstraint' => 'none',
8921 
                    'type' => 'UFix_12_0',
8922 
                  },
8923 
                  'direction' => 'out',
8924 
                  'hdlType' => 'std_logic_vector(11 downto 0)',
8925 
                  'width' => 12,
8926 
                },
8927 
                'bram_rd_dout' => {
8928 
                  'attributes' => {
8929 
                    'bin_pt' => 0,
8930 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_rd_dout.dat',
8931 
                    'is_floating_block' => 1,
8932 
                    'is_gateway_port' => 1,
8933 
                    'must_be_hdl_vector' => 1,
8934 
                    'period' => 1,
8935 
                    'port_id' => 0,
8936 
                    'simulinkName' => 'USER_LOGIC/BRAM_rd_dout',
8937 
                    'source_block' => 'USER_LOGIC',
8938 
                    'timingConstraint' => 'none',
8939 
                    'type' => 'UFix_64_0',
8940 
                  },
8941 
                  'direction' => 'in',
8942 
                  'hdlType' => 'std_logic_vector(63 downto 0)',
8943 
                  'width' => 64,
8944 
                },
8945 
                'bram_wr_addr' => {
8946 
                  'attributes' => {
8947 
                    'bin_pt' => 0,
8948 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_addr.dat',
8949 
                    'is_floating_block' => 1,
8950 
                    'is_gateway_port' => 1,
8951 
                    'must_be_hdl_vector' => 1,
8952 
                    'period' => 1,
8953 
                    'port_id' => 16,
8954 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_addr',
8955 
                    'source_block' => 'USER_LOGIC',
8956 
                    'timingConstraint' => 'none',
8957 
                    'type' => 'UFix_12_0',
8958 
                  },
8959 
                  'direction' => 'out',
8960 
                  'hdlType' => 'std_logic_vector(11 downto 0)',
8961 
                  'width' => 12,
8962 
                },
8963 
                'bram_wr_din' => {
8964 
                  'attributes' => {
8965 
                    'bin_pt' => 0,
8966 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_din.dat',
8967 
                    'is_floating_block' => 1,
8968 
                    'is_gateway_port' => 1,
8969 
                    'must_be_hdl_vector' => 1,
8970 
                    'period' => 1,
8971 
                    'port_id' => 18,
8972 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_din',
8973 
                    'source_block' => 'USER_LOGIC',
8974 
                    'timingConstraint' => 'none',
8975 
                    'type' => 'UFix_64_0',
8976 
                  },
8977 
                  'direction' => 'out',
8978 
                  'hdlType' => 'std_logic_vector(63 downto 0)',
8979 
                  'width' => 64,
8980 
                },
8981 
                'bram_wr_en' => {
8982 
                  'attributes' => {
8983 
                    'bin_pt' => 0,
8984 
                    'inputFile' => 'pcie_userlogic_00_user_logic_bram_wr_en.dat',
8985 
                    'is_floating_block' => 1,
8986 
                    'is_gateway_port' => 1,
8987 
                    'must_be_hdl_vector' => 1,
8988 
                    'period' => 1,
8989 
                    'port_id' => 23,
8990 
                    'simulinkName' => 'USER_LOGIC/BRAM_wr_en',
8991 
                    'source_block' => 'USER_LOGIC',
8992 
                    'timingConstraint' => 'none',
8993 
                    'type' => 'UFix_8_0',
8994 
                  },
8995 
                  'direction' => 'out',
8996 
                  'hdlType' => 'std_logic_vector(7 downto 0)',
8997 
                  'width' => 8,
8998 
                },
8999 
                'ce_1' => {
9000 
                  'attributes' => {
9001 
                    'domain' => '',
9002 
                    'group' => 1,
9003 
                    'isCe' => 1,
9004 
                    'is_subsys_port' => 1,
9005 
                    'period' => 1,
9006 
                    'subsys_port_index' => 0,
9007 
                    'type' => 'logic',
9008 
                  },
9009 
                  'direction' => 'in',
9010 
                  'hdlType' => 'std_logic',
9011 
                  'width' => 1,
9012 
                },
9013 
                'clk_1' => {
9014 
                  'attributes' => {
9015 
                    'domain' => '',
9016 
                    'group' => 1,
9017 
                    'isClk' => 1,
9018 
                    'is_subsys_port' => 1,
9019 
                    'period' => 1,
9020 
                    'subsys_port_index' => 0,
9021 
                    'type' => 'logic',
9022 
                  },
9023 
                  'direction' => 'in',
9024 
                  'hdlType' => 'std_logic',
9025 
                  'width' => 1,
9026 
                },
9027 
                'data_in' => {
9028 
                  'attributes' => {
9029 
                    'bin_pt' => 0,
9030 
                    'is_floating_block' => 1,
9031 
                    'must_be_hdl_vector' => 1,
9032 
                    'period' => 1,
9033 
                    'port_id' => 17,
9034 
                    'simulinkName' => 'USER_LOGIC/tx_en_in2',
9035 
                    'type' => 'UFix_32_0',
9036 
                  },
9037 
                  'direction' => 'out',
9038 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9039 
                  'width' => 32,
9040 
                },
9041 
                'data_in_x0' => {
9042 
                  'attributes' => {
9043 
                    'bin_pt' => 0,
9044 
                    'is_floating_block' => 1,
9045 
                    'must_be_hdl_vector' => 1,
9046 
                    'period' => 1,
9047 
                    'port_id' => 1,
9048 
                    'simulinkName' => 'USER_LOGIC/tx_en_in1',
9049 
                    'type' => 'Bool',
9050 
                  },
9051 
                  'direction' => 'out',
9052 
                  'hdlType' => 'std_logic',
9053 
                  'width' => 1,
9054 
                },
9055 
                'data_in_x1' => {
9056 
                  'attributes' => {
9057 
                    'bin_pt' => 0,
9058 
                    'is_floating_block' => 1,
9059 
                    'must_be_hdl_vector' => 1,
9060 
                    'period' => 1,
9061 
                    'port_id' => 36,
9062 
                    'simulinkName' => 'USER_LOGIC/tx_en_in96',
9063 
                    'type' => 'Bool',
9064 
                  },
9065 
                  'direction' => 'out',
9066 
                  'hdlType' => 'std_logic',
9067 
                  'width' => 1,
9068 
                },
9069 
                'data_in_x10' => {
9070 
                  'attributes' => {
9071 
                    'bin_pt' => 0,
9072 
                    'is_floating_block' => 1,
9073 
                    'must_be_hdl_vector' => 1,
9074 
                    'period' => 1,
9075 
                    'port_id' => 33,
9076 
                    'simulinkName' => 'USER_LOGIC/tx_en_in91',
9077 
                    'type' => 'UFix_32_0',
9078 
                  },
9079 
                  'direction' => 'out',
9080 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9081 
                  'width' => 32,
9082 
                },
9083 
                'data_in_x11' => {
9084 
                  'attributes' => {
9085 
                    'bin_pt' => 0,
9086 
                    'is_floating_block' => 1,
9087 
                    'must_be_hdl_vector' => 1,
9088 
                    'period' => 1,
9089 
                    'port_id' => 21,
9090 
                    'simulinkName' => 'USER_LOGIC/tx_en_in33',
9091 
                    'type' => 'UFix_32_0',
9092 
                  },
9093 
                  'direction' => 'out',
9094 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9095 
                  'width' => 32,
9096 
                },
9097 
                'data_in_x12' => {
9098 
                  'attributes' => {
9099 
                    'bin_pt' => 0,
9100 
                    'is_floating_block' => 1,
9101 
                    'must_be_hdl_vector' => 1,
9102 
                    'period' => 1,
9103 
                    'port_id' => 6,
9104 
                    'simulinkName' => 'USER_LOGIC/tx_en_in113',
9105 
                    'type' => 'Bool',
9106 
                  },
9107 
                  'direction' => 'out',
9108 
                  'hdlType' => 'std_logic',
9109 
                  'width' => 1,
9110 
                },
9111 
                'data_in_x13' => {
9112 
                  'attributes' => {
9113 
                    'bin_pt' => 0,
9114 
                    'is_floating_block' => 1,
9115 
                    'must_be_hdl_vector' => 1,
9116 
                    'period' => 1,
9117 
                    'port_id' => 8,
9118 
                    'simulinkName' => 'USER_LOGIC/tx_en_in115',
9119 
                    'type' => 'UFix_32_0',
9120 
                  },
9121 
                  'direction' => 'out',
9122 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9123 
                  'width' => 32,
9124 
                },
9125 
                'data_in_x14' => {
9126 
                  'attributes' => {
9127 
                    'bin_pt' => 0,
9128 
                    'is_floating_block' => 1,
9129 
                    'must_be_hdl_vector' => 1,
9130 
                    'period' => 1,
9131 
                    'port_id' => 7,
9132 
                    'simulinkName' => 'USER_LOGIC/tx_en_in114',
9133 
                    'type' => 'Bool',
9134 
                  },
9135 
                  'direction' => 'out',
9136 
                  'hdlType' => 'std_logic',
9137 
                  'width' => 1,
9138 
                },
9139 
                'data_in_x15' => {
9140 
                  'attributes' => {
9141 
                    'bin_pt' => 0,
9142 
                    'is_floating_block' => 1,
9143 
                    'must_be_hdl_vector' => 1,
9144 
                    'period' => 1,
9145 
                    'port_id' => 9,
9146 
                    'simulinkName' => 'USER_LOGIC/tx_en_in118',
9147 
                    'type' => 'UFix_32_0',
9148 
                  },
9149 
                  'direction' => 'out',
9150 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9151 
                  'width' => 32,
9152 
                },
9153 
                'data_in_x16' => {
9154 
                  'attributes' => {
9155 
                    'bin_pt' => 0,
9156 
                    'is_floating_block' => 1,
9157 
                    'must_be_hdl_vector' => 1,
9158 
                    'period' => 1,
9159 
                    'port_id' => 10,
9160 
                    'simulinkName' => 'USER_LOGIC/tx_en_in121',
9161 
                    'type' => 'Bool',
9162 
                  },
9163 
                  'direction' => 'out',
9164 
                  'hdlType' => 'std_logic',
9165 
                  'width' => 1,
9166 
                },
9167 
                'data_in_x17' => {
9168 
                  'attributes' => {
9169 
                    'bin_pt' => 0,
9170 
                    'is_floating_block' => 1,
9171 
                    'must_be_hdl_vector' => 1,
9172 
                    'period' => 1,
9173 
                    'port_id' => 11,
9174 
                    'simulinkName' => 'USER_LOGIC/tx_en_in122',
9175 
                    'type' => 'UFix_32_0',
9176 
                  },
9177 
                  'direction' => 'out',
9178 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9179 
                  'width' => 32,
9180 
                },
9181 
                'data_in_x18' => {
9182 
                  'attributes' => {
9183 
                    'bin_pt' => 0,
9184 
                    'is_floating_block' => 1,
9185 
                    'must_be_hdl_vector' => 1,
9186 
                    'period' => 1,
9187 
                    'port_id' => 12,
9188 
                    'simulinkName' => 'USER_LOGIC/tx_en_in125',
9189 
                    'type' => 'Bool',
9190 
                  },
9191 
                  'direction' => 'out',
9192 
                  'hdlType' => 'std_logic',
9193 
                  'width' => 1,
9194 
                },
9195 
                'data_in_x19' => {
9196 
                  'attributes' => {
9197 
                    'bin_pt' => 0,
9198 
                    'is_floating_block' => 1,
9199 
                    'must_be_hdl_vector' => 1,
9200 
                    'period' => 1,
9201 
                    'port_id' => 13,
9202 
                    'simulinkName' => 'USER_LOGIC/tx_en_in126',
9203 
                    'type' => 'UFix_32_0',
9204 
                  },
9205 
                  'direction' => 'out',
9206 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9207 
                  'width' => 32,
9208 
                },
9209 
                'data_in_x2' => {
9210 
                  'attributes' => {
9211 
                    'bin_pt' => 0,
9212 
                    'is_floating_block' => 1,
9213 
                    'must_be_hdl_vector' => 1,
9214 
                    'period' => 1,
9215 
                    'port_id' => 37,
9216 
                    'simulinkName' => 'USER_LOGIC/tx_en_in97',
9217 
                    'type' => 'Bool',
9218 
                  },
9219 
                  'direction' => 'out',
9220 
                  'hdlType' => 'std_logic',
9221 
                  'width' => 1,
9222 
                },
9223 
                'data_in_x20' => {
9224 
                  'attributes' => {
9225 
                    'bin_pt' => 0,
9226 
                    'is_floating_block' => 1,
9227 
                    'must_be_hdl_vector' => 1,
9228 
                    'period' => 1,
9229 
                    'port_id' => 2,
9230 
                    'simulinkName' => 'USER_LOGIC/tx_en_in10',
9231 
                    'type' => 'UFix_32_0',
9232 
                  },
9233 
                  'direction' => 'out',
9234 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9235 
                  'width' => 32,
9236 
                },
9237 
                'data_in_x21' => {
9238 
                  'attributes' => {
9239 
                    'bin_pt' => 0,
9240 
                    'is_floating_block' => 1,
9241 
                    'must_be_hdl_vector' => 1,
9242 
                    'period' => 1,
9243 
                    'port_id' => 34,
9244 
                    'simulinkName' => 'USER_LOGIC/tx_en_in94',
9245 
                    'type' => 'Bool',
9246 
                  },
9247 
                  'direction' => 'out',
9248 
                  'hdlType' => 'std_logic',
9249 
                  'width' => 1,
9250 
                },
9251 
                'data_in_x22' => {
9252 
                  'attributes' => {
9253 
                    'bin_pt' => 0,
9254 
                    'is_floating_block' => 1,
9255 
                    'must_be_hdl_vector' => 1,
9256 
                    'period' => 1,
9257 
                    'port_id' => 29,
9258 
                    'simulinkName' => 'USER_LOGIC/tx_en_in7',
9259 
                    'type' => 'Bool',
9260 
                  },
9261 
                  'direction' => 'out',
9262 
                  'hdlType' => 'std_logic',
9263 
                  'width' => 1,
9264 
                },
9265 
                'data_in_x23' => {
9266 
                  'attributes' => {
9267 
                    'bin_pt' => 0,
9268 
                    'is_floating_block' => 1,
9269 
                    'must_be_hdl_vector' => 1,
9270 
                    'period' => 1,
9271 
                    'port_id' => 24,
9272 
                    'simulinkName' => 'USER_LOGIC/tx_en_in50',
9273 
                    'type' => 'UFix_32_0',
9274 
                  },
9275 
                  'direction' => 'out',
9276 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9277 
                  'width' => 32,
9278 
                },
9279 
                'data_in_x24' => {
9280 
                  'attributes' => {
9281 
                    'bin_pt' => 0,
9282 
                    'is_floating_block' => 1,
9283 
                    'must_be_hdl_vector' => 1,
9284 
                    'period' => 1,
9285 
                    'port_id' => 35,
9286 
                    'simulinkName' => 'USER_LOGIC/tx_en_in95',
9287 
                    'type' => 'Bool',
9288 
                  },
9289 
                  'direction' => 'out',
9290 
                  'hdlType' => 'std_logic',
9291 
                  'width' => 1,
9292 
                },
9293 
                'data_in_x25' => {
9294 
                  'attributes' => {
9295 
                    'bin_pt' => 0,
9296 
                    'is_floating_block' => 1,
9297 
                    'must_be_hdl_vector' => 1,
9298 
                    'period' => 1,
9299 
                    'port_id' => 26,
9300 
                    'simulinkName' => 'USER_LOGIC/tx_en_in53',
9301 
                    'type' => 'UFix_32_0',
9302 
                  },
9303 
                  'direction' => 'out',
9304 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9305 
                  'width' => 32,
9306 
                },
9307 
                'data_in_x26' => {
9308 
                  'attributes' => {
9309 
                    'bin_pt' => 0,
9310 
                    'is_floating_block' => 1,
9311 
                    'must_be_hdl_vector' => 1,
9312 
                    'period' => 1,
9313 
                    'port_id' => 27,
9314 
                    'simulinkName' => 'USER_LOGIC/tx_en_in54',
9315 
                    'type' => 'UFix_32_0',
9316 
                  },
9317 
                  'direction' => 'out',
9318 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9319 
                  'width' => 32,
9320 
                },
9321 
                'data_in_x3' => {
9322 
                  'attributes' => {
9323 
                    'bin_pt' => 0,
9324 
                    'is_floating_block' => 1,
9325 
                    'must_be_hdl_vector' => 1,
9326 
                    'period' => 1,
9327 
                    'port_id' => 14,
9328 
                    'simulinkName' => 'USER_LOGIC/tx_en_in13',
9329 
                    'type' => 'Bool',
9330 
                  },
9331 
                  'direction' => 'out',
9332 
                  'hdlType' => 'std_logic',
9333 
                  'width' => 1,
9334 
                },
9335 
                'data_in_x4' => {
9336 
                  'attributes' => {
9337 
                    'bin_pt' => 0,
9338 
                    'is_floating_block' => 1,
9339 
                    'must_be_hdl_vector' => 1,
9340 
                    'period' => 1,
9341 
                    'port_id' => 28,
9342 
                    'simulinkName' => 'USER_LOGIC/tx_en_in66',
9343 
                    'type' => 'UFix_32_0',
9344 
                  },
9345 
                  'direction' => 'out',
9346 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9347 
                  'width' => 32,
9348 
                },
9349 
                'data_in_x5' => {
9350 
                  'attributes' => {
9351 
                    'bin_pt' => 0,
9352 
                    'is_floating_block' => 1,
9353 
                    'must_be_hdl_vector' => 1,
9354 
                    'period' => 1,
9355 
                    'port_id' => 38,
9356 
                    'simulinkName' => 'USER_LOGIC/tx_en_in98',
9357 
                    'type' => 'Bool',
9358 
                  },
9359 
                  'direction' => 'out',
9360 
                  'hdlType' => 'std_logic',
9361 
                  'width' => 1,
9362 
                },
9363 
                'data_in_x6' => {
9364 
                  'attributes' => {
9365 
                    'bin_pt' => 0,
9366 
                    'is_floating_block' => 1,
9367 
                    'must_be_hdl_vector' => 1,
9368 
                    'period' => 1,
9369 
                    'port_id' => 31,
9370 
                    'simulinkName' => 'USER_LOGIC/tx_en_in85',
9371 
                    'type' => 'UFix_32_0',
9372 
                  },
9373 
                  'direction' => 'out',
9374 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9375 
                  'width' => 32,
9376 
                },
9377 
                'data_in_x7' => {
9378 
                  'attributes' => {
9379 
                    'bin_pt' => 0,
9380 
                    'is_floating_block' => 1,
9381 
                    'must_be_hdl_vector' => 1,
9382 
                    'period' => 1,
9383 
                    'port_id' => 39,
9384 
                    'simulinkName' => 'USER_LOGIC/tx_en_in99',
9385 
                    'type' => 'Bool',
9386 
                  },
9387 
                  'direction' => 'out',
9388 
                  'hdlType' => 'std_logic',
9389 
                  'width' => 1,
9390 
                },
9391 
                'data_in_x8' => {
9392 
                  'attributes' => {
9393 
                    'bin_pt' => 0,
9394 
                    'is_floating_block' => 1,
9395 
                    'must_be_hdl_vector' => 1,
9396 
                    'period' => 1,
9397 
                    'port_id' => 32,
9398 
                    'simulinkName' => 'USER_LOGIC/tx_en_in88',
9399 
                    'type' => 'UFix_32_0',
9400 
                  },
9401 
                  'direction' => 'out',
9402 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9403 
                  'width' => 32,
9404 
                },
9405 
                'data_in_x9' => {
9406 
                  'attributes' => {
9407 
                    'bin_pt' => 0,
9408 
                    'is_floating_block' => 1,
9409 
                    'must_be_hdl_vector' => 1,
9410 
                    'period' => 1,
9411 
                    'port_id' => 3,
9412 
                    'simulinkName' => 'USER_LOGIC/tx_en_in100',
9413 
                    'type' => 'Bool',
9414 
                  },
9415 
                  'direction' => 'out',
9416 
                  'hdlType' => 'std_logic',
9417 
                  'width' => 1,
9418 
                },
9419 
                'data_out' => {
9420 
                  'attributes' => {
9421 
                    'bin_pt' => 0,
9422 
                    'is_floating_block' => 1,
9423 
                    'must_be_hdl_vector' => 1,
9424 
                    'period' => 1,
9425 
                    'port_id' => 4,
9426 
                    'simulinkName' => 'USER_LOGIC/From Register10',
9427 
                    'type' => 'UFix_1_0',
9428 
                  },
9429 
                  'direction' => 'in',
9430 
                  'hdlType' => 'std_logic',
9431 
                  'width' => 1,
9432 
                },
9433 
                'data_out_x0' => {
9434 
                  'attributes' => {
9435 
                    'bin_pt' => 0,
9436 
                    'is_floating_block' => 1,
9437 
                    'must_be_hdl_vector' => 1,
9438 
                    'period' => 1,
9439 
                    'port_id' => 5,
9440 
                    'simulinkName' => 'USER_LOGIC/From Register11',
9441 
                    'type' => 'UFix_32_0',
9442 
                  },
9443 
                  'direction' => 'in',
9444 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9445 
                  'width' => 32,
9446 
                },
9447 
                'data_out_x1' => {
9448 
                  'attributes' => {
9449 
                    'bin_pt' => 0,
9450 
                    'is_floating_block' => 1,
9451 
                    'must_be_hdl_vector' => 1,
9452 
                    'period' => 1,
9453 
                    'port_id' => 6,
9454 
                    'simulinkName' => 'USER_LOGIC/From Register12',
9455 
                    'type' => 'UFix_1_0',
9456 
                  },
9457 
                  'direction' => 'in',
9458 
                  'hdlType' => 'std_logic',
9459 
                  'width' => 1,
9460 
                },
9461 
                'data_out_x10' => {
9462 
                  'attributes' => {
9463 
                    'bin_pt' => 0,
9464 
                    'is_floating_block' => 1,
9465 
                    'must_be_hdl_vector' => 1,
9466 
                    'period' => 1,
9467 
                    'port_id' => 13,
9468 
                    'simulinkName' => 'USER_LOGIC/From Register22',
9469 
                    'type' => 'UFix_32_0',
9470 
                  },
9471 
                  'direction' => 'in',
9472 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9473 
                  'width' => 32,
9474 
                },
9475 
                'data_out_x11' => {
9476 
                  'attributes' => {
9477 
                    'bin_pt' => 0,
9478 
                    'is_floating_block' => 1,
9479 
                    'must_be_hdl_vector' => 1,
9480 
                    'period' => 1,
9481 
                    'port_id' => 14,
9482 
                    'simulinkName' => 'USER_LOGIC/From Register23',
9483 
                    'type' => 'UFix_1_0',
9484 
                  },
9485 
                  'direction' => 'in',
9486 
                  'hdlType' => 'std_logic',
9487 
                  'width' => 1,
9488 
                },
9489 
                'data_out_x12' => {
9490 
                  'attributes' => {
9491 
                    'bin_pt' => 0,
9492 
                    'is_floating_block' => 1,
9493 
                    'must_be_hdl_vector' => 1,
9494 
                    'period' => 1,
9495 
                    'port_id' => 15,
9496 
                    'simulinkName' => 'USER_LOGIC/From Register24',
9497 
                    'type' => 'UFix_32_0',
9498 
                  },
9499 
                  'direction' => 'in',
9500 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9501 
                  'width' => 32,
9502 
                },
9503 
                'data_out_x13' => {
9504 
                  'attributes' => {
9505 
                    'bin_pt' => 0,
9506 
                    'is_floating_block' => 1,
9507 
                    'must_be_hdl_vector' => 1,
9508 
                    'period' => 1,
9509 
                    'port_id' => 16,
9510 
                    'simulinkName' => 'USER_LOGIC/From Register25',
9511 
                    'type' => 'UFix_1_0',
9512 
                  },
9513 
                  'direction' => 'in',
9514 
                  'hdlType' => 'std_logic',
9515 
                  'width' => 1,
9516 
                },
9517 
                'data_out_x14' => {
9518 
                  'attributes' => {
9519 
                    'bin_pt' => 0,
9520 
                    'is_floating_block' => 1,
9521 
                    'must_be_hdl_vector' => 1,
9522 
                    'period' => 1,
9523 
                    'port_id' => 17,
9524 
                    'simulinkName' => 'USER_LOGIC/From Register26',
9525 
                    'type' => 'UFix_32_0',
9526 
                  },
9527 
                  'direction' => 'in',
9528 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9529 
                  'width' => 32,
9530 
                },
9531 
                'data_out_x15' => {
9532 
                  'attributes' => {
9533 
                    'bin_pt' => 0,
9534 
                    'is_floating_block' => 1,
9535 
                    'must_be_hdl_vector' => 1,
9536 
                    'period' => 1,
9537 
                    'port_id' => 18,
9538 
                    'simulinkName' => 'USER_LOGIC/From Register27',
9539 
                    'type' => 'UFix_1_0',
9540 
                  },
9541 
                  'direction' => 'in',
9542 
                  'hdlType' => 'std_logic',
9543 
                  'width' => 1,
9544 
                },
9545 
                'data_out_x16' => {
9546 
                  'attributes' => {
9547 
                    'bin_pt' => 0,
9548 
                    'is_floating_block' => 1,
9549 
                    'must_be_hdl_vector' => 1,
9550 
                    'period' => 1,
9551 
                    'port_id' => 19,
9552 
                    'simulinkName' => 'USER_LOGIC/From Register28',
9553 
                    'type' => 'UFix_32_0',
9554 
                  },
9555 
                  'direction' => 'in',
9556 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9557 
                  'width' => 32,
9558 
                },
9559 
                'data_out_x17' => {
9560 
                  'attributes' => {
9561 
                    'bin_pt' => 0,
9562 
                    'is_floating_block' => 1,
9563 
                    'must_be_hdl_vector' => 1,
9564 
                    'period' => 1,
9565 
                    'port_id' => 20,
9566 
                    'simulinkName' => 'USER_LOGIC/From Register29',
9567 
                    'type' => 'UFix_1_0',
9568 
                  },
9569 
                  'direction' => 'in',
9570 
                  'hdlType' => 'std_logic',
9571 
                  'width' => 1,
9572 
                },
9573 
                'data_out_x18' => {
9574 
                  'attributes' => {
9575 
                    'bin_pt' => 0,
9576 
                    'is_floating_block' => 1,
9577 
                    'must_be_hdl_vector' => 1,
9578 
                    'period' => 1,
9579 
                    'port_id' => 21,
9580 
                    'simulinkName' => 'USER_LOGIC/From Register3',
9581 
                    'type' => 'UFix_32_0',
9582 
                  },
9583 
                  'direction' => 'in',
9584 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9585 
                  'width' => 32,
9586 
                },
9587 
                'data_out_x19' => {
9588 
                  'attributes' => {
9589 
                    'bin_pt' => 0,
9590 
                    'is_floating_block' => 1,
9591 
                    'must_be_hdl_vector' => 1,
9592 
                    'period' => 1,
9593 
                    'port_id' => 22,
9594 
                    'simulinkName' => 'USER_LOGIC/From Register30',
9595 
                    'type' => 'UFix_32_0',
9596 
                  },
9597 
                  'direction' => 'in',
9598 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9599 
                  'width' => 32,
9600 
                },
9601 
                'data_out_x2' => {
9602 
                  'attributes' => {
9603 
                    'bin_pt' => 0,
9604 
                    'is_floating_block' => 1,
9605 
                    'must_be_hdl_vector' => 1,
9606 
                    'period' => 1,
9607 
                    'port_id' => 7,
9608 
                    'simulinkName' => 'USER_LOGIC/From Register13',
9609 
                    'type' => 'UFix_32_0',
9610 
                  },
9611 
                  'direction' => 'in',
9612 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9613 
                  'width' => 32,
9614 
                },
9615 
                'data_out_x20' => {
9616 
                  'attributes' => {
9617 
                    'bin_pt' => 0,
9618 
                    'is_floating_block' => 1,
9619 
                    'must_be_hdl_vector' => 1,
9620 
                    'period' => 1,
9621 
                    'port_id' => 23,
9622 
                    'simulinkName' => 'USER_LOGIC/From Register31',
9623 
                    'type' => 'UFix_1_0',
9624 
                  },
9625 
                  'direction' => 'in',
9626 
                  'hdlType' => 'std_logic',
9627 
                  'width' => 1,
9628 
                },
9629 
                'data_out_x21' => {
9630 
                  'attributes' => {
9631 
                    'bin_pt' => 0,
9632 
                    'is_floating_block' => 1,
9633 
                    'must_be_hdl_vector' => 1,
9634 
                    'period' => 1,
9635 
                    'port_id' => 24,
9636 
                    'simulinkName' => 'USER_LOGIC/From Register32',
9637 
                    'type' => 'UFix_32_0',
9638 
                  },
9639 
                  'direction' => 'in',
9640 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9641 
                  'width' => 32,
9642 
                },
9643 
                'data_out_x22' => {
9644 
                  'attributes' => {
9645 
                    'bin_pt' => 0,
9646 
                    'is_floating_block' => 1,
9647 
                    'must_be_hdl_vector' => 1,
9648 
                    'period' => 1,
9649 
                    'port_id' => 25,
9650 
                    'simulinkName' => 'USER_LOGIC/From Register33',
9651 
                    'type' => 'UFix_1_0',
9652 
                  },
9653 
                  'direction' => 'in',
9654 
                  'hdlType' => 'std_logic',
9655 
                  'width' => 1,
9656 
                },
9657 
                'data_out_x23' => {
9658 
                  'attributes' => {
9659 
                    'bin_pt' => 0,
9660 
                    'is_floating_block' => 1,
9661 
                    'must_be_hdl_vector' => 1,
9662 
                    'period' => 1,
9663 
                    'port_id' => 26,
9664 
                    'simulinkName' => 'USER_LOGIC/From Register4',
9665 
                    'type' => 'UFix_1_0',
9666 
                  },
9667 
                  'direction' => 'in',
9668 
                  'hdlType' => 'std_logic',
9669 
                  'width' => 1,
9670 
                },
9671 
                'data_out_x24' => {
9672 
                  'attributes' => {
9673 
                    'bin_pt' => 0,
9674 
                    'is_floating_block' => 1,
9675 
                    'must_be_hdl_vector' => 1,
9676 
                    'period' => 1,
9677 
                    'port_id' => 27,
9678 
                    'simulinkName' => 'USER_LOGIC/From Register5',
9679 
                    'type' => 'UFix_32_0',
9680 
                  },
9681 
                  'direction' => 'in',
9682 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9683 
                  'width' => 32,
9684 
                },
9685 
                'data_out_x25' => {
9686 
                  'attributes' => {
9687 
                    'bin_pt' => 0,
9688 
                    'is_floating_block' => 1,
9689 
                    'must_be_hdl_vector' => 1,
9690 
                    'period' => 1,
9691 
                    'port_id' => 28,
9692 
                    'simulinkName' => 'USER_LOGIC/From Register6',
9693 
                    'type' => 'UFix_1_0',
9694 
                  },
9695 
                  'direction' => 'in',
9696 
                  'hdlType' => 'std_logic',
9697 
                  'width' => 1,
9698 
                },
9699 
                'data_out_x26' => {
9700 
                  'attributes' => {
9701 
                    'bin_pt' => 0,
9702 
                    'is_floating_block' => 1,
9703 
                    'must_be_hdl_vector' => 1,
9704 
                    'period' => 1,
9705 
                    'port_id' => 29,
9706 
                    'simulinkName' => 'USER_LOGIC/From Register7',
9707 
                    'type' => 'UFix_32_0',
9708 
                  },
9709 
                  'direction' => 'in',
9710 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9711 
                  'width' => 32,
9712 
                },
9713 
                'data_out_x27' => {
9714 
                  'attributes' => {
9715 
                    'bin_pt' => 0,
9716 
                    'is_floating_block' => 1,
9717 
                    'must_be_hdl_vector' => 1,
9718 
                    'period' => 1,
9719 
                    'port_id' => 30,
9720 
                    'simulinkName' => 'USER_LOGIC/From Register8',
9721 
                    'type' => 'UFix_1_0',
9722 
                  },
9723 
                  'direction' => 'in',
9724 
                  'hdlType' => 'std_logic',
9725 
                  'width' => 1,
9726 
                },
9727 
                'data_out_x28' => {
9728 
                  'attributes' => {
9729 
                    'bin_pt' => 0,
9730 
                    'is_floating_block' => 1,
9731 
                    'must_be_hdl_vector' => 1,
9732 
                    'period' => 1,
9733 
                    'port_id' => 31,
9734 
                    'simulinkName' => 'USER_LOGIC/From Register9',
9735 
                    'type' => 'UFix_32_0',
9736 
                  },
9737 
                  'direction' => 'in',
9738 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9739 
                  'width' => 32,
9740 
                },
9741 
                'data_out_x3' => {
9742 
                  'attributes' => {
9743 
                    'bin_pt' => 0,
9744 
                    'is_floating_block' => 1,
9745 
                    'must_be_hdl_vector' => 1,
9746 
                    'period' => 1,
9747 
                    'port_id' => 8,
9748 
                    'simulinkName' => 'USER_LOGIC/From Register14',
9749 
                    'type' => 'UFix_1_0',
9750 
                  },
9751 
                  'direction' => 'in',
9752 
                  'hdlType' => 'std_logic',
9753 
                  'width' => 1,
9754 
                },
9755 
                'data_out_x6' => {
9756 
                  'attributes' => {
9757 
                    'bin_pt' => 0,
9758 
                    'is_floating_block' => 1,
9759 
                    'must_be_hdl_vector' => 1,
9760 
                    'period' => 1,
9761 
                    'port_id' => 9,
9762 
                    'simulinkName' => 'USER_LOGIC/From Register17',
9763 
                    'type' => 'UFix_32_0',
9764 
                  },
9765 
                  'direction' => 'in',
9766 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9767 
                  'width' => 32,
9768 
                },
9769 
                'data_out_x7' => {
9770 
                  'attributes' => {
9771 
                    'bin_pt' => 0,
9772 
                    'is_floating_block' => 1,
9773 
                    'must_be_hdl_vector' => 1,
9774 
                    'period' => 1,
9775 
                    'port_id' => 10,
9776 
                    'simulinkName' => 'USER_LOGIC/From Register18',
9777 
                    'type' => 'UFix_1_0',
9778 
                  },
9779 
                  'direction' => 'in',
9780 
                  'hdlType' => 'std_logic',
9781 
                  'width' => 1,
9782 
                },
9783 
                'data_out_x8' => {
9784 
                  'attributes' => {
9785 
                    'bin_pt' => 0,
9786 
                    'is_floating_block' => 1,
9787 
                    'must_be_hdl_vector' => 1,
9788 
                    'period' => 1,
9789 
                    'port_id' => 11,
9790 
                    'simulinkName' => 'USER_LOGIC/From Register20',
9791 
                    'type' => 'UFix_32_0',
9792 
                  },
9793 
                  'direction' => 'in',
9794 
                  'hdlType' => 'std_logic_vector(31 downto 0)',
9795 
                  'width' => 32,
9796 
                },
9797 
                'data_out_x9' => {
9798 
                  'attributes' => {
9799 
                    'bin_pt' => 0,
9800 
                    'is_floating_block' => 1,
9801 
                    'must_be_hdl_vector' => 1,
9802 
                    'period' => 1,
9803 
                    'port_id' => 12,
9804 
                    'simulinkName' => 'USER_LOGIC/From Register21',
9805 
                    'type' => 'UFix_1_0',
9806 
                  },
9807 
                  'direction' => 'in',
9808 
                  'hdlType' => 'std_logic',
9809 
                  'width' => 1,
9810 
                },
9811 
                'en' => {
9812 
                  'attributes' => {
9813 
                    'bin_pt' => 0,
9814 
                    'is_floating_block' => 1,
9815 
                    'must_be_hdl_vector' => 1,
9816 
                    'period' => 1,
9817 
                    'port_id' => 0,
9818 
                    'simulinkName' => 'USER_LOGIC/en',
9819 
                    'type' => 'Bool',
9820 
                  },
9821 
                  'direction' => 'out',
9822 
                  'hdlType' => 'std_logic',
9823 
                  'width' => 1,
9824 
                },
9825 
                'en_x0' => {
9826 
                  'attributes' => {
9827 
                    'bin_pt' => 0,
9828 
                    'is_floating_block' => 1,
9829 
                    'must_be_hdl_vector' => 1,
9830 
                    'period' => 1,
9831 
                    'port_id' => 0,
9832 
                    'simulinkName' => 'USER_LOGIC/en',
9833 
                    'type' => 'Bool',
9834 
                  },
9835 
                  'direction' => 'out',
9836 
                  'hdlType' => 'std_logic',
9837 
                  'width' => 1,
9838 
                },
9839 
                'en_x1' => {
9840 
                  'attributes' => {
9841 
                    'bin_pt' => 0,
9842 
                    'is_floating_block' => 1,
9843 
                    'must_be_hdl_vector' => 1,
9844 
                    'period' => 1,
9845 
                    'port_id' => 0,
9846 
                    'simulinkName' => 'USER_LOGIC/en',
9847 
                    'type' => 'Bool',
9848 
                  },
9849 
                  'direction' => 'out',
9850 
                  'hdlType' => 'std_logic',
9851 
                  'width' => 1,
9852 
                },
9853 
                'en_x10' => {
9854 
                  'attributes' => {
9855 
                    'bin_pt' => 0,
9856 
                    'is_floating_block' => 1,
9857 
                    'must_be_hdl_vector' => 1,
9858 
                    'period' => 1,
9859 
                    'port_id' => 0,
9860 
                    'simulinkName' => 'USER_LOGIC/en',
9861 
                    'type' => 'Bool',
9862 
                  },
9863 
                  'direction' => 'out',
9864 
                  'hdlType' => 'std_logic',
9865 
                  'width' => 1,
9866 
                },
9867 
                'en_x11' => {
9868 
                  'attributes' => {
9869 
                    'bin_pt' => 0,
9870 
                    'is_floating_block' => 1,
9871 
                    'must_be_hdl_vector' => 1,
9872 
                    'period' => 1,
9873 
                    'port_id' => 0,
9874 
                    'simulinkName' => 'USER_LOGIC/en',
9875 
                    'type' => 'Bool',
9876 
                  },
9877 
                  'direction' => 'out',
9878 
                  'hdlType' => 'std_logic',
9879 
                  'width' => 1,
9880 
                },
9881 
                'en_x12' => {
9882 
                  'attributes' => {
9883 
                    'bin_pt' => 0,
9884 
                    'is_floating_block' => 1,
9885 
                    'must_be_hdl_vector' => 1,
9886 
                    'period' => 1,
9887 
                    'port_id' => 0,
9888 
                    'simulinkName' => 'USER_LOGIC/en',
9889 
                    'type' => 'Bool',
9890 
                  },
9891 
                  'direction' => 'out',
9892 
                  'hdlType' => 'std_logic',
9893 
                  'width' => 1,
9894 
                },
9895 
                'en_x13' => {
9896 
                  'attributes' => {
9897 
                    'bin_pt' => 0,
9898 
                    'is_floating_block' => 1,
9899 
                    'must_be_hdl_vector' => 1,
9900 
                    'period' => 1,
9901 
                    'port_id' => 0,
9902 
                    'simulinkName' => 'USER_LOGIC/en',
9903 
                    'type' => 'Bool',
9904 
                  },
9905 
                  'direction' => 'out',
9906 
                  'hdlType' => 'std_logic',
9907 
                  'width' => 1,
9908 
                },
9909 
                'en_x14' => {
9910 
                  'attributes' => {
9911 
                    'bin_pt' => 0,
9912 
                    'is_floating_block' => 1,
9913 
                    'must_be_hdl_vector' => 1,
9914 
                    'period' => 1,
9915 
                    'port_id' => 0,
9916 
                    'simulinkName' => 'USER_LOGIC/en',
9917 
                    'type' => 'Bool',
9918 
                  },
9919 
                  'direction' => 'out',
9920 
                  'hdlType' => 'std_logic',
9921 
                  'width' => 1,
9922 
                },
9923 
                'en_x15' => {
9924 
                  'attributes' => {
9925 
                    'bin_pt' => 0,
9926 
                    'is_floating_block' => 1,
9927 
                    'must_be_hdl_vector' => 1,
9928 
                    'period' => 1,
9929 
                    'port_id' => 0,
9930 
                    'simulinkName' => 'USER_LOGIC/en',
9931 
                    'type' => 'Bool',
9932 
                  },
9933 
                  'direction' => 'out',
9934 
                  'hdlType' => 'std_logic',
9935 
                  'width' => 1,
9936 
                },
9937 
                'en_x16' => {
9938 
                  'attributes' => {
9939 
                    'bin_pt' => 0,
9940 
                    'is_floating_block' => 1,
9941 
                    'must_be_hdl_vector' => 1,
9942 
                    'period' => 1,
9943 
                    'port_id' => 0,
9944 
                    'simulinkName' => 'USER_LOGIC/en',
9945 
                    'type' => 'Bool',
9946 
                  },
9947 
                  'direction' => 'out',
9948 
                  'hdlType' => 'std_logic',
9949 
                  'width' => 1,
9950 
                },
9951 
                'en_x17' => {
9952 
                  'attributes' => {
9953 
                    'bin_pt' => 0,
9954 
                    'is_floating_block' => 1,
9955 
                    'must_be_hdl_vector' => 1,
9956 
                    'period' => 1,
9957 
                    'port_id' => 0,
9958 
                    'simulinkName' => 'USER_LOGIC/en',
9959 
                    'type' => 'Bool',
9960 
                  },
9961 
                  'direction' => 'out',
9962 
                  'hdlType' => 'std_logic',
9963 
                  'width' => 1,
9964 
                },
9965 
                'en_x18' => {
9966 
                  'attributes' => {
9967 
                    'bin_pt' => 0,
9968 
                    'is_floating_block' => 1,
9969 
                    'must_be_hdl_vector' => 1,
9970 
                    'period' => 1,
9971 
                    'port_id' => 0,
9972 
                    'simulinkName' => 'USER_LOGIC/en',
9973 
                    'type' => 'Bool',
9974 
                  },
9975 
                  'direction' => 'out',
9976 
                  'hdlType' => 'std_logic',
9977 
                  'width' => 1,
9978 
                },
9979 
                'en_x19' => {
9980 
                  'attributes' => {
9981 
                    'bin_pt' => 0,
9982 
                    'is_floating_block' => 1,
9983 
                    'must_be_hdl_vector' => 1,
9984 
                    'period' => 1,
9985 
                    'port_id' => 0,
9986 
                    'simulinkName' => 'USER_LOGIC/en',
9987 
                    'type' => 'Bool',
9988 
                  },
9989 
                  'direction' => 'out',
9990 
                  'hdlType' => 'std_logic',
9991 
                  'width' => 1,
9992 
                },
9993 
                'en_x2' => {
9994 
                  'attributes' => {
9995 
                    'bin_pt' => 0,
9996 
                    'is_floating_block' => 1,
9997 
                    'must_be_hdl_vector' => 1,
9998 
                    'period' => 1,
9999 
                    'port_id' => 0,
10000 
                    'simulinkName' => 'USER_LOGIC/en',
10001 
                    'type' => 'Bool',
10002 
                  },
10003 
                  'direction' => 'out',
10004 
                  'hdlType' => 'std_logic',
10005 
                  'width' => 1,
10006 
                },
10007 
                'en_x20' => {
10008 
                  'attributes' => {
10009 
                    'bin_pt' => 0,
10010 
                    'is_floating_block' => 1,
10011 
                    'must_be_hdl_vector' => 1,
10012 
                    'period' => 1,
10013 
                    'port_id' => 0,
10014 
                    'simulinkName' => 'USER_LOGIC/en',
10015 
                    'type' => 'Bool',
10016 
                  },
10017 
                  'direction' => 'out',
10018 
                  'hdlType' => 'std_logic',
10019 
                  'width' => 1,
10020 
                },
10021 
                'en_x21' => {
10022 
                  'attributes' => {
10023 
                    'bin_pt' => 0,
10024 
                    'is_floating_block' => 1,
10025 
                    'must_be_hdl_vector' => 1,
10026 
                    'period' => 1,
10027 
                    'port_id' => 0,
10028 
                    'simulinkName' => 'USER_LOGIC/en',
10029 
                    'type' => 'Bool',
10030 
                  },
10031 
                  'direction' => 'out',
10032 
                  'hdlType' => 'std_logic',
10033 
                  'width' => 1,
10034 
                },
10035 
                'en_x22' => {
10036 
                  'attributes' => {
10037 
                    'bin_pt' => 0,
10038 
                    'is_floating_block' => 1,
10039 
                    'must_be_hdl_vector' => 1,
10040 
                    'period' => 1,
10041 
                    'port_id' => 0,
10042 
                    'simulinkName' => 'USER_LOGIC/en',
10043 
                    'type' => 'Bool',
10044 
                  },
10045 
                  'direction' => 'out',
10046 
                  'hdlType' => 'std_logic',
10047 
                  'width' => 1,
10048 
                },
10049 
                'en_x23' => {
10050 
                  'attributes' => {
10051 
                    'bin_pt' => 0,
10052 
                    'is_floating_block' => 1,
10053 
                    'must_be_hdl_vector' => 1,
10054 
                    'period' => 1,
10055 
                    'port_id' => 0,
10056 
                    'simulinkName' => 'USER_LOGIC/en',
10057 
                    'type' => 'Bool',
10058 
                  },
10059 
                  'direction' => 'out',
10060 
                  'hdlType' => 'std_logic',
10061 
                  'width' => 1,
10062 
                },
10063 
                'en_x24' => {
10064 
                  'attributes' => {
10065 
                    'bin_pt' => 0,
10066 
                    'is_floating_block' => 1,
10067 
                    'must_be_hdl_vector' => 1,
10068 
                    'period' => 1,
10069 
                    'port_id' => 0,
10070 
                    'simulinkName' => 'USER_LOGIC/en',
10071 
                    'type' => 'Bool',
10072 
                  },
10073 
                  'direction' => 'out',
10074 
                  'hdlType' => 'std_logic',
10075 
                  'width' => 1,
10076 
                },
10077 
                'en_x25' => {
10078 
                  'attributes' => {
10079 
                    'bin_pt' => 0,
10080 
                    'is_floating_block' => 1,
10081 
                    'must_be_hdl_vector' => 1,
10082 
                    'period' => 1,
10083 
                    'port_id' => 0,
10084 
                    'simulinkName' => 'USER_LOGIC/en',
10085 
                    'type' => 'Bool',
10086 
                  },
10087 
                  'direction' => 'out',
10088 
                  'hdlType' => 'std_logic',
10089 
                  'width' => 1,
10090 
                },
10091 
                'en_x26' => {
10092 
                  'attributes' => {
10093 
                    'bin_pt' => 0,
10094 
                    'is_floating_block' => 1,
10095 
                    'must_be_hdl_vector' => 1,
10096 
                    'period' => 1,
10097 
                    'port_id' => 0,
10098 
                    'simulinkName' => 'USER_LOGIC/en',
10099 
                    'type' => 'Bool',
10100 
                  },
10101 
                  'direction' => 'out',
10102 
                  'hdlType' => 'std_logic',
10103 
                  'width' => 1,
10104 
                },
10105 
                'en_x3' => {
10106 
                  'attributes' => {
10107 
                    'bin_pt' => 0,
10108 
                    'is_floating_block' => 1,
10109 
                    'must_be_hdl_vector' => 1,
10110 
                    'period' => 1,
10111 
                    'port_id' => 0,
10112 
                    'simulinkName' => 'USER_LOGIC/en',
10113 
                    'type' => 'Bool',
10114 
                  },
10115 
                  'direction' => 'out',
10116 
                  'hdlType' => 'std_logic',
10117 
                  'width' => 1,
10118 
                },
10119 
                'en_x4' => {
10120 
                  'attributes' => {
10121 
                    'bin_pt' => 0,
10122 
                    'is_floating_block' => 1,
10123 
                    'must_be_hdl_vector' => 1,
10124 
                    'period' => 1,
10125 
                    'port_id' => 0,
10126 
                    'simulinkName' => 'USER_LOGIC/en',
10127 
                    'type' => 'Bool',
10128 
                  },
10129 
                  'direction' => 'out',
10130 
                  'hdlType' => 'std_logic',
10131 
                  'width' => 1,
10132 
                },
10133 
                'en_x5' => {
10134 
                  'attributes' => {
10135 
                    'bin_pt' => 0,
10136 
                    'is_floating_block' => 1,
10137 
                    'must_be_hdl_vector' => 1,
10138 
                    'period' => 1,
10139 
                    'port_id' => 0,
10140 
                    'simulinkName' => 'USER_LOGIC/en',
10141 
                    'type' => 'Bool',
10142 
                  },
10143 
                  'direction' => 'out',
10144 
                  'hdlType' => 'std_logic',
10145 
                  'width' => 1,
10146 
                },
10147 
                'en_x6' => {
10148 
                  'attributes' => {
10149 
                    'bin_pt' => 0,
10150 
                    'is_floating_block' => 1,
10151 
                    'must_be_hdl_vector' => 1,
10152 
                    'period' => 1,
10153 
                    'port_id' => 0,
10154 
                    'simulinkName' => 'USER_LOGIC/en',
10155 
                    'type' => 'Bool',
10156 
                  },
10157 
                  'direction' => 'out',
10158 
                  'hdlType' => 'std_logic',
10159 
                  'width' => 1,
10160 
                },
10161 
                'en_x7' => {
10162 
                  'attributes' => {
10163 
                    'bin_pt' => 0,
10164 
                    'is_floating_block' => 1,
10165 
                    'must_be_hdl_vector' => 1,
10166 
                    'period' => 1,
10167 
                    'port_id' => 0,
10168 
                    'simulinkName' => 'USER_LOGIC/en',
10169 
                    'type' => 'Bool',
10170 
                  },
10171 
                  'direction' => 'out',
10172 
                  'hdlType' => 'std_logic',
10173 
                  'width' => 1,
10174 
                },
10175 
                'en_x8' => {
10176 
                  'attributes' => {
10177 
                    'bin_pt' => 0,
10178 
                    'is_floating_block' => 1,
10179 
                    'must_be_hdl_vector' => 1,
10180 
                    'period' => 1,
10181 
                    'port_id' => 0,
10182 
                    'simulinkName' => 'USER_LOGIC/en',
10183 
                    'type' => 'Bool',
10184 
                  },
10185 
                  'direction' => 'out',
10186 
                  'hdlType' => 'std_logic',
10187 
                  'width' => 1,
10188 
                },
10189 
                'en_x9' => {
10190 
                  'attributes' => {
10191 
                    'bin_pt' => 0,
10192 
                    'is_floating_block' => 1,
10193 
                    'must_be_hdl_vector' => 1,
10194 
                    'period' => 1,
10195 
                    'port_id' => 0,
10196 
                    'simulinkName' => 'USER_LOGIC/en',
10197 
                    'type' => 'Bool',
10198 
                  },
10199 
                  'direction' => 'out',
10200 
                  'hdlType' => 'std_logic',
10201 
                  'width' => 1,
10202 
                },
10203 
                'fifo_rd_count' => {
10204 
                  'attributes' => {
10205 
                    'bin_pt' => 0,
10206 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_count.dat',
10207 
                    'is_floating_block' => 1,
10208 
                    'is_gateway_port' => 1,
10209 
                    'must_be_hdl_vector' => 1,
10210 
                    'period' => 1,
10211 
                    'port_id' => 0,
10212 
                    'simulinkName' => 'fifo_rd_count',
10213 
                    'source_block' => '',
10214 
                    'timingConstraint' => 'none',
10215 
                    'type' => 'UFix_15_0',
10216 
                  },
10217 
                  'direction' => 'in',
10218 
                  'hdlType' => 'std_logic_vector(14 downto 0)',
10219 
                  'width' => 15,
10220 
                },
10221 
                'fifo_rd_dout' => {
10222 
                  'attributes' => {
10223 
                    'bin_pt' => 0,
10224 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_dout.dat',
10225 
                    'is_floating_block' => 1,
10226 
                    'is_gateway_port' => 1,
10227 
                    'must_be_hdl_vector' => 1,
10228 
                    'period' => 1,
10229 
                    'port_id' => 1,
10230 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_dout',
10231 
                    'source_block' => 'USER_LOGIC',
10232 
                    'timingConstraint' => 'none',
10233 
                    'type' => 'UFix_72_0',
10234 
                  },
10235 
                  'direction' => 'in',
10236 
                  'hdlType' => 'std_logic_vector(71 downto 0)',
10237 
                  'width' => 72,
10238 
                },
10239 
                'fifo_rd_empty' => {
10240 
                  'attributes' => {
10241 
                    'bin_pt' => 0,
10242 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_empty.dat',
10243 
                    'is_floating_block' => 1,
10244 
                    'is_gateway_port' => 1,
10245 
                    'must_be_hdl_vector' => 1,
10246 
                    'period' => 1,
10247 
                    'port_id' => 2,
10248 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_empty',
10249 
                    'source_block' => 'USER_LOGIC',
10250 
                    'timingConstraint' => 'none',
10251 
                    'type' => 'Bool',
10252 
                  },
10253 
                  'direction' => 'in',
10254 
                  'hdlType' => 'std_logic',
10255 
                  'width' => 1,
10256 
                },
10257 
                'fifo_rd_en' => {
10258 
                  'attributes' => {
10259 
                    'bin_pt' => 0,
10260 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_en.dat',
10261 
                    'is_floating_block' => 1,
10262 
                    'is_gateway_port' => 1,
10263 
                    'must_be_hdl_vector' => 1,
10264 
                    'period' => 1,
10265 
                    'port_id' => 4,
10266 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_en',
10267 
                    'source_block' => 'USER_LOGIC',
10268 
                    'timingConstraint' => 'none',
10269 
                    'type' => 'Bool',
10270 
                  },
10271 
                  'direction' => 'out',
10272 
                  'hdlType' => 'std_logic',
10273 
                  'width' => 1,
10274 
                },
10275 
                'fifo_rd_pempty' => {
10276 
                  'attributes' => {
10277 
                    'bin_pt' => 0,
10278 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_pempty.dat',
10279 
                    'is_floating_block' => 1,
10280 
                    'is_gateway_port' => 1,
10281 
                    'must_be_hdl_vector' => 1,
10282 
                    'period' => 1,
10283 
                    'port_id' => 0,
10284 
                    'simulinkName' => 'fifo_rd_pempty',
10285 
                    'source_block' => '',
10286 
                    'timingConstraint' => 'none',
10287 
                    'type' => 'Bool',
10288 
                  },
10289 
                  'direction' => 'in',
10290 
                  'hdlType' => 'std_logic',
10291 
                  'width' => 1,
10292 
                },
10293 
                'fifo_rd_valid' => {
10294 
                  'attributes' => {
10295 
                    'bin_pt' => 0,
10296 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_rd_valid.dat',
10297 
                    'is_floating_block' => 1,
10298 
                    'is_gateway_port' => 1,
10299 
                    'must_be_hdl_vector' => 1,
10300 
                    'period' => 1,
10301 
                    'port_id' => 3,
10302 
                    'simulinkName' => 'USER_LOGIC/FIFO_rd_valid',
10303 
                    'source_block' => 'USER_LOGIC',
10304 
                    'timingConstraint' => 'none',
10305 
                    'type' => 'Bool',
10306 
                  },
10307 
                  'direction' => 'in',
10308 
                  'hdlType' => 'std_logic',
10309 
                  'width' => 1,
10310 
                },
10311 
                'fifo_wr_count' => {
10312 
                  'attributes' => {
10313 
                    'bin_pt' => 0,
10314 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_count.dat',
10315 
                    'is_floating_block' => 1,
10316 
                    'is_gateway_port' => 1,
10317 
                    'must_be_hdl_vector' => 1,
10318 
                    'period' => 1,
10319 
                    'port_id' => 0,
10320 
                    'simulinkName' => 'fifo_wr_count',
10321 
                    'source_block' => '',
10322 
                    'timingConstraint' => 'none',
10323 
                    'type' => 'UFix_15_0',
10324 
                  },
10325 
                  'direction' => 'in',
10326 
                  'hdlType' => 'std_logic_vector(14 downto 0)',
10327 
                  'width' => 15,
10328 
                },
10329 
                'fifo_wr_din' => {
10330 
                  'attributes' => {
10331 
                    'bin_pt' => 0,
10332 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_din.dat',
10333 
                    'is_floating_block' => 1,
10334 
                    'is_gateway_port' => 1,
10335 
                    'must_be_hdl_vector' => 1,
10336 
                    'period' => 1,
10337 
                    'port_id' => 22,
10338 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_din',
10339 
                    'source_block' => 'USER_LOGIC',
10340 
                    'timingConstraint' => 'none',
10341 
                    'type' => 'UFix_72_0',
10342 
                  },
10343 
                  'direction' => 'out',
10344 
                  'hdlType' => 'std_logic_vector(71 downto 0)',
10345 
                  'width' => 72,
10346 
                },
10347 
                'fifo_wr_en' => {
10348 
                  'attributes' => {
10349 
                    'bin_pt' => 0,
10350 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_en.dat',
10351 
                    'is_floating_block' => 1,
10352 
                    'is_gateway_port' => 1,
10353 
                    'must_be_hdl_vector' => 1,
10354 
                    'period' => 1,
10355 
                    'port_id' => 5,
10356 
                    'simulinkName' => 'USER_LOGIC/FIFO_wr_en',
10357 
                    'source_block' => 'USER_LOGIC',
10358 
                    'timingConstraint' => 'none',
10359 
                    'type' => 'Bool',
10360 
                  },
10361 
                  'direction' => 'out',
10362 
                  'hdlType' => 'std_logic',
10363 
                  'width' => 1,
10364 
                },
10365 
                'fifo_wr_full' => {
10366 
                  'attributes' => {
10367 
                    'bin_pt' => 0,
10368 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_full.dat',
10369 
                    'is_floating_block' => 1,
10370 
                    'is_gateway_port' => 1,
10371 
                    'must_be_hdl_vector' => 1,
10372 
                    'period' => 1,
10373 
                    'port_id' => 0,
10374 
                    'simulinkName' => 'fifo_wr_full',
10375 
                    'source_block' => '',
10376 
                    'timingConstraint' => 'none',
10377 
                    'type' => 'Bool',
10378 
                  },
10379 
                  'direction' => 'in',
10380 
                  'hdlType' => 'std_logic',
10381 
                  'width' => 1,
10382 
                },
10383 
                'fifo_wr_pfull' => {
10384 
                  'attributes' => {
10385 
                    'bin_pt' => 0,
10386 
                    'inputFile' => 'pcie_userlogic_00_user_logic_fifo_wr_pfull.dat',
10387 
                    'is_floating_block' => 1,
10388 
                    'is_gateway_port' => 1,
10389 
                    'must_be_hdl_vector' => 1,
10390 
                    'period' => 1,
10391 
                    'port_id' => 0,
10392 
                    'simulinkName' => 'fifo_wr_pfull',
10393 
                    'source_block' => '',
10394 
                    'timingConstraint' => 'none',
10395 
                    'type' => 'Bool',
10396 
                  },
10397 
                  'direction' => 'in',
10398 
                  'hdlType' => 'std_logic',
10399 
                  'width' => 1,
10400 
                },
10401 
                'rst_i' => {
10402 
                  'attributes' => {
10403 
                    'bin_pt' => 0,
10404 
                    'inputFile' => 'pcie_userlogic_00_user_logic_rst_i.dat',
10405 
                    'is_floating_block' => 1,
10406 
                    'is_gateway_port' => 1,
10407 
                    'must_be_hdl_vector' => 1,
10408 
                    'period' => 1,
10409 
                    'port_id' => 32,
10410 
                    'simulinkName' => 'USER_LOGIC/rst_i',
10411 
                    'source_block' => 'USER_LOGIC',
10412 
                    'timingConstraint' => 'none',
10413 
                    'type' => 'Bool',
10414 
                  },
10415 
                  'direction' => 'in',
10416 
                  'hdlType' => 'std_logic',
10417 
                  'width' => 1,
10418 
                },
10419 
                'rst_o' => {
10420 
                  'attributes' => {
10421 
                    'bin_pt' => 0,
10422 
                    'inputFile' => 'pcie_userlogic_00_user_logic_rst_o.dat',
10423 
                    'is_floating_block' => 1,
10424 
                    'is_gateway_port' => 1,
10425 
                    'must_be_hdl_vector' => 1,
10426 
                    'period' => 1,
10427 
                    'port_id' => 19,
10428 
                    'simulinkName' => 'USER_LOGIC/rst_o',
10429 
                    'source_block' => 'USER_LOGIC',
10430 
                    'timingConstraint' => 'none',
10431 
                    'type' => 'Bool',
10432 
                  },
10433 
                  'direction' => 'out',
10434 
                  'hdlType' => 'std_logic',
10435 
                  'width' => 1,
10436 
                },
10437 
                'user_int_1o' => {
10438 
                  'attributes' => {
10439 
                    'bin_pt' => 0,
10440 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
10441 
                    'is_floating_block' => 1,
10442 
                    'is_gateway_port' => 1,
10443 
                    'must_be_hdl_vector' => 1,
10444 
                    'period' => 1,
10445 
                    'port_id' => 20,
10446 
                    'simulinkName' => 'USER_LOGIC/user_int_1o',
10447 
                    'source_block' => 'USER_LOGIC',
10448 
                    'timingConstraint' => 'none',
10449 
                    'type' => 'Bool',
10450 
                  },
10451 
                  'direction' => 'out',
10452 
                  'hdlType' => 'std_logic',
10453 
                  'width' => 1,
10454 
                },
10455 
                'user_int_2o' => {
10456 
                  'attributes' => {
10457 
                    'bin_pt' => 0,
10458 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
10459 
                    'is_floating_block' => 1,
10460 
                    'is_gateway_port' => 1,
10461 
                    'must_be_hdl_vector' => 1,
10462 
                    'period' => 1,
10463 
                    'port_id' => 30,
10464 
                    'simulinkName' => 'USER_LOGIC/user_int_2o',
10465 
                    'source_block' => 'USER_LOGIC',
10466 
                    'timingConstraint' => 'none',
10467 
                    'type' => 'Bool',
10468 
                  },
10469 
                  'direction' => 'out',
10470 
                  'hdlType' => 'std_logic',
10471 
                  'width' => 1,
10472 
                },
10473 
                'user_int_3o' => {
10474 
                  'attributes' => {
10475 
                    'bin_pt' => 0,
10476 
                    'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
10477 
                    'is_floating_block' => 1,
10478 
                    'is_gateway_port' => 1,
10479 
                    'must_be_hdl_vector' => 1,
10480 
                    'period' => 1,
10481 
                    'port_id' => 25,
10482 
                    'simulinkName' => 'USER_LOGIC/user_int_3o',
10483 
                    'source_block' => 'USER_LOGIC',
10484 
                    'timingConstraint' => 'none',
10485 
                    'type' => 'Bool',
10486 
                  },
10487 
                  'direction' => 'out',
10488 
                  'hdlType' => 'std_logic',
10489 
                  'width' => 1,
10490 
                },
10491 
              },
10492 
            },
10493 
            'entityName' => 'user_logic',
10494 
          },
10495 
        },
10496 
      },
10497 
      'entityName' => 'user_logic_cw',
10498 
    },
10499 
    'sysgen_gw_clk' => {
10500 
      'connections' => {
10501 
        'clk' => '.clk',
10502 
      },
10503 
      'entity' => {
10504 
        'attributes' => {
10505 
          'entityAlreadyNetlisted' => 1,
10506 
          'isClk' => 1,
10507 
          'isGateway' => 1,
10508 
          'is_floating_block' => 1,
10509 
        },
10510 
        'entityName' => 'sysgen_gw_clk',
10511 
        'ports' => {
10512 
          'clk' => {
10513 
            'attributes' => {
10514 
              'isClk' => 1,
10515 
            },
10516 
            'direction' => 'out',
10517 
            'hdlType' => 'std_logic',
10518 
            'width' => 1,
10519 
          },
10520 
        },
10521 
      },
10522 
      'entityName' => 'sysgen_gw_clk',
10523 
    },
10524 
    'to_register' => {
10525 
      'connections' => {
10526 
        'ce' => 'sysgen_dut.to_register_ce',
10527 
        'clk' => 'sysgen_dut.to_register_clk',
10528 
        'clr' => 'sysgen_dut.to_register_clr',
10529 
        'data_in' => 'sysgen_dut.to_register_data_in',
10530 
        'dout' => 'to_register.dout',
10531 
        'en' => 'sysgen_dut.to_register_en',
10532 
      },
10533 
      'entity' => {
10534 
        'attributes' => {
10535 
          'entityAlreadyNetlisted' => 1,
10536 
          'generics' => [
10537 
          ],
10538 
          'is_floating_block' => 1,
10539 
          'mask' => {
10540 
            'Block_Handle' => 981.000366210938,
10541 
            'Block_handle' => 981.000366210938,
10542 
            'MDL_Handle' => 3.0009765625,
10543 
            'MDL_handle' => 3.0009765625,
10544 
            'arith_type' => 1,
10545 
            'bin_pt' => 14,
10546 
            'block_config' => 'sysgen_blockset:toreg_config',
10547 
            'block_handle' => 981.000366210938,
10548 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register',
10549 
            'block_type' => 'toreg',
10550 
            'dbl_ovrd' => 0,
10551 
            'explicit_data_type' => 0,
10552 
            'init' => 0,
10553 
            'init_bit_vector' => '00000000000000000000000000000000b',
10554 
            'mdl_handle' => 3.0009765625,
10555 
            'model_handle' => 3.0009765625,
10556 
            'n_bits' => 16,
10557 
            'ownership' => 1,
10558 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10559 
            'shared_memory_name' => 'register01rd',
10560 
          },
10561 
          'needs_vhdl_wrapper' => 0,
10562 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register',
10563 
        },
10564 
        'entityName' => 'x_x33',
10565 
        'ports' => {
10566 
          'ce' => {
10567 
            'attributes' => {
10568 
              'domain' => '',
10569 
              'group' => 1,
10570 
              'isCe' => 1,
10571 
              'is_floating_block' => 1,
10572 
              'period' => 1,
10573 
              'type' => 'logic',
10574 
            },
10575 
            'direction' => 'in',
10576 
            'hdlType' => 'std_logic',
10577 
            'width' => 1,
10578 
          },
10579 
          'clk' => {
10580 
            'attributes' => {
10581 
              'domain' => '',
10582 
              'group' => 1,
10583 
              'isClk' => 1,
10584 
              'is_floating_block' => 1,
10585 
              'period' => 1,
10586 
              'type' => 'logic',
10587 
            },
10588 
            'direction' => 'in',
10589 
            'hdlType' => 'std_logic',
10590 
            'width' => 1,
10591 
          },
10592 
          'clr' => {
10593 
            'attributes' => {
10594 
              'domain' => '',
10595 
              'group' => 1,
10596 
              'isClr' => 1,
10597 
              'is_floating_block' => 1,
10598 
              'period' => 1,
10599 
              'type' => 'logic',
10600 
              'valid_bit_used' => 0,
10601 
            },
10602 
            'direction' => 'in',
10603 
            'hdlType' => 'std_logic',
10604 
            'width' => 1,
10605 
          },
10606 
          'data_in' => {
10607 
            'attributes' => {
10608 
              'bin_pt' => 0,
10609 
              'is_floating_block' => 1,
10610 
              'must_be_hdl_vector' => 1,
10611 
              'period' => 1,
10612 
              'port_id' => 0,
10613 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/data_in',
10614 
              'type' => 'UFix_32_0',
10615 
            },
10616 
            'direction' => 'in',
10617 
            'hdlType' => 'std_logic_vector(31 downto 0)',
10618 
            'width' => 32,
10619 
          },
10620 
          'dout' => {
10621 
            'attributes' => {
10622 
              'bin_pt' => 0,
10623 
              'is_floating_block' => 1,
10624 
              'must_be_hdl_vector' => 1,
10625 
              'period' => 1,
10626 
              'port_id' => 0,
10627 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/dout',
10628 
              'type' => 'UFix_32_0',
10629 
            },
10630 
            'direction' => 'out',
10631 
            'hdlType' => 'std_logic_vector(31 downto 0)',
10632 
            'width' => 32,
10633 
          },
10634 
          'en' => {
10635 
            'attributes' => {
10636 
              'bin_pt' => 0,
10637 
              'is_floating_block' => 1,
10638 
              'must_be_hdl_vector' => 1,
10639 
              'period' => 1,
10640 
              'port_id' => 1,
10641 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register/en',
10642 
              'type' => 'Bool',
10643 
            },
10644 
            'direction' => 'in',
10645 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10646 
            'width' => 1,
10647 
          },
10648 
        },
10649 
      },
10650 
      'entityName' => 'x_x33',
10651 
    },
10652 
    'to_register1' => {
10653 
      'connections' => {
10654 
        'ce' => 'sysgen_dut.to_register1_ce',
10655 
        'clk' => 'sysgen_dut.to_register1_clk',
10656 
        'clr' => 'sysgen_dut.to_register1_clr',
10657 
        'data_in' => 'sysgen_dut.to_register1_data_in',
10658 
        'dout' => 'to_register1.dout',
10659 
        'en' => 'sysgen_dut.to_register1_en',
10660 
      },
10661 
      'entity' => {
10662 
        'attributes' => {
10663 
          'entityAlreadyNetlisted' => 1,
10664 
          'generics' => [
10665 
          ],
10666 
          'is_floating_block' => 1,
10667 
          'mask' => {
10668 
            'Block_Handle' => 982.000122070313,
10669 
            'Block_handle' => 982.000122070313,
10670 
            'MDL_Handle' => 3.0009765625,
10671 
            'MDL_handle' => 3.0009765625,
10672 
            'arith_type' => 1,
10673 
            'bin_pt' => 14,
10674 
            'block_config' => 'sysgen_blockset:toreg_config',
10675 
            'block_handle' => 982.000122070313,
10676 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1',
10677 
            'block_type' => 'toreg',
10678 
            'dbl_ovrd' => 0,
10679 
            'explicit_data_type' => 0,
10680 
            'init' => 0,
10681 
            'init_bit_vector' => '0b',
10682 
            'mdl_handle' => 3.0009765625,
10683 
            'model_handle' => 3.0009765625,
10684 
            'n_bits' => 16,
10685 
            'ownership' => 1,
10686 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10687 
            'shared_memory_name' => 'register01rv',
10688 
          },
10689 
          'needs_vhdl_wrapper' => 0,
10690 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1',
10691 
        },
10692 
        'entityName' => 'x_x34',
10693 
        'ports' => {
10694 
          'ce' => {
10695 
            'attributes' => {
10696 
              'domain' => '',
10697 
              'group' => 1,
10698 
              'isCe' => 1,
10699 
              'is_floating_block' => 1,
10700 
              'period' => 1,
10701 
              'type' => 'logic',
10702 
            },
10703 
            'direction' => 'in',
10704 
            'hdlType' => 'std_logic',
10705 
            'width' => 1,
10706 
          },
10707 
          'clk' => {
10708 
            'attributes' => {
10709 
              'domain' => '',
10710 
              'group' => 1,
10711 
              'isClk' => 1,
10712 
              'is_floating_block' => 1,
10713 
              'period' => 1,
10714 
              'type' => 'logic',
10715 
            },
10716 
            'direction' => 'in',
10717 
            'hdlType' => 'std_logic',
10718 
            'width' => 1,
10719 
          },
10720 
          'clr' => {
10721 
            'attributes' => {
10722 
              'domain' => '',
10723 
              'group' => 1,
10724 
              'isClr' => 1,
10725 
              'is_floating_block' => 1,
10726 
              'period' => 1,
10727 
              'type' => 'logic',
10728 
              'valid_bit_used' => 0,
10729 
            },
10730 
            'direction' => 'in',
10731 
            'hdlType' => 'std_logic',
10732 
            'width' => 1,
10733 
          },
10734 
          'data_in' => {
10735 
            'attributes' => {
10736 
              'bin_pt' => 0,
10737 
              'is_floating_block' => 1,
10738 
              'must_be_hdl_vector' => 1,
10739 
              'period' => 1,
10740 
              'port_id' => 0,
10741 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/data_in',
10742 
              'type' => 'Bool',
10743 
            },
10744 
            'direction' => 'in',
10745 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10746 
            'width' => 1,
10747 
          },
10748 
          'dout' => {
10749 
            'attributes' => {
10750 
              'bin_pt' => 0,
10751 
              'is_floating_block' => 1,
10752 
              'must_be_hdl_vector' => 1,
10753 
              'period' => 1,
10754 
              'port_id' => 0,
10755 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/dout',
10756 
              'type' => 'Bool',
10757 
            },
10758 
            'direction' => 'out',
10759 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10760 
            'width' => 1,
10761 
          },
10762 
          'en' => {
10763 
            'attributes' => {
10764 
              'bin_pt' => 0,
10765 
              'is_floating_block' => 1,
10766 
              'must_be_hdl_vector' => 1,
10767 
              'period' => 1,
10768 
              'port_id' => 1,
10769 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register1/en',
10770 
              'type' => 'Bool',
10771 
            },
10772 
            'direction' => 'in',
10773 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10774 
            'width' => 1,
10775 
          },
10776 
        },
10777 
      },
10778 
      'entityName' => 'x_x34',
10779 
    },
10780 
    'to_register10' => {
10781 
      'connections' => {
10782 
        'ce' => 'sysgen_dut.to_register10_ce',
10783 
        'clk' => 'sysgen_dut.to_register10_clk',
10784 
        'clr' => 'sysgen_dut.to_register10_clr',
10785 
        'data_in' => 'sysgen_dut.to_register10_data_in',
10786 
        'dout' => 'to_register10.dout',
10787 
        'en' => 'sysgen_dut.to_register10_en',
10788 
      },
10789 
      'entity' => {
10790 
        'attributes' => {
10791 
          'entityAlreadyNetlisted' => 1,
10792 
          'generics' => [
10793 
          ],
10794 
          'is_floating_block' => 1,
10795 
          'mask' => {
10796 
            'Block_Handle' => 983.000122070313,
10797 
            'Block_handle' => 983.000122070313,
10798 
            'MDL_Handle' => 3.0009765625,
10799 
            'MDL_handle' => 3.0009765625,
10800 
            'arith_type' => 1,
10801 
            'bin_pt' => 14,
10802 
            'block_config' => 'sysgen_blockset:toreg_config',
10803 
            'block_handle' => 983.000122070313,
10804 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10',
10805 
            'block_type' => 'toreg',
10806 
            'dbl_ovrd' => 0,
10807 
            'explicit_data_type' => 0,
10808 
            'init' => 0,
10809 
            'init_bit_vector' => '0b',
10810 
            'mdl_handle' => 3.0009765625,
10811 
            'model_handle' => 3.0009765625,
10812 
            'n_bits' => 16,
10813 
            'ownership' => 1,
10814 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10815 
            'shared_memory_name' => 'register05rv',
10816 
          },
10817 
          'needs_vhdl_wrapper' => 0,
10818 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10',
10819 
        },
10820 
        'entityName' => 'x_x35',
10821 
        'ports' => {
10822 
          'ce' => {
10823 
            'attributes' => {
10824 
              'domain' => '',
10825 
              'group' => 1,
10826 
              'isCe' => 1,
10827 
              'is_floating_block' => 1,
10828 
              'period' => 1,
10829 
              'type' => 'logic',
10830 
            },
10831 
            'direction' => 'in',
10832 
            'hdlType' => 'std_logic',
10833 
            'width' => 1,
10834 
          },
10835 
          'clk' => {
10836 
            'attributes' => {
10837 
              'domain' => '',
10838 
              'group' => 1,
10839 
              'isClk' => 1,
10840 
              'is_floating_block' => 1,
10841 
              'period' => 1,
10842 
              'type' => 'logic',
10843 
            },
10844 
            'direction' => 'in',
10845 
            'hdlType' => 'std_logic',
10846 
            'width' => 1,
10847 
          },
10848 
          'clr' => {
10849 
            'attributes' => {
10850 
              'domain' => '',
10851 
              'group' => 1,
10852 
              'isClr' => 1,
10853 
              'is_floating_block' => 1,
10854 
              'period' => 1,
10855 
              'type' => 'logic',
10856 
              'valid_bit_used' => 0,
10857 
            },
10858 
            'direction' => 'in',
10859 
            'hdlType' => 'std_logic',
10860 
            'width' => 1,
10861 
          },
10862 
          'data_in' => {
10863 
            'attributes' => {
10864 
              'bin_pt' => 0,
10865 
              'is_floating_block' => 1,
10866 
              'must_be_hdl_vector' => 1,
10867 
              'period' => 1,
10868 
              'port_id' => 0,
10869 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/data_in',
10870 
              'type' => 'Bool',
10871 
            },
10872 
            'direction' => 'in',
10873 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10874 
            'width' => 1,
10875 
          },
10876 
          'dout' => {
10877 
            'attributes' => {
10878 
              'bin_pt' => 0,
10879 
              'is_floating_block' => 1,
10880 
              'must_be_hdl_vector' => 1,
10881 
              'period' => 1,
10882 
              'port_id' => 0,
10883 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/dout',
10884 
              'type' => 'Bool',
10885 
            },
10886 
            'direction' => 'out',
10887 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10888 
            'width' => 1,
10889 
          },
10890 
          'en' => {
10891 
            'attributes' => {
10892 
              'bin_pt' => 0,
10893 
              'is_floating_block' => 1,
10894 
              'must_be_hdl_vector' => 1,
10895 
              'period' => 1,
10896 
              'port_id' => 1,
10897 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register10/en',
10898 
              'type' => 'Bool',
10899 
            },
10900 
            'direction' => 'in',
10901 
            'hdlType' => 'std_logic_vector(0 downto 0)',
10902 
            'width' => 1,
10903 
          },
10904 
        },
10905 
      },
10906 
      'entityName' => 'x_x35',
10907 
    },
10908 
    'to_register11' => {
10909 
      'connections' => {
10910 
        'ce' => 'sysgen_dut.to_register11_ce',
10911 
        'clk' => 'sysgen_dut.to_register11_clk',
10912 
        'clr' => 'sysgen_dut.to_register11_clr',
10913 
        'data_in' => 'sysgen_dut.to_register11_data_in',
10914 
        'dout' => 'to_register11.dout',
10915 
        'en' => 'sysgen_dut.to_register11_en',
10916 
      },
10917 
      'entity' => {
10918 
        'attributes' => {
10919 
          'entityAlreadyNetlisted' => 1,
10920 
          'generics' => [
10921 
          ],
10922 
          'is_floating_block' => 1,
10923 
          'mask' => {
10924 
            'Block_Handle' => 984.000122070313,
10925 
            'Block_handle' => 984.000122070313,
10926 
            'MDL_Handle' => 3.0009765625,
10927 
            'MDL_handle' => 3.0009765625,
10928 
            'arith_type' => 1,
10929 
            'bin_pt' => 14,
10930 
            'block_config' => 'sysgen_blockset:toreg_config',
10931 
            'block_handle' => 984.000122070313,
10932 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11',
10933 
            'block_type' => 'toreg',
10934 
            'dbl_ovrd' => 0,
10935 
            'explicit_data_type' => 0,
10936 
            'init' => 0,
10937 
            'init_bit_vector' => '0b',
10938 
            'mdl_handle' => 3.0009765625,
10939 
            'model_handle' => 3.0009765625,
10940 
            'n_bits' => 16,
10941 
            'ownership' => 1,
10942 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
10943 
            'shared_memory_name' => 'register06rv',
10944 
          },
10945 
          'needs_vhdl_wrapper' => 0,
10946 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11',
10947 
        },
10948 
        'entityName' => 'x_x36',
10949 
        'ports' => {
10950 
          'ce' => {
10951 
            'attributes' => {
10952 
              'domain' => '',
10953 
              'group' => 1,
10954 
              'isCe' => 1,
10955 
              'is_floating_block' => 1,
10956 
              'period' => 1,
10957 
              'type' => 'logic',
10958 
            },
10959 
            'direction' => 'in',
10960 
            'hdlType' => 'std_logic',
10961 
            'width' => 1,
10962 
          },
10963 
          'clk' => {
10964 
            'attributes' => {
10965 
              'domain' => '',
10966 
              'group' => 1,
10967 
              'isClk' => 1,
10968 
              'is_floating_block' => 1,
10969 
              'period' => 1,
10970 
              'type' => 'logic',
10971 
            },
10972 
            'direction' => 'in',
10973 
            'hdlType' => 'std_logic',
10974 
            'width' => 1,
10975 
          },
10976 
          'clr' => {
10977 
            'attributes' => {
10978 
              'domain' => '',
10979 
              'group' => 1,
10980 
              'isClr' => 1,
10981 
              'is_floating_block' => 1,
10982 
              'period' => 1,
10983 
              'type' => 'logic',
10984 
              'valid_bit_used' => 0,
10985 
            },
10986 
            'direction' => 'in',
10987 
            'hdlType' => 'std_logic',
10988 
            'width' => 1,
10989 
          },
10990 
          'data_in' => {
10991 
            'attributes' => {
10992 
              'bin_pt' => 0,
10993 
              'is_floating_block' => 1,
10994 
              'must_be_hdl_vector' => 1,
10995 
              'period' => 1,
10996 
              'port_id' => 0,
10997 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/data_in',
10998 
              'type' => 'Bool',
10999 
            },
11000 
            'direction' => 'in',
11001 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11002 
            'width' => 1,
11003 
          },
11004 
          'dout' => {
11005 
            'attributes' => {
11006 
              'bin_pt' => 0,
11007 
              'is_floating_block' => 1,
11008 
              'must_be_hdl_vector' => 1,
11009 
              'period' => 1,
11010 
              'port_id' => 0,
11011 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/dout',
11012 
              'type' => 'Bool',
11013 
            },
11014 
            'direction' => 'out',
11015 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11016 
            'width' => 1,
11017 
          },
11018 
          'en' => {
11019 
            'attributes' => {
11020 
              'bin_pt' => 0,
11021 
              'is_floating_block' => 1,
11022 
              'must_be_hdl_vector' => 1,
11023 
              'period' => 1,
11024 
              'port_id' => 1,
11025 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register11/en',
11026 
              'type' => 'Bool',
11027 
            },
11028 
            'direction' => 'in',
11029 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11030 
            'width' => 1,
11031 
          },
11032 
        },
11033 
      },
11034 
      'entityName' => 'x_x36',
11035 
    },
11036 
    'to_register12' => {
11037 
      'connections' => {
11038 
        'ce' => 'sysgen_dut.to_register12_ce',
11039 
        'clk' => 'sysgen_dut.to_register12_clk',
11040 
        'clr' => 'sysgen_dut.to_register12_clr',
11041 
        'data_in' => 'sysgen_dut.to_register12_data_in',
11042 
        'dout' => 'to_register12.dout',
11043 
        'en' => 'sysgen_dut.to_register12_en',
11044 
      },
11045 
      'entity' => {
11046 
        'attributes' => {
11047 
          'entityAlreadyNetlisted' => 1,
11048 
          'generics' => [
11049 
          ],
11050 
          'is_floating_block' => 1,
11051 
          'mask' => {
11052 
            'Block_Handle' => 985.000122070313,
11053 
            'Block_handle' => 985.000122070313,
11054 
            'MDL_Handle' => 3.0009765625,
11055 
            'MDL_handle' => 3.0009765625,
11056 
            'arith_type' => 1,
11057 
            'bin_pt' => 14,
11058 
            'block_config' => 'sysgen_blockset:toreg_config',
11059 
            'block_handle' => 985.000122070313,
11060 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12',
11061 
            'block_type' => 'toreg',
11062 
            'dbl_ovrd' => 0,
11063 
            'explicit_data_type' => 0,
11064 
            'init' => 0,
11065 
            'init_bit_vector' => '0b',
11066 
            'mdl_handle' => 3.0009765625,
11067 
            'model_handle' => 3.0009765625,
11068 
            'n_bits' => 16,
11069 
            'ownership' => 1,
11070 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11071 
            'shared_memory_name' => 'register07rv',
11072 
          },
11073 
          'needs_vhdl_wrapper' => 0,
11074 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12',
11075 
        },
11076 
        'entityName' => 'x_x37',
11077 
        'ports' => {
11078 
          'ce' => {
11079 
            'attributes' => {
11080 
              'domain' => '',
11081 
              'group' => 1,
11082 
              'isCe' => 1,
11083 
              'is_floating_block' => 1,
11084 
              'period' => 1,
11085 
              'type' => 'logic',
11086 
            },
11087 
            'direction' => 'in',
11088 
            'hdlType' => 'std_logic',
11089 
            'width' => 1,
11090 
          },
11091 
          'clk' => {
11092 
            'attributes' => {
11093 
              'domain' => '',
11094 
              'group' => 1,
11095 
              'isClk' => 1,
11096 
              'is_floating_block' => 1,
11097 
              'period' => 1,
11098 
              'type' => 'logic',
11099 
            },
11100 
            'direction' => 'in',
11101 
            'hdlType' => 'std_logic',
11102 
            'width' => 1,
11103 
          },
11104 
          'clr' => {
11105 
            'attributes' => {
11106 
              'domain' => '',
11107 
              'group' => 1,
11108 
              'isClr' => 1,
11109 
              'is_floating_block' => 1,
11110 
              'period' => 1,
11111 
              'type' => 'logic',
11112 
              'valid_bit_used' => 0,
11113 
            },
11114 
            'direction' => 'in',
11115 
            'hdlType' => 'std_logic',
11116 
            'width' => 1,
11117 
          },
11118 
          'data_in' => {
11119 
            'attributes' => {
11120 
              'bin_pt' => 0,
11121 
              'is_floating_block' => 1,
11122 
              'must_be_hdl_vector' => 1,
11123 
              'period' => 1,
11124 
              'port_id' => 0,
11125 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/data_in',
11126 
              'type' => 'Bool',
11127 
            },
11128 
            'direction' => 'in',
11129 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11130 
            'width' => 1,
11131 
          },
11132 
          'dout' => {
11133 
            'attributes' => {
11134 
              'bin_pt' => 0,
11135 
              'is_floating_block' => 1,
11136 
              'must_be_hdl_vector' => 1,
11137 
              'period' => 1,
11138 
              'port_id' => 0,
11139 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/dout',
11140 
              'type' => 'Bool',
11141 
            },
11142 
            'direction' => 'out',
11143 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11144 
            'width' => 1,
11145 
          },
11146 
          'en' => {
11147 
            'attributes' => {
11148 
              'bin_pt' => 0,
11149 
              'is_floating_block' => 1,
11150 
              'must_be_hdl_vector' => 1,
11151 
              'period' => 1,
11152 
              'port_id' => 1,
11153 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register12/en',
11154 
              'type' => 'Bool',
11155 
            },
11156 
            'direction' => 'in',
11157 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11158 
            'width' => 1,
11159 
          },
11160 
        },
11161 
      },
11162 
      'entityName' => 'x_x37',
11163 
    },
11164 
    'to_register13' => {
11165 
      'connections' => {
11166 
        'ce' => 'sysgen_dut.to_register13_ce',
11167 
        'clk' => 'sysgen_dut.to_register13_clk',
11168 
        'clr' => 'sysgen_dut.to_register13_clr',
11169 
        'data_in' => 'sysgen_dut.to_register13_data_in',
11170 
        'dout' => 'to_register13.dout',
11171 
        'en' => 'sysgen_dut.to_register13_en',
11172 
      },
11173 
      'entity' => {
11174 
        'attributes' => {
11175 
          'entityAlreadyNetlisted' => 1,
11176 
          'generics' => [
11177 
          ],
11178 
          'is_floating_block' => 1,
11179 
          'mask' => {
11180 
            'Block_Handle' => 986.000122070313,
11181 
            'Block_handle' => 986.000122070313,
11182 
            'MDL_Handle' => 3.0009765625,
11183 
            'MDL_handle' => 3.0009765625,
11184 
            'arith_type' => 1,
11185 
            'bin_pt' => 14,
11186 
            'block_config' => 'sysgen_blockset:toreg_config',
11187 
            'block_handle' => 986.000122070313,
11188 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13',
11189 
            'block_type' => 'toreg',
11190 
            'dbl_ovrd' => 0,
11191 
            'explicit_data_type' => 0,
11192 
            'init' => 0,
11193 
            'init_bit_vector' => '00000000000000000000000000000000b',
11194 
            'mdl_handle' => 3.0009765625,
11195 
            'model_handle' => 3.0009765625,
11196 
            'n_bits' => 16,
11197 
            'ownership' => 1,
11198 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11199 
            'shared_memory_name' => 'register07rd',
11200 
          },
11201 
          'needs_vhdl_wrapper' => 0,
11202 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13',
11203 
        },
11204 
        'entityName' => 'x_x38',
11205 
        'ports' => {
11206 
          'ce' => {
11207 
            'attributes' => {
11208 
              'domain' => '',
11209 
              'group' => 1,
11210 
              'isCe' => 1,
11211 
              'is_floating_block' => 1,
11212 
              'period' => 1,
11213 
              'type' => 'logic',
11214 
            },
11215 
            'direction' => 'in',
11216 
            'hdlType' => 'std_logic',
11217 
            'width' => 1,
11218 
          },
11219 
          'clk' => {
11220 
            'attributes' => {
11221 
              'domain' => '',
11222 
              'group' => 1,
11223 
              'isClk' => 1,
11224 
              'is_floating_block' => 1,
11225 
              'period' => 1,
11226 
              'type' => 'logic',
11227 
            },
11228 
            'direction' => 'in',
11229 
            'hdlType' => 'std_logic',
11230 
            'width' => 1,
11231 
          },
11232 
          'clr' => {
11233 
            'attributes' => {
11234 
              'domain' => '',
11235 
              'group' => 1,
11236 
              'isClr' => 1,
11237 
              'is_floating_block' => 1,
11238 
              'period' => 1,
11239 
              'type' => 'logic',
11240 
              'valid_bit_used' => 0,
11241 
            },
11242 
            'direction' => 'in',
11243 
            'hdlType' => 'std_logic',
11244 
            'width' => 1,
11245 
          },
11246 
          'data_in' => {
11247 
            'attributes' => {
11248 
              'bin_pt' => 0,
11249 
              'is_floating_block' => 1,
11250 
              'must_be_hdl_vector' => 1,
11251 
              'period' => 1,
11252 
              'port_id' => 0,
11253 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/data_in',
11254 
              'type' => 'UFix_32_0',
11255 
            },
11256 
            'direction' => 'in',
11257 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11258 
            'width' => 32,
11259 
          },
11260 
          'dout' => {
11261 
            'attributes' => {
11262 
              'bin_pt' => 0,
11263 
              'is_floating_block' => 1,
11264 
              'must_be_hdl_vector' => 1,
11265 
              'period' => 1,
11266 
              'port_id' => 0,
11267 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/dout',
11268 
              'type' => 'UFix_32_0',
11269 
            },
11270 
            'direction' => 'out',
11271 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11272 
            'width' => 32,
11273 
          },
11274 
          'en' => {
11275 
            'attributes' => {
11276 
              'bin_pt' => 0,
11277 
              'is_floating_block' => 1,
11278 
              'must_be_hdl_vector' => 1,
11279 
              'period' => 1,
11280 
              'port_id' => 1,
11281 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register13/en',
11282 
              'type' => 'Bool',
11283 
            },
11284 
            'direction' => 'in',
11285 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11286 
            'width' => 1,
11287 
          },
11288 
        },
11289 
      },
11290 
      'entityName' => 'x_x38',
11291 
    },
11292 
    'to_register14' => {
11293 
      'connections' => {
11294 
        'ce' => 'sysgen_dut.to_register14_ce',
11295 
        'clk' => 'sysgen_dut.to_register14_clk',
11296 
        'clr' => 'sysgen_dut.to_register14_clr',
11297 
        'data_in' => 'sysgen_dut.to_register14_data_in',
11298 
        'dout' => 'to_register14.dout',
11299 
        'en' => 'sysgen_dut.to_register14_en',
11300 
      },
11301 
      'entity' => {
11302 
        'attributes' => {
11303 
          'entityAlreadyNetlisted' => 1,
11304 
          'generics' => [
11305 
          ],
11306 
          'is_floating_block' => 1,
11307 
          'mask' => {
11308 
            'Block_Handle' => 987.000122070313,
11309 
            'Block_handle' => 987.000122070313,
11310 
            'MDL_Handle' => 3.0009765625,
11311 
            'MDL_handle' => 3.0009765625,
11312 
            'arith_type' => 1,
11313 
            'bin_pt' => 14,
11314 
            'block_config' => 'sysgen_blockset:toreg_config',
11315 
            'block_handle' => 987.000122070313,
11316 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14',
11317 
            'block_type' => 'toreg',
11318 
            'dbl_ovrd' => 0,
11319 
            'explicit_data_type' => 0,
11320 
            'init' => 0,
11321 
            'init_bit_vector' => '0b',
11322 
            'mdl_handle' => 3.0009765625,
11323 
            'model_handle' => 3.0009765625,
11324 
            'n_bits' => 16,
11325 
            'ownership' => 1,
11326 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11327 
            'shared_memory_name' => 'register08rv',
11328 
          },
11329 
          'needs_vhdl_wrapper' => 0,
11330 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14',
11331 
        },
11332 
        'entityName' => 'x_x39',
11333 
        'ports' => {
11334 
          'ce' => {
11335 
            'attributes' => {
11336 
              'domain' => '',
11337 
              'group' => 1,
11338 
              'isCe' => 1,
11339 
              'is_floating_block' => 1,
11340 
              'period' => 1,
11341 
              'type' => 'logic',
11342 
            },
11343 
            'direction' => 'in',
11344 
            'hdlType' => 'std_logic',
11345 
            'width' => 1,
11346 
          },
11347 
          'clk' => {
11348 
            'attributes' => {
11349 
              'domain' => '',
11350 
              'group' => 1,
11351 
              'isClk' => 1,
11352 
              'is_floating_block' => 1,
11353 
              'period' => 1,
11354 
              'type' => 'logic',
11355 
            },
11356 
            'direction' => 'in',
11357 
            'hdlType' => 'std_logic',
11358 
            'width' => 1,
11359 
          },
11360 
          'clr' => {
11361 
            'attributes' => {
11362 
              'domain' => '',
11363 
              'group' => 1,
11364 
              'isClr' => 1,
11365 
              'is_floating_block' => 1,
11366 
              'period' => 1,
11367 
              'type' => 'logic',
11368 
              'valid_bit_used' => 0,
11369 
            },
11370 
            'direction' => 'in',
11371 
            'hdlType' => 'std_logic',
11372 
            'width' => 1,
11373 
          },
11374 
          'data_in' => {
11375 
            'attributes' => {
11376 
              'bin_pt' => 0,
11377 
              'is_floating_block' => 1,
11378 
              'must_be_hdl_vector' => 1,
11379 
              'period' => 1,
11380 
              'port_id' => 0,
11381 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/data_in',
11382 
              'type' => 'Bool',
11383 
            },
11384 
            'direction' => 'in',
11385 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11386 
            'width' => 1,
11387 
          },
11388 
          'dout' => {
11389 
            'attributes' => {
11390 
              'bin_pt' => 0,
11391 
              'is_floating_block' => 1,
11392 
              'must_be_hdl_vector' => 1,
11393 
              'period' => 1,
11394 
              'port_id' => 0,
11395 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/dout',
11396 
              'type' => 'Bool',
11397 
            },
11398 
            'direction' => 'out',
11399 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11400 
            'width' => 1,
11401 
          },
11402 
          'en' => {
11403 
            'attributes' => {
11404 
              'bin_pt' => 0,
11405 
              'is_floating_block' => 1,
11406 
              'must_be_hdl_vector' => 1,
11407 
              'period' => 1,
11408 
              'port_id' => 1,
11409 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register14/en',
11410 
              'type' => 'Bool',
11411 
            },
11412 
            'direction' => 'in',
11413 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11414 
            'width' => 1,
11415 
          },
11416 
        },
11417 
      },
11418 
      'entityName' => 'x_x39',
11419 
    },
11420 
    'to_register15' => {
11421 
      'connections' => {
11422 
        'ce' => 'sysgen_dut.to_register15_ce',
11423 
        'clk' => 'sysgen_dut.to_register15_clk',
11424 
        'clr' => 'sysgen_dut.to_register15_clr',
11425 
        'data_in' => 'sysgen_dut.to_register15_data_in',
11426 
        'dout' => 'to_register15.dout',
11427 
        'en' => 'sysgen_dut.to_register15_en',
11428 
      },
11429 
      'entity' => {
11430 
        'attributes' => {
11431 
          'entityAlreadyNetlisted' => 1,
11432 
          'generics' => [
11433 
          ],
11434 
          'is_floating_block' => 1,
11435 
          'mask' => {
11436 
            'Block_Handle' => 988.000122070313,
11437 
            'Block_handle' => 988.000122070313,
11438 
            'MDL_Handle' => 3.0009765625,
11439 
            'MDL_handle' => 3.0009765625,
11440 
            'arith_type' => 1,
11441 
            'bin_pt' => 14,
11442 
            'block_config' => 'sysgen_blockset:toreg_config',
11443 
            'block_handle' => 988.000122070313,
11444 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15',
11445 
            'block_type' => 'toreg',
11446 
            'dbl_ovrd' => 0,
11447 
            'explicit_data_type' => 0,
11448 
            'init' => 0,
11449 
            'init_bit_vector' => '00000000000000000000000000000000b',
11450 
            'mdl_handle' => 3.0009765625,
11451 
            'model_handle' => 3.0009765625,
11452 
            'n_bits' => 16,
11453 
            'ownership' => 1,
11454 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11455 
            'shared_memory_name' => 'register08rd',
11456 
          },
11457 
          'needs_vhdl_wrapper' => 0,
11458 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15',
11459 
        },
11460 
        'entityName' => 'x_x40',
11461 
        'ports' => {
11462 
          'ce' => {
11463 
            'attributes' => {
11464 
              'domain' => '',
11465 
              'group' => 1,
11466 
              'isCe' => 1,
11467 
              'is_floating_block' => 1,
11468 
              'period' => 1,
11469 
              'type' => 'logic',
11470 
            },
11471 
            'direction' => 'in',
11472 
            'hdlType' => 'std_logic',
11473 
            'width' => 1,
11474 
          },
11475 
          'clk' => {
11476 
            'attributes' => {
11477 
              'domain' => '',
11478 
              'group' => 1,
11479 
              'isClk' => 1,
11480 
              'is_floating_block' => 1,
11481 
              'period' => 1,
11482 
              'type' => 'logic',
11483 
            },
11484 
            'direction' => 'in',
11485 
            'hdlType' => 'std_logic',
11486 
            'width' => 1,
11487 
          },
11488 
          'clr' => {
11489 
            'attributes' => {
11490 
              'domain' => '',
11491 
              'group' => 1,
11492 
              'isClr' => 1,
11493 
              'is_floating_block' => 1,
11494 
              'period' => 1,
11495 
              'type' => 'logic',
11496 
              'valid_bit_used' => 0,
11497 
            },
11498 
            'direction' => 'in',
11499 
            'hdlType' => 'std_logic',
11500 
            'width' => 1,
11501 
          },
11502 
          'data_in' => {
11503 
            'attributes' => {
11504 
              'bin_pt' => 0,
11505 
              'is_floating_block' => 1,
11506 
              'must_be_hdl_vector' => 1,
11507 
              'period' => 1,
11508 
              'port_id' => 0,
11509 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/data_in',
11510 
              'type' => 'UFix_32_0',
11511 
            },
11512 
            'direction' => 'in',
11513 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11514 
            'width' => 32,
11515 
          },
11516 
          'dout' => {
11517 
            'attributes' => {
11518 
              'bin_pt' => 0,
11519 
              'is_floating_block' => 1,
11520 
              'must_be_hdl_vector' => 1,
11521 
              'period' => 1,
11522 
              'port_id' => 0,
11523 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/dout',
11524 
              'type' => 'UFix_32_0',
11525 
            },
11526 
            'direction' => 'out',
11527 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11528 
            'width' => 32,
11529 
          },
11530 
          'en' => {
11531 
            'attributes' => {
11532 
              'bin_pt' => 0,
11533 
              'is_floating_block' => 1,
11534 
              'must_be_hdl_vector' => 1,
11535 
              'period' => 1,
11536 
              'port_id' => 1,
11537 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register15/en',
11538 
              'type' => 'Bool',
11539 
            },
11540 
            'direction' => 'in',
11541 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11542 
            'width' => 1,
11543 
          },
11544 
        },
11545 
      },
11546 
      'entityName' => 'x_x40',
11547 
    },
11548 
    'to_register16' => {
11549 
      'connections' => {
11550 
        'ce' => 'sysgen_dut.to_register16_ce',
11551 
        'clk' => 'sysgen_dut.to_register16_clk',
11552 
        'clr' => 'sysgen_dut.to_register16_clr',
11553 
        'data_in' => 'sysgen_dut.to_register16_data_in',
11554 
        'dout' => 'to_register16.dout',
11555 
        'en' => 'sysgen_dut.to_register16_en',
11556 
      },
11557 
      'entity' => {
11558 
        'attributes' => {
11559 
          'entityAlreadyNetlisted' => 1,
11560 
          'generics' => [
11561 
          ],
11562 
          'is_floating_block' => 1,
11563 
          'mask' => {
11564 
            'Block_Handle' => 989.000122070313,
11565 
            'Block_handle' => 989.000122070313,
11566 
            'MDL_Handle' => 3.0009765625,
11567 
            'MDL_handle' => 3.0009765625,
11568 
            'arith_type' => 1,
11569 
            'bin_pt' => 14,
11570 
            'block_config' => 'sysgen_blockset:toreg_config',
11571 
            'block_handle' => 989.000122070313,
11572 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16',
11573 
            'block_type' => 'toreg',
11574 
            'dbl_ovrd' => 0,
11575 
            'explicit_data_type' => 0,
11576 
            'init' => 0,
11577 
            'init_bit_vector' => '0b',
11578 
            'mdl_handle' => 3.0009765625,
11579 
            'model_handle' => 3.0009765625,
11580 
            'n_bits' => 16,
11581 
            'ownership' => 1,
11582 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11583 
            'shared_memory_name' => 'register09rv',
11584 
          },
11585 
          'needs_vhdl_wrapper' => 0,
11586 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16',
11587 
        },
11588 
        'entityName' => 'x_x41',
11589 
        'ports' => {
11590 
          'ce' => {
11591 
            'attributes' => {
11592 
              'domain' => '',
11593 
              'group' => 1,
11594 
              'isCe' => 1,
11595 
              'is_floating_block' => 1,
11596 
              'period' => 1,
11597 
              'type' => 'logic',
11598 
            },
11599 
            'direction' => 'in',
11600 
            'hdlType' => 'std_logic',
11601 
            'width' => 1,
11602 
          },
11603 
          'clk' => {
11604 
            'attributes' => {
11605 
              'domain' => '',
11606 
              'group' => 1,
11607 
              'isClk' => 1,
11608 
              'is_floating_block' => 1,
11609 
              'period' => 1,
11610 
              'type' => 'logic',
11611 
            },
11612 
            'direction' => 'in',
11613 
            'hdlType' => 'std_logic',
11614 
            'width' => 1,
11615 
          },
11616 
          'clr' => {
11617 
            'attributes' => {
11618 
              'domain' => '',
11619 
              'group' => 1,
11620 
              'isClr' => 1,
11621 
              'is_floating_block' => 1,
11622 
              'period' => 1,
11623 
              'type' => 'logic',
11624 
              'valid_bit_used' => 0,
11625 
            },
11626 
            'direction' => 'in',
11627 
            'hdlType' => 'std_logic',
11628 
            'width' => 1,
11629 
          },
11630 
          'data_in' => {
11631 
            'attributes' => {
11632 
              'bin_pt' => 0,
11633 
              'is_floating_block' => 1,
11634 
              'must_be_hdl_vector' => 1,
11635 
              'period' => 1,
11636 
              'port_id' => 0,
11637 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/data_in',
11638 
              'type' => 'Bool',
11639 
            },
11640 
            'direction' => 'in',
11641 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11642 
            'width' => 1,
11643 
          },
11644 
          'dout' => {
11645 
            'attributes' => {
11646 
              'bin_pt' => 0,
11647 
              'is_floating_block' => 1,
11648 
              'must_be_hdl_vector' => 1,
11649 
              'period' => 1,
11650 
              'port_id' => 0,
11651 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/dout',
11652 
              'type' => 'Bool',
11653 
            },
11654 
            'direction' => 'out',
11655 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11656 
            'width' => 1,
11657 
          },
11658 
          'en' => {
11659 
            'attributes' => {
11660 
              'bin_pt' => 0,
11661 
              'is_floating_block' => 1,
11662 
              'must_be_hdl_vector' => 1,
11663 
              'period' => 1,
11664 
              'port_id' => 1,
11665 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register16/en',
11666 
              'type' => 'Bool',
11667 
            },
11668 
            'direction' => 'in',
11669 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11670 
            'width' => 1,
11671 
          },
11672 
        },
11673 
      },
11674 
      'entityName' => 'x_x41',
11675 
    },
11676 
    'to_register17' => {
11677 
      'connections' => {
11678 
        'ce' => 'sysgen_dut.to_register17_ce',
11679 
        'clk' => 'sysgen_dut.to_register17_clk',
11680 
        'clr' => 'sysgen_dut.to_register17_clr',
11681 
        'data_in' => 'sysgen_dut.to_register17_data_in',
11682 
        'dout' => 'to_register17.dout',
11683 
        'en' => 'sysgen_dut.to_register17_en',
11684 
      },
11685 
      'entity' => {
11686 
        'attributes' => {
11687 
          'entityAlreadyNetlisted' => 1,
11688 
          'generics' => [
11689 
          ],
11690 
          'is_floating_block' => 1,
11691 
          'mask' => {
11692 
            'Block_Handle' => 990.000122070313,
11693 
            'Block_handle' => 990.000122070313,
11694 
            'MDL_Handle' => 3.0009765625,
11695 
            'MDL_handle' => 3.0009765625,
11696 
            'arith_type' => 1,
11697 
            'bin_pt' => 14,
11698 
            'block_config' => 'sysgen_blockset:toreg_config',
11699 
            'block_handle' => 990.000122070313,
11700 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17',
11701 
            'block_type' => 'toreg',
11702 
            'dbl_ovrd' => 0,
11703 
            'explicit_data_type' => 0,
11704 
            'init' => 0,
11705 
            'init_bit_vector' => '00000000000000000000000000000000b',
11706 
            'mdl_handle' => 3.0009765625,
11707 
            'model_handle' => 3.0009765625,
11708 
            'n_bits' => 16,
11709 
            'ownership' => 1,
11710 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11711 
            'shared_memory_name' => 'register09rd',
11712 
          },
11713 
          'needs_vhdl_wrapper' => 0,
11714 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17',
11715 
        },
11716 
        'entityName' => 'x_x42',
11717 
        'ports' => {
11718 
          'ce' => {
11719 
            'attributes' => {
11720 
              'domain' => '',
11721 
              'group' => 1,
11722 
              'isCe' => 1,
11723 
              'is_floating_block' => 1,
11724 
              'period' => 1,
11725 
              'type' => 'logic',
11726 
            },
11727 
            'direction' => 'in',
11728 
            'hdlType' => 'std_logic',
11729 
            'width' => 1,
11730 
          },
11731 
          'clk' => {
11732 
            'attributes' => {
11733 
              'domain' => '',
11734 
              'group' => 1,
11735 
              'isClk' => 1,
11736 
              'is_floating_block' => 1,
11737 
              'period' => 1,
11738 
              'type' => 'logic',
11739 
            },
11740 
            'direction' => 'in',
11741 
            'hdlType' => 'std_logic',
11742 
            'width' => 1,
11743 
          },
11744 
          'clr' => {
11745 
            'attributes' => {
11746 
              'domain' => '',
11747 
              'group' => 1,
11748 
              'isClr' => 1,
11749 
              'is_floating_block' => 1,
11750 
              'period' => 1,
11751 
              'type' => 'logic',
11752 
              'valid_bit_used' => 0,
11753 
            },
11754 
            'direction' => 'in',
11755 
            'hdlType' => 'std_logic',
11756 
            'width' => 1,
11757 
          },
11758 
          'data_in' => {
11759 
            'attributes' => {
11760 
              'bin_pt' => 0,
11761 
              'is_floating_block' => 1,
11762 
              'must_be_hdl_vector' => 1,
11763 
              'period' => 1,
11764 
              'port_id' => 0,
11765 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/data_in',
11766 
              'type' => 'UFix_32_0',
11767 
            },
11768 
            'direction' => 'in',
11769 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11770 
            'width' => 32,
11771 
          },
11772 
          'dout' => {
11773 
            'attributes' => {
11774 
              'bin_pt' => 0,
11775 
              'is_floating_block' => 1,
11776 
              'must_be_hdl_vector' => 1,
11777 
              'period' => 1,
11778 
              'port_id' => 0,
11779 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/dout',
11780 
              'type' => 'UFix_32_0',
11781 
            },
11782 
            'direction' => 'out',
11783 
            'hdlType' => 'std_logic_vector(31 downto 0)',
11784 
            'width' => 32,
11785 
          },
11786 
          'en' => {
11787 
            'attributes' => {
11788 
              'bin_pt' => 0,
11789 
              'is_floating_block' => 1,
11790 
              'must_be_hdl_vector' => 1,
11791 
              'period' => 1,
11792 
              'port_id' => 1,
11793 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register17/en',
11794 
              'type' => 'Bool',
11795 
            },
11796 
            'direction' => 'in',
11797 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11798 
            'width' => 1,
11799 
          },
11800 
        },
11801 
      },
11802 
      'entityName' => 'x_x42',
11803 
    },
11804 
    'to_register18' => {
11805 
      'connections' => {
11806 
        'ce' => 'sysgen_dut.to_register18_ce',
11807 
        'clk' => 'sysgen_dut.to_register18_clk',
11808 
        'clr' => 'sysgen_dut.to_register18_clr',
11809 
        'data_in' => 'sysgen_dut.to_register18_data_in',
11810 
        'dout' => 'to_register18.dout',
11811 
        'en' => 'sysgen_dut.to_register18_en',
11812 
      },
11813 
      'entity' => {
11814 
        'attributes' => {
11815 
          'entityAlreadyNetlisted' => 1,
11816 
          'generics' => [
11817 
          ],
11818 
          'is_floating_block' => 1,
11819 
          'mask' => {
11820 
            'Block_Handle' => 991.000122070313,
11821 
            'Block_handle' => 991.000122070313,
11822 
            'MDL_Handle' => 3.0009765625,
11823 
            'MDL_handle' => 3.0009765625,
11824 
            'arith_type' => 1,
11825 
            'bin_pt' => 14,
11826 
            'block_config' => 'sysgen_blockset:toreg_config',
11827 
            'block_handle' => 991.000122070313,
11828 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18',
11829 
            'block_type' => 'toreg',
11830 
            'dbl_ovrd' => 0,
11831 
            'explicit_data_type' => 0,
11832 
            'init' => 0,
11833 
            'init_bit_vector' => '0b',
11834 
            'mdl_handle' => 3.0009765625,
11835 
            'model_handle' => 3.0009765625,
11836 
            'n_bits' => 16,
11837 
            'ownership' => 1,
11838 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11839 
            'shared_memory_name' => 'register10rv',
11840 
          },
11841 
          'needs_vhdl_wrapper' => 0,
11842 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18',
11843 
        },
11844 
        'entityName' => 'x_x43',
11845 
        'ports' => {
11846 
          'ce' => {
11847 
            'attributes' => {
11848 
              'domain' => '',
11849 
              'group' => 1,
11850 
              'isCe' => 1,
11851 
              'is_floating_block' => 1,
11852 
              'period' => 1,
11853 
              'type' => 'logic',
11854 
            },
11855 
            'direction' => 'in',
11856 
            'hdlType' => 'std_logic',
11857 
            'width' => 1,
11858 
          },
11859 
          'clk' => {
11860 
            'attributes' => {
11861 
              'domain' => '',
11862 
              'group' => 1,
11863 
              'isClk' => 1,
11864 
              'is_floating_block' => 1,
11865 
              'period' => 1,
11866 
              'type' => 'logic',
11867 
            },
11868 
            'direction' => 'in',
11869 
            'hdlType' => 'std_logic',
11870 
            'width' => 1,
11871 
          },
11872 
          'clr' => {
11873 
            'attributes' => {
11874 
              'domain' => '',
11875 
              'group' => 1,
11876 
              'isClr' => 1,
11877 
              'is_floating_block' => 1,
11878 
              'period' => 1,
11879 
              'type' => 'logic',
11880 
              'valid_bit_used' => 0,
11881 
            },
11882 
            'direction' => 'in',
11883 
            'hdlType' => 'std_logic',
11884 
            'width' => 1,
11885 
          },
11886 
          'data_in' => {
11887 
            'attributes' => {
11888 
              'bin_pt' => 0,
11889 
              'is_floating_block' => 1,
11890 
              'must_be_hdl_vector' => 1,
11891 
              'period' => 1,
11892 
              'port_id' => 0,
11893 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/data_in',
11894 
              'type' => 'Bool',
11895 
            },
11896 
            'direction' => 'in',
11897 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11898 
            'width' => 1,
11899 
          },
11900 
          'dout' => {
11901 
            'attributes' => {
11902 
              'bin_pt' => 0,
11903 
              'is_floating_block' => 1,
11904 
              'must_be_hdl_vector' => 1,
11905 
              'period' => 1,
11906 
              'port_id' => 0,
11907 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/dout',
11908 
              'type' => 'Bool',
11909 
            },
11910 
            'direction' => 'out',
11911 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11912 
            'width' => 1,
11913 
          },
11914 
          'en' => {
11915 
            'attributes' => {
11916 
              'bin_pt' => 0,
11917 
              'is_floating_block' => 1,
11918 
              'must_be_hdl_vector' => 1,
11919 
              'period' => 1,
11920 
              'port_id' => 1,
11921 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register18/en',
11922 
              'type' => 'Bool',
11923 
            },
11924 
            'direction' => 'in',
11925 
            'hdlType' => 'std_logic_vector(0 downto 0)',
11926 
            'width' => 1,
11927 
          },
11928 
        },
11929 
      },
11930 
      'entityName' => 'x_x43',
11931 
    },
11932 
    'to_register19' => {
11933 
      'connections' => {
11934 
        'ce' => 'sysgen_dut.to_register19_ce',
11935 
        'clk' => 'sysgen_dut.to_register19_clk',
11936 
        'clr' => 'sysgen_dut.to_register19_clr',
11937 
        'data_in' => 'sysgen_dut.to_register19_data_in',
11938 
        'dout' => 'to_register19.dout',
11939 
        'en' => 'sysgen_dut.to_register19_en',
11940 
      },
11941 
      'entity' => {
11942 
        'attributes' => {
11943 
          'entityAlreadyNetlisted' => 1,
11944 
          'generics' => [
11945 
          ],
11946 
          'is_floating_block' => 1,
11947 
          'mask' => {
11948 
            'Block_Handle' => 992.000122070313,
11949 
            'Block_handle' => 992.000122070313,
11950 
            'MDL_Handle' => 3.0009765625,
11951 
            'MDL_handle' => 3.0009765625,
11952 
            'arith_type' => 1,
11953 
            'bin_pt' => 14,
11954 
            'block_config' => 'sysgen_blockset:toreg_config',
11955 
            'block_handle' => 992.000122070313,
11956 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19',
11957 
            'block_type' => 'toreg',
11958 
            'dbl_ovrd' => 0,
11959 
            'explicit_data_type' => 0,
11960 
            'init' => 0,
11961 
            'init_bit_vector' => '00000000000000000000000000000000b',
11962 
            'mdl_handle' => 3.0009765625,
11963 
            'model_handle' => 3.0009765625,
11964 
            'n_bits' => 16,
11965 
            'ownership' => 1,
11966 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
11967 
            'shared_memory_name' => 'register10rd',
11968 
          },
11969 
          'needs_vhdl_wrapper' => 0,
11970 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19',
11971 
        },
11972 
        'entityName' => 'x_x44',
11973 
        'ports' => {
11974 
          'ce' => {
11975 
            'attributes' => {
11976 
              'domain' => '',
11977 
              'group' => 1,
11978 
              'isCe' => 1,
11979 
              'is_floating_block' => 1,
11980 
              'period' => 1,
11981 
              'type' => 'logic',
11982 
            },
11983 
            'direction' => 'in',
11984 
            'hdlType' => 'std_logic',
11985 
            'width' => 1,
11986 
          },
11987 
          'clk' => {
11988 
            'attributes' => {
11989 
              'domain' => '',
11990 
              'group' => 1,
11991 
              'isClk' => 1,
11992 
              'is_floating_block' => 1,
11993 
              'period' => 1,
11994 
              'type' => 'logic',
11995 
            },
11996 
            'direction' => 'in',
11997 
            'hdlType' => 'std_logic',
11998 
            'width' => 1,
11999 
          },
12000 
          'clr' => {
12001 
            'attributes' => {
12002 
              'domain' => '',
12003 
              'group' => 1,
12004 
              'isClr' => 1,
12005 
              'is_floating_block' => 1,
12006 
              'period' => 1,
12007 
              'type' => 'logic',
12008 
              'valid_bit_used' => 0,
12009 
            },
12010 
            'direction' => 'in',
12011 
            'hdlType' => 'std_logic',
12012 
            'width' => 1,
12013 
          },
12014 
          'data_in' => {
12015 
            'attributes' => {
12016 
              'bin_pt' => 0,
12017 
              'is_floating_block' => 1,
12018 
              'must_be_hdl_vector' => 1,
12019 
              'period' => 1,
12020 
              'port_id' => 0,
12021 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/data_in',
12022 
              'type' => 'UFix_32_0',
12023 
            },
12024 
            'direction' => 'in',
12025 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12026 
            'width' => 32,
12027 
          },
12028 
          'dout' => {
12029 
            'attributes' => {
12030 
              'bin_pt' => 0,
12031 
              'is_floating_block' => 1,
12032 
              'must_be_hdl_vector' => 1,
12033 
              'period' => 1,
12034 
              'port_id' => 0,
12035 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/dout',
12036 
              'type' => 'UFix_32_0',
12037 
            },
12038 
            'direction' => 'out',
12039 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12040 
            'width' => 32,
12041 
          },
12042 
          'en' => {
12043 
            'attributes' => {
12044 
              'bin_pt' => 0,
12045 
              'is_floating_block' => 1,
12046 
              'must_be_hdl_vector' => 1,
12047 
              'period' => 1,
12048 
              'port_id' => 1,
12049 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register19/en',
12050 
              'type' => 'Bool',
12051 
            },
12052 
            'direction' => 'in',
12053 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12054 
            'width' => 1,
12055 
          },
12056 
        },
12057 
      },
12058 
      'entityName' => 'x_x44',
12059 
    },
12060 
    'to_register2' => {
12061 
      'connections' => {
12062 
        'ce' => 'sysgen_dut.to_register2_ce',
12063 
        'clk' => 'sysgen_dut.to_register2_clk',
12064 
        'clr' => 'sysgen_dut.to_register2_clr',
12065 
        'data_in' => 'sysgen_dut.to_register2_data_in',
12066 
        'dout' => 'to_register2.dout',
12067 
        'en' => 'sysgen_dut.to_register2_en',
12068 
      },
12069 
      'entity' => {
12070 
        'attributes' => {
12071 
          'entityAlreadyNetlisted' => 1,
12072 
          'generics' => [
12073 
          ],
12074 
          'is_floating_block' => 1,
12075 
          'mask' => {
12076 
            'Block_Handle' => 993.000122070313,
12077 
            'Block_handle' => 993.000122070313,
12078 
            'MDL_Handle' => 3.0009765625,
12079 
            'MDL_handle' => 3.0009765625,
12080 
            'arith_type' => 1,
12081 
            'bin_pt' => 14,
12082 
            'block_config' => 'sysgen_blockset:toreg_config',
12083 
            'block_handle' => 993.000122070313,
12084 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2',
12085 
            'block_type' => 'toreg',
12086 
            'dbl_ovrd' => 0,
12087 
            'explicit_data_type' => 0,
12088 
            'init' => 0,
12089 
            'init_bit_vector' => '00000000000000000000000000000000b',
12090 
            'mdl_handle' => 3.0009765625,
12091 
            'model_handle' => 3.0009765625,
12092 
            'n_bits' => 16,
12093 
            'ownership' => 1,
12094 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12095 
            'shared_memory_name' => 'register02rd',
12096 
          },
12097 
          'needs_vhdl_wrapper' => 0,
12098 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2',
12099 
        },
12100 
        'entityName' => 'x_x45',
12101 
        'ports' => {
12102 
          'ce' => {
12103 
            'attributes' => {
12104 
              'domain' => '',
12105 
              'group' => 1,
12106 
              'isCe' => 1,
12107 
              'is_floating_block' => 1,
12108 
              'period' => 1,
12109 
              'type' => 'logic',
12110 
            },
12111 
            'direction' => 'in',
12112 
            'hdlType' => 'std_logic',
12113 
            'width' => 1,
12114 
          },
12115 
          'clk' => {
12116 
            'attributes' => {
12117 
              'domain' => '',
12118 
              'group' => 1,
12119 
              'isClk' => 1,
12120 
              'is_floating_block' => 1,
12121 
              'period' => 1,
12122 
              'type' => 'logic',
12123 
            },
12124 
            'direction' => 'in',
12125 
            'hdlType' => 'std_logic',
12126 
            'width' => 1,
12127 
          },
12128 
          'clr' => {
12129 
            'attributes' => {
12130 
              'domain' => '',
12131 
              'group' => 1,
12132 
              'isClr' => 1,
12133 
              'is_floating_block' => 1,
12134 
              'period' => 1,
12135 
              'type' => 'logic',
12136 
              'valid_bit_used' => 0,
12137 
            },
12138 
            'direction' => 'in',
12139 
            'hdlType' => 'std_logic',
12140 
            'width' => 1,
12141 
          },
12142 
          'data_in' => {
12143 
            'attributes' => {
12144 
              'bin_pt' => 0,
12145 
              'is_floating_block' => 1,
12146 
              'must_be_hdl_vector' => 1,
12147 
              'period' => 1,
12148 
              'port_id' => 0,
12149 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/data_in',
12150 
              'type' => 'UFix_32_0',
12151 
            },
12152 
            'direction' => 'in',
12153 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12154 
            'width' => 32,
12155 
          },
12156 
          'dout' => {
12157 
            'attributes' => {
12158 
              'bin_pt' => 0,
12159 
              'is_floating_block' => 1,
12160 
              'must_be_hdl_vector' => 1,
12161 
              'period' => 1,
12162 
              'port_id' => 0,
12163 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/dout',
12164 
              'type' => 'UFix_32_0',
12165 
            },
12166 
            'direction' => 'out',
12167 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12168 
            'width' => 32,
12169 
          },
12170 
          'en' => {
12171 
            'attributes' => {
12172 
              'bin_pt' => 0,
12173 
              'is_floating_block' => 1,
12174 
              'must_be_hdl_vector' => 1,
12175 
              'period' => 1,
12176 
              'port_id' => 1,
12177 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register2/en',
12178 
              'type' => 'Bool',
12179 
            },
12180 
            'direction' => 'in',
12181 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12182 
            'width' => 1,
12183 
          },
12184 
        },
12185 
      },
12186 
      'entityName' => 'x_x45',
12187 
    },
12188 
    'to_register20' => {
12189 
      'connections' => {
12190 
        'ce' => 'sysgen_dut.to_register20_ce',
12191 
        'clk' => 'sysgen_dut.to_register20_clk',
12192 
        'clr' => 'sysgen_dut.to_register20_clr',
12193 
        'data_in' => 'sysgen_dut.to_register20_data_in',
12194 
        'dout' => 'to_register20.dout',
12195 
        'en' => 'sysgen_dut.to_register20_en',
12196 
      },
12197 
      'entity' => {
12198 
        'attributes' => {
12199 
          'entityAlreadyNetlisted' => 1,
12200 
          'generics' => [
12201 
          ],
12202 
          'is_floating_block' => 1,
12203 
          'mask' => {
12204 
            'Block_Handle' => 994.000122070313,
12205 
            'Block_handle' => 994.000122070313,
12206 
            'MDL_Handle' => 3.0009765625,
12207 
            'MDL_handle' => 3.0009765625,
12208 
            'arith_type' => 1,
12209 
            'bin_pt' => 14,
12210 
            'block_config' => 'sysgen_blockset:toreg_config',
12211 
            'block_handle' => 994.000122070313,
12212 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20',
12213 
            'block_type' => 'toreg',
12214 
            'dbl_ovrd' => 0,
12215 
            'explicit_data_type' => 0,
12216 
            'init' => 0,
12217 
            'init_bit_vector' => '0b',
12218 
            'mdl_handle' => 3.0009765625,
12219 
            'model_handle' => 3.0009765625,
12220 
            'n_bits' => 16,
12221 
            'ownership' => 1,
12222 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12223 
            'shared_memory_name' => 'register11rv',
12224 
          },
12225 
          'needs_vhdl_wrapper' => 0,
12226 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20',
12227 
        },
12228 
        'entityName' => 'x_x46',
12229 
        'ports' => {
12230 
          'ce' => {
12231 
            'attributes' => {
12232 
              'domain' => '',
12233 
              'group' => 1,
12234 
              'isCe' => 1,
12235 
              'is_floating_block' => 1,
12236 
              'period' => 1,
12237 
              'type' => 'logic',
12238 
            },
12239 
            'direction' => 'in',
12240 
            'hdlType' => 'std_logic',
12241 
            'width' => 1,
12242 
          },
12243 
          'clk' => {
12244 
            'attributes' => {
12245 
              'domain' => '',
12246 
              'group' => 1,
12247 
              'isClk' => 1,
12248 
              'is_floating_block' => 1,
12249 
              'period' => 1,
12250 
              'type' => 'logic',
12251 
            },
12252 
            'direction' => 'in',
12253 
            'hdlType' => 'std_logic',
12254 
            'width' => 1,
12255 
          },
12256 
          'clr' => {
12257 
            'attributes' => {
12258 
              'domain' => '',
12259 
              'group' => 1,
12260 
              'isClr' => 1,
12261 
              'is_floating_block' => 1,
12262 
              'period' => 1,
12263 
              'type' => 'logic',
12264 
              'valid_bit_used' => 0,
12265 
            },
12266 
            'direction' => 'in',
12267 
            'hdlType' => 'std_logic',
12268 
            'width' => 1,
12269 
          },
12270 
          'data_in' => {
12271 
            'attributes' => {
12272 
              'bin_pt' => 0,
12273 
              'is_floating_block' => 1,
12274 
              'must_be_hdl_vector' => 1,
12275 
              'period' => 1,
12276 
              'port_id' => 0,
12277 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/data_in',
12278 
              'type' => 'Bool',
12279 
            },
12280 
            'direction' => 'in',
12281 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12282 
            'width' => 1,
12283 
          },
12284 
          'dout' => {
12285 
            'attributes' => {
12286 
              'bin_pt' => 0,
12287 
              'is_floating_block' => 1,
12288 
              'must_be_hdl_vector' => 1,
12289 
              'period' => 1,
12290 
              'port_id' => 0,
12291 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/dout',
12292 
              'type' => 'Bool',
12293 
            },
12294 
            'direction' => 'out',
12295 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12296 
            'width' => 1,
12297 
          },
12298 
          'en' => {
12299 
            'attributes' => {
12300 
              'bin_pt' => 0,
12301 
              'is_floating_block' => 1,
12302 
              'must_be_hdl_vector' => 1,
12303 
              'period' => 1,
12304 
              'port_id' => 1,
12305 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register20/en',
12306 
              'type' => 'Bool',
12307 
            },
12308 
            'direction' => 'in',
12309 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12310 
            'width' => 1,
12311 
          },
12312 
        },
12313 
      },
12314 
      'entityName' => 'x_x46',
12315 
    },
12316 
    'to_register21' => {
12317 
      'connections' => {
12318 
        'ce' => 'sysgen_dut.to_register21_ce',
12319 
        'clk' => 'sysgen_dut.to_register21_clk',
12320 
        'clr' => 'sysgen_dut.to_register21_clr',
12321 
        'data_in' => 'sysgen_dut.to_register21_data_in',
12322 
        'dout' => 'to_register21.dout',
12323 
        'en' => 'sysgen_dut.to_register21_en',
12324 
      },
12325 
      'entity' => {
12326 
        'attributes' => {
12327 
          'entityAlreadyNetlisted' => 1,
12328 
          'generics' => [
12329 
          ],
12330 
          'is_floating_block' => 1,
12331 
          'mask' => {
12332 
            'Block_Handle' => 995.000122070313,
12333 
            'Block_handle' => 995.000122070313,
12334 
            'MDL_Handle' => 3.0009765625,
12335 
            'MDL_handle' => 3.0009765625,
12336 
            'arith_type' => 1,
12337 
            'bin_pt' => 14,
12338 
            'block_config' => 'sysgen_blockset:toreg_config',
12339 
            'block_handle' => 995.000122070313,
12340 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21',
12341 
            'block_type' => 'toreg',
12342 
            'dbl_ovrd' => 0,
12343 
            'explicit_data_type' => 0,
12344 
            'init' => 0,
12345 
            'init_bit_vector' => '00000000000000000000000000000000b',
12346 
            'mdl_handle' => 3.0009765625,
12347 
            'model_handle' => 3.0009765625,
12348 
            'n_bits' => 16,
12349 
            'ownership' => 1,
12350 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12351 
            'shared_memory_name' => 'register11rd',
12352 
          },
12353 
          'needs_vhdl_wrapper' => 0,
12354 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21',
12355 
        },
12356 
        'entityName' => 'x_x47',
12357 
        'ports' => {
12358 
          'ce' => {
12359 
            'attributes' => {
12360 
              'domain' => '',
12361 
              'group' => 1,
12362 
              'isCe' => 1,
12363 
              'is_floating_block' => 1,
12364 
              'period' => 1,
12365 
              'type' => 'logic',
12366 
            },
12367 
            'direction' => 'in',
12368 
            'hdlType' => 'std_logic',
12369 
            'width' => 1,
12370 
          },
12371 
          'clk' => {
12372 
            'attributes' => {
12373 
              'domain' => '',
12374 
              'group' => 1,
12375 
              'isClk' => 1,
12376 
              'is_floating_block' => 1,
12377 
              'period' => 1,
12378 
              'type' => 'logic',
12379 
            },
12380 
            'direction' => 'in',
12381 
            'hdlType' => 'std_logic',
12382 
            'width' => 1,
12383 
          },
12384 
          'clr' => {
12385 
            'attributes' => {
12386 
              'domain' => '',
12387 
              'group' => 1,
12388 
              'isClr' => 1,
12389 
              'is_floating_block' => 1,
12390 
              'period' => 1,
12391 
              'type' => 'logic',
12392 
              'valid_bit_used' => 0,
12393 
            },
12394 
            'direction' => 'in',
12395 
            'hdlType' => 'std_logic',
12396 
            'width' => 1,
12397 
          },
12398 
          'data_in' => {
12399 
            'attributes' => {
12400 
              'bin_pt' => 0,
12401 
              'is_floating_block' => 1,
12402 
              'must_be_hdl_vector' => 1,
12403 
              'period' => 1,
12404 
              'port_id' => 0,
12405 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/data_in',
12406 
              'type' => 'UFix_32_0',
12407 
            },
12408 
            'direction' => 'in',
12409 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12410 
            'width' => 32,
12411 
          },
12412 
          'dout' => {
12413 
            'attributes' => {
12414 
              'bin_pt' => 0,
12415 
              'is_floating_block' => 1,
12416 
              'must_be_hdl_vector' => 1,
12417 
              'period' => 1,
12418 
              'port_id' => 0,
12419 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/dout',
12420 
              'type' => 'UFix_32_0',
12421 
            },
12422 
            'direction' => 'out',
12423 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12424 
            'width' => 32,
12425 
          },
12426 
          'en' => {
12427 
            'attributes' => {
12428 
              'bin_pt' => 0,
12429 
              'is_floating_block' => 1,
12430 
              'must_be_hdl_vector' => 1,
12431 
              'period' => 1,
12432 
              'port_id' => 1,
12433 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register21/en',
12434 
              'type' => 'Bool',
12435 
            },
12436 
            'direction' => 'in',
12437 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12438 
            'width' => 1,
12439 
          },
12440 
        },
12441 
      },
12442 
      'entityName' => 'x_x47',
12443 
    },
12444 
    'to_register22' => {
12445 
      'connections' => {
12446 
        'ce' => 'sysgen_dut.to_register22_ce',
12447 
        'clk' => 'sysgen_dut.to_register22_clk',
12448 
        'clr' => 'sysgen_dut.to_register22_clr',
12449 
        'data_in' => 'sysgen_dut.to_register22_data_in',
12450 
        'dout' => 'to_register22.dout',
12451 
        'en' => 'sysgen_dut.to_register22_en',
12452 
      },
12453 
      'entity' => {
12454 
        'attributes' => {
12455 
          'entityAlreadyNetlisted' => 1,
12456 
          'generics' => [
12457 
          ],
12458 
          'is_floating_block' => 1,
12459 
          'mask' => {
12460 
            'Block_Handle' => 996.000122070313,
12461 
            'Block_handle' => 996.000122070313,
12462 
            'MDL_Handle' => 3.0009765625,
12463 
            'MDL_handle' => 3.0009765625,
12464 
            'arith_type' => 1,
12465 
            'bin_pt' => 14,
12466 
            'block_config' => 'sysgen_blockset:toreg_config',
12467 
            'block_handle' => 996.000122070313,
12468 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22',
12469 
            'block_type' => 'toreg',
12470 
            'dbl_ovrd' => 0,
12471 
            'explicit_data_type' => 0,
12472 
            'init' => 0,
12473 
            'init_bit_vector' => '0b',
12474 
            'mdl_handle' => 3.0009765625,
12475 
            'model_handle' => 3.0009765625,
12476 
            'n_bits' => 16,
12477 
            'ownership' => 1,
12478 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12479 
            'shared_memory_name' => 'register12rv',
12480 
          },
12481 
          'needs_vhdl_wrapper' => 0,
12482 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22',
12483 
        },
12484 
        'entityName' => 'x_x48',
12485 
        'ports' => {
12486 
          'ce' => {
12487 
            'attributes' => {
12488 
              'domain' => '',
12489 
              'group' => 1,
12490 
              'isCe' => 1,
12491 
              'is_floating_block' => 1,
12492 
              'period' => 1,
12493 
              'type' => 'logic',
12494 
            },
12495 
            'direction' => 'in',
12496 
            'hdlType' => 'std_logic',
12497 
            'width' => 1,
12498 
          },
12499 
          'clk' => {
12500 
            'attributes' => {
12501 
              'domain' => '',
12502 
              'group' => 1,
12503 
              'isClk' => 1,
12504 
              'is_floating_block' => 1,
12505 
              'period' => 1,
12506 
              'type' => 'logic',
12507 
            },
12508 
            'direction' => 'in',
12509 
            'hdlType' => 'std_logic',
12510 
            'width' => 1,
12511 
          },
12512 
          'clr' => {
12513 
            'attributes' => {
12514 
              'domain' => '',
12515 
              'group' => 1,
12516 
              'isClr' => 1,
12517 
              'is_floating_block' => 1,
12518 
              'period' => 1,
12519 
              'type' => 'logic',
12520 
              'valid_bit_used' => 0,
12521 
            },
12522 
            'direction' => 'in',
12523 
            'hdlType' => 'std_logic',
12524 
            'width' => 1,
12525 
          },
12526 
          'data_in' => {
12527 
            'attributes' => {
12528 
              'bin_pt' => 0,
12529 
              'is_floating_block' => 1,
12530 
              'must_be_hdl_vector' => 1,
12531 
              'period' => 1,
12532 
              'port_id' => 0,
12533 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/data_in',
12534 
              'type' => 'Bool',
12535 
            },
12536 
            'direction' => 'in',
12537 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12538 
            'width' => 1,
12539 
          },
12540 
          'dout' => {
12541 
            'attributes' => {
12542 
              'bin_pt' => 0,
12543 
              'is_floating_block' => 1,
12544 
              'must_be_hdl_vector' => 1,
12545 
              'period' => 1,
12546 
              'port_id' => 0,
12547 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/dout',
12548 
              'type' => 'Bool',
12549 
            },
12550 
            'direction' => 'out',
12551 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12552 
            'width' => 1,
12553 
          },
12554 
          'en' => {
12555 
            'attributes' => {
12556 
              'bin_pt' => 0,
12557 
              'is_floating_block' => 1,
12558 
              'must_be_hdl_vector' => 1,
12559 
              'period' => 1,
12560 
              'port_id' => 1,
12561 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register22/en',
12562 
              'type' => 'Bool',
12563 
            },
12564 
            'direction' => 'in',
12565 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12566 
            'width' => 1,
12567 
          },
12568 
        },
12569 
      },
12570 
      'entityName' => 'x_x48',
12571 
    },
12572 
    'to_register23' => {
12573 
      'connections' => {
12574 
        'ce' => 'sysgen_dut.to_register23_ce',
12575 
        'clk' => 'sysgen_dut.to_register23_clk',
12576 
        'clr' => 'sysgen_dut.to_register23_clr',
12577 
        'data_in' => 'sysgen_dut.to_register23_data_in',
12578 
        'dout' => 'to_register23.dout',
12579 
        'en' => 'sysgen_dut.to_register23_en',
12580 
      },
12581 
      'entity' => {
12582 
        'attributes' => {
12583 
          'entityAlreadyNetlisted' => 1,
12584 
          'generics' => [
12585 
          ],
12586 
          'is_floating_block' => 1,
12587 
          'mask' => {
12588 
            'Block_Handle' => 997.000122070313,
12589 
            'Block_handle' => 997.000122070313,
12590 
            'MDL_Handle' => 3.0009765625,
12591 
            'MDL_handle' => 3.0009765625,
12592 
            'arith_type' => 1,
12593 
            'bin_pt' => 14,
12594 
            'block_config' => 'sysgen_blockset:toreg_config',
12595 
            'block_handle' => 997.000122070313,
12596 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23',
12597 
            'block_type' => 'toreg',
12598 
            'dbl_ovrd' => 0,
12599 
            'explicit_data_type' => 0,
12600 
            'init' => 0,
12601 
            'init_bit_vector' => '00000000000000000000000000000000b',
12602 
            'mdl_handle' => 3.0009765625,
12603 
            'model_handle' => 3.0009765625,
12604 
            'n_bits' => 16,
12605 
            'ownership' => 1,
12606 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12607 
            'shared_memory_name' => 'register12rd',
12608 
          },
12609 
          'needs_vhdl_wrapper' => 0,
12610 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23',
12611 
        },
12612 
        'entityName' => 'x_x49',
12613 
        'ports' => {
12614 
          'ce' => {
12615 
            'attributes' => {
12616 
              'domain' => '',
12617 
              'group' => 1,
12618 
              'isCe' => 1,
12619 
              'is_floating_block' => 1,
12620 
              'period' => 1,
12621 
              'type' => 'logic',
12622 
            },
12623 
            'direction' => 'in',
12624 
            'hdlType' => 'std_logic',
12625 
            'width' => 1,
12626 
          },
12627 
          'clk' => {
12628 
            'attributes' => {
12629 
              'domain' => '',
12630 
              'group' => 1,
12631 
              'isClk' => 1,
12632 
              'is_floating_block' => 1,
12633 
              'period' => 1,
12634 
              'type' => 'logic',
12635 
            },
12636 
            'direction' => 'in',
12637 
            'hdlType' => 'std_logic',
12638 
            'width' => 1,
12639 
          },
12640 
          'clr' => {
12641 
            'attributes' => {
12642 
              'domain' => '',
12643 
              'group' => 1,
12644 
              'isClr' => 1,
12645 
              'is_floating_block' => 1,
12646 
              'period' => 1,
12647 
              'type' => 'logic',
12648 
              'valid_bit_used' => 0,
12649 
            },
12650 
            'direction' => 'in',
12651 
            'hdlType' => 'std_logic',
12652 
            'width' => 1,
12653 
          },
12654 
          'data_in' => {
12655 
            'attributes' => {
12656 
              'bin_pt' => 0,
12657 
              'is_floating_block' => 1,
12658 
              'must_be_hdl_vector' => 1,
12659 
              'period' => 1,
12660 
              'port_id' => 0,
12661 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/data_in',
12662 
              'type' => 'UFix_32_0',
12663 
            },
12664 
            'direction' => 'in',
12665 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12666 
            'width' => 32,
12667 
          },
12668 
          'dout' => {
12669 
            'attributes' => {
12670 
              'bin_pt' => 0,
12671 
              'is_floating_block' => 1,
12672 
              'must_be_hdl_vector' => 1,
12673 
              'period' => 1,
12674 
              'port_id' => 0,
12675 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/dout',
12676 
              'type' => 'UFix_32_0',
12677 
            },
12678 
            'direction' => 'out',
12679 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12680 
            'width' => 32,
12681 
          },
12682 
          'en' => {
12683 
            'attributes' => {
12684 
              'bin_pt' => 0,
12685 
              'is_floating_block' => 1,
12686 
              'must_be_hdl_vector' => 1,
12687 
              'period' => 1,
12688 
              'port_id' => 1,
12689 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register23/en',
12690 
              'type' => 'Bool',
12691 
            },
12692 
            'direction' => 'in',
12693 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12694 
            'width' => 1,
12695 
          },
12696 
        },
12697 
      },
12698 
      'entityName' => 'x_x49',
12699 
    },
12700 
    'to_register24' => {
12701 
      'connections' => {
12702 
        'ce' => 'sysgen_dut.to_register24_ce',
12703 
        'clk' => 'sysgen_dut.to_register24_clk',
12704 
        'clr' => 'sysgen_dut.to_register24_clr',
12705 
        'data_in' => 'sysgen_dut.to_register24_data_in',
12706 
        'dout' => 'to_register24.dout',
12707 
        'en' => 'sysgen_dut.to_register24_en',
12708 
      },
12709 
      'entity' => {
12710 
        'attributes' => {
12711 
          'entityAlreadyNetlisted' => 1,
12712 
          'generics' => [
12713 
          ],
12714 
          'is_floating_block' => 1,
12715 
          'mask' => {
12716 
            'Block_Handle' => 998.000122070313,
12717 
            'Block_handle' => 998.000122070313,
12718 
            'MDL_Handle' => 3.0009765625,
12719 
            'MDL_handle' => 3.0009765625,
12720 
            'arith_type' => 1,
12721 
            'bin_pt' => 14,
12722 
            'block_config' => 'sysgen_blockset:toreg_config',
12723 
            'block_handle' => 998.000122070313,
12724 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24',
12725 
            'block_type' => 'toreg',
12726 
            'dbl_ovrd' => 0,
12727 
            'explicit_data_type' => 0,
12728 
            'init' => 0,
12729 
            'init_bit_vector' => '0b',
12730 
            'mdl_handle' => 3.0009765625,
12731 
            'model_handle' => 3.0009765625,
12732 
            'n_bits' => 16,
12733 
            'ownership' => 1,
12734 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12735 
            'shared_memory_name' => 'register13rv',
12736 
          },
12737 
          'needs_vhdl_wrapper' => 0,
12738 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24',
12739 
        },
12740 
        'entityName' => 'x_x50',
12741 
        'ports' => {
12742 
          'ce' => {
12743 
            'attributes' => {
12744 
              'domain' => '',
12745 
              'group' => 1,
12746 
              'isCe' => 1,
12747 
              'is_floating_block' => 1,
12748 
              'period' => 1,
12749 
              'type' => 'logic',
12750 
            },
12751 
            'direction' => 'in',
12752 
            'hdlType' => 'std_logic',
12753 
            'width' => 1,
12754 
          },
12755 
          'clk' => {
12756 
            'attributes' => {
12757 
              'domain' => '',
12758 
              'group' => 1,
12759 
              'isClk' => 1,
12760 
              'is_floating_block' => 1,
12761 
              'period' => 1,
12762 
              'type' => 'logic',
12763 
            },
12764 
            'direction' => 'in',
12765 
            'hdlType' => 'std_logic',
12766 
            'width' => 1,
12767 
          },
12768 
          'clr' => {
12769 
            'attributes' => {
12770 
              'domain' => '',
12771 
              'group' => 1,
12772 
              'isClr' => 1,
12773 
              'is_floating_block' => 1,
12774 
              'period' => 1,
12775 
              'type' => 'logic',
12776 
              'valid_bit_used' => 0,
12777 
            },
12778 
            'direction' => 'in',
12779 
            'hdlType' => 'std_logic',
12780 
            'width' => 1,
12781 
          },
12782 
          'data_in' => {
12783 
            'attributes' => {
12784 
              'bin_pt' => 0,
12785 
              'is_floating_block' => 1,
12786 
              'must_be_hdl_vector' => 1,
12787 
              'period' => 1,
12788 
              'port_id' => 0,
12789 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/data_in',
12790 
              'type' => 'Bool',
12791 
            },
12792 
            'direction' => 'in',
12793 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12794 
            'width' => 1,
12795 
          },
12796 
          'dout' => {
12797 
            'attributes' => {
12798 
              'bin_pt' => 0,
12799 
              'is_floating_block' => 1,
12800 
              'must_be_hdl_vector' => 1,
12801 
              'period' => 1,
12802 
              'port_id' => 0,
12803 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/dout',
12804 
              'type' => 'Bool',
12805 
            },
12806 
            'direction' => 'out',
12807 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12808 
            'width' => 1,
12809 
          },
12810 
          'en' => {
12811 
            'attributes' => {
12812 
              'bin_pt' => 0,
12813 
              'is_floating_block' => 1,
12814 
              'must_be_hdl_vector' => 1,
12815 
              'period' => 1,
12816 
              'port_id' => 1,
12817 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register24/en',
12818 
              'type' => 'Bool',
12819 
            },
12820 
            'direction' => 'in',
12821 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12822 
            'width' => 1,
12823 
          },
12824 
        },
12825 
      },
12826 
      'entityName' => 'x_x50',
12827 
    },
12828 
    'to_register25' => {
12829 
      'connections' => {
12830 
        'ce' => 'sysgen_dut.to_register25_ce',
12831 
        'clk' => 'sysgen_dut.to_register25_clk',
12832 
        'clr' => 'sysgen_dut.to_register25_clr',
12833 
        'data_in' => 'sysgen_dut.to_register25_data_in',
12834 
        'dout' => 'to_register25.dout',
12835 
        'en' => 'sysgen_dut.to_register25_en',
12836 
      },
12837 
      'entity' => {
12838 
        'attributes' => {
12839 
          'entityAlreadyNetlisted' => 1,
12840 
          'generics' => [
12841 
          ],
12842 
          'is_floating_block' => 1,
12843 
          'mask' => {
12844 
            'Block_Handle' => 999.000122070313,
12845 
            'Block_handle' => 999.000122070313,
12846 
            'MDL_Handle' => 3.0009765625,
12847 
            'MDL_handle' => 3.0009765625,
12848 
            'arith_type' => 1,
12849 
            'bin_pt' => 14,
12850 
            'block_config' => 'sysgen_blockset:toreg_config',
12851 
            'block_handle' => 999.000122070313,
12852 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25',
12853 
            'block_type' => 'toreg',
12854 
            'dbl_ovrd' => 0,
12855 
            'explicit_data_type' => 0,
12856 
            'init' => 0,
12857 
            'init_bit_vector' => '00000000000000000000000000000000b',
12858 
            'mdl_handle' => 3.0009765625,
12859 
            'model_handle' => 3.0009765625,
12860 
            'n_bits' => 16,
12861 
            'ownership' => 1,
12862 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12863 
            'shared_memory_name' => 'register13rd',
12864 
          },
12865 
          'needs_vhdl_wrapper' => 0,
12866 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25',
12867 
        },
12868 
        'entityName' => 'x_x51',
12869 
        'ports' => {
12870 
          'ce' => {
12871 
            'attributes' => {
12872 
              'domain' => '',
12873 
              'group' => 1,
12874 
              'isCe' => 1,
12875 
              'is_floating_block' => 1,
12876 
              'period' => 1,
12877 
              'type' => 'logic',
12878 
            },
12879 
            'direction' => 'in',
12880 
            'hdlType' => 'std_logic',
12881 
            'width' => 1,
12882 
          },
12883 
          'clk' => {
12884 
            'attributes' => {
12885 
              'domain' => '',
12886 
              'group' => 1,
12887 
              'isClk' => 1,
12888 
              'is_floating_block' => 1,
12889 
              'period' => 1,
12890 
              'type' => 'logic',
12891 
            },
12892 
            'direction' => 'in',
12893 
            'hdlType' => 'std_logic',
12894 
            'width' => 1,
12895 
          },
12896 
          'clr' => {
12897 
            'attributes' => {
12898 
              'domain' => '',
12899 
              'group' => 1,
12900 
              'isClr' => 1,
12901 
              'is_floating_block' => 1,
12902 
              'period' => 1,
12903 
              'type' => 'logic',
12904 
              'valid_bit_used' => 0,
12905 
            },
12906 
            'direction' => 'in',
12907 
            'hdlType' => 'std_logic',
12908 
            'width' => 1,
12909 
          },
12910 
          'data_in' => {
12911 
            'attributes' => {
12912 
              'bin_pt' => 0,
12913 
              'is_floating_block' => 1,
12914 
              'must_be_hdl_vector' => 1,
12915 
              'period' => 1,
12916 
              'port_id' => 0,
12917 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/data_in',
12918 
              'type' => 'UFix_32_0',
12919 
            },
12920 
            'direction' => 'in',
12921 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12922 
            'width' => 32,
12923 
          },
12924 
          'dout' => {
12925 
            'attributes' => {
12926 
              'bin_pt' => 0,
12927 
              'is_floating_block' => 1,
12928 
              'must_be_hdl_vector' => 1,
12929 
              'period' => 1,
12930 
              'port_id' => 0,
12931 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/dout',
12932 
              'type' => 'UFix_32_0',
12933 
            },
12934 
            'direction' => 'out',
12935 
            'hdlType' => 'std_logic_vector(31 downto 0)',
12936 
            'width' => 32,
12937 
          },
12938 
          'en' => {
12939 
            'attributes' => {
12940 
              'bin_pt' => 0,
12941 
              'is_floating_block' => 1,
12942 
              'must_be_hdl_vector' => 1,
12943 
              'period' => 1,
12944 
              'port_id' => 1,
12945 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register25/en',
12946 
              'type' => 'Bool',
12947 
            },
12948 
            'direction' => 'in',
12949 
            'hdlType' => 'std_logic_vector(0 downto 0)',
12950 
            'width' => 1,
12951 
          },
12952 
        },
12953 
      },
12954 
      'entityName' => 'x_x51',
12955 
    },
12956 
    'to_register26' => {
12957 
      'connections' => {
12958 
        'ce' => 'sysgen_dut.to_register26_ce',
12959 
        'clk' => 'sysgen_dut.to_register26_clk',
12960 
        'clr' => 'sysgen_dut.to_register26_clr',
12961 
        'data_in' => 'sysgen_dut.to_register26_data_in',
12962 
        'dout' => 'to_register26.dout',
12963 
        'en' => 'sysgen_dut.to_register26_en',
12964 
      },
12965 
      'entity' => {
12966 
        'attributes' => {
12967 
          'entityAlreadyNetlisted' => 1,
12968 
          'generics' => [
12969 
          ],
12970 
          'is_floating_block' => 1,
12971 
          'mask' => {
12972 
            'Block_Handle' => 1000.00012207031,
12973 
            'Block_handle' => 1000.00012207031,
12974 
            'MDL_Handle' => 3.0009765625,
12975 
            'MDL_handle' => 3.0009765625,
12976 
            'arith_type' => 1,
12977 
            'bin_pt' => 14,
12978 
            'block_config' => 'sysgen_blockset:toreg_config',
12979 
            'block_handle' => 1000.00012207031,
12980 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26',
12981 
            'block_type' => 'toreg',
12982 
            'dbl_ovrd' => 0,
12983 
            'explicit_data_type' => 0,
12984 
            'init' => 0,
12985 
            'init_bit_vector' => '0b',
12986 
            'mdl_handle' => 3.0009765625,
12987 
            'model_handle' => 3.0009765625,
12988 
            'n_bits' => 16,
12989 
            'ownership' => 1,
12990 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
12991 
            'shared_memory_name' => 'register14rv',
12992 
          },
12993 
          'needs_vhdl_wrapper' => 0,
12994 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26',
12995 
        },
12996 
        'entityName' => 'x_x52',
12997 
        'ports' => {
12998 
          'ce' => {
12999 
            'attributes' => {
13000 
              'domain' => '',
13001 
              'group' => 1,
13002 
              'isCe' => 1,
13003 
              'is_floating_block' => 1,
13004 
              'period' => 1,
13005 
              'type' => 'logic',
13006 
            },
13007 
            'direction' => 'in',
13008 
            'hdlType' => 'std_logic',
13009 
            'width' => 1,
13010 
          },
13011 
          'clk' => {
13012 
            'attributes' => {
13013 
              'domain' => '',
13014 
              'group' => 1,
13015 
              'isClk' => 1,
13016 
              'is_floating_block' => 1,
13017 
              'period' => 1,
13018 
              'type' => 'logic',
13019 
            },
13020 
            'direction' => 'in',
13021 
            'hdlType' => 'std_logic',
13022 
            'width' => 1,
13023 
          },
13024 
          'clr' => {
13025 
            'attributes' => {
13026 
              'domain' => '',
13027 
              'group' => 1,
13028 
              'isClr' => 1,
13029 
              'is_floating_block' => 1,
13030 
              'period' => 1,
13031 
              'type' => 'logic',
13032 
              'valid_bit_used' => 0,
13033 
            },
13034 
            'direction' => 'in',
13035 
            'hdlType' => 'std_logic',
13036 
            'width' => 1,
13037 
          },
13038 
          'data_in' => {
13039 
            'attributes' => {
13040 
              'bin_pt' => 0,
13041 
              'is_floating_block' => 1,
13042 
              'must_be_hdl_vector' => 1,
13043 
              'period' => 1,
13044 
              'port_id' => 0,
13045 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/data_in',
13046 
              'type' => 'Bool',
13047 
            },
13048 
            'direction' => 'in',
13049 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13050 
            'width' => 1,
13051 
          },
13052 
          'dout' => {
13053 
            'attributes' => {
13054 
              'bin_pt' => 0,
13055 
              'is_floating_block' => 1,
13056 
              'must_be_hdl_vector' => 1,
13057 
              'period' => 1,
13058 
              'port_id' => 0,
13059 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/dout',
13060 
              'type' => 'Bool',
13061 
            },
13062 
            'direction' => 'out',
13063 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13064 
            'width' => 1,
13065 
          },
13066 
          'en' => {
13067 
            'attributes' => {
13068 
              'bin_pt' => 0,
13069 
              'is_floating_block' => 1,
13070 
              'must_be_hdl_vector' => 1,
13071 
              'period' => 1,
13072 
              'port_id' => 1,
13073 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register26/en',
13074 
              'type' => 'Bool',
13075 
            },
13076 
            'direction' => 'in',
13077 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13078 
            'width' => 1,
13079 
          },
13080 
        },
13081 
      },
13082 
      'entityName' => 'x_x52',
13083 
    },
13084 
    'to_register27' => {
13085 
      'connections' => {
13086 
        'ce' => 'sysgen_dut.to_register27_ce',
13087 
        'clk' => 'sysgen_dut.to_register27_clk',
13088 
        'clr' => 'sysgen_dut.to_register27_clr',
13089 
        'data_in' => 'sysgen_dut.to_register27_data_in',
13090 
        'dout' => 'to_register27.dout',
13091 
        'en' => 'sysgen_dut.to_register27_en',
13092 
      },
13093 
      'entity' => {
13094 
        'attributes' => {
13095 
          'entityAlreadyNetlisted' => 1,
13096 
          'generics' => [
13097 
          ],
13098 
          'is_floating_block' => 1,
13099 
          'mask' => {
13100 
            'Block_Handle' => 1001.00012207031,
13101 
            'Block_handle' => 1001.00012207031,
13102 
            'MDL_Handle' => 3.0009765625,
13103 
            'MDL_handle' => 3.0009765625,
13104 
            'arith_type' => 1,
13105 
            'bin_pt' => 14,
13106 
            'block_config' => 'sysgen_blockset:toreg_config',
13107 
            'block_handle' => 1001.00012207031,
13108 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27',
13109 
            'block_type' => 'toreg',
13110 
            'dbl_ovrd' => 0,
13111 
            'explicit_data_type' => 0,
13112 
            'init' => 0,
13113 
            'init_bit_vector' => '00000000000000000000000000000000b',
13114 
            'mdl_handle' => 3.0009765625,
13115 
            'model_handle' => 3.0009765625,
13116 
            'n_bits' => 16,
13117 
            'ownership' => 1,
13118 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13119 
            'shared_memory_name' => 'register14rd',
13120 
          },
13121 
          'needs_vhdl_wrapper' => 0,
13122 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27',
13123 
        },
13124 
        'entityName' => 'x_x53',
13125 
        'ports' => {
13126 
          'ce' => {
13127 
            'attributes' => {
13128 
              'domain' => '',
13129 
              'group' => 1,
13130 
              'isCe' => 1,
13131 
              'is_floating_block' => 1,
13132 
              'period' => 1,
13133 
              'type' => 'logic',
13134 
            },
13135 
            'direction' => 'in',
13136 
            'hdlType' => 'std_logic',
13137 
            'width' => 1,
13138 
          },
13139 
          'clk' => {
13140 
            'attributes' => {
13141 
              'domain' => '',
13142 
              'group' => 1,
13143 
              'isClk' => 1,
13144 
              'is_floating_block' => 1,
13145 
              'period' => 1,
13146 
              'type' => 'logic',
13147 
            },
13148 
            'direction' => 'in',
13149 
            'hdlType' => 'std_logic',
13150 
            'width' => 1,
13151 
          },
13152 
          'clr' => {
13153 
            'attributes' => {
13154 
              'domain' => '',
13155 
              'group' => 1,
13156 
              'isClr' => 1,
13157 
              'is_floating_block' => 1,
13158 
              'period' => 1,
13159 
              'type' => 'logic',
13160 
              'valid_bit_used' => 0,
13161 
            },
13162 
            'direction' => 'in',
13163 
            'hdlType' => 'std_logic',
13164 
            'width' => 1,
13165 
          },
13166 
          'data_in' => {
13167 
            'attributes' => {
13168 
              'bin_pt' => 0,
13169 
              'is_floating_block' => 1,
13170 
              'must_be_hdl_vector' => 1,
13171 
              'period' => 1,
13172 
              'port_id' => 0,
13173 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/data_in',
13174 
              'type' => 'UFix_32_0',
13175 
            },
13176 
            'direction' => 'in',
13177 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13178 
            'width' => 32,
13179 
          },
13180 
          'dout' => {
13181 
            'attributes' => {
13182 
              'bin_pt' => 0,
13183 
              'is_floating_block' => 1,
13184 
              'must_be_hdl_vector' => 1,
13185 
              'period' => 1,
13186 
              'port_id' => 0,
13187 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/dout',
13188 
              'type' => 'UFix_32_0',
13189 
            },
13190 
            'direction' => 'out',
13191 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13192 
            'width' => 32,
13193 
          },
13194 
          'en' => {
13195 
            'attributes' => {
13196 
              'bin_pt' => 0,
13197 
              'is_floating_block' => 1,
13198 
              'must_be_hdl_vector' => 1,
13199 
              'period' => 1,
13200 
              'port_id' => 1,
13201 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register27/en',
13202 
              'type' => 'Bool',
13203 
            },
13204 
            'direction' => 'in',
13205 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13206 
            'width' => 1,
13207 
          },
13208 
        },
13209 
      },
13210 
      'entityName' => 'x_x53',
13211 
    },
13212 
    'to_register3' => {
13213 
      'connections' => {
13214 
        'ce' => 'sysgen_dut.to_register3_ce',
13215 
        'clk' => 'sysgen_dut.to_register3_clk',
13216 
        'clr' => 'sysgen_dut.to_register3_clr',
13217 
        'data_in' => 'sysgen_dut.to_register3_data_in',
13218 
        'dout' => 'to_register3.dout',
13219 
        'en' => 'sysgen_dut.to_register3_en',
13220 
      },
13221 
      'entity' => {
13222 
        'attributes' => {
13223 
          'entityAlreadyNetlisted' => 1,
13224 
          'generics' => [
13225 
          ],
13226 
          'is_floating_block' => 1,
13227 
          'mask' => {
13228 
            'Block_Handle' => 1002.00012207031,
13229 
            'Block_handle' => 1002.00012207031,
13230 
            'MDL_Handle' => 3.0009765625,
13231 
            'MDL_handle' => 3.0009765625,
13232 
            'arith_type' => 1,
13233 
            'bin_pt' => 14,
13234 
            'block_config' => 'sysgen_blockset:toreg_config',
13235 
            'block_handle' => 1002.00012207031,
13236 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3',
13237 
            'block_type' => 'toreg',
13238 
            'dbl_ovrd' => 0,
13239 
            'explicit_data_type' => 0,
13240 
            'init' => 0,
13241 
            'init_bit_vector' => '00000000000000000000000000000000b',
13242 
            'mdl_handle' => 3.0009765625,
13243 
            'model_handle' => 3.0009765625,
13244 
            'n_bits' => 16,
13245 
            'ownership' => 1,
13246 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13247 
            'shared_memory_name' => 'register03rd',
13248 
          },
13249 
          'needs_vhdl_wrapper' => 0,
13250 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3',
13251 
        },
13252 
        'entityName' => 'x_x54',
13253 
        'ports' => {
13254 
          'ce' => {
13255 
            'attributes' => {
13256 
              'domain' => '',
13257 
              'group' => 1,
13258 
              'isCe' => 1,
13259 
              'is_floating_block' => 1,
13260 
              'period' => 1,
13261 
              'type' => 'logic',
13262 
            },
13263 
            'direction' => 'in',
13264 
            'hdlType' => 'std_logic',
13265 
            'width' => 1,
13266 
          },
13267 
          'clk' => {
13268 
            'attributes' => {
13269 
              'domain' => '',
13270 
              'group' => 1,
13271 
              'isClk' => 1,
13272 
              'is_floating_block' => 1,
13273 
              'period' => 1,
13274 
              'type' => 'logic',
13275 
            },
13276 
            'direction' => 'in',
13277 
            'hdlType' => 'std_logic',
13278 
            'width' => 1,
13279 
          },
13280 
          'clr' => {
13281 
            'attributes' => {
13282 
              'domain' => '',
13283 
              'group' => 1,
13284 
              'isClr' => 1,
13285 
              'is_floating_block' => 1,
13286 
              'period' => 1,
13287 
              'type' => 'logic',
13288 
              'valid_bit_used' => 0,
13289 
            },
13290 
            'direction' => 'in',
13291 
            'hdlType' => 'std_logic',
13292 
            'width' => 1,
13293 
          },
13294 
          'data_in' => {
13295 
            'attributes' => {
13296 
              'bin_pt' => 0,
13297 
              'is_floating_block' => 1,
13298 
              'must_be_hdl_vector' => 1,
13299 
              'period' => 1,
13300 
              'port_id' => 0,
13301 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/data_in',
13302 
              'type' => 'UFix_32_0',
13303 
            },
13304 
            'direction' => 'in',
13305 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13306 
            'width' => 32,
13307 
          },
13308 
          'dout' => {
13309 
            'attributes' => {
13310 
              'bin_pt' => 0,
13311 
              'is_floating_block' => 1,
13312 
              'must_be_hdl_vector' => 1,
13313 
              'period' => 1,
13314 
              'port_id' => 0,
13315 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/dout',
13316 
              'type' => 'UFix_32_0',
13317 
            },
13318 
            'direction' => 'out',
13319 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13320 
            'width' => 32,
13321 
          },
13322 
          'en' => {
13323 
            'attributes' => {
13324 
              'bin_pt' => 0,
13325 
              'is_floating_block' => 1,
13326 
              'must_be_hdl_vector' => 1,
13327 
              'period' => 1,
13328 
              'port_id' => 1,
13329 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register3/en',
13330 
              'type' => 'Bool',
13331 
            },
13332 
            'direction' => 'in',
13333 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13334 
            'width' => 1,
13335 
          },
13336 
        },
13337 
      },
13338 
      'entityName' => 'x_x54',
13339 
    },
13340 
    'to_register4' => {
13341 
      'connections' => {
13342 
        'ce' => 'sysgen_dut.to_register4_ce',
13343 
        'clk' => 'sysgen_dut.to_register4_clk',
13344 
        'clr' => 'sysgen_dut.to_register4_clr',
13345 
        'data_in' => 'sysgen_dut.to_register4_data_in',
13346 
        'dout' => 'to_register4.dout',
13347 
        'en' => 'sysgen_dut.to_register4_en',
13348 
      },
13349 
      'entity' => {
13350 
        'attributes' => {
13351 
          'entityAlreadyNetlisted' => 1,
13352 
          'generics' => [
13353 
          ],
13354 
          'is_floating_block' => 1,
13355 
          'mask' => {
13356 
            'Block_Handle' => 1003.00012207031,
13357 
            'Block_handle' => 1003.00012207031,
13358 
            'MDL_Handle' => 3.0009765625,
13359 
            'MDL_handle' => 3.0009765625,
13360 
            'arith_type' => 1,
13361 
            'bin_pt' => 14,
13362 
            'block_config' => 'sysgen_blockset:toreg_config',
13363 
            'block_handle' => 1003.00012207031,
13364 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4',
13365 
            'block_type' => 'toreg',
13366 
            'dbl_ovrd' => 0,
13367 
            'explicit_data_type' => 0,
13368 
            'init' => 0,
13369 
            'init_bit_vector' => '0b',
13370 
            'mdl_handle' => 3.0009765625,
13371 
            'model_handle' => 3.0009765625,
13372 
            'n_bits' => 16,
13373 
            'ownership' => 1,
13374 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13375 
            'shared_memory_name' => 'register02rv',
13376 
          },
13377 
          'needs_vhdl_wrapper' => 0,
13378 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4',
13379 
        },
13380 
        'entityName' => 'x_x55',
13381 
        'ports' => {
13382 
          'ce' => {
13383 
            'attributes' => {
13384 
              'domain' => '',
13385 
              'group' => 1,
13386 
              'isCe' => 1,
13387 
              'is_floating_block' => 1,
13388 
              'period' => 1,
13389 
              'type' => 'logic',
13390 
            },
13391 
            'direction' => 'in',
13392 
            'hdlType' => 'std_logic',
13393 
            'width' => 1,
13394 
          },
13395 
          'clk' => {
13396 
            'attributes' => {
13397 
              'domain' => '',
13398 
              'group' => 1,
13399 
              'isClk' => 1,
13400 
              'is_floating_block' => 1,
13401 
              'period' => 1,
13402 
              'type' => 'logic',
13403 
            },
13404 
            'direction' => 'in',
13405 
            'hdlType' => 'std_logic',
13406 
            'width' => 1,
13407 
          },
13408 
          'clr' => {
13409 
            'attributes' => {
13410 
              'domain' => '',
13411 
              'group' => 1,
13412 
              'isClr' => 1,
13413 
              'is_floating_block' => 1,
13414 
              'period' => 1,
13415 
              'type' => 'logic',
13416 
              'valid_bit_used' => 0,
13417 
            },
13418 
            'direction' => 'in',
13419 
            'hdlType' => 'std_logic',
13420 
            'width' => 1,
13421 
          },
13422 
          'data_in' => {
13423 
            'attributes' => {
13424 
              'bin_pt' => 0,
13425 
              'is_floating_block' => 1,
13426 
              'must_be_hdl_vector' => 1,
13427 
              'period' => 1,
13428 
              'port_id' => 0,
13429 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/data_in',
13430 
              'type' => 'Bool',
13431 
            },
13432 
            'direction' => 'in',
13433 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13434 
            'width' => 1,
13435 
          },
13436 
          'dout' => {
13437 
            'attributes' => {
13438 
              'bin_pt' => 0,
13439 
              'is_floating_block' => 1,
13440 
              'must_be_hdl_vector' => 1,
13441 
              'period' => 1,
13442 
              'port_id' => 0,
13443 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/dout',
13444 
              'type' => 'Bool',
13445 
            },
13446 
            'direction' => 'out',
13447 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13448 
            'width' => 1,
13449 
          },
13450 
          'en' => {
13451 
            'attributes' => {
13452 
              'bin_pt' => 0,
13453 
              'is_floating_block' => 1,
13454 
              'must_be_hdl_vector' => 1,
13455 
              'period' => 1,
13456 
              'port_id' => 1,
13457 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register4/en',
13458 
              'type' => 'Bool',
13459 
            },
13460 
            'direction' => 'in',
13461 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13462 
            'width' => 1,
13463 
          },
13464 
        },
13465 
      },
13466 
      'entityName' => 'x_x55',
13467 
    },
13468 
    'to_register5' => {
13469 
      'connections' => {
13470 
        'ce' => 'sysgen_dut.to_register5_ce',
13471 
        'clk' => 'sysgen_dut.to_register5_clk',
13472 
        'clr' => 'sysgen_dut.to_register5_clr',
13473 
        'data_in' => 'sysgen_dut.to_register5_data_in',
13474 
        'dout' => 'to_register5.dout',
13475 
        'en' => 'sysgen_dut.to_register5_en',
13476 
      },
13477 
      'entity' => {
13478 
        'attributes' => {
13479 
          'entityAlreadyNetlisted' => 1,
13480 
          'generics' => [
13481 
          ],
13482 
          'is_floating_block' => 1,
13483 
          'mask' => {
13484 
            'Block_Handle' => 1004.00012207031,
13485 
            'Block_handle' => 1004.00012207031,
13486 
            'MDL_Handle' => 3.0009765625,
13487 
            'MDL_handle' => 3.0009765625,
13488 
            'arith_type' => 1,
13489 
            'bin_pt' => 14,
13490 
            'block_config' => 'sysgen_blockset:toreg_config',
13491 
            'block_handle' => 1004.00012207031,
13492 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5',
13493 
            'block_type' => 'toreg',
13494 
            'dbl_ovrd' => 0,
13495 
            'explicit_data_type' => 0,
13496 
            'init' => 0,
13497 
            'init_bit_vector' => '0b',
13498 
            'mdl_handle' => 3.0009765625,
13499 
            'model_handle' => 3.0009765625,
13500 
            'n_bits' => 16,
13501 
            'ownership' => 1,
13502 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13503 
            'shared_memory_name' => 'register03rv',
13504 
          },
13505 
          'needs_vhdl_wrapper' => 0,
13506 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5',
13507 
        },
13508 
        'entityName' => 'x_x56',
13509 
        'ports' => {
13510 
          'ce' => {
13511 
            'attributes' => {
13512 
              'domain' => '',
13513 
              'group' => 1,
13514 
              'isCe' => 1,
13515 
              'is_floating_block' => 1,
13516 
              'period' => 1,
13517 
              'type' => 'logic',
13518 
            },
13519 
            'direction' => 'in',
13520 
            'hdlType' => 'std_logic',
13521 
            'width' => 1,
13522 
          },
13523 
          'clk' => {
13524 
            'attributes' => {
13525 
              'domain' => '',
13526 
              'group' => 1,
13527 
              'isClk' => 1,
13528 
              'is_floating_block' => 1,
13529 
              'period' => 1,
13530 
              'type' => 'logic',
13531 
            },
13532 
            'direction' => 'in',
13533 
            'hdlType' => 'std_logic',
13534 
            'width' => 1,
13535 
          },
13536 
          'clr' => {
13537 
            'attributes' => {
13538 
              'domain' => '',
13539 
              'group' => 1,
13540 
              'isClr' => 1,
13541 
              'is_floating_block' => 1,
13542 
              'period' => 1,
13543 
              'type' => 'logic',
13544 
              'valid_bit_used' => 0,
13545 
            },
13546 
            'direction' => 'in',
13547 
            'hdlType' => 'std_logic',
13548 
            'width' => 1,
13549 
          },
13550 
          'data_in' => {
13551 
            'attributes' => {
13552 
              'bin_pt' => 0,
13553 
              'is_floating_block' => 1,
13554 
              'must_be_hdl_vector' => 1,
13555 
              'period' => 1,
13556 
              'port_id' => 0,
13557 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/data_in',
13558 
              'type' => 'Bool',
13559 
            },
13560 
            'direction' => 'in',
13561 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13562 
            'width' => 1,
13563 
          },
13564 
          'dout' => {
13565 
            'attributes' => {
13566 
              'bin_pt' => 0,
13567 
              'is_floating_block' => 1,
13568 
              'must_be_hdl_vector' => 1,
13569 
              'period' => 1,
13570 
              'port_id' => 0,
13571 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/dout',
13572 
              'type' => 'Bool',
13573 
            },
13574 
            'direction' => 'out',
13575 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13576 
            'width' => 1,
13577 
          },
13578 
          'en' => {
13579 
            'attributes' => {
13580 
              'bin_pt' => 0,
13581 
              'is_floating_block' => 1,
13582 
              'must_be_hdl_vector' => 1,
13583 
              'period' => 1,
13584 
              'port_id' => 1,
13585 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register5/en',
13586 
              'type' => 'Bool',
13587 
            },
13588 
            'direction' => 'in',
13589 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13590 
            'width' => 1,
13591 
          },
13592 
        },
13593 
      },
13594 
      'entityName' => 'x_x56',
13595 
    },
13596 
    'to_register6' => {
13597 
      'connections' => {
13598 
        'ce' => 'sysgen_dut.to_register6_ce',
13599 
        'clk' => 'sysgen_dut.to_register6_clk',
13600 
        'clr' => 'sysgen_dut.to_register6_clr',
13601 
        'data_in' => 'sysgen_dut.to_register6_data_in',
13602 
        'dout' => 'to_register6.dout',
13603 
        'en' => 'sysgen_dut.to_register6_en',
13604 
      },
13605 
      'entity' => {
13606 
        'attributes' => {
13607 
          'entityAlreadyNetlisted' => 1,
13608 
          'generics' => [
13609 
          ],
13610 
          'is_floating_block' => 1,
13611 
          'mask' => {
13612 
            'Block_Handle' => 1005.00012207031,
13613 
            'Block_handle' => 1005.00012207031,
13614 
            'MDL_Handle' => 3.0009765625,
13615 
            'MDL_handle' => 3.0009765625,
13616 
            'arith_type' => 1,
13617 
            'bin_pt' => 14,
13618 
            'block_config' => 'sysgen_blockset:toreg_config',
13619 
            'block_handle' => 1005.00012207031,
13620 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6',
13621 
            'block_type' => 'toreg',
13622 
            'dbl_ovrd' => 0,
13623 
            'explicit_data_type' => 0,
13624 
            'init' => 0,
13625 
            'init_bit_vector' => '00000000000000000000000000000000b',
13626 
            'mdl_handle' => 3.0009765625,
13627 
            'model_handle' => 3.0009765625,
13628 
            'n_bits' => 16,
13629 
            'ownership' => 1,
13630 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13631 
            'shared_memory_name' => 'register04rd',
13632 
          },
13633 
          'needs_vhdl_wrapper' => 0,
13634 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6',
13635 
        },
13636 
        'entityName' => 'x_x57',
13637 
        'ports' => {
13638 
          'ce' => {
13639 
            'attributes' => {
13640 
              'domain' => '',
13641 
              'group' => 1,
13642 
              'isCe' => 1,
13643 
              'is_floating_block' => 1,
13644 
              'period' => 1,
13645 
              'type' => 'logic',
13646 
            },
13647 
            'direction' => 'in',
13648 
            'hdlType' => 'std_logic',
13649 
            'width' => 1,
13650 
          },
13651 
          'clk' => {
13652 
            'attributes' => {
13653 
              'domain' => '',
13654 
              'group' => 1,
13655 
              'isClk' => 1,
13656 
              'is_floating_block' => 1,
13657 
              'period' => 1,
13658 
              'type' => 'logic',
13659 
            },
13660 
            'direction' => 'in',
13661 
            'hdlType' => 'std_logic',
13662 
            'width' => 1,
13663 
          },
13664 
          'clr' => {
13665 
            'attributes' => {
13666 
              'domain' => '',
13667 
              'group' => 1,
13668 
              'isClr' => 1,
13669 
              'is_floating_block' => 1,
13670 
              'period' => 1,
13671 
              'type' => 'logic',
13672 
              'valid_bit_used' => 0,
13673 
            },
13674 
            'direction' => 'in',
13675 
            'hdlType' => 'std_logic',
13676 
            'width' => 1,
13677 
          },
13678 
          'data_in' => {
13679 
            'attributes' => {
13680 
              'bin_pt' => 0,
13681 
              'is_floating_block' => 1,
13682 
              'must_be_hdl_vector' => 1,
13683 
              'period' => 1,
13684 
              'port_id' => 0,
13685 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/data_in',
13686 
              'type' => 'UFix_32_0',
13687 
            },
13688 
            'direction' => 'in',
13689 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13690 
            'width' => 32,
13691 
          },
13692 
          'dout' => {
13693 
            'attributes' => {
13694 
              'bin_pt' => 0,
13695 
              'is_floating_block' => 1,
13696 
              'must_be_hdl_vector' => 1,
13697 
              'period' => 1,
13698 
              'port_id' => 0,
13699 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/dout',
13700 
              'type' => 'UFix_32_0',
13701 
            },
13702 
            'direction' => 'out',
13703 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13704 
            'width' => 32,
13705 
          },
13706 
          'en' => {
13707 
            'attributes' => {
13708 
              'bin_pt' => 0,
13709 
              'is_floating_block' => 1,
13710 
              'must_be_hdl_vector' => 1,
13711 
              'period' => 1,
13712 
              'port_id' => 1,
13713 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register6/en',
13714 
              'type' => 'Bool',
13715 
            },
13716 
            'direction' => 'in',
13717 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13718 
            'width' => 1,
13719 
          },
13720 
        },
13721 
      },
13722 
      'entityName' => 'x_x57',
13723 
    },
13724 
    'to_register7' => {
13725 
      'connections' => {
13726 
        'ce' => 'sysgen_dut.to_register7_ce',
13727 
        'clk' => 'sysgen_dut.to_register7_clk',
13728 
        'clr' => 'sysgen_dut.to_register7_clr',
13729 
        'data_in' => 'sysgen_dut.to_register7_data_in',
13730 
        'dout' => 'to_register7.dout',
13731 
        'en' => 'sysgen_dut.to_register7_en',
13732 
      },
13733 
      'entity' => {
13734 
        'attributes' => {
13735 
          'entityAlreadyNetlisted' => 1,
13736 
          'generics' => [
13737 
          ],
13738 
          'is_floating_block' => 1,
13739 
          'mask' => {
13740 
            'Block_Handle' => 1006.00012207031,
13741 
            'Block_handle' => 1006.00012207031,
13742 
            'MDL_Handle' => 3.0009765625,
13743 
            'MDL_handle' => 3.0009765625,
13744 
            'arith_type' => 1,
13745 
            'bin_pt' => 14,
13746 
            'block_config' => 'sysgen_blockset:toreg_config',
13747 
            'block_handle' => 1006.00012207031,
13748 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7',
13749 
            'block_type' => 'toreg',
13750 
            'dbl_ovrd' => 0,
13751 
            'explicit_data_type' => 0,
13752 
            'init' => 0,
13753 
            'init_bit_vector' => '0b',
13754 
            'mdl_handle' => 3.0009765625,
13755 
            'model_handle' => 3.0009765625,
13756 
            'n_bits' => 16,
13757 
            'ownership' => 1,
13758 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13759 
            'shared_memory_name' => 'register04rv',
13760 
          },
13761 
          'needs_vhdl_wrapper' => 0,
13762 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7',
13763 
        },
13764 
        'entityName' => 'x_x58',
13765 
        'ports' => {
13766 
          'ce' => {
13767 
            'attributes' => {
13768 
              'domain' => '',
13769 
              'group' => 1,
13770 
              'isCe' => 1,
13771 
              'is_floating_block' => 1,
13772 
              'period' => 1,
13773 
              'type' => 'logic',
13774 
            },
13775 
            'direction' => 'in',
13776 
            'hdlType' => 'std_logic',
13777 
            'width' => 1,
13778 
          },
13779 
          'clk' => {
13780 
            'attributes' => {
13781 
              'domain' => '',
13782 
              'group' => 1,
13783 
              'isClk' => 1,
13784 
              'is_floating_block' => 1,
13785 
              'period' => 1,
13786 
              'type' => 'logic',
13787 
            },
13788 
            'direction' => 'in',
13789 
            'hdlType' => 'std_logic',
13790 
            'width' => 1,
13791 
          },
13792 
          'clr' => {
13793 
            'attributes' => {
13794 
              'domain' => '',
13795 
              'group' => 1,
13796 
              'isClr' => 1,
13797 
              'is_floating_block' => 1,
13798 
              'period' => 1,
13799 
              'type' => 'logic',
13800 
              'valid_bit_used' => 0,
13801 
            },
13802 
            'direction' => 'in',
13803 
            'hdlType' => 'std_logic',
13804 
            'width' => 1,
13805 
          },
13806 
          'data_in' => {
13807 
            'attributes' => {
13808 
              'bin_pt' => 0,
13809 
              'is_floating_block' => 1,
13810 
              'must_be_hdl_vector' => 1,
13811 
              'period' => 1,
13812 
              'port_id' => 0,
13813 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/data_in',
13814 
              'type' => 'Bool',
13815 
            },
13816 
            'direction' => 'in',
13817 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13818 
            'width' => 1,
13819 
          },
13820 
          'dout' => {
13821 
            'attributes' => {
13822 
              'bin_pt' => 0,
13823 
              'is_floating_block' => 1,
13824 
              'must_be_hdl_vector' => 1,
13825 
              'period' => 1,
13826 
              'port_id' => 0,
13827 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/dout',
13828 
              'type' => 'Bool',
13829 
            },
13830 
            'direction' => 'out',
13831 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13832 
            'width' => 1,
13833 
          },
13834 
          'en' => {
13835 
            'attributes' => {
13836 
              'bin_pt' => 0,
13837 
              'is_floating_block' => 1,
13838 
              'must_be_hdl_vector' => 1,
13839 
              'period' => 1,
13840 
              'port_id' => 1,
13841 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register7/en',
13842 
              'type' => 'Bool',
13843 
            },
13844 
            'direction' => 'in',
13845 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13846 
            'width' => 1,
13847 
          },
13848 
        },
13849 
      },
13850 
      'entityName' => 'x_x58',
13851 
    },
13852 
    'to_register8' => {
13853 
      'connections' => {
13854 
        'ce' => 'sysgen_dut.to_register8_ce',
13855 
        'clk' => 'sysgen_dut.to_register8_clk',
13856 
        'clr' => 'sysgen_dut.to_register8_clr',
13857 
        'data_in' => 'sysgen_dut.to_register8_data_in',
13858 
        'dout' => 'to_register8.dout',
13859 
        'en' => 'sysgen_dut.to_register8_en',
13860 
      },
13861 
      'entity' => {
13862 
        'attributes' => {
13863 
          'entityAlreadyNetlisted' => 1,
13864 
          'generics' => [
13865 
          ],
13866 
          'is_floating_block' => 1,
13867 
          'mask' => {
13868 
            'Block_Handle' => 1007.00012207031,
13869 
            'Block_handle' => 1007.00012207031,
13870 
            'MDL_Handle' => 3.0009765625,
13871 
            'MDL_handle' => 3.0009765625,
13872 
            'arith_type' => 1,
13873 
            'bin_pt' => 14,
13874 
            'block_config' => 'sysgen_blockset:toreg_config',
13875 
            'block_handle' => 1007.00012207031,
13876 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8',
13877 
            'block_type' => 'toreg',
13878 
            'dbl_ovrd' => 0,
13879 
            'explicit_data_type' => 0,
13880 
            'init' => 0,
13881 
            'init_bit_vector' => '00000000000000000000000000000000b',
13882 
            'mdl_handle' => 3.0009765625,
13883 
            'model_handle' => 3.0009765625,
13884 
            'n_bits' => 16,
13885 
            'ownership' => 1,
13886 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
13887 
            'shared_memory_name' => 'register05rd',
13888 
          },
13889 
          'needs_vhdl_wrapper' => 0,
13890 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8',
13891 
        },
13892 
        'entityName' => 'x_x59',
13893 
        'ports' => {
13894 
          'ce' => {
13895 
            'attributes' => {
13896 
              'domain' => '',
13897 
              'group' => 1,
13898 
              'isCe' => 1,
13899 
              'is_floating_block' => 1,
13900 
              'period' => 1,
13901 
              'type' => 'logic',
13902 
            },
13903 
            'direction' => 'in',
13904 
            'hdlType' => 'std_logic',
13905 
            'width' => 1,
13906 
          },
13907 
          'clk' => {
13908 
            'attributes' => {
13909 
              'domain' => '',
13910 
              'group' => 1,
13911 
              'isClk' => 1,
13912 
              'is_floating_block' => 1,
13913 
              'period' => 1,
13914 
              'type' => 'logic',
13915 
            },
13916 
            'direction' => 'in',
13917 
            'hdlType' => 'std_logic',
13918 
            'width' => 1,
13919 
          },
13920 
          'clr' => {
13921 
            'attributes' => {
13922 
              'domain' => '',
13923 
              'group' => 1,
13924 
              'isClr' => 1,
13925 
              'is_floating_block' => 1,
13926 
              'period' => 1,
13927 
              'type' => 'logic',
13928 
              'valid_bit_used' => 0,
13929 
            },
13930 
            'direction' => 'in',
13931 
            'hdlType' => 'std_logic',
13932 
            'width' => 1,
13933 
          },
13934 
          'data_in' => {
13935 
            'attributes' => {
13936 
              'bin_pt' => 0,
13937 
              'is_floating_block' => 1,
13938 
              'must_be_hdl_vector' => 1,
13939 
              'period' => 1,
13940 
              'port_id' => 0,
13941 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/data_in',
13942 
              'type' => 'UFix_32_0',
13943 
            },
13944 
            'direction' => 'in',
13945 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13946 
            'width' => 32,
13947 
          },
13948 
          'dout' => {
13949 
            'attributes' => {
13950 
              'bin_pt' => 0,
13951 
              'is_floating_block' => 1,
13952 
              'must_be_hdl_vector' => 1,
13953 
              'period' => 1,
13954 
              'port_id' => 0,
13955 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/dout',
13956 
              'type' => 'UFix_32_0',
13957 
            },
13958 
            'direction' => 'out',
13959 
            'hdlType' => 'std_logic_vector(31 downto 0)',
13960 
            'width' => 32,
13961 
          },
13962 
          'en' => {
13963 
            'attributes' => {
13964 
              'bin_pt' => 0,
13965 
              'is_floating_block' => 1,
13966 
              'must_be_hdl_vector' => 1,
13967 
              'period' => 1,
13968 
              'port_id' => 1,
13969 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register8/en',
13970 
              'type' => 'Bool',
13971 
            },
13972 
            'direction' => 'in',
13973 
            'hdlType' => 'std_logic_vector(0 downto 0)',
13974 
            'width' => 1,
13975 
          },
13976 
        },
13977 
      },
13978 
      'entityName' => 'x_x59',
13979 
    },
13980 
    'to_register9' => {
13981 
      'connections' => {
13982 
        'ce' => 'sysgen_dut.to_register9_ce',
13983 
        'clk' => 'sysgen_dut.to_register9_clk',
13984 
        'clr' => 'sysgen_dut.to_register9_clr',
13985 
        'data_in' => 'sysgen_dut.to_register9_data_in',
13986 
        'dout' => 'to_register9.dout',
13987 
        'en' => 'sysgen_dut.to_register9_en',
13988 
      },
13989 
      'entity' => {
13990 
        'attributes' => {
13991 
          'entityAlreadyNetlisted' => 1,
13992 
          'generics' => [
13993 
          ],
13994 
          'is_floating_block' => 1,
13995 
          'mask' => {
13996 
            'Block_Handle' => 1008.00012207031,
13997 
            'Block_handle' => 1008.00012207031,
13998 
            'MDL_Handle' => 3.0009765625,
13999 
            'MDL_handle' => 3.0009765625,
14000 
            'arith_type' => 1,
14001 
            'bin_pt' => 14,
14002 
            'block_config' => 'sysgen_blockset:toreg_config',
14003 
            'block_handle' => 1008.00012207031,
14004 
            'block_name' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9',
14005 
            'block_type' => 'toreg',
14006 
            'dbl_ovrd' => 0,
14007 
            'explicit_data_type' => 0,
14008 
            'init' => 0,
14009 
            'init_bit_vector' => '00000000000000000000000000000000b',
14010 
            'mdl_handle' => 3.0009765625,
14011 
            'model_handle' => 3.0009765625,
14012 
            'n_bits' => 16,
14013 
            'ownership' => 1,
14014 
            'sg_icon_stat' => '60,33,2,1,white,blue,0,10ab453e,right,,[ ],[ ]',
14015 
            'shared_memory_name' => 'register06rd',
14016 
          },
14017 
          'needs_vhdl_wrapper' => 0,
14018 
          'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9',
14019 
        },
14020 
        'entityName' => 'x_x60',
14021 
        'ports' => {
14022 
          'ce' => {
14023 
            'attributes' => {
14024 
              'domain' => '',
14025 
              'group' => 1,
14026 
              'isCe' => 1,
14027 
              'is_floating_block' => 1,
14028 
              'period' => 1,
14029 
              'type' => 'logic',
14030 
            },
14031 
            'direction' => 'in',
14032 
            'hdlType' => 'std_logic',
14033 
            'width' => 1,
14034 
          },
14035 
          'clk' => {
14036 
            'attributes' => {
14037 
              'domain' => '',
14038 
              'group' => 1,
14039 
              'isClk' => 1,
14040 
              'is_floating_block' => 1,
14041 
              'period' => 1,
14042 
              'type' => 'logic',
14043 
            },
14044 
            'direction' => 'in',
14045 
            'hdlType' => 'std_logic',
14046 
            'width' => 1,
14047 
          },
14048 
          'clr' => {
14049 
            'attributes' => {
14050 
              'domain' => '',
14051 
              'group' => 1,
14052 
              'isClr' => 1,
14053 
              'is_floating_block' => 1,
14054 
              'period' => 1,
14055 
              'type' => 'logic',
14056 
              'valid_bit_used' => 0,
14057 
            },
14058 
            'direction' => 'in',
14059 
            'hdlType' => 'std_logic',
14060 
            'width' => 1,
14061 
          },
14062 
          'data_in' => {
14063 
            'attributes' => {
14064 
              'bin_pt' => 0,
14065 
              'is_floating_block' => 1,
14066 
              'must_be_hdl_vector' => 1,
14067 
              'period' => 1,
14068 
              'port_id' => 0,
14069 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/data_in',
14070 
              'type' => 'UFix_32_0',
14071 
            },
14072 
            'direction' => 'in',
14073 
            'hdlType' => 'std_logic_vector(31 downto 0)',
14074 
            'width' => 32,
14075 
          },
14076 
          'dout' => {
14077 
            'attributes' => {
14078 
              'bin_pt' => 0,
14079 
              'is_floating_block' => 1,
14080 
              'must_be_hdl_vector' => 1,
14081 
              'period' => 1,
14082 
              'port_id' => 0,
14083 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/dout',
14084 
              'type' => 'UFix_32_0',
14085 
            },
14086 
            'direction' => 'out',
14087 
            'hdlType' => 'std_logic_vector(31 downto 0)',
14088 
            'width' => 32,
14089 
          },
14090 
          'en' => {
14091 
            'attributes' => {
14092 
              'bin_pt' => 0,
14093 
              'is_floating_block' => 1,
14094 
              'must_be_hdl_vector' => 1,
14095 
              'period' => 1,
14096 
              'port_id' => 1,
14097 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/To Register9/en',
14098 
              'type' => 'Bool',
14099 
            },
14100 
            'direction' => 'in',
14101 
            'hdlType' => 'std_logic_vector(0 downto 0)',
14102 
            'width' => 1,
14103 
          },
14104 
        },
14105 
      },
14106 
      'entityName' => 'x_x60',
14107 
    },
14108 
    'user_int_1o' => {
14109 
      'connections' => {
14110 
        'user_int_1o' => 'sysgen_dut.user_int_1o',
14111 
      },
14112 
      'entity' => {
14113 
        'attributes' => {
14114 
          'entityAlreadyNetlisted' => 1,
14115 
          'isGateway' => 1,
14116 
          'is_floating_block' => 1,
14117 
        },
14118 
        'entityName' => 'user_int_1o',
14119 
        'ports' => {
14120 
          'user_int_1o' => {
14121 
            'attributes' => {
14122 
              'bin_pt' => 0,
14123 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_1o.dat',
14124 
              'is_floating_block' => 1,
14125 
              'is_gateway_port' => 1,
14126 
              'must_be_hdl_vector' => 1,
14127 
              'period' => 1,
14128 
              'port_id' => 0,
14129 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o/user_int_1o',
14130 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_1o',
14131 
              'timingConstraint' => 'none',
14132 
              'type' => 'Bool',
14133 
            },
14134 
            'direction' => 'in',
14135 
            'hdlType' => 'std_logic',
14136 
            'width' => 1,
14137 
          },
14138 
        },
14139 
      },
14140 
      'entityName' => 'user_int_1o',
14141 
    },
14142 
    'user_int_2o' => {
14143 
      'connections' => {
14144 
        'user_int_2o' => 'sysgen_dut.user_int_2o',
14145 
      },
14146 
      'entity' => {
14147 
        'attributes' => {
14148 
          'entityAlreadyNetlisted' => 1,
14149 
          'isGateway' => 1,
14150 
          'is_floating_block' => 1,
14151 
        },
14152 
        'entityName' => 'user_int_2o',
14153 
        'ports' => {
14154 
          'user_int_2o' => {
14155 
            'attributes' => {
14156 
              'bin_pt' => 0,
14157 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_2o.dat',
14158 
              'is_floating_block' => 1,
14159 
              'is_gateway_port' => 1,
14160 
              'must_be_hdl_vector' => 1,
14161 
              'period' => 1,
14162 
              'port_id' => 0,
14163 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o/user_int_2o',
14164 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_2o',
14165 
              'timingConstraint' => 'none',
14166 
              'type' => 'Bool',
14167 
            },
14168 
            'direction' => 'in',
14169 
            'hdlType' => 'std_logic',
14170 
            'width' => 1,
14171 
          },
14172 
        },
14173 
      },
14174 
      'entityName' => 'user_int_2o',
14175 
    },
14176 
    'user_int_3o' => {
14177 
      'connections' => {
14178 
        'user_int_3o' => 'sysgen_dut.user_int_3o',
14179 
      },
14180 
      'entity' => {
14181 
        'attributes' => {
14182 
          'entityAlreadyNetlisted' => 1,
14183 
          'isGateway' => 1,
14184 
          'is_floating_block' => 1,
14185 
        },
14186 
        'entityName' => 'user_int_3o',
14187 
        'ports' => {
14188 
          'user_int_3o' => {
14189 
            'attributes' => {
14190 
              'bin_pt' => 0,
14191 
              'inputFile' => 'pcie_userlogic_00_user_logic_user_int_3o.dat',
14192 
              'is_floating_block' => 1,
14193 
              'is_gateway_port' => 1,
14194 
              'must_be_hdl_vector' => 1,
14195 
              'period' => 1,
14196 
              'port_id' => 0,
14197 
              'simulinkName' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o/user_int_3o',
14198 
              'source_block' => 'PCIe_UserLogic_00/USER_LOGIC/user_int_3o',
14199 
              'timingConstraint' => 'none',
14200 
              'type' => 'Bool',
14201 
            },
14202 
            'direction' => 'in',
14203 
            'hdlType' => 'std_logic',
14204 
            'width' => 1,
14205 
          },
14206 
        },
14207 
      },
14208 
      'entityName' => 'user_int_3o',
14209 
    },
14210 
  },
14211 
}

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