| 1 |
11 |
barabba |
SET_PARAMETER port_b_write_rate 50
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| 2 |
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SET_PARAMETER register_portb_output_of_memory_primitives true
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| 3 |
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SET_PARAMETER write_depth_a 4096
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| 4 |
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SET_PARAMETER interface_type Native
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| 5 |
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SET_PARAMETER operating_mode_a WRITE_FIRST
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| 6 |
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SET_PARAMETER additional_inputs_for_power_estimation false
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| 7 |
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SET_PARAMETER operating_mode_b WRITE_FIRST
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| 8 |
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SET_PARAMETER softecc false
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| 9 |
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SET_PARAMETER register_porta_input_of_softecc false
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| 10 |
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SET_PARAMETER write_width_a 64
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| 11 |
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SET_PARAMETER write_width_b 64
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| 12 |
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SET_PARAMETER ecc false
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| 13 |
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SET_PARAMETER use_regcea_pin false
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| 14 |
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SET_PARAMETER primitive 8kx2
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| 15 |
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SET_PARAMETER memory_type True_Dual_Port_RAM
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| 16 |
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SET_PARAMETER use_rsta_pin false
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| 17 |
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SET_PARAMETER axi_slave_type Memory_Slave
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| 18 |
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SET_PARAMETER byte_size 8
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| 19 |
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SET_PARAMETER disable_out_of_range_warnings false
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| 20 |
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SET_PARAMETER pipeline_stages 0
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| 21 |
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SET_PARAMETER use_regceb_pin false
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| 22 |
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SET_PARAMETER remaining_memory_locations 0
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| 23 |
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SET_PARAMETER reset_memory_latch_a false
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| 24 |
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SET_PARAMETER reset_memory_latch_b false
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| 25 |
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SET_PARAMETER use_byte_write_enable true
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| 26 |
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SET_PARAMETER enable_a Always_Enabled
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| 27 |
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SET_PARAMETER enable_b Always_Enabled
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| 28 |
|
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SET_PARAMETER port_a_enable_rate 100
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| 29 |
|
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SET_PARAMETER use_axi_id false
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| 30 |
|
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SET_PARAMETER use_rstb_pin false
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| 31 |
|
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SET_PARAMETER register_porta_output_of_memory_core false
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| 32 |
|
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SET_PARAMETER component_name v6_bram4096x64
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| 33 |
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SET_PARAMETER assume_synchronous_clk false
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| 34 |
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SET_PARAMETER disable_collision_warnings false
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| 35 |
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SET_PARAMETER port_a_write_rate 50
|
| 36 |
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SET_PARAMETER axi_id_width 4
|
| 37 |
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SET_PARAMETER algorithm Minimum_Area
|
| 38 |
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SET_PARAMETER fill_remaining_memory_locations false
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| 39 |
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SET_PARAMETER ecctype No_ECC
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| 40 |
|
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SET_PARAMETER port_b_clock 100
|
| 41 |
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SET_PARAMETER use_error_injection_pins false
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| 42 |
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SET_PARAMETER port_a_clock 100
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| 43 |
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SET_PARAMETER read_width_a 64
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| 44 |
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SET_PARAMETER read_width_b 64
|
| 45 |
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SET_PARAMETER reset_type SYNC
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| 46 |
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SET_PARAMETER register_porta_output_of_memory_primitives false
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| 47 |
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SET_PARAMETER register_portb_output_of_softecc false
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| 48 |
|
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SET_PARAMETER port_b_enable_rate 100
|
| 49 |
|
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SET_PARAMETER output_reset_value_a 0
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| 50 |
|
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SET_PARAMETER output_reset_value_b 0
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| 51 |
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SET_PARAMETER register_portb_output_of_memory_core false
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| 52 |
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SET_PARAMETER load_init_file false
|
| 53 |
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SET_PARAMETER coe_file no_coe_file_loaded
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| 54 |
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SET_PARAMETER error_injection_type Single_Bit_Error_Injection
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| 55 |
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SET_PARAMETER axi_type AXI4_Full
|
| 56 |
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SET_PARAMETER collision_warnings ALL
|
| 57 |
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SET_PARAMETER reset_priority_a CE
|
| 58 |
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SET_PARAMETER reset_priority_b CE
|
| 59 |
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SET_ERROR_CODE 2
|
| 60 |
|
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SET_ERROR_MSG CANCEL: Customization cancelled.
|
| 61 |
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SET_ERROR_TEXT Finished initializing IP model.
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