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[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE12.3/] [pcie_sg_dma/] [Virtex6/] [ML605/] [v6eb_pcie.vhd] - Blame information for rev 11

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Line No. Rev Author Line
1 11 barabba 
----------------------------------------------------------------------------------
2 
-- Company:
3 
-- Engineer:
4 
--
5 
-- Create Date:    09:12:51 01 Feb 2010
6 
-- Design Name:
7 
-- Module Name:    v6pcieDMA - Behavioral
8 
-- Project Name:
9 
-- Target Devices:
10 
-- Tool versions:
11 
-- Description:
12 
--
13 
-- Dependencies:
14 
--
15 
-- Revision:
16 
--
17 
-- Revision 1.00 - File Released
18 
--
19 
-- Additional Comments:
20 
--
21 
----------------------------------------------------------------------------------
22 
library IEEE;
23 
use IEEE.STD_LOGIC_1164.ALL;
24 
use IEEE.STD_LOGIC_ARITH.ALL;
25 
use IEEE.STD_LOGIC_UNSIGNED.ALL;
26 
 
27 
library work;
28 
use work.abb64Package.all;
29 
 
30 
---- Uncomment the following library declaration if instantiating
31 
---- any Xilinx primitives in this code.
32 
library UNISIM;
33 
use UNISIM.VComponents.all;
34 
 
35 
entity v6pcieDMA is
36 
    generic (
37 
          constant pcieLanes            : integer     := C_NUM_PCIE_LANES
38 
          );
39 
    Port (
40 
 
41 
          -- Optical links
42 
          TILE0_REFCLK_PAD_N_IN         : IN  std_logic;
43 
          TILE0_REFCLK_PAD_P_IN         : IN  std_logic;
44 
 
45 
          RXN_IN                        : IN  std_logic;
46 
          RXP_IN                        : IN  std_logic;
47 
          TXN_OUT                       : OUT std_logic;
48 
          TXP_OUT                       : OUT std_logic;
49 
 
50 
          SFP_LOS                       : IN  std_logic;
51 
 
52 
 
53 
          -- DDR interface
54 
 
55 
--          ddr2_sys_clk                  : IN    std_logic;
56 
--v6          Button_Rst                    : IN    std_logic;
57 
 
58 
          -- dummy pin input  !!!! not really exists
59 
--v6          dummy_pin_in                  : IN    std_logic_vector(3-1 downto 0);
60 
 
61 
          -- DPR blinker
62 
          LEDs_IO_pin                   : OUT   std_logic_vector(7 downto 0);
63 
 
64 
 
65 
--v6          refclkout                 : OUT   std_logic;
66 
 
67 
          -- PCIe transceivers
68 
          pci_exp_rxp                   : IN    std_logic_vector(pcieLanes - 1 downto 0);
69 
          pci_exp_rxn                   : IN    std_logic_vector(pcieLanes - 1 downto 0);
70 
          pci_exp_txp                   : OUT   std_logic_vector(pcieLanes - 1 downto 0);
71 
          pci_exp_txn                   : OUT   std_logic_vector(pcieLanes - 1 downto 0);
72 
 
73 
          -- Necessity signals
74 
          sys_clk_p                     : IN    std_logic;
75 
          sys_clk_n                     : IN    std_logic;
76 
          sys_reset_n                   : IN    std_logic
77 
          );
78 
 
79 
end entity v6pcieDMA;
80 
 
81 
 
82 
architecture Behavioral of v6pcieDMA is
83 
 
84 
 
85 
 
86 
--   signal dlm_rec0              : std_logic_vector(3 downto 0);
87 
--   signal dlm_rec_valid0        : std_logic;
88 
--
89 
--   signal dlm_rec1              : std_logic_vector(3 downto 0);
90 
--   signal dlm_rec_valid1        : std_logic;
91 
 
92 
 
93 
 
94 
------------- COMPONENT Declaration: v6_pcie_v1_3 x4 ------
95 
 component v6_pcie_v1_3
96 
   generic (
97 
         PL_FAST_TRAIN  : boolean
98 
         );
99 
   port (
100 
    ---------------------------------------------------------
101 
    -- 1. PCI Express (pci_exp) Interface
102 
    ---------------------------------------------------------
103 
 
104 
    -- Tx
105 
    pci_exp_txn                    : out STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
106 
    pci_exp_txp                    : out STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
107 
 
108 
    -- Rx
109 
    pci_exp_rxn                    : in  STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
110 
    pci_exp_rxp                    : in  STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
111 
 
112 
    ---------------------------------------------------------
113 
    -- 2. Transaction (TRN) Interface
114 
    ---------------------------------------------------------
115 
 
116 
    -- Common
117 
    trn_clk                        : out STD_LOGIC;
118 
    trn_reset_n                    : out STD_LOGIC;
119 
    trn_lnk_up_n                   : out STD_LOGIC;
120 
 
121 
    -- Tx
122 
    trn_tbuf_av                    : out STD_LOGIC_vector (6-1 downto 0);
123 
    trn_tcfg_req_n                 : out STD_LOGIC;
124 
    trn_terr_drop_n                : out STD_LOGIC;
125 
    trn_tdst_rdy_n                 : out STD_LOGIC;
126 
    trn_td                         : in  STD_LOGIC_vector (64-1 downto 0);
127 
    trn_trem_n                     : in  STD_LOGIC;
128 
    trn_tsof_n                     : in  STD_LOGIC;
129 
    trn_teof_n                     : in  STD_LOGIC;
130 
    trn_tsrc_rdy_n                 : in  STD_LOGIC;
131 
    trn_tsrc_dsc_n                 : in  STD_LOGIC;
132 
    trn_terrfwd_n                  : in  STD_LOGIC;
133 
    trn_tcfg_gnt_n                 : in  STD_LOGIC;
134 
    trn_tstr_n                     : in  STD_LOGIC;
135 
 
136 
    -- Rx
137 
    trn_rd                         : out STD_LOGIC_vector (64-1 downto 0);
138 
    trn_rrem_n                     : out STD_LOGIC;
139 
    trn_rsof_n                     : out STD_LOGIC;
140 
    trn_reof_n                     : out STD_LOGIC;
141 
    trn_rsrc_rdy_n                 : out STD_LOGIC;
142 
    trn_rsrc_dsc_n                 : out STD_LOGIC;
143 
    trn_rerrfwd_n                  : out STD_LOGIC;
144 
    trn_rbar_hit_n                 : out STD_LOGIC_vector (7-1 downto 0);
145 
    trn_rdst_rdy_n                 : in  STD_LOGIC;
146 
    trn_rnp_ok_n                   : in  STD_LOGIC;
147 
 
148 
    -- Flow Control
149 
    trn_fc_cpld                    : out STD_LOGIC_vector (12-1 downto 0);
150 
    trn_fc_cplh                    : out STD_LOGIC_vector (8-1 downto 0);
151 
    trn_fc_npd                     : out STD_LOGIC_vector (12-1 downto 0);
152 
    trn_fc_nph                     : out STD_LOGIC_vector (8-1 downto 0);
153 
    trn_fc_pd                      : out STD_LOGIC_vector (12-1 downto 0);
154 
    trn_fc_ph                      : out STD_LOGIC_vector (8-1 downto 0);
155 
    trn_fc_sel                     : in  STD_LOGIC_vector (3-1 downto 0);
156 
 
157 
 
158 
    ---------------------------------------------------------
159 
    -- 3. Configuration (CFG) Interface
160 
    ---------------------------------------------------------
161 
 
162 
    cfg_do                         : out STD_LOGIC_vector (32-1 downto 0);
163 
    cfg_rd_wr_done_n               : out STD_LOGIC;
164 
    cfg_di                         : in  STD_LOGIC_vector (32-1 downto 0);
165 
    cfg_byte_en_n                  : in  STD_LOGIC_vector (4-1 downto 0);
166 
    cfg_dwaddr                     : in  STD_LOGIC_vector (10-1 downto 0);
167 
    cfg_wr_en_n                    : in  STD_LOGIC;
168 
    cfg_rd_en_n                    : in  STD_LOGIC;
169 
 
170 
    cfg_err_cor_n                  : in  STD_LOGIC;
171 
    cfg_err_ur_n                   : in  STD_LOGIC;
172 
    cfg_err_ecrc_n                 : in  STD_LOGIC;
173 
    cfg_err_cpl_timeout_n          : in  STD_LOGIC;
174 
    cfg_err_cpl_abort_n            : in  STD_LOGIC;
175 
    cfg_err_cpl_unexpect_n         : in  STD_LOGIC;
176 
    cfg_err_posted_n               : in  STD_LOGIC;
177 
    cfg_err_locked_n               : in  STD_LOGIC;
178 
    cfg_err_tlp_cpl_header         : in  STD_LOGIC_vector (48-1 downto 0);
179 
    cfg_err_cpl_rdy_n              : out STD_LOGIC;
180 
    cfg_interrupt_n                : in  STD_LOGIC;
181 
    cfg_interrupt_rdy_n            : out STD_LOGIC;
182 
    cfg_interrupt_assert_n         : in  STD_LOGIC;
183 
    cfg_interrupt_di               : in  STD_LOGIC_vector (8-1 downto 0);
184 
    cfg_interrupt_do               : out STD_LOGIC_vector (8-1 downto 0);
185 
    cfg_interrupt_mmenable         : out STD_LOGIC_vector (3-1 downto 0);
186 
    cfg_interrupt_msienable        : out STD_LOGIC;
187 
    cfg_interrupt_msixenable       : out STD_LOGIC;
188 
    cfg_interrupt_msixfm           : out STD_LOGIC;
189 
    cfg_turnoff_ok_n               : in  STD_LOGIC;
190 
    cfg_to_turnoff_n               : out STD_LOGIC;
191 
    cfg_trn_pending_n              : in  STD_LOGIC;
192 
    cfg_pm_wake_n                  : in  STD_LOGIC;
193 
    cfg_bus_number                 : out STD_LOGIC_vector (8-1 downto 0);
194 
    cfg_device_number              : out STD_LOGIC_vector (5-1 downto 0);
195 
    cfg_function_number            : out STD_LOGIC_vector (3-1 downto 0);
196 
    cfg_status                     : out STD_LOGIC_vector (16-1 downto 0);
197 
    cfg_command                    : out STD_LOGIC_vector (16-1 downto 0);
198 
    cfg_dstatus                    : out STD_LOGIC_vector (16-1 downto 0);
199 
    cfg_dcommand                   : out STD_LOGIC_vector (16-1 downto 0);
200 
    cfg_lstatus                    : out STD_LOGIC_vector (16-1 downto 0);
201 
    cfg_lcommand                   : out STD_LOGIC_vector (16-1 downto 0);
202 
    cfg_dcommand2                  : out STD_LOGIC_vector (16-1 downto 0);
203 
    cfg_pcie_link_state_n          : out STD_LOGIC_vector (3-1 downto 0);
204 
    cfg_dsn                        : in  STD_LOGIC_vector (64-1 downto 0);
205 
    cfg_pmcsr_pme_en               : out STD_LOGIC;
206 
    cfg_pmcsr_pme_status           : out STD_LOGIC;
207 
    cfg_pmcsr_powerstate           : out STD_LOGIC_vector (2-1 downto 0);
208 
    lnk_clk_en                     : out STD_LOGIC;
209 
 
210 
 
211 
    ---------------------------------------------------------
212 
    -- 4. Physical Layer Control and Status (PL) Interface
213 
    ---------------------------------------------------------
214 
 
215 
    pl_initial_link_width          : out STD_LOGIC_vector (3-1 downto 0);
216 
    pl_lane_reversal_mode          : out STD_LOGIC_vector (2-1 downto 0);
217 
    pl_link_gen2_capable           : out STD_LOGIC;
218 
    pl_link_partner_gen2_supported : out STD_LOGIC;
219 
    pl_link_upcfg_capable          : out STD_LOGIC;
220 
    pl_ltssm_state                 : out STD_LOGIC_vector (6-1 downto 0);
221 
    pl_received_hot_rst            : out STD_LOGIC;
222 
    pl_sel_link_rate               : out STD_LOGIC;
223 
    pl_sel_link_width              : out STD_LOGIC_vector (2-1 downto 0);
224 
    pl_directed_link_auton         : in  STD_LOGIC;
225 
    pl_directed_link_change        : in  STD_LOGIC_vector (2-1 downto 0);
226 
    pl_directed_link_speed         : in  STD_LOGIC;
227 
    pl_directed_link_width         : in  STD_LOGIC_vector (2-1 downto 0);
228 
    pl_upstream_prefer_deemph      : in  STD_LOGIC;
229 
 
230 
 
231 
    ---------------------------------------------------------
232 
    -- 5. System  (SYS) Interface
233 
    ---------------------------------------------------------
234 
 
235 
    sys_clk                        : in  STD_LOGIC;
236 
    sys_reset_n                    : in  STD_LOGIC
237 
  );
238 
 end component;
239 
 
240 
 
241 
 
242 
------------- COMPONENT Declaration: v6_pcie_v1_3 x8 ------
243 
 component v6_pcie_v1_3x8
244 
   generic (
245 
         PL_FAST_TRAIN  : boolean
246 
         );
247 
   port (
248 
    ---------------------------------------------------------
249 
    -- 1. PCI Express (pci_exp) Interface
250 
    ---------------------------------------------------------
251 
 
252 
    -- Tx
253 
    pci_exp_txn                    : out STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
254 
    pci_exp_txp                    : out STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
255 
 
256 
    -- Rx
257 
    pci_exp_rxn                    : in  STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
258 
    pci_exp_rxp                    : in  STD_LOGIC_VECTOR ( pcieLanes - 1 downto 0 );
259 
 
260 
    ---------------------------------------------------------
261 
    -- 2. Transaction (TRN) Interface
262 
    ---------------------------------------------------------
263 
 
264 
    -- Common
265 
    trn_clk                        : out STD_LOGIC;
266 
    trn_reset_n                    : out STD_LOGIC;
267 
    trn_lnk_up_n                   : out STD_LOGIC;
268 
 
269 
    -- Tx
270 
    trn_tbuf_av                    : out STD_LOGIC_vector (6-1 downto 0);
271 
    trn_tcfg_req_n                 : out STD_LOGIC;
272 
    trn_terr_drop_n                : out STD_LOGIC;
273 
    trn_tdst_rdy_n                 : out STD_LOGIC;
274 
    trn_td                         : in  STD_LOGIC_vector (64-1 downto 0);
275 
    trn_trem_n                     : in  STD_LOGIC;
276 
    trn_tsof_n                     : in  STD_LOGIC;
277 
    trn_teof_n                     : in  STD_LOGIC;
278 
    trn_tsrc_rdy_n                 : in  STD_LOGIC;
279 
    trn_tsrc_dsc_n                 : in  STD_LOGIC;
280 
    trn_terrfwd_n                  : in  STD_LOGIC;
281 
    trn_tcfg_gnt_n                 : in  STD_LOGIC;
282 
    trn_tstr_n                     : in  STD_LOGIC;
283 
 
284 
    -- Rx
285 
    trn_rd                         : out STD_LOGIC_vector (64-1 downto 0);
286 
    trn_rrem_n                     : out STD_LOGIC;
287 
    trn_rsof_n                     : out STD_LOGIC;
288 
    trn_reof_n                     : out STD_LOGIC;
289 
    trn_rsrc_rdy_n                 : out STD_LOGIC;
290 
    trn_rsrc_dsc_n                 : out STD_LOGIC;
291 
    trn_rerrfwd_n                  : out STD_LOGIC;
292 
    trn_rbar_hit_n                 : out STD_LOGIC_vector (7-1 downto 0);
293 
    trn_rdst_rdy_n                 : in  STD_LOGIC;
294 
    trn_rnp_ok_n                   : in  STD_LOGIC;
295 
 
296 
    -- Flow Control
297 
    trn_fc_cpld                    : out STD_LOGIC_vector (12-1 downto 0);
298 
    trn_fc_cplh                    : out STD_LOGIC_vector (8-1 downto 0);
299 
    trn_fc_npd                     : out STD_LOGIC_vector (12-1 downto 0);
300 
    trn_fc_nph                     : out STD_LOGIC_vector (8-1 downto 0);
301 
    trn_fc_pd                      : out STD_LOGIC_vector (12-1 downto 0);
302 
    trn_fc_ph                      : out STD_LOGIC_vector (8-1 downto 0);
303 
    trn_fc_sel                     : in  STD_LOGIC_vector (3-1 downto 0);
304 
 
305 
 
306 
    ---------------------------------------------------------
307 
    -- 3. Configuration (CFG) Interface
308 
    ---------------------------------------------------------
309 
 
310 
    cfg_do                         : out STD_LOGIC_vector (32-1 downto 0);
311 
    cfg_rd_wr_done_n               : out STD_LOGIC;
312 
    cfg_di                         : in  STD_LOGIC_vector (32-1 downto 0);
313 
    cfg_byte_en_n                  : in  STD_LOGIC_vector (4-1 downto 0);
314 
    cfg_dwaddr                     : in  STD_LOGIC_vector (10-1 downto 0);
315 
    cfg_wr_en_n                    : in  STD_LOGIC;
316 
    cfg_rd_en_n                    : in  STD_LOGIC;
317 
 
318 
    cfg_err_cor_n                  : in  STD_LOGIC;
319 
    cfg_err_ur_n                   : in  STD_LOGIC;
320 
    cfg_err_ecrc_n                 : in  STD_LOGIC;
321 
    cfg_err_cpl_timeout_n          : in  STD_LOGIC;
322 
    cfg_err_cpl_abort_n            : in  STD_LOGIC;
323 
    cfg_err_cpl_unexpect_n         : in  STD_LOGIC;
324 
    cfg_err_posted_n               : in  STD_LOGIC;
325 
    cfg_err_locked_n               : in  STD_LOGIC;
326 
    cfg_err_tlp_cpl_header         : in  STD_LOGIC_vector (48-1 downto 0);
327 
    cfg_err_cpl_rdy_n              : out STD_LOGIC;
328 
    cfg_interrupt_n                : in  STD_LOGIC;
329 
    cfg_interrupt_rdy_n            : out STD_LOGIC;
330 
    cfg_interrupt_assert_n         : in  STD_LOGIC;
331 
    cfg_interrupt_di               : in  STD_LOGIC_vector (8-1 downto 0);
332 
    cfg_interrupt_do               : out STD_LOGIC_vector (8-1 downto 0);
333 
    cfg_interrupt_mmenable         : out STD_LOGIC_vector (3-1 downto 0);
334 
    cfg_interrupt_msienable        : out STD_LOGIC;
335 
    cfg_interrupt_msixenable       : out STD_LOGIC;
336 
    cfg_interrupt_msixfm           : out STD_LOGIC;
337 
    cfg_turnoff_ok_n               : in  STD_LOGIC;
338 
    cfg_to_turnoff_n               : out STD_LOGIC;
339 
    cfg_trn_pending_n              : in  STD_LOGIC;
340 
    cfg_pm_wake_n                  : in  STD_LOGIC;
341 
    cfg_bus_number                 : out STD_LOGIC_vector (8-1 downto 0);
342 
    cfg_device_number              : out STD_LOGIC_vector (5-1 downto 0);
343 
    cfg_function_number            : out STD_LOGIC_vector (3-1 downto 0);
344 
    cfg_status                     : out STD_LOGIC_vector (16-1 downto 0);
345 
    cfg_command                    : out STD_LOGIC_vector (16-1 downto 0);
346 
    cfg_dstatus                    : out STD_LOGIC_vector (16-1 downto 0);
347 
    cfg_dcommand                   : out STD_LOGIC_vector (16-1 downto 0);
348 
    cfg_lstatus                    : out STD_LOGIC_vector (16-1 downto 0);
349 
    cfg_lcommand                   : out STD_LOGIC_vector (16-1 downto 0);
350 
    cfg_dcommand2                  : out STD_LOGIC_vector (16-1 downto 0);
351 
    cfg_pcie_link_state_n          : out STD_LOGIC_vector (3-1 downto 0);
352 
    cfg_dsn                        : in  STD_LOGIC_vector (64-1 downto 0);
353 
    cfg_pmcsr_pme_en               : out STD_LOGIC;
354 
    cfg_pmcsr_pme_status           : out STD_LOGIC;
355 
    cfg_pmcsr_powerstate           : out STD_LOGIC_vector (2-1 downto 0);
356 
    lnk_clk_en                     : out STD_LOGIC;
357 
 
358 
 
359 
    ---------------------------------------------------------
360 
    -- 4. Physical Layer Control and Status (PL) Interface
361 
    ---------------------------------------------------------
362 
 
363 
    pl_initial_link_width          : out STD_LOGIC_vector (3-1 downto 0);
364 
    pl_lane_reversal_mode          : out STD_LOGIC_vector (2-1 downto 0);
365 
    pl_link_gen2_capable           : out STD_LOGIC;
366 
    pl_link_partner_gen2_supported : out STD_LOGIC;
367 
    pl_link_upcfg_capable          : out STD_LOGIC;
368 
    pl_ltssm_state                 : out STD_LOGIC_vector (6-1 downto 0);
369 
    pl_received_hot_rst            : out STD_LOGIC;
370 
    pl_sel_link_rate               : out STD_LOGIC;
371 
    pl_sel_link_width              : out STD_LOGIC_vector (2-1 downto 0);
372 
    pl_directed_link_auton         : in  STD_LOGIC;
373 
    pl_directed_link_change        : in  STD_LOGIC_vector (2-1 downto 0);
374 
    pl_directed_link_speed         : in  STD_LOGIC;
375 
    pl_directed_link_width         : in  STD_LOGIC_vector (2-1 downto 0);
376 
    pl_upstream_prefer_deemph      : in  STD_LOGIC;
377 
 
378 
 
379 
    ---------------------------------------------------------
380 
    -- 5. System  (SYS) Interface
381 
    ---------------------------------------------------------
382 
 
383 
    sys_clk                        : in  STD_LOGIC;
384 
    sys_reset_n                    : in  STD_LOGIC
385 
  );
386 
 end component;
387 
 
388 
 
389 
--
390 
--   signal ddr2_sys_clk_i               : std_logic;
391 
--   signal idelay_value_counter         : std_logic_vector(6-1 downto 0);
392 
--   signal idelay_calibrate_successful  : std_logic;
393 
   signal fifo_reset_done              : std_logic;
394 
--   signal failure_read                 : std_logic;
395 
   signal pio_reading_status           : std_logic;
396 
 
397 
 
398 
-- -----------------------------------------------------------------------
399 
--  DDR SDRAM control module
400 
--   1 or 2 DDR RAM modules are used
401 
--
402 
   COMPONENT bram_DDRs_Control
403 
   GENERIC (
404 
             C_ASYNFIFO_WIDTH  :  integer ;
405 
             P_SIMULATION      :  boolean
406 
            );
407 
   PORT (
408 
 
409 
 
410 
      -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
411 
      DDR_wr_sof               : IN    std_logic;
412 
      DDR_wr_eof               : IN    std_logic;
413 
      DDR_wr_v                 : IN    std_logic;
414 
      DDR_wr_FA                : IN    std_logic;
415 
      DDR_wr_Shift             : IN    std_logic;
416 
      DDR_wr_Mask              : IN    std_logic_vector(2-1 downto 0);
417 
      DDR_wr_din               : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
418 
      DDR_wr_full              : OUT   std_logic;
419 
 
420 
      DDR_rdc_sof              : IN    std_logic;
421 
      DDR_rdc_eof              : IN    std_logic;
422 
      DDR_rdc_v                : IN    std_logic;
423 
      DDR_rdc_FA               : IN    std_logic;
424 
      DDR_rdc_Shift            : IN    std_logic;
425 
      DDR_rdc_din              : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
426 
      DDR_rdc_full             : OUT   std_logic;
427 
 
428 
      -- DDR payload FIFO Read Port
429 
      DDR_FIFO_RdEn            : IN    std_logic;
430 
      DDR_FIFO_Empty           : OUT   std_logic;
431 
      DDR_FIFO_RdQout          : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
432 
--      DDR_rdD_sof              : OUT   std_logic;
433 
--      DDR_rdD_eof              : OUT   std_logic;
434 
--      DDR_rdDout_V             : OUT   std_logic;
435 
--      DDR_rdDout               : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
436 
 
437 
      -- Common interface
438 
      DDR_Ready                : OUT   std_logic;
439 
      DDR_Blinker              : OUT   std_logic;
440 
      mem_clk                  : IN    std_logic;
441 
      trn_clk                  : IN    std_logic;
442 
      trn_reset_n              : IN    std_logic
443 
    );
444 
   END COMPONENT;
445 
 
446 
   signal    DDR_wr_sof               :  std_logic;
447 
   signal    DDR_wr_eof               :  std_logic;
448 
   signal    DDR_wr_v                 :  std_logic;
449 
   signal    DDR_wr_FA                :  std_logic;
450 
   signal    DDR_wr_Shift             :  std_logic;
451 
   signal    DDR_wr_Mask              :  std_logic_vector(2-1 downto 0);
452 
   signal    DDR_wr_din               :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
453 
   signal    DDR_wr_full              :  std_logic;
454 
 
455 
   signal    DDR_rdc_sof              :  std_logic;
456 
   signal    DDR_rdc_eof              :  std_logic;
457 
   signal    DDR_rdc_v                :  std_logic;
458 
   signal    DDR_rdc_FA               :  std_logic;
459 
   signal    DDR_rdc_Shift            :  std_logic;
460 
   signal    DDR_rdc_din              :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
461 
   signal    DDR_rdc_full             :  std_logic;
462 
 
463 
   signal    DDR_FIFO_RdEn            :  std_logic;
464 
   signal    DDR_FIFO_Empty           :  std_logic;
465 
   signal    DDR_FIFO_RdQout          :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
466 
 
467 
--   signal    DDR_rdD_sof              :  std_logic;
468 
--   signal    DDR_rdD_eof              :  std_logic;
469 
--   signal    DDR_rdDout_V             :  std_logic;
470 
--   signal    DDR_rdDout               :  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
471 
 
472 
   signal    DDR_Ready                :  std_logic;
473 
   signal    DDR_Blinker              :  std_logic;
474 
 
475 
--   signal    mem_clk                  :  std_logic;
476 
 
477 
   -- -----------------------------------------------------------------------
478 
   -- FIFO module
479 
   --      16K x 8B
480 
   component eb_wrapper
481 
     port (
482 
           wr_clk      : IN  std_logic;
483 
           wr_en       : IN  std_logic;
484 
           din         : IN  std_logic_VECTOR(72-1 downto 0);
485 
           pfull       : OUT std_logic;
486 
           full        : OUT std_logic;
487 
 
488 
           rd_clk      : IN  std_logic;
489 
           rd_en       : IN  std_logic;
490 
           dout        : OUT std_logic_VECTOR(72-1 downto 0);
491 
           pempty      : OUT std_logic;
492 
           empty       : OUT std_logic;
493 
 
494 
           data_count  : OUT std_logic_VECTOR(C_EMU_FIFO_DC_WIDTH-1 downto 0);
495 
           rst         : IN  std_logic
496 
           );
497 
   end component;
498 
 
499 
   signal  eb_wclk            :  std_logic;
500 
   signal  eb_we              :  std_logic;
501 
   signal  eb_wsof            :  std_logic;
502 
   signal  eb_weof            :  std_logic;
503 
   signal  eb_din             :  std_logic_VECTOR(72-1 downto 0);
504 
   signal  eb_pfull           :  std_logic;
505 
   signal  eb_full            :  std_logic;
506 
   signal  eb_rclk            :  std_logic;
507 
   signal  eb_re              :  std_logic;
508 
   signal  eb_dout            :  std_logic_VECTOR(72-1 downto 0);
509 
   signal  eb_pempty          :  std_logic;
510 
   signal  eb_empty           :  std_logic;
511 
   signal  eb_rst             :  std_logic;
512 
   signal  eb_FIFO_Status     :  std_logic_VECTOR(C_DBUS_WIDTH-1 downto 0);
513 
   signal  eb_data_count      :  std_logic_vector(C_FIFO_DC_WIDTH downto 0);
514 
   signal  pio_read_status    :  std_logic;
515 
   signal  eb_FIFO_ow         :  std_logic;
516 
 
517 
   signal  eb_we_up           :  std_logic;
518 
   signal  eb_din_up          :  std_logic_VECTOR(72-1 downto 0);
519 
 
520 
 
521 
   signal  tab_sel            : STD_LOGIC;
522 
   signal  tab_we             : STD_LOGIC_VECTOR (2-1 downto 0);
523 
   signal  tab_wa             : STD_LOGIC_VECTOR (12-1 downto 0);
524 
   signal  tab_wd             : STD_LOGIC_VECTOR (C_DBUS_WIDTH-1 downto 0);
525 
 
526 
   signal  dg_running         : STD_LOGIC;
527 
   signal  dg_mask            : STD_LOGIC;
528 
   signal  dg_rst             : STD_LOGIC;
529 
 
530 
   -- debug signal
531 
   signal  dg_debug_led       : STD_LOGIC;
532 
 
533 
   -- Protocol Interface module
534 
   COMPONENT protocol_IF
535 
   PORT (
536 
           -- DAQ Tx
537 
           data2send_start          : OUT   std_logic;
538 
           data2send_end            : OUT   std_logic;
539 
           data2send                : OUT   std_logic_vector(64-1 downto 0);
540 
           crc_error_send           : OUT   std_logic;
541 
           data2send_stop           : IN    std_logic;
542 
 
543 
           -- DAQ Rx
544 
           data_rec_start           : IN    std_logic;
545 
           data_rec_end             : IN    std_logic;
546 
           data_rec                 : IN    std_logic_vector(64-1 downto 0);
547 
           crc_error_rec            : IN    std_logic;
548 
           data_rec_stop            : OUT   std_logic;
549 
 
550 
           -- CTL Tx
551 
           ctrl2send_start          : OUT   std_logic;
552 
           ctrl2send_end            : OUT   std_logic;
553 
           ctrl2send                : OUT   std_logic_vector(16-1 downto 0);
554 
           ctrl2send_stop           : IN    std_logic;
555 
 
556 
           -- CTL Rx
557 
           ctrl_rec_start           : IN    std_logic;
558 
           ctrl_rec_end             : IN    std_logic;
559 
           ctrl_rec                 : IN    std_logic_vector(16-1 downto 0);
560 
           ctrl_rec_stop            : OUT   std_logic;
561 
 
562 
           -- DLM Tx
563 
           dlm2send_va              : OUT   std_logic;
564 
           dlm2send_type            : OUT   std_logic_vector(4-1 downto 0);
565 
 
566 
           -- DLM Rx
567 
           dlm_rec_va               : IN    std_logic;
568 
           dlm_rec_type             : IN    std_logic_vector(4-1 downto 0);
569 
 
570 
           -- Common signals
571 
           link_tx_clk              : IN    std_logic;
572 
           link_rx_clk              : IN    std_logic;
573 
           link_active              : IN    std_logic_vector(2-1 downto 0);
574 
           protocol_clk             : OUT   std_logic;
575 
           protocol_res_n           : OUT   std_logic;
576 
 
577 
           -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
578 
 
579 
           -- Fabric side: DAQ Rx
580 
           daq_rv                   : IN    std_logic;
581 
           daq_rsof                 : IN    std_logic;
582 
           daq_reof                 : IN    std_logic;
583 
           daq_rd                   : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
584 
           daq_rstop                : OUT   std_logic;
585 
 
586 
           -- Fabric side: DAQ Tx
587 
           daq_tv                   : OUT   std_logic;
588 
           daq_tsof                 : OUT   std_logic;
589 
           daq_teof                 : OUT   std_logic;
590 
           daq_td                   : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
591 
           daq_tstop                : IN    std_logic;
592 
 
593 
           -- Fabric side: DLM Rx
594 
           dlm_rv                   : IN    std_logic;
595 
           dlm_rd                   : IN    std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
596 
 
597 
           -- Fabric side: DLM Tx
598 
           dlm_tv                   : OUT   std_logic;
599 
           dlm_td                   : OUT   std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
600 
 
601 
           -- Fabric side: CTL Rx
602 
           ctl_rv                   : IN    std_logic;
603 
           ctl_rd                   : IN    std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
604 
           ctl_rstop                : OUT   std_logic;
605 
 
606 
           -- Fabric side: CTL Tx
607 
           ctl_ttake                : IN    std_logic;
608 
           ctl_tv                   : OUT   std_logic;
609 
           ctl_td                   : OUT   std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
610 
           ctl_tstop                : IN    std_logic;
611 
 
612 
           ctl_reset                : IN    std_logic;
613 
           ctl_status               : OUT   std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
614 
 
615 
           -- Interrupter triggers
616 
           DAQ_irq                  : OUT   std_logic;
617 
           CTL_irq                  : OUT   std_logic;
618 
           DLM_irq                  : OUT   std_logic;
619 
 
620 
           -- Data generator table write port
621 
           tab_sel                  : IN    STD_LOGIC;
622 
           tab_we                   : IN    STD_LOGIC_VECTOR (2-1 downto 0);
623 
           tab_wa                   : IN    STD_LOGIC_VECTOR (12-1 downto 0);
624 
           tab_wd                   : IN    STD_LOGIC_VECTOR (64-1 downto 0);
625 
 
626 
           -- DG control/status signal
627 
           dg_running               : OUT   STD_LOGIC;
628 
           dg_mask                  : IN    STD_LOGIC;
629 
           dg_rst                   : IN    STD_LOGIC;
630 
 
631 
           -- DG debug signal
632 
           daq_start_led            : OUT   STD_LOGIC;
633 
 
634 
           -- Fabric side: Common signals
635 
           trn_clk                  : IN    std_logic;
636 
           protocol_link_act        : OUT   std_logic_vector(2-1 downto 0);
637 
           protocol_rst             : IN    std_logic
638 
    );
639 
   END COMPONENT;
640 
 
641 
   -- DAQ Tx
642 
   signal  data2send_start          : std_logic;
643 
   signal  data2send_end            : std_logic;
644 
   signal  data2send                : std_logic_vector(64-1 downto 0);
645 
   signal  crc_error_send           : std_logic;
646 
   signal  data2send_stop           : std_logic
647 
                                    := '0';
648 
 
649 
   -- DAQ Rx
650 
   signal  data_rec_start           : std_logic;
651 
   signal  data_rec_end             : std_logic;
652 
   signal  data_rec                 : std_logic_vector(64-1 downto 0);
653 
   signal  crc_error_rec            : std_logic;
654 
   signal  data_rec_stop            : std_logic;
655 
 
656 
   -- CTL Tx
657 
   signal  ctrl2send_start          : std_logic;
658 
   signal  ctrl2send_end            : std_logic;
659 
   signal  ctrl2send                : std_logic_vector(16-1 downto 0);
660 
   signal  ctrl2send_stop           : std_logic;
661 
 
662 
   -- CTL Rx
663 
   signal  ctrl_rec_start           : std_logic;
664 
   signal  ctrl_rec_end             : std_logic;
665 
   signal  ctrl_rec                 : std_logic_vector(16-1 downto 0);
666 
   signal  ctrl_rec_stop            : std_logic;
667 
 
668 
   -- DLM Tx
669 
   signal  dlm2send_va              : std_logic;
670 
   signal  dlm2send_type            : std_logic_vector(4-1 downto 0);
671 
 
672 
   -- DLM Rx
673 
   signal  dlm_rec_va               : std_logic;
674 
   signal  dlm_rec_type             : std_logic_vector(4-1 downto 0);
675 
 
676 
 
677 
   -- Common signals
678 
   signal  link_rx_clk              : std_logic;
679 
   signal  link_tx_clk              : std_logic;
680 
   signal  link_active              : std_logic_vector(2-1 downto 0);
681 
   signal  protocol_clk             : std_logic;
682 
   signal  protocol_res_n           : std_logic;
683 
 
684 
 
685 
   -- Fabric side: DAQ Rx
686 
   signal  daq_rv                   : std_logic;
687 
   signal  daq_rsof                 : std_logic;
688 
   signal  daq_reof                 : std_logic;
689 
   signal  daq_rd                   : std_logic_vector(C_DBUS_WIDTH-1 downto 0);
690 
   signal  daq_rstop                : std_logic;
691 
 
692 
   -- Fabric side: DAQ Tx
693 
   signal  daq_tv                   : std_logic;
694 
   signal  daq_tsof                 : std_logic;
695 
   signal  daq_teof                 : std_logic;
696 
   signal  daq_td                   : std_logic_vector(C_DBUS_WIDTH-1 downto 0);
697 
   signal  daq_tstop                : std_logic;
698 
 
699 
   -- Fabric side: DLM Rx
700 
   signal  dlm_rv                   : std_logic;
701 
   signal  dlm_rd                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
702 
 
703 
   -- Fabric side: DLM Tx
704 
   signal  dlm_tv                   : std_logic;
705 
   signal  dlm_td                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
706 
 
707 
   -- Fabric side: CTL Rx
708 
   signal  ctl_rv                   : std_logic;
709 
   signal  ctl_rd                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
710 
   signal  ctl_rstop                : std_logic;
711 
 
712 
   -- Fabric side: CTL Tx
713 
   signal  ctl_ttake                : std_logic;
714 
   signal  ctl_tv                   : std_logic;
715 
   signal  ctl_td                   : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
716 
   signal  ctl_tstop                : std_logic;
717 
 
718 
   signal  ctl_reset                : std_logic;
719 
   signal  ctl_status               : std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
720 
 
721 
   -- Interrupter triggers
722 
   signal  DAQ_irq                  : std_logic;
723 
   signal  CTL_irq                  : std_logic;
724 
   signal  DLM_irq                  : std_logic;
725 
 
726 
   -- Fabric side: Common signals
727 
   signal  protocol_link_act        : std_logic_vector(2-1 downto 0);
728 
   signal  protocol_rst             : std_logic;
729 
 
730 
 
731 
   -- Pseudo link module, to be replaced by the real optical link
732 
   COMPONENT pseudo_protocol_module
733 
   PORT (
734 
         -- DAQ Tx
735 
         data2send_start          : IN    std_logic;
736 
         data2send_end            : IN    std_logic;
737 
         data2send                : IN    std_logic_vector(64-1 downto 0);
738 
         crc_error_send           : IN    std_logic;
739 
         data2send_stop           : OUT   std_logic;
740 
 
741 
         -- DAQ Rx
742 
         data_rec_start           : OUT   std_logic;
743 
         data_rec_end             : OUT   std_logic;
744 
         data_rec                 : OUT   std_logic_vector(64-1 downto 0);
745 
         crc_error_rec            : OUT   std_logic;
746 
         data_rec_stop            : IN    std_logic;
747 
 
748 
         -- CTL Tx
749 
         ctrl2send_start          : IN    std_logic;
750 
         ctrl2send_end            : IN    std_logic;
751 
         ctrl2send                : IN    std_logic_vector(16-1 downto 0);
752 
         ctrl2send_stop           : OUT   std_logic;
753 
 
754 
         -- CTL Rx
755 
         ctrl_rec_start           : OUT   std_logic;
756 
         ctrl_rec_end             : OUT   std_logic;
757 
         ctrl_rec                 : OUT   std_logic_vector(16-1 downto 0);
758 
         ctrl_rec_stop            : IN    std_logic;
759 
 
760 
         -- DLM Tx
761 
         dlm2send_va              : IN    std_logic;
762 
         dlm2send_type            : IN    std_logic_vector(4-1 downto 0);
763 
 
764 
         -- DLM Rx
765 
         dlm_rec_va               : OUT   std_logic;
766 
         dlm_rec_type             : OUT   std_logic_vector(4-1 downto 0);
767 
 
768 
         -- dummy pin input
769 
         dummy_pin_in             : IN    std_logic_vector(3-1 downto 0);
770 
 
771 
         -- Common interface
772 
         link_tx_clk              : OUT   std_logic;
773 
         link_rx_clk              : OUT   std_logic;
774 
         link_active              : OUT   std_logic_vector(2-1 downto 0);
775 
         clk                      : IN    std_logic;
776 
         res_n                    : IN    std_logic
777 
    );
778 
   END COMPONENT;
779 
 
780 
 
781 
   signal  Link_Buf_full             : std_logic;
782 
 
783 
 
784 
------------- COMPONENT Declaration: tlpControl   ------
785 
--
786 
 component tlpControl
787 
   port (
788 
        --  Test pin, emulating DDR data flow discontinuity
789 
        mbuf_UserFull                : IN  std_logic;
790 
        trn_Blinker                  : OUT std_logic;
791 
 
792 
        -- DCB protocol interface
793 
        protocol_link_act            : IN  std_logic_vector(2-1 downto 0);
794 
        protocol_rst                 : OUT std_logic;
795 
 
796 
        -- Interrupter triggers
797 
        DAQ_irq                      : IN  std_logic;
798 
        CTL_irq                      : IN  std_logic;
799 
        DLM_irq                      : IN  std_logic;
800 
 
801 
        -- Fabric side: CTL Rx
802 
        ctl_rv                       : OUT std_logic;
803 
        ctl_rd                       : OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
804 
 
805 
        -- Fabric side: CTL Tx
806 
        ctl_ttake                    : OUT std_logic;
807 
        ctl_tv                       : IN  std_logic;
808 
        ctl_td                       : IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
809 
        ctl_tstop                    : OUT std_logic;
810 
 
811 
        ctl_reset                    : OUT std_logic;
812 
        ctl_status                   : IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
813 
 
814 
        -- Fabric side: DLM Rx
815 
        dlm_rv                       : OUT std_logic;
816 
        dlm_rd                       : OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
817 
 
818 
        -- Fabric side: DLM Tx
819 
        dlm_tv                       : IN  std_logic;
820 
        dlm_td                       : IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
821 
 
822 
        Link_Buf_full                : IN  std_logic;
823 
 
824 
        -- Event Buffer FIFO interface
825 
        eb_FIFO_we                   : OUT std_logic;
826 
        eb_FIFO_wsof                 : OUT std_logic;
827 
        eb_FIFO_weof                 : OUT std_logic;
828 
        eb_FIFO_din                  : OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
829 
 
830 
        eb_FIFO_re                   : OUT std_logic;
831 
        eb_FIFO_empty                : IN  std_logic;
832 
        eb_FIFO_qout                 : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
833 
        eb_FIFO_data_count           : IN  std_logic_vector(C_FIFO_DC_WIDTH downto 0);
834 
 
835 
        eb_FIFO_ow                   : IN  std_logic;
836 
 
837 
        pio_reading_status           : OUT std_logic;
838 
        eb_FIFO_Status               : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
839 
        eb_FIFO_Rst                  : OUT std_logic;
840 
 
841 
        -- Debugging signals
842 
        DMA_us_Done                  : OUT std_logic;
843 
        DMA_us_Busy                  : OUT std_logic;
844 
        DMA_us_Busy_LED              : OUT std_logic;
845 
        DMA_ds_Done                  : OUT std_logic;
846 
        DMA_ds_Busy                  : OUT std_logic;
847 
        DMA_ds_Busy_LED              : OUT std_logic;
848 
 
849 
        -- DDR control interface
850 
        DDR_Ready                    : IN    std_logic;
851 
 
852 
        DDR_wr_sof                   : OUT   std_logic;
853 
        DDR_wr_eof                   : OUT   std_logic;
854 
        DDR_wr_v                     : OUT   std_logic;
855 
        DDR_wr_FA                    : OUT   std_logic;
856 
        DDR_wr_Shift                 : OUT   std_logic;
857 
        DDR_wr_Mask                  : OUT   std_logic_vector(2-1 downto 0);
858 
        DDR_wr_din                   : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
859 
        DDR_wr_full                  : IN    std_logic;
860 
 
861 
        DDR_rdc_sof                  : OUT   std_logic;
862 
        DDR_rdc_eof                  : OUT   std_logic;
863 
        DDR_rdc_v                    : OUT   std_logic;
864 
        DDR_rdc_FA                   : OUT   std_logic;
865 
        DDR_rdc_Shift                : OUT   std_logic;
866 
        DDR_rdc_din                  : OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
867 
        DDR_rdc_full                 : IN    std_logic;
868 
 
869 
--        DDR_rdD_sof                  : IN    std_logic;
870 
--        DDR_rdD_eof                  : IN    std_logic;
871 
--        DDR_rdDout_V                 : IN    std_logic;
872 
--        DDR_rdDout                   : IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
873 
 
874 
        -- DDR payload FIFO Read Port
875 
        DDR_FIFO_RdEn                : OUT std_logic;
876 
        DDR_FIFO_Empty               : IN  std_logic;
877 
        DDR_FIFO_RdQout              : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
878 
 
879 
        -- Data generator table write
880 
        tab_we                       : OUT std_logic_vector(2-1 downto 0);
881 
        tab_wa                       : OUT std_logic_vector(12-1 downto 0);
882 
        tab_wd                       : OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
883 
 
884 
        -- Data generator control
885 
        DG_is_Running                : IN  std_logic;
886 
        DG_Reset                     : OUT std_logic;
887 
        DG_Mask                      : OUT std_logic;
888 
 
889 
        -- Transaction layer interface
890 
        trn_lnk_up_n                 : IN  std_logic;
891 
        trn_rsrc_dsc_n               : IN  std_logic;
892 
        trn_rnp_ok_n                 : OUT std_logic;
893 
        trn_tsrc_dsc_n               : OUT std_logic;
894 
        trn_tdst_dsc_n               : IN  std_logic;
895 
        trn_tbuf_av                  : IN  std_logic_vector(C_TBUF_AWIDTH-1 downto 0);
896 
        trn_terrfwd_n                : OUT std_logic;
897 
 
898 
        trn_clk                      : IN  std_logic;
899 
        trn_reset_n                  : IN  std_logic;
900 
        trn_rsrc_rdy_n               : IN  std_logic;
901 
        trn_tdst_rdy_n               : IN  std_logic;
902 
        trn_rsof_n                   : IN  std_logic;
903 
        trn_reof_n                   : IN  std_logic;
904 
        trn_rerrfwd_n                : IN  std_logic;
905 
        trn_rrem_n                   : IN  std_logic_vector(C_DBUS_WIDTH/8-1 downto 0);
906 
        trn_rd                       : IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
907 
 
908 
        cfg_dcommand                 : IN  std_logic_vector(15 downto 0);
909 
        pcie_link_width              : IN  std_logic_vector( 5 downto 0);
910 
        localId                      : IN  std_logic_vector(15 downto 0);
911 
 
912 
        cfg_interrupt_n              : OUT std_logic;
913 
        cfg_interrupt_rdy_n          : IN  std_logic;
914 
        cfg_interrupt_mmenable       : IN  std_logic_vector(2 downto 0);
915 
        cfg_interrupt_msienable      : IN  std_logic;
916 
        cfg_interrupt_di             : OUT std_logic_vector(7 downto 0);
917 
        cfg_interrupt_do             : IN  std_logic_vector(7 downto 0);
918 
        cfg_interrupt_assert_n       : OUT std_logic;
919 
 
920 
        Format_Shower                : OUT   std_logic;
921 
 
922 
        trn_rbar_hit_n               : IN  std_logic_vector(6 downto 0);
923 
        trn_tsrc_rdy_n               : OUT std_logic;
924 
        trn_rdst_rdy_n               : OUT std_logic;
925 
        trn_tsof_n                   : OUT std_logic;
926 
        trn_teof_n                   : OUT std_logic;
927 
        trn_trem_n                   : OUT std_logic_vector(C_DBUS_WIDTH/8-1 downto 0);
928 
        trn_td                       : OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0)
929 
        );
930 
 end component;
931 
 
932 
 signal   Format_Shower              : std_logic;
933 
 
934 
-- component BUFG is
935 
--   port(
936 
--        I : IN  std_logic;
937 
--        O : OUT std_logic
938 
--        );
939 
-- end component;
940 
--
941 
-- component IBUF is
942 
--   port(
943 
--        i : IN  std_logic;
944 
--        o : OUT std_logic
945 
--        );
946 
-- end component;
947 
--
948 
-- component IBUFDS is
949 
--   port(
950 
--        i  : IN  std_logic;
951 
--        ib : IN  std_logic;
952 
--        o  : OUT std_logic
953 
--        );
954 
-- end component;
955 
--
956 
-- component GT11CLK_MGT is
957 
--   port(
958 
--        mgtclkp     : IN  std_logic;
959 
--        mgtclkn     : IN  std_logic;
960 
--        synclk1out  : OUT std_logic;
961 
--        synclk2out  : OUT std_logic
962 
--        );
963 
-- end component;
964 
 
965 
 
966 
  -- TRN Layer signals
967 
 
968 
  signal trn_terr_drop_n                 : std_logic;
969 
  signal trn_tcfg_gnt_n                  : std_logic;
970 
  signal trn_tstr_n                      : std_logic;
971 
  signal trn_fc_cpld                     : STD_LOGIC_vector (12-1 downto 0);
972 
  signal trn_fc_cplh                     : STD_LOGIC_vector (8-1 downto 0);
973 
  signal trn_fc_npd                      : STD_LOGIC_vector (12-1 downto 0);
974 
  signal trn_fc_nph                      : STD_LOGIC_vector (8-1 downto 0);
975 
  signal trn_fc_pd                       : STD_LOGIC_vector (12-1 downto 0);
976 
  signal trn_fc_ph                       : STD_LOGIC_vector (8-1 downto 0);
977 
  signal trn_fc_sel                      : STD_LOGIC_vector (3-1 downto 0);
978 
 
979 
  signal cfg_interrupt_msixenable        : std_logic;
980 
  signal cfg_interrupt_msixfm            : std_logic;
981 
  signal cfg_dcommand2                   : std_logic_vector (16-1 downto 0);
982 
  signal trn_tcfg_req_n                  : std_logic;
983 
 
984 
 
985 
  signal  pl_initial_link_width          : STD_LOGIC_vector (3-1 downto 0);
986 
  signal  pl_lane_reversal_mode          : STD_LOGIC_vector (2-1 downto 0);
987 
  signal  pl_link_gen2_capable           : STD_LOGIC;
988 
  signal  pl_link_partner_gen2_supported : STD_LOGIC;
989 
  signal  pl_link_upcfg_capable          : STD_LOGIC;
990 
  signal  pl_ltssm_state                 : STD_LOGIC_vector (6-1 downto 0);
991 
  signal  pl_received_hot_rst            : STD_LOGIC;
992 
  signal  pl_sel_link_rate               : STD_LOGIC;
993 
  signal  pl_sel_link_width              : STD_LOGIC_vector (2-1 downto 0);
994 
  signal  pl_directed_link_auton         : STD_LOGIC;
995 
  signal  pl_directed_link_change        : STD_LOGIC_vector (2-1 downto 0);
996 
  signal  pl_directed_link_speed         : STD_LOGIC;
997 
  signal  pl_directed_link_width         : STD_LOGIC_vector (2-1 downto 0);
998 
  signal  pl_upstream_prefer_deemph      : STD_LOGIC;
999 
 
1000 
  signal  trn_reset_n_int1       : STD_LOGIC;
1001 
  signal  trn_lnk_up_n_int1      : STD_LOGIC;
1002 
 
1003 
 
1004 
 
1005 
  signal trn_clk                     : std_logic;
1006 
  signal trn_reset_n                 : std_logic;
1007 
  signal trn_lnk_up_n                : std_logic;
1008 
  signal trn_td                      : std_logic_vector(63 downto 0);
1009 
  signal trn_trem_n                  : std_logic_vector(7 downto 0);
1010 
  signal trn_tsof_n                  : std_logic;
1011 
  signal trn_teof_n                  : std_logic;
1012 
  signal trn_tsrc_rdy_n              : std_logic;
1013 
  signal trn_tdst_rdy_n              : std_logic;
1014 
  signal trn_tdst_dsc_n              : std_logic;
1015 
  signal trn_tsrc_dsc_n              : std_logic;
1016 
  signal trn_terrfwd_n               : std_logic;
1017 
  signal trn_tbuf_av                 : std_logic_vector(5 downto 0);
1018 
  signal trn_rd                      : std_logic_vector(63 downto 0);
1019 
  signal trn_rrem_n                  : std_logic_vector(7 downto 0);
1020 
  signal trn_rsof_n                  : std_logic;
1021 
  signal trn_reof_n                  : std_logic;
1022 
  signal trn_rsrc_rdy_n              : std_logic;
1023 
  signal trn_rsrc_dsc_n              : std_logic;
1024 
  signal trn_rdst_rdy_n              : std_logic;
1025 
  signal trn_rerrfwd_n               : std_logic;
1026 
  signal trn_rnp_ok_n                : std_logic;
1027 
  signal trn_rbar_hit_n              : std_logic_vector(6 downto 0);
1028 
  signal trn_rfc_nph_av              : std_logic_vector(7 downto 0);
1029 
  signal trn_rfc_npd_av              : std_logic_vector(11 downto 0);
1030 
  signal trn_rfc_ph_av               : std_logic_vector(7 downto 0);
1031 
  signal trn_rfc_pd_av               : std_logic_vector(11 downto 0);
1032 
  signal trn_rfc_cplh_av             : std_logic_vector(7 downto 0);
1033 
  signal trn_rfc_cpld_av             : std_logic_vector(11 downto 0);
1034 
  signal trn_rcpl_streaming_n        : std_logic;
1035 
  signal cfg_do                      : std_logic_vector(31 downto 0);
1036 
  signal cfg_rd_wr_done_n            : std_logic;
1037 
  signal cfg_di                      : std_logic_vector(31 downto 0);
1038 
  signal cfg_byte_en_n               : std_logic_vector(3 downto 0);
1039 
  signal cfg_dwaddr                  : std_logic_vector(9 downto 0);
1040 
  signal cfg_wr_en_n                 : std_logic;
1041 
  signal cfg_rd_en_n                 : std_logic;
1042 
  signal cfg_err_cor_n               : std_logic;
1043 
  signal cfg_err_ur_n                : std_logic;
1044 
  signal cfg_err_cpl_rdy_n           : std_logic;
1045 
  signal cfg_err_ecrc_n              : std_logic;
1046 
  signal cfg_err_cpl_timeout_n       : std_logic;
1047 
  signal cfg_err_cpl_abort_n         : std_logic;
1048 
  signal cfg_err_cpl_unexpect_n      : std_logic;
1049 
  signal cfg_err_posted_n            : std_logic;
1050 
  signal cfg_err_locked_n            : std_logic;
1051 
  signal cfg_err_tlp_cpl_header      : std_logic_vector(47 downto 0);
1052 
  signal cfg_interrupt_n             : std_logic;
1053 
  signal cfg_interrupt_rdy_n         : std_logic;
1054 
  signal cfg_interrupt_mmenable      : std_logic_vector(2 downto 0);
1055 
  signal cfg_interrupt_msienable     : std_logic;
1056 
  signal cfg_interrupt_di            : std_logic_vector(7 downto 0);
1057 
  signal cfg_interrupt_do            : std_logic_vector(7 downto 0);
1058 
  signal cfg_interrupt_assert_n      : std_logic;
1059 
  signal cfg_turnoff_ok_n            : std_logic;
1060 
  signal cfg_to_turnoff_n            : std_logic;
1061 
  signal cfg_pm_wake_n               : std_logic;
1062 
  signal cfg_pcie_link_state_n       : std_logic_vector(2 downto 0);
1063 
  signal cfg_trn_pending_n           : std_logic;
1064 
  signal cfg_bus_number              : std_logic_vector(7 downto 0);
1065 
  signal cfg_device_number           : std_logic_vector(4 downto 0);
1066 
  signal cfg_function_number         : std_logic_vector(2 downto 0);
1067 
  signal cfg_dsn                     : std_logic_vector(63 downto 0);
1068 
  signal cfg_status                  : std_logic_vector(15 downto 0);
1069 
  signal cfg_command                 : std_logic_vector(15 downto 0);
1070 
  signal cfg_dstatus                 : std_logic_vector(15 downto 0);
1071 
  signal cfg_dcommand                : std_logic_vector(15 downto 0);
1072 
  signal cfg_lstatus                 : std_logic_vector(15 downto 0);
1073 
  signal cfg_lcommand                : std_logic_vector(15 downto 0);
1074 
  signal fast_train_simulation_only  : std_logic;
1075 
  signal two_plm_auto_config         : std_logic_vector(1 downto 0);
1076 
  signal sys_clk_c                   : std_logic;
1077 
  signal sys_reset_n_c               : std_logic;
1078 
  signal reset_n                     : std_logic;
1079 
 
1080 
  signal localId                     : std_logic_vector(15 downto 0);
1081 
  signal pcie_link_width             : std_logic_vector( 5 downto 0);
1082 
 
1083 
  signal synclk2out                  : std_logic;
1084 
 
1085 
 
1086 
  --
1087 
  signal   trn_Blinker          : std_logic;
1088 
 
1089 
 
1090 
begin
1091 
 
1092 
 
1093 
   sys_reset_n_ibuf : IBUF
1094 
      port map (
1095 
                 O      =>  sys_reset_n_c,
1096 
                 I      =>  sys_reset_n
1097 
                );
1098 
 
1099 
   refclk_ibuf : IBUFDS_GTXE1
1100 
      port map (
1101 
                 O      =>  sys_clk_c,
1102 
                 ODIV2  =>  open,
1103 
                 I      =>  sys_clk_p,
1104 
                 IB     =>  sys_clk_n,
1105 
                 CEB    =>  '0'
1106 
                );
1107 
 
1108 
--   refclk_ibuf : IBUFDS
1109 
--      port map (
1110 
--                 O  => sys_clk,
1111 
--                 I  => sys_clk_p,
1112 
--                 IB => sys_clk_n
1113 
--                );
1114 
 
1115 
--   ddr_sys_clk_bufg : BUFG
1116 
--      PORT MAP ( I  => ddr2_sys_clk,
1117 
--                 O  => ddr2_sys_clk_i
1118 
--                );
1119 
 
1120 
 
1121 
--
1122 
--
1123 
   cfg_err_cor_n              <= '1';
1124 
   cfg_err_ur_n               <= '1';
1125 
   cfg_err_ecrc_n             <= '1';
1126 
   cfg_err_cpl_timeout_n      <= '1';
1127 
   cfg_err_cpl_abort_n        <= '1';
1128 
   cfg_err_cpl_unexpect_n     <= '1';
1129 
   cfg_err_posted_n           <= '0';
1130 
   cfg_err_locked_n           <= '0';
1131 
   cfg_err_tlp_cpl_header     <= (OTHERS=>'0');
1132 
   cfg_trn_pending_n          <= '1';
1133 
   cfg_pm_wake_n              <= '1';
1134 
 
1135 
 
1136 
--
1137 
   trn_fc_sel                 <= (OTHERS=>'0');
1138 
 
1139 
   pl_directed_link_auton     <= '0';
1140 
   pl_directed_link_change    <= (OTHERS=>'0');
1141 
   pl_directed_link_speed     <= '0';
1142 
   pl_directed_link_width     <= (OTHERS=>'0');
1143 
   pl_upstream_prefer_deemph  <= '0';
1144 
 
1145 
   trn_tcfg_gnt_n             <= '0';
1146 
   trn_tstr_n                 <= '0';  -- '1';
1147 
 
1148 
--
1149 
 
1150 
   trn_tdst_dsc_n             <= '1';
1151 
 
1152 
--
1153 
   cfg_di                     <= (OTHERS=>'0');
1154 
   cfg_dwaddr                 <= (OTHERS=>'1');
1155 
   cfg_byte_en_n              <= (OTHERS=>'1');
1156 
   cfg_wr_en_n                <= '1';
1157 
   cfg_rd_en_n                <= '1';
1158 
   cfg_dsn      <= X"00000001" &  X"01" & X"000A35";   -- //this is taken from GUI -
1159 
 
1160 
   cfg_turnoff_ok_n           <= '0';
1161 
 
1162 
 
1163 
   localId                    <= cfg_bus_number & cfg_device_number & cfg_function_number;
1164 
 
1165 
   pcie_link_width            <= cfg_lstatus(9 downto 4);
1166 
 
1167 
 
1168 
 
1169 
   trn_lnk_up_n_int_i: FDCP
1170 
     generic map (
1171 
                 INIT  => '1'
1172 
             )
1173 
     port map (
1174 
               Q     =>  trn_lnk_up_n,
1175 
               D     =>  trn_lnk_up_n_int1,
1176 
               C     =>  trn_clk,
1177 
               CLR   =>  '0',
1178 
               PRE   =>  '0'
1179 
              );
1180 
 
1181 
 
1182 
   trn_reset_n_i: FDCP
1183 
     generic map (
1184 
                 INIT  => '1'
1185 
              )
1186 
     port map (
1187 
               Q     =>  trn_reset_n,
1188 
               D     =>  trn_reset_n_int1,
1189 
               C     =>  trn_clk,
1190 
               CLR   =>  '0',
1191 
               PRE   =>  '0'
1192 
              );
1193 
 
1194 
 
1195 
-- --------------------------------------------------------------
1196 
-- --------------------------------------------------------------
1197 
 
1198 
make4Lanes: if pcieLanes = 4 generate
1199 
  pcieCore : v6_pcie_v1_3
1200 
    generic map (
1201 
                 PL_FAST_TRAIN  => FALSE
1202 
             )
1203 
    port map (
1204 
 
1205 
      ---------------------------------------------------------
1206 
      -- 1. PCI Express (pci_exp) Interface
1207 
      ---------------------------------------------------------
1208 
 
1209 
      -- Tx
1210 
      pci_exp_txp       =>     pci_exp_txp           ,
1211 
      pci_exp_txn       =>     pci_exp_txn           ,
1212 
 
1213 
      -- Rx
1214 
      pci_exp_rxp       =>     pci_exp_rxp           ,
1215 
      pci_exp_rxn       =>     pci_exp_rxn           ,
1216 
 
1217 
      ---------------------------------------------------------
1218 
      -- 2. Transaction (TRN) Interface
1219 
      ---------------------------------------------------------
1220 
 
1221 
      -- Common
1222 
      trn_clk           =>     trn_clk               ,
1223 
      trn_reset_n       =>     trn_reset_n_int1      ,
1224 
      trn_lnk_up_n      =>     trn_lnk_up_n_int1     ,
1225 
 
1226 
      -- Tx
1227 
      trn_tbuf_av       =>     trn_tbuf_av           ,
1228 
      trn_tcfg_req_n    =>     trn_tcfg_req_n        ,
1229 
      trn_terr_drop_n   =>     trn_terr_drop_n       ,
1230 
      trn_tdst_rdy_n    =>     trn_tdst_rdy_n        ,
1231 
      trn_td            =>     trn_td                ,
1232 
      trn_trem_n        =>     trn_trem_n(0)         ,
1233 
      trn_tsof_n        =>     trn_tsof_n            ,
1234 
      trn_teof_n        =>     trn_teof_n            ,
1235 
      trn_tsrc_rdy_n    =>     trn_tsrc_rdy_n        ,
1236 
      trn_tsrc_dsc_n    =>     trn_tsrc_dsc_n        ,
1237 
      trn_terrfwd_n     =>     trn_terrfwd_n         ,
1238 
      trn_tcfg_gnt_n    =>     trn_tcfg_gnt_n        ,
1239 
      trn_tstr_n        =>     trn_tstr_n            ,
1240 
 
1241 
      -- Rx
1242 
      trn_rd            =>     trn_rd                ,
1243 
      trn_rrem_n        =>     trn_rrem_n(0)         ,
1244 
      trn_rsof_n        =>     trn_rsof_n            ,
1245 
      trn_reof_n        =>     trn_reof_n            ,
1246 
      trn_rsrc_rdy_n    =>     trn_rsrc_rdy_n        ,
1247 
      trn_rsrc_dsc_n    =>     trn_rsrc_dsc_n        ,
1248 
      trn_rerrfwd_n     =>     trn_rerrfwd_n         ,
1249 
      trn_rbar_hit_n    =>     trn_rbar_hit_n        ,
1250 
      trn_rdst_rdy_n    =>     trn_rdst_rdy_n        ,
1251 
      trn_rnp_ok_n      =>     trn_rnp_ok_n          ,
1252 
 
1253 
      -- Flow Control
1254 
      trn_fc_cpld       =>     trn_fc_cpld           ,
1255 
      trn_fc_cplh       =>     trn_fc_cplh           ,
1256 
      trn_fc_npd        =>     trn_fc_npd            ,
1257 
      trn_fc_nph        =>     trn_fc_nph            ,
1258 
      trn_fc_pd         =>     trn_fc_pd             ,
1259 
      trn_fc_ph         =>     trn_fc_ph             ,
1260 
      trn_fc_sel        =>     trn_fc_sel            ,
1261 
 
1262 
 
1263 
      ---------------------------------------------------------
1264 
      -- 3. Configuration (CFG) Interface
1265 
      ---------------------------------------------------------
1266 
 
1267 
      cfg_do                   =>     cfg_do                     ,
1268 
      cfg_rd_wr_done_n         =>     cfg_rd_wr_done_n           ,
1269 
      cfg_di                   =>     cfg_di                     ,
1270 
      cfg_byte_en_n            =>     cfg_byte_en_n              ,
1271 
      cfg_dwaddr               =>     cfg_dwaddr                 ,
1272 
      cfg_wr_en_n              =>     cfg_wr_en_n                ,
1273 
      cfg_rd_en_n              =>     cfg_rd_en_n                ,
1274 
 
1275 
      cfg_err_cor_n            =>     cfg_err_cor_n              ,
1276 
      cfg_err_ur_n             =>     cfg_err_ur_n               ,
1277 
      cfg_err_ecrc_n           =>     cfg_err_ecrc_n             ,
1278 
      cfg_err_cpl_timeout_n    =>     cfg_err_cpl_timeout_n      ,
1279 
      cfg_err_cpl_abort_n      =>     cfg_err_cpl_abort_n        ,
1280 
      cfg_err_cpl_unexpect_n   =>     cfg_err_cpl_unexpect_n     ,
1281 
      cfg_err_posted_n         =>     cfg_err_posted_n           ,
1282 
      cfg_err_locked_n         =>     cfg_err_locked_n           ,
1283 
      cfg_err_tlp_cpl_header   =>     cfg_err_tlp_cpl_header     ,
1284 
      cfg_err_cpl_rdy_n        =>     cfg_err_cpl_rdy_n          ,
1285 
      cfg_interrupt_n          =>     cfg_interrupt_n            ,
1286 
      cfg_interrupt_rdy_n      =>     cfg_interrupt_rdy_n        ,
1287 
      cfg_interrupt_assert_n   =>     cfg_interrupt_assert_n     ,
1288 
      cfg_interrupt_di         =>     cfg_interrupt_di           ,
1289 
      cfg_interrupt_do         =>     cfg_interrupt_do           ,
1290 
      cfg_interrupt_mmenable   =>     cfg_interrupt_mmenable     ,
1291 
      cfg_interrupt_msienable  =>     cfg_interrupt_msienable    ,
1292 
      cfg_interrupt_msixenable =>     cfg_interrupt_msixenable   ,
1293 
      cfg_interrupt_msixfm     =>     cfg_interrupt_msixfm       ,
1294 
      cfg_turnoff_ok_n         =>     cfg_turnoff_ok_n           ,
1295 
      cfg_to_turnoff_n         =>     cfg_to_turnoff_n           ,
1296 
      cfg_trn_pending_n        =>     cfg_trn_pending_n          ,
1297 
      cfg_pm_wake_n            =>     cfg_pm_wake_n              ,
1298 
      cfg_bus_number           =>     cfg_bus_number             ,
1299 
      cfg_device_number        =>     cfg_device_number          ,
1300 
      cfg_function_number      =>     cfg_function_number        ,
1301 
      cfg_status               =>     cfg_status                 ,
1302 
      cfg_command              =>     cfg_command                ,
1303 
      cfg_dstatus              =>     cfg_dstatus                ,
1304 
      cfg_dcommand             =>     cfg_dcommand               ,
1305 
      cfg_lstatus              =>     cfg_lstatus                ,
1306 
      cfg_lcommand             =>     cfg_lcommand               ,
1307 
      cfg_dcommand2            =>     cfg_dcommand2              ,
1308 
      cfg_pcie_link_state_n    =>     cfg_pcie_link_state_n      ,
1309 
      cfg_dsn                  =>     cfg_dsn                    ,
1310 
 
1311 
      ---------------------------------------------------------
1312 
      -- 4. Physical Layer Control and Status (PL) Interface
1313 
      ---------------------------------------------------------
1314 
 
1315 
      pl_initial_link_width            =>     pl_initial_link_width           ,
1316 
      pl_lane_reversal_mode            =>     pl_lane_reversal_mode           ,
1317 
      pl_link_gen2_capable             =>     pl_link_gen2_capable            ,
1318 
      pl_link_partner_gen2_supported   =>     pl_link_partner_gen2_supported  ,
1319 
      pl_link_upcfg_capable            =>     pl_link_upcfg_capable           ,
1320 
      pl_ltssm_state                   =>     pl_ltssm_state                  ,
1321 
      pl_received_hot_rst              =>     pl_received_hot_rst             ,
1322 
      pl_sel_link_rate                 =>     pl_sel_link_rate                ,
1323 
      pl_sel_link_width                =>     pl_sel_link_width               ,
1324 
      pl_directed_link_auton           =>     pl_directed_link_auton          ,
1325 
      pl_directed_link_change          =>     pl_directed_link_change         ,
1326 
      pl_directed_link_speed           =>     pl_directed_link_speed          ,
1327 
      pl_directed_link_width           =>     pl_directed_link_width          ,
1328 
      pl_upstream_prefer_deemph        =>     pl_upstream_prefer_deemph       ,
1329 
 
1330 
      ---------------------------------------------------------
1331 
      -- 5. System  (SYS) Interface
1332 
      ---------------------------------------------------------
1333 
 
1334 
      sys_clk                          =>     sys_clk_c     ,
1335 
      sys_reset_n                      =>     sys_reset_n_c
1336 
 
1337 
);
1338 
 
1339 
 end generate;
1340 
 
1341 
 
1342 
make8Lanes: if pcieLanes = 8 generate
1343 
  pcieCore : v6_pcie_v1_3x8
1344 
    generic map (
1345 
                 PL_FAST_TRAIN  => FALSE
1346 
             )
1347 
    port map (
1348 
 
1349 
      ---------------------------------------------------------
1350 
      -- 1. PCI Express (pci_exp) Interface
1351 
      ---------------------------------------------------------
1352 
 
1353 
      -- Tx
1354 
      pci_exp_txp       =>     pci_exp_txp           ,
1355 
      pci_exp_txn       =>     pci_exp_txn           ,
1356 
 
1357 
      -- Rx
1358 
      pci_exp_rxp       =>     pci_exp_rxp           ,
1359 
      pci_exp_rxn       =>     pci_exp_rxn           ,
1360 
 
1361 
      ---------------------------------------------------------
1362 
      -- 2. Transaction (TRN) Interface
1363 
      ---------------------------------------------------------
1364 
 
1365 
      -- Common
1366 
      trn_clk           =>     trn_clk               ,
1367 
      trn_reset_n       =>     trn_reset_n_int1      ,
1368 
      trn_lnk_up_n      =>     trn_lnk_up_n_int1     ,
1369 
 
1370 
      -- Tx
1371 
      trn_tbuf_av       =>     trn_tbuf_av           ,
1372 
      trn_tcfg_req_n    =>     trn_tcfg_req_n        ,
1373 
      trn_terr_drop_n   =>     trn_terr_drop_n       ,
1374 
      trn_tdst_rdy_n    =>     trn_tdst_rdy_n        ,
1375 
      trn_td            =>     trn_td                ,
1376 
      trn_trem_n        =>     trn_trem_n(0)         ,
1377 
      trn_tsof_n        =>     trn_tsof_n            ,
1378 
      trn_teof_n        =>     trn_teof_n            ,
1379 
      trn_tsrc_rdy_n    =>     trn_tsrc_rdy_n        ,
1380 
      trn_tsrc_dsc_n    =>     trn_tsrc_dsc_n        ,
1381 
      trn_terrfwd_n     =>     trn_terrfwd_n         ,
1382 
      trn_tcfg_gnt_n    =>     trn_tcfg_gnt_n        ,
1383 
      trn_tstr_n        =>     trn_tstr_n            ,
1384 
 
1385 
      -- Rx
1386 
      trn_rd            =>     trn_rd                ,
1387 
      trn_rrem_n        =>     trn_rrem_n(0)         ,
1388 
      trn_rsof_n        =>     trn_rsof_n            ,
1389 
      trn_reof_n        =>     trn_reof_n            ,
1390 
      trn_rsrc_rdy_n    =>     trn_rsrc_rdy_n        ,
1391 
      trn_rsrc_dsc_n    =>     trn_rsrc_dsc_n        ,
1392 
      trn_rerrfwd_n     =>     trn_rerrfwd_n         ,
1393 
      trn_rbar_hit_n    =>     trn_rbar_hit_n        ,
1394 
      trn_rdst_rdy_n    =>     trn_rdst_rdy_n        ,
1395 
      trn_rnp_ok_n      =>     trn_rnp_ok_n          ,
1396 
 
1397 
      -- Flow Control
1398 
      trn_fc_cpld       =>     trn_fc_cpld           ,
1399 
      trn_fc_cplh       =>     trn_fc_cplh           ,
1400 
      trn_fc_npd        =>     trn_fc_npd            ,
1401 
      trn_fc_nph        =>     trn_fc_nph            ,
1402 
      trn_fc_pd         =>     trn_fc_pd             ,
1403 
      trn_fc_ph         =>     trn_fc_ph             ,
1404 
      trn_fc_sel        =>     trn_fc_sel            ,
1405 
 
1406 
 
1407 
      ---------------------------------------------------------
1408 
      -- 3. Configuration (CFG) Interface
1409 
      ---------------------------------------------------------
1410 
 
1411 
      cfg_do                   =>     cfg_do                     ,
1412 
      cfg_rd_wr_done_n         =>     cfg_rd_wr_done_n           ,
1413 
      cfg_di                   =>     cfg_di                     ,
1414 
      cfg_byte_en_n            =>     cfg_byte_en_n              ,
1415 
      cfg_dwaddr               =>     cfg_dwaddr                 ,
1416 
      cfg_wr_en_n              =>     cfg_wr_en_n                ,
1417 
      cfg_rd_en_n              =>     cfg_rd_en_n                ,
1418 
 
1419 
      cfg_err_cor_n            =>     cfg_err_cor_n              ,
1420 
      cfg_err_ur_n             =>     cfg_err_ur_n               ,
1421 
      cfg_err_ecrc_n           =>     cfg_err_ecrc_n             ,
1422 
      cfg_err_cpl_timeout_n    =>     cfg_err_cpl_timeout_n      ,
1423 
      cfg_err_cpl_abort_n      =>     cfg_err_cpl_abort_n        ,
1424 
      cfg_err_cpl_unexpect_n   =>     cfg_err_cpl_unexpect_n     ,
1425 
      cfg_err_posted_n         =>     cfg_err_posted_n           ,
1426 
      cfg_err_locked_n         =>     cfg_err_locked_n           ,
1427 
      cfg_err_tlp_cpl_header   =>     cfg_err_tlp_cpl_header     ,
1428 
      cfg_err_cpl_rdy_n        =>     cfg_err_cpl_rdy_n          ,
1429 
      cfg_interrupt_n          =>     cfg_interrupt_n            ,
1430 
      cfg_interrupt_rdy_n      =>     cfg_interrupt_rdy_n        ,
1431 
      cfg_interrupt_assert_n   =>     cfg_interrupt_assert_n     ,
1432 
      cfg_interrupt_di         =>     cfg_interrupt_di           ,
1433 
      cfg_interrupt_do         =>     cfg_interrupt_do           ,
1434 
      cfg_interrupt_mmenable   =>     cfg_interrupt_mmenable     ,
1435 
      cfg_interrupt_msienable  =>     cfg_interrupt_msienable    ,
1436 
      cfg_interrupt_msixenable =>     cfg_interrupt_msixenable   ,
1437 
      cfg_interrupt_msixfm     =>     cfg_interrupt_msixfm       ,
1438 
      cfg_turnoff_ok_n         =>     cfg_turnoff_ok_n           ,
1439 
      cfg_to_turnoff_n         =>     cfg_to_turnoff_n           ,
1440 
      cfg_trn_pending_n        =>     cfg_trn_pending_n          ,
1441 
      cfg_pm_wake_n            =>     cfg_pm_wake_n              ,
1442 
      cfg_bus_number           =>     cfg_bus_number             ,
1443 
      cfg_device_number        =>     cfg_device_number          ,
1444 
      cfg_function_number      =>     cfg_function_number        ,
1445 
      cfg_status               =>     cfg_status                 ,
1446 
      cfg_command              =>     cfg_command                ,
1447 
      cfg_dstatus              =>     cfg_dstatus                ,
1448 
      cfg_dcommand             =>     cfg_dcommand               ,
1449 
      cfg_lstatus              =>     cfg_lstatus                ,
1450 
      cfg_lcommand             =>     cfg_lcommand               ,
1451 
      cfg_dcommand2            =>     cfg_dcommand2              ,
1452 
      cfg_pcie_link_state_n    =>     cfg_pcie_link_state_n      ,
1453 
      cfg_dsn                  =>     cfg_dsn                    ,
1454 
 
1455 
      ---------------------------------------------------------
1456 
      -- 4. Physical Layer Control and Status (PL) Interface
1457 
      ---------------------------------------------------------
1458 
 
1459 
      pl_initial_link_width            =>     pl_initial_link_width           ,
1460 
      pl_lane_reversal_mode            =>     pl_lane_reversal_mode           ,
1461 
      pl_link_gen2_capable             =>     pl_link_gen2_capable            ,
1462 
      pl_link_partner_gen2_supported   =>     pl_link_partner_gen2_supported  ,
1463 
      pl_link_upcfg_capable            =>     pl_link_upcfg_capable           ,
1464 
      pl_ltssm_state                   =>     pl_ltssm_state                  ,
1465 
      pl_received_hot_rst              =>     pl_received_hot_rst             ,
1466 
      pl_sel_link_rate                 =>     pl_sel_link_rate                ,
1467 
      pl_sel_link_width                =>     pl_sel_link_width               ,
1468 
      pl_directed_link_auton           =>     pl_directed_link_auton          ,
1469 
      pl_directed_link_change          =>     pl_directed_link_change         ,
1470 
      pl_directed_link_speed           =>     pl_directed_link_speed          ,
1471 
      pl_directed_link_width           =>     pl_directed_link_width          ,
1472 
      pl_upstream_prefer_deemph        =>     pl_upstream_prefer_deemph       ,
1473 
 
1474 
      ---------------------------------------------------------
1475 
      -- 5. System  (SYS) Interface
1476 
      ---------------------------------------------------------
1477 
 
1478 
      sys_clk                          =>     sys_clk_c     ,
1479 
      sys_reset_n                      =>     sys_reset_n_c
1480 
 
1481 
);
1482 
 
1483 
 end generate;
1484 
 
1485 
 
1486 
   DAQ_irq              <= eb_empty;
1487 
 
1488 
 
1489 
-- ---------------------------------------------------------------
1490 
-- tlp control module
1491 
--
1492 
   trn_rrem_n(7 downto 1) <= X"0" & trn_rrem_n(0) & trn_rrem_n(0) & trn_rrem_n(0);
1493 
 
1494 
   theTlpControl:
1495 
   tlpControl
1496 
   port map (
1497 
 
1498 
           mbuf_UserFull               => '0'                 ,
1499 
           trn_Blinker                 => trn_Blinker         ,
1500 
 
1501 
           -- DCB protocol interface
1502 
           protocol_link_act           =>  protocol_link_act  ,  -- IN  std_logic_vector(2-1 downto 0);
1503 
           protocol_rst                =>  protocol_rst       ,  -- OUT std_logic;
1504 
 
1505 
           Link_Buf_Full               =>  daq_rstop          ,  -- IN  std_logic;
1506 
 
1507 
           -- Interrupter triggers
1508 
           DAQ_irq                     =>  DAQ_irq            ,  -- IN  std_logic;
1509 
           CTL_irq                     =>  CTL_irq            ,  -- IN  std_logic;
1510 
           DLM_irq                     =>  DLM_irq            ,  -- IN  std_logic;
1511 
 
1512 
           -- Fabric side: CTL Rx
1513 
           ctl_rv                      =>  ctl_rv             ,  -- OUT std_logic;
1514 
           ctl_rd                      =>  ctl_rd             ,  -- OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1515 
 
1516 
           -- Fabric side: CTL Tx
1517 
           ctl_ttake                   =>  ctl_ttake          ,  -- OUT std_logic;
1518 
           ctl_tv                      =>  ctl_tv             ,  -- IN  std_logic;
1519 
           ctl_td                      =>  ctl_td             ,  -- IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1520 
           ctl_tstop                   =>  ctl_tstop          ,  -- OUT std_logic;
1521 
 
1522 
           ctl_reset                   =>  ctl_reset          ,  -- OUT std_logic;
1523 
           ctl_status                  =>  ctl_status         ,  -- IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1524 
 
1525 
           -- Fabric side: DLM Rx
1526 
           dlm_rv                      =>  dlm_rv             ,  -- OUT std_logic;
1527 
           dlm_rd                      =>  dlm_rd             ,  -- OUT std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1528 
 
1529 
           -- Fabric side: DLM Tx
1530 
           dlm_tv                      =>  dlm_tv             ,  -- IN  std_logic;
1531 
           dlm_td                      =>  dlm_td             ,  -- IN  std_logic_vector(C_DBUS_WIDTH/2-1 downto 0);
1532 
 
1533 
           -- Event Buffer FIFO interface
1534 
           eb_FIFO_we                  => eb_we               , --  OUT std_logic;
1535 
           eb_FIFO_wsof                => eb_wsof             , --  OUT std_logic;
1536 
           eb_FIFO_weof                => eb_weof             , --  OUT std_logic;
1537 
           eb_FIFO_din                 => eb_din(C_DBUS_WIDTH-1 downto 0) , --  OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1538 
 
1539 
           eb_FIFO_re                  => eb_re               , --  OUT std_logic;
1540 
           eb_FIFO_empty               => eb_empty            , --  IN  std_logic;
1541 
           eb_FIFO_qout                => eb_dout(C_DBUS_WIDTH-1 downto 0) , --  IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1542 
           eb_FIFO_data_count          => eb_data_count       , --  IN  std_logic_vector(C_FIFO_DC_WIDTH downto 0);
1543 
 
1544 
           eb_FIFO_ow                  => eb_FIFO_ow          , --  IN  std_logic;
1545 
 
1546 
           pio_reading_status          => pio_reading_status  , --  OUT std_logic;
1547 
 
1548 
           eb_FIFO_Status              => eb_FIFO_Status      , --  IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1549 
           eb_FIFO_Rst                 => eb_rst              , --  OUT std_logic;
1550 
 
1551 
           -- Debugging signals
1552 
           DMA_us_Done                 => LEDs_IO_pin(7)      , -- OUT std_logic;
1553 
           DMA_us_Busy                 => open                , -- OUT std_logic;
1554 
           DMA_us_Busy_LED             => LEDs_IO_pin(6)      , -- OUT std_logic;
1555 
           DMA_ds_Done                 => LEDs_IO_pin(5)      , -- OUT std_logic;
1556 
           DMA_ds_Busy                 => open                , -- OUT std_logic;
1557 
           DMA_ds_Busy_LED             => LEDs_IO_pin(4)      , -- OUT std_logic;
1558 
 
1559 
           -------------------
1560 
           -- DDR Interface
1561 
           DDR_Ready                   => DDR_Ready           , --  IN    std_logic;
1562 
 
1563 
           DDR_wr_sof                  => DDR_wr_sof          , --  OUT   std_logic;
1564 
           DDR_wr_eof                  => DDR_wr_eof          , --  OUT   std_logic;
1565 
           DDR_wr_v                    => DDR_wr_v            , --  OUT   std_logic;
1566 
           DDR_wr_FA                   => DDR_wr_FA           , --  OUT   std_logic;
1567 
           DDR_wr_Shift                => DDR_wr_Shift        , --  OUT   std_logic;
1568 
           DDR_wr_Mask                 => DDR_wr_Mask         , --  OUT   std_logic_vector(2-1 downto 0);
1569 
           DDR_wr_din                  => DDR_wr_din          , --  OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1570 
           DDR_wr_full                 => DDR_wr_full         , --  IN    std_logic;
1571 
 
1572 
           DDR_rdc_sof                 => DDR_rdc_sof         , --  OUT   std_logic;
1573 
           DDR_rdc_eof                 => DDR_rdc_eof         , --  OUT   std_logic;
1574 
           DDR_rdc_v                   => DDR_rdc_v           , --  OUT   std_logic;
1575 
           DDR_rdc_FA                  => DDR_rdc_FA          , --  OUT   std_logic;
1576 
           DDR_rdc_Shift               => DDR_rdc_Shift       , --  OUT   std_logic;
1577 
           DDR_rdc_din                 => DDR_rdc_din         , --  OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1578 
           DDR_rdc_full                => DDR_rdc_full        , --  IN    std_logic;
1579 
 
1580 
--           DDR_rdD_sof                 => DDR_rdD_sof         , --  IN    std_logic;
1581 
--           DDR_rdD_eof                 => DDR_rdD_eof         , --  IN    std_logic;
1582 
--           DDR_rdDout_V                => DDR_rdDout_V        , --  IN    std_logic;
1583 
--           DDR_rdDout                  => DDR_rdDout          , --  IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1584 
 
1585 
           -- DDR payload FIFO Read Port
1586 
           DDR_FIFO_RdEn               => DDR_FIFO_RdEn      ,  -- OUT std_logic;
1587 
           DDR_FIFO_Empty              => DDR_FIFO_Empty     ,  -- IN  std_logic;
1588 
           DDR_FIFO_RdQout             => DDR_FIFO_RdQout    ,  -- IN  std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1589 
 
1590 
           -- Data generator table write
1591 
           tab_we                      =>  tab_we            ,  -- OUT std_logic_vector(2-1 downto 0);
1592 
           tab_wa                      =>  tab_wa            ,  -- OUT std_logic_vector(12-1 downto 0);
1593 
           tab_wd                      =>  tab_wd            ,  -- OUT std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1594 
 
1595 
           DG_is_Running               =>  dg_running        ,  -- IN  std_logic;
1596 
           DG_Reset                    =>  dg_rst            ,  -- OUT   STD_LOGIC;
1597 
           DG_Mask                     =>  dg_mask           ,  -- OUT   STD_LOGIC
1598 
 
1599 
           -------------------
1600 
           -- Transaction Interface
1601 
           trn_lnk_up_n                => trn_lnk_up_n            ,
1602 
           trn_rsrc_dsc_n              => trn_rsrc_dsc_n          ,
1603 
           trn_rnp_ok_n                => trn_rnp_ok_n            ,
1604 
           trn_tsrc_dsc_n              => trn_tsrc_dsc_n          ,
1605 
           trn_tdst_dsc_n              => trn_tdst_dsc_n          ,
1606 
           trn_tbuf_av                 => trn_tbuf_av             ,
1607 
           trn_terrfwd_n               => trn_terrfwd_n           ,
1608 
 
1609 
           trn_clk                     => trn_clk                 ,
1610 
           trn_reset_n                 => trn_reset_n             ,
1611 
           trn_rsrc_rdy_n              => trn_rsrc_rdy_n          ,
1612 
           trn_tdst_rdy_n              => trn_tdst_rdy_n          ,
1613 
           trn_rsof_n                  => trn_rsof_n              ,
1614 
           trn_reof_n                  => trn_reof_n              ,
1615 
           trn_rerrfwd_n               => trn_rerrfwd_n           ,
1616 
           trn_rrem_n                  => trn_rrem_n              ,
1617 
           trn_rd                      => trn_rd                  ,
1618 
 
1619 
           cfg_interrupt_n             => cfg_interrupt_n         ,
1620 
           cfg_interrupt_rdy_n         => cfg_interrupt_rdy_n     ,
1621 
           cfg_interrupt_mmenable      => cfg_interrupt_mmenable  ,
1622 
           cfg_interrupt_msienable     => cfg_interrupt_msienable ,
1623 
           cfg_interrupt_di            => cfg_interrupt_di        ,
1624 
           cfg_interrupt_do            => cfg_interrupt_do        ,
1625 
           cfg_interrupt_assert_n      => cfg_interrupt_assert_n  ,
1626 
 
1627 
           trn_rbar_hit_n              => trn_rbar_hit_n          ,
1628 
           trn_tsrc_rdy_n              => trn_tsrc_rdy_n          ,
1629 
           trn_rdst_rdy_n              => trn_rdst_rdy_n          ,
1630 
           trn_tsof_n                  => trn_tsof_n              ,
1631 
           trn_teof_n                  => trn_teof_n              ,
1632 
           trn_trem_n                  => trn_trem_n              ,
1633 
           trn_td                      => trn_td                  ,
1634 
 
1635 
           Format_Shower               => Format_Shower           ,
1636 
 
1637 
           cfg_dcommand                => cfg_dcommand            ,
1638 
           pcie_link_width             => pcie_link_width         ,
1639 
           localId                     => localId
1640 
           );
1641 
 
1642 
 
1643 
  -- -----------------------------------------------------------------------
1644 
  --  DDR SDRAM control module
1645 
  --
1646 
   DDRs_ctrl_module:
1647 
   bram_DDRs_Control
1648 
   GENERIC MAP (
1649 
                C_ASYNFIFO_WIDTH    => 72 ,
1650 
                P_SIMULATION        => FALSE
1651 
               )
1652 
   PORT MAP(
1653 
 
1654 
      -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
1655 
      DDR_wr_sof               => DDR_wr_sof          , --  IN    std_logic;
1656 
      DDR_wr_eof               => DDR_wr_eof          , --  IN    std_logic;
1657 
      DDR_wr_v                 => DDR_wr_v            , --  IN    std_logic;
1658 
      DDR_wr_FA                => DDR_wr_FA           , --  IN    std_logic;
1659 
      DDR_wr_Shift             => DDR_wr_Shift        , --  IN    std_logic;
1660 
      DDR_wr_Mask              => DDR_wr_Mask         , --  IN    std_logic_vector(2-1 downto 0);
1661 
      DDR_wr_din               => DDR_wr_din          , --  IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1662 
      DDR_wr_full              => DDR_wr_full         , --  OUT   std_logic;
1663 
 
1664 
      DDR_rdc_sof              => DDR_rdc_sof         , --  IN    std_logic;
1665 
      DDR_rdc_eof              => DDR_rdc_eof         , --  IN    std_logic;
1666 
      DDR_rdc_v                => DDR_rdc_v           , --  IN    std_logic;
1667 
      DDR_rdc_FA               => DDR_rdc_FA          , --  IN    std_logic;
1668 
      DDR_rdc_Shift            => DDR_rdc_Shift       , --  IN    std_logic;
1669 
      DDR_rdc_din              => DDR_rdc_din         , --  IN    std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1670 
      DDR_rdc_full             => DDR_rdc_full        , --  OUT   std_logic;
1671 
 
1672 
--      DDR_rdD_sof              => DDR_rdD_sof         , --  OUT   std_logic;
1673 
--      DDR_rdD_eof              => DDR_rdD_eof         , --  OUT   std_logic;
1674 
--      DDR_rdDout_V             => DDR_rdDout_V        , --  OUT   std_logic;
1675 
--      DDR_rdDout               => DDR_rdDout          , --  OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1676 
 
1677 
      -- DDR payload FIFO Read Port
1678 
      DDR_FIFO_RdEn            => DDR_FIFO_RdEn       ,  -- IN    std_logic;
1679 
      DDR_FIFO_Empty           => DDR_FIFO_Empty      ,  -- OUT   std_logic;
1680 
      DDR_FIFO_RdQout          => DDR_FIFO_RdQout     ,  -- OUT   std_logic_vector(C_DBUS_WIDTH-1 downto 0);
1681 
 
1682 
      -- Common interface
1683 
      DDR_Ready                => DDR_Ready           , --  OUT   std_logic;
1684 
      DDR_Blinker              => DDR_Blinker         , --  OUT   std_logic;
1685 
      mem_clk                  => trn_clk,   -- mem_clk             , --  IN
1686 
      trn_clk                  => trn_clk             , --  IN    std_logic;
1687 
      trn_reset_n              => trn_reset_n           --  IN    std_logic
1688 
    );
1689 
 
1690 
 
1691 
 
1692 
    --
1693 
    -- Event Buffer wrapper
1694 
    --
1695 
    Pseudo_EB: if not USE_DDR2_MODULE generate
1696 
 
1697 
 
1698 
    LEDs_IO_pin(0)    <= trn_reset_n xor Format_Shower;
1699 
    LEDs_IO_pin(1)    <= trn_lnk_up_n;
1700 
    LEDs_IO_pin(2)    <= link_active(0);
1701 
    LEDs_IO_pin(3)    <= trn_Blinker   ;  -- link_active(1);   -- dg_debug_led;
1702 
 
1703 
 
1704 
    event_buffer0:
1705 
    eb_wrapper
1706 
      port map (
1707 
         wr_clk     => trn_clk   ,  -- eb_wclk   ,
1708 
         wr_en      => eb_we_up  ,
1709 
         din        => eb_din_up ,
1710 
         pfull      => eb_pfull  ,
1711 
         full       => eb_full   ,
1712 
 
1713 
         rd_clk     => trn_clk   ,  -- eb_rclk   ,
1714 
         rd_en      => eb_re     ,
1715 
         dout       => eb_dout   ,
1716 
         pempty     => eb_pempty ,
1717 
         empty      => eb_empty  ,
1718 
 
1719 
         data_count => eb_data_count(C_EMU_FIFO_DC_WIDTH-1+1 downto 1) ,
1720 
         rst        => eb_rst
1721 
         );
1722 
 
1723 
--      eb_FIFO_Status(C_FIFO_DC_WIDTH+2)  <= '0';
1724 
      eb_data_count(C_FIFO_DC_WIDTH downto C_EMU_FIFO_DC_WIDTH+1)
1725 
                      <= C_ALL_ZEROS(C_FIFO_DC_WIDTH downto C_EMU_FIFO_DC_WIDTH+1);
1726 
      eb_data_count(0)        -- 64 bits to 32 bits transformation
1727 
                      <= '0';
1728 
      fifo_reset_done <= not eb_rst;
1729 
 
1730 
    end generate;
1731 
 
1732 
 
1733 
 
1734 
--    eb_wclk            <= trn_clk;
1735 
--    eb_rclk            <= trn_clk;
1736 
    eb_din(72-1 downto C_DBUS_WIDTH)       <= (OTHERS=>'0');
1737 
    eb_FIFO_Status(C_DBUS_WIDTH-1 downto C_FIFO_DC_WIDTH+3)
1738 
                         <= (OTHERS=>'0');
1739 
    eb_FIFO_Status(C_FIFO_DC_WIDTH+2 downto 3)
1740 
                         <= eb_data_count(C_FIFO_DC_WIDTH downto 1);
1741 
    eb_FIFO_Status(2)    <= '0';      -- daq_rstop;
1742 
    eb_FIFO_Status(1)    <= eb_pfull;
1743 
    eb_FIFO_Status(0)    <= eb_empty and fifo_reset_done;
1744 
    eb_FIFO_ow           <= eb_we_up and eb_full;
1745 
 
1746 
 
1747 
    --
1748 
    --   .......................
1749 
    --
1750 
 
1751 
    daq_rv              <=  eb_we;
1752 
    daq_rsof            <=  eb_wsof;
1753 
    daq_reof            <=  eb_weof;
1754 
    daq_rd              <=  eb_din(C_DBUS_WIDTH-1 downto 0);
1755 
 
1756 
    eb_we_up            <=  daq_tv;
1757 
    eb_din_up           <=  C_ALL_ZEROS(72-1 downto C_DBUS_WIDTH+2) & daq_tsof & daq_teof & daq_td;
1758 
    daq_tstop           <=  eb_pfull;
1759 
 
1760 
 
1761 
    --
1762 
    --     Protocol Interface
1763 
    --
1764 
    ABB_DCB_Interface0:
1765 
    protocol_IF
1766 
      port map (
1767 
           -- DAQ Tx
1768 
           data2send_start          => data2send_start      ,   -- OUT   std_logic;
1769 
           data2send_end            => data2send_end        ,   -- OUT   std_logic;
1770 
           data2send                => data2send            ,   -- OUT   std_logic_vector(16-1 downto 0);
1771 
           crc_error_send           => crc_error_send       ,   -- OUT   std_logic;
1772 
           data2send_stop           => data2send_stop       ,   -- IN    std_logic;
1773 
 
1774 
           -- DAQ Rx
1775 
           data_rec_start           => data_rec_start       ,   -- IN    std_logic;
1776 
           data_rec_end             => data_rec_end         ,   -- IN    std_logic;
1777 
           data_rec                 => data_rec             ,   -- IN    std_logic_vector(16-1 downto 0);
1778 
           crc_error_rec            => crc_error_rec        ,   -- IN    std_logic;
1779 
           data_rec_stop            => data_rec_stop        ,   -- OUT   std_logic;
1780 
 
1781 
           -- CTL Tx
1782 
           ctrl2send_start          => ctrl2send_start      ,   -- OUT   std_logic;
1783 
           ctrl2send_end            => ctrl2send_end        ,   -- OUT   std_logic;
1784 
           ctrl2send                => ctrl2send            ,   -- OUT   std_logic_vector(16-1 downto 0);
1785 
           ctrl2send_stop           => ctrl2send_stop       ,   -- IN    std_logic;
1786 
 
1787 
           -- CTL Rx
1788 
           ctrl_rec_start           => ctrl_rec_start       ,   -- IN    std_logic;
1789 
           ctrl_rec_end             => ctrl_rec_end         ,   -- IN    std_logic;
1790 
           ctrl_rec                 => ctrl_rec             ,   -- IN    std_logic_vector(16-1 downto 0);
1791 
           ctrl_rec_stop            => ctrl_rec_stop        ,   -- OUT   std_logic;
1792 
 
1793 
           -- DLM Tx
1794 
           dlm2send_va              => dlm2send_va          ,   -- OUT   std_logic;
1795 
           dlm2send_type            => dlm2send_type        ,   -- OUT   std_logic_vector(4-1 downto 0);
1796 
 
1797 
           -- DLM Rx
1798 
           dlm_rec_va               => dlm_rec_va           ,   -- IN    std_logic;
1799 
           dlm_rec_type             => dlm_rec_type         ,   -- IN    std_logic_vector(4-1 downto 0);
1800 
 
1801 
           -- Common signals
1802 
           link_tx_clk              => link_tx_clk          ,   -- IN    std_logic;
1803 
           link_rx_clk              => link_rx_clk          ,   -- IN    std_logic;
1804 
           link_active              => link_active          ,   -- IN    std_logic_vector(2-1 downto 0);
1805 
           protocol_clk             => protocol_clk         ,   -- OUT   std_logic;
1806 
           protocol_res_n           => protocol_res_n       ,   -- OUT   std_logic;
1807 
 
1808 
 
1809 
           -- Fabric side: DAQ Rx
1810 
           daq_rv                   => daq_rv               ,   -- IN    std_logic;
1811 
           daq_rsof                 => daq_rsof             ,   -- IN    std_logic;
1812 
           daq_reof                 => daq_reof             ,   -- IN    std_logic;
1813 
           daq_rd                   => daq_rd               ,   -- IN    std_logic_vector(64-1 downto 0);
1814 
           daq_rstop                => daq_rstop            ,   -- OUT   std_logic;
1815 
 
1816 
           -- Fabric side: DAQ Tx
1817 
           daq_tv                   => daq_tv               ,   -- OUT   std_logic;
1818 
           daq_tsof                 => daq_tsof             ,   -- OUT   std_logic;
1819 
           daq_teof                 => daq_teof             ,   -- OUT   std_logic;
1820 
           daq_td                   => daq_td               ,   -- OUT   std_logic_vector(64-1 downto 0);
1821 
           daq_tstop                => daq_tstop            ,   -- IN    std_logic;
1822 
 
1823 
           -- Fabric side: CTL Rx
1824 
           ctl_rv                   => ctl_rv               ,   -- IN    std_logic;
1825 
           ctl_rd                   => ctl_rd               ,   -- IN    std_logic_vector(32-1 downto 0);
1826 
           ctl_rstop                => ctl_rstop            ,   -- OUT   std_logic;
1827 
 
1828 
           -- Fabric side: CTL Tx
1829 
           ctl_ttake                => ctl_ttake            ,   -- IN    std_logic;
1830 
           ctl_tv                   => ctl_tv               ,   -- OUT   std_logic;
1831 
           ctl_td                   => ctl_td               ,   -- OUT   std_logic_vector(32-1 downto 0);
1832 
           ctl_tstop                => ctl_tstop            ,   -- IN    std_logic;
1833 
 
1834 
           ctl_reset                => ctl_reset            ,   -- IN    std_logic;
1835 
           ctl_status               => ctl_status           ,   -- OUT   std_logic_vector(32-1 downto 0);
1836 
 
1837 
           -- Fabric side: DLM Rx
1838 
           dlm_rv                   => dlm_rv               ,   -- IN    std_logic;
1839 
           dlm_rd                   => dlm_rd               ,   -- IN    std_logic_vector(4-1 downto 0);
1840 
 
1841 
           -- Fabric side: DLM Tx
1842 
           dlm_tv                   => dlm_tv               ,   -- OUT   std_logic;
1843 
           dlm_td                   => dlm_td               ,   -- OUT   std_logic_vector(4-1 downto 0);
1844 
 
1845 
           -- Interrupter triggers
1846 
           DAQ_irq                  => open,  -- DAQ_irq              ,   -- OUT   std_logic;
1847 
           CTL_irq                  => CTL_irq              ,   -- OUT   std_logic;
1848 
           DLM_irq                  => DLM_irq              ,   -- OUT   std_logic;
1849 
 
1850 
           -- Data generator table write port
1851 
           tab_sel                  => '1'                  , -- IN    STD_LOGIC;
1852 
           tab_we                   => tab_we               , -- IN    STD_LOGIC_VECTOR (2-1 downto 0);
1853 
           tab_wa                   => tab_wa               , -- IN    STD_LOGIC_VECTOR (12-1 downto 0);
1854 
           tab_wd                   => tab_wd               , -- IN    STD_LOGIC_VECTOR (64-1 downto 0);
1855 
 
1856 
           -- DG control/status signal
1857 
           dg_running               => dg_running           , -- OUT   STD_LOGIC;
1858 
           dg_mask                  => dg_mask              , -- IN    STD_LOGIC;
1859 
           dg_rst                   => dg_rst               , -- IN    STD_LOGIC
1860 
 
1861 
           -- DG debug signal
1862 
           daq_start_led            => dg_debug_led         , -- OUT   STD_LOGIC;
1863 
 
1864 
           -- Fabric side: Common signals
1865 
           trn_clk                  => trn_clk              ,   -- IN    std_logic;
1866 
           protocol_link_act        => protocol_link_act    ,   -- OUT   std_logic_vector(2-1 downto 0);
1867 
           protocol_rst             => protocol_rst             -- IN    std_logic
1868 
      );
1869 
 
1870 
 
1871 
    --
1872 
    --     Module emulating the link
1873 
    --
1874 
  Gen_EMU_Links: if not USE_OPTO_LINKS generate
1875 
 
1876 
    DCB_Link_module0:
1877 
    pseudo_protocol_module
1878 
      port map (
1879 
           -- DAQ Tx
1880 
           data2send_start          => data2send_start       ,   -- IN    std_logic;
1881 
           data2send_end            => data2send_end         ,   -- IN    std_logic;
1882 
           data2send                => data2send             ,   -- IN    std_logic_vector(16-1 downto 0);
1883 
           crc_error_send           => crc_error_send        ,   -- IN    std_logic;
1884 
           data2send_stop           => data2send_stop        ,   -- OUT   std_logic;
1885 
 
1886 
           -- DAQ Rx
1887 
           data_rec_start           => data_rec_start        ,   -- OUT   std_logic;
1888 
           data_rec_end             => data_rec_end          ,   -- OUT   std_logic;
1889 
           data_rec                 => data_rec              ,   -- OUT   std_logic_vector(16-1 downto 0);
1890 
           crc_error_rec            => crc_error_rec         ,   -- OUT   std_logic;
1891 
           data_rec_stop            => data_rec_stop         ,   -- IN    std_logic;
1892 
 
1893 
           -- CTL Tx
1894 
           ctrl2send_start          => ctrl2send_start       ,   -- IN    std_logic;
1895 
           ctrl2send_end            => ctrl2send_end         ,   -- IN    std_logic;
1896 
           ctrl2send                => ctrl2send             ,   -- IN    std_logic_vector(16-1 downto 0);
1897 
           ctrl2send_stop           => ctrl2send_stop        ,   -- OUT   std_logic;
1898 
 
1899 
           -- CTL Rx
1900 
           ctrl_rec_start           => ctrl_rec_start        ,   -- OUT   std_logic;
1901 
           ctrl_rec_end             => ctrl_rec_end          ,   -- OUT   std_logic;
1902 
           ctrl_rec                 => ctrl_rec              ,   -- OUT   std_logic_vector(16-1 downto 0);
1903 
           ctrl_rec_stop            => ctrl_rec_stop         ,   -- IN    std_logic;
1904 
 
1905 
           -- DLM Tx
1906 
           dlm2send_va              => dlm2send_va           ,   -- IN    std_logic;
1907 
           dlm2send_type            => dlm2send_type         ,   -- IN    std_logic_vector(4-1 downto 0);
1908 
 
1909 
           -- DLM Rx
1910 
           dlm_rec_va               => dlm_rec_va            ,   -- OUT   std_logic;
1911 
           dlm_rec_type             => dlm_rec_type          ,   -- OUT   std_logic_vector(4-1 downto 0);
1912 
 
1913 
           -- dummy pin input  !!!! not really exists
1914 
           dummy_pin_in             => "000",  -- dummy_pin_in          ,   -- IN    std_logic_vector(3-1 downto 0);
1915 
--           dummy_pin_in             => dummy_pin_in          ,   -- IN    std_logic_vector(3-1 downto 0);
1916 
 
1917 
           -- Common interface
1918 
           link_tx_clk              => link_tx_clk           ,   -- OUT   std_logic;
1919 
           link_rx_clk              => link_rx_clk           ,   -- OUT   std_logic;
1920 
           link_active              => link_active           ,   -- OUT   std_logic_vector(2-1 downto 0);
1921 
           clk                      => protocol_clk          ,   -- IN    std_logic;
1922 
           res_n                    => protocol_res_n            -- IN    std_logic
1923 
      );
1924 
 
1925 
 
1926 
  end generate;
1927 
 
1928 
 
1929 
end Behavioral;

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