URL https://opencores.org/ocsvn/pcie_sg_dma/pcie_sg_dma/trunk

Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [ipcore_dir_ISE13.3/] [v6_pcie_v1_7_x4/] [simulation/] [functional/] [simulate_vcs.sh] - Blame information for rev 13

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#!/bin/sh
 
#
# PCI Express Endpoint VCS Run Script
#
 
/bin/rm *.dat
/bin/rm *.log
/bin/rm vcs.key
/bin/rm -rf simv*
/bin/rm -rf csrc
 
vcs   +alwaystrigger +v2k +cli \
      -PP \
      -lca \
      +define+VCS \
      +define+SIMULATION \
      +incdir+../+../tests+../dsport \
      -f xilinx_lib_vcs.f \
      -f board.f
 
if (test -e ./simv); then
  ./simv +TESTNAME=pio_writeReadBack_test0
fi
 

Line No.	Rev	Author	Line
1	13	barabba	`#!/bin/sh`
2
3			`#`
4			`# PCI Express Endpoint VCS Run Script`
5			`#`
6
7			`/bin/rm *.dat`
8			`/bin/rm *.log`
9			`/bin/rm vcs.key`
10			`/bin/rm -rf simv*`
11			`/bin/rm -rf csrc`
12
13			`vcs +alwaystrigger +v2k +cli \`
14			`-PP \`
15			`-lca \`
16			`+define+VCS \`
17			`+define+SIMULATION \`
18			`+incdir+../+../tests+../dsport \`
19			`-f xilinx_lib_vcs.f \`
20			`-f board.f`
21
22			`if (test -e ./simv); then`
23			`./simv +TESTNAME=pio_writeReadBack_test0`
24			`fi`
25

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Subversion Repositories pcie_sg_dma

[/] [pcie_sg_dma/] [branches/] [Virtex6/] [ML605_ISE13.3/] [ipcore_dir_ISE13.3/] [v6_pcie_v1_7_x4/] [simulation/] [functional/] [simulate_vcs.sh] - Blame information for rev 13