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[/] [pdp8/] [trunk/] [pdp8/] [cpu/] [pdf.vhd] - Blame information for rev 2

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------------------------------------------------------------------
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--!
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--! PDP-8 Processor
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--!
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--! \brief
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--!      CPU Panel Data Flag (PDF) Register
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--!
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--! \details
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--!      The Panel Data Flag (PDF) Register controls whether
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--!      indirect data memory accesses by the Control Panel AND,
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--!      TAD, ISZ or DCA instructions reference Panel Memory or
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--!      Main Memory.
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--!
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--!      If the PDF Register is set, indirect data memory
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--!      references as described above access Panel Memory
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--!      (LXPAR asserted).  If the PDF Register is cleared,
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--!      indirect data memory references as described above
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--!      access Main Memory (LXMAR asserted).
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--!
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--!      The PDF Register is modified under the following
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--!      conditions:
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--!      -# the PDF Register is cleared on entry to the Panel
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--!         Mode Interrupt, and
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--!      -# the PDF Register is cleared if the unit is
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--!         configured as a HD-6120 and the unit is in Panel
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--!         Mode (CTRLFF asserted) and a Clear Panel Data Flag
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--!         (CPD) instruction is executed.
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--!      -# the PDF Register is set if the unit is
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--!         configured as a HD-6120 and the unit is in Panel
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--!         Mode (CTRLFF asserted) and a Set Panel Data Flag
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--!         (SPD) instruction is executed.
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--!
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--! \file
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--!      pdf.vhd
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--!
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--! \author
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--!      Rob Doyle - doyle (at) cox (dot) net
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--!
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--------------------------------------------------------------------
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--
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--  Copyright (C) 2009, 2010, 2011 Rob Doyle
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--
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-- This source file may be used and distributed without
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-- restriction provided that this copyright statement is not
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-- removed from the file and that any derivative work contains
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-- the original copyright notice and the associated disclaimer.
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--
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-- This source file is free software; you can redistribute it
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-- and/or modify it under the terms of the GNU Lesser General
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-- Public License as published by the Free Software Foundation;
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-- version 2.1 of the License.
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--
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-- This source is distributed in the hope that it will be
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-- useful, but WITHOUT ANY WARRANTY; without even the implied
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-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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-- PURPOSE. See the GNU Lesser General Public License for more
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-- details.
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--
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-- You should have received a copy of the GNU Lesser General
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-- Public License along with this source; if not, download it
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-- from http://www.gnu.org/licenses/lgpl.txt
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--
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--------------------------------------------------------------------
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--
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-- Comments are formatted for doxygen
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--
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library ieee;                                   --! IEEE Library
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use ieee.std_logic_1164.all;                    --! IEEE 1164
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use work.cpu_types.all;                         --! Types
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--
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--! CPU Panel Data Flag (PDF) Register Entity
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--
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entity ePDF is port (
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    sys   : in  sys_t;                          --! Clock/Reset
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    pdfOP : in  pdfOP_t;                        --! PDF Operation
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    PDF   : out std_logic                       --! PDF Output
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);
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end ePDF;
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--
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--! CPU Panel Data Flag (PDF) Register RTL
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--
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architecture rtl of ePDF is
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    signal pdfREG : std_logic;                  --! Panel Data Flag
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    signal pdfMUX : std_logic;                  --! Panel Data Flag Multiplexer
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begin
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    --
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    -- PDF Multiplexer
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    --
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    with pdfOP select
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        pdfMUX <= pdfREG when pdfopNOP,
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                  '0'    when pdfopCLR,
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                  '1'    when pdfopSET;
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    --
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    --! PDF Register
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    --
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    REG_PDF : process(sys)
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    begin
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        if sys.rst = '1' then
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            pdfREG <= '0';
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        elsif rising_edge(sys.clk) then
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            pdfREG <= pdfMUX;
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        end if;
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    end process REG_PDF;
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    PDF <= pdfREG;
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end rtl;

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