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[/] [pltbutils/] [trunk/] [templates/] [vhdl/] [template2/] [tc1.vhd] - Blame information for rev 101

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----------------------------------------------------------------------
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----                                                              ----
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---- PlTbUtils Testcase Architecture for                          ----
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---- Template Testbench                                           ----
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----                                                              ----
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---- This file is part of the PlTbUtils project                   ----
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---- http://opencores.org/project,pltbutils                       ----
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----                                                              ----
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---- Description:                                                 ----
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---- PlTbUtils is a collection of functions, procedures and       ----
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---- components for easily creating stimuli and checking response ----
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---- in automatic self-checking testbenches.                      ----
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----                                                              ----
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---- This file is a template, which can be used as a base when    ----
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---- testbenches which use PlTbUtils.                             ----
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---- Copy this file to your preferred location and rename the     ----
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---- copied file and its contents, by replacing the word          ---- 
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---- "templateXX" with a name for your design.                    ----
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---- Also remove informative comments enclosed in < ... > .       ----
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----                                                              ----
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----                                                              ----
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---- To Do:                                                       ----
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---- -                                                            ----
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----                                                              ----
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---- Author(s):                                                   ----
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---- - Per Larsson, pela.opencores@gmail.com                      ----
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----                                                              ----
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----------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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--use work.txt_util.all;
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use work.pltbutils_func_pkg.all;
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architecture tc1 of tc_template2 is
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begin
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  p_tc1 : process
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    variable pltbv  : pltbv_t := C_PLTBV_INIT;
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  begin
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    startsim("tc1", G_SKIPTESTS, pltbv, pltbs);
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    rst         <= '1'; -- Template example
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    -- < Template info: initialize other DUT stimuli here. >
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    starttest(1, "Reset test", pltbv, pltbs); -- Template example
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    if is_test_active(pltbv) then
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      waitclks(2, clk, pltbv, pltbs); -- Template example
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      check("template_signal during reset", template_signal, 0, pltbv, pltbs); -- Template example
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      -- < Template info: check other DUT outputs here. 
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      rst  <= '0'; -- Template example
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    end if; -- is_test_active()
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    endtest(pltbv, pltbs);
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    starttest(2, "Template test", pltbv, pltbs);
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    if is_test_active(pltbv) then
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      -- < Template info: set all relevant DUT inputs here. >
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      waitclks(2, clk, pltbv, pltbs); -- Template example
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      -- < Template info: check all relevant DUT outputs here. >
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    end if; -- is_test_active()
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    endtest(pltbv, pltbs);
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    -- < Template info: add more tests here. >
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    endsim(pltbv, pltbs, true);
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    wait;
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  end process p_tc1;
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end architecture tc1;

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