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panda_emc |
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--
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-- Copyright (C) 2011 Peter Lemmens, PANDA collaboration
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-- p.j.j.lemmens@rug.nl
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-- http://www-panda.gsi.de
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--
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-- As a reference, please use:
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-- E. Guliyev, M. Kavatsyuk, P.J.J. Lemmens, G. Tambave, H. Loehner,
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-- "VHDL Implementation of Feature-Extraction Algorithm for the PANDA Electromagnetic Calorimeter"
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-- Nuclear Inst. and Methods in Physics Research, A ....
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--
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU Lesser General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU Lesser General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111 USA
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--
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-----------------------------------------------------------------------------------------------
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-----------------------------------------------------------------------------------------------
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-- Company: KVI (Kernfysisch Versneller Instituut -- Groningen, The Netherlands
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-- Author: P.J.J. Lemmens
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-- Design Name: mwd_programmable
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-- Module Name: MWD_programmable.vhd
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-- Description: moving-window deconvolution algorithm (MWD) with programmable
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-- filter-length (power of 2) and decay-correction parameter
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-- Intended for use with 'slow' logarithmic-decaying pulses that
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-- occur for instance when a particle/photon strikes a photo-diode
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-----------------------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_SIGNED.ALL;
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entity mwd_programmable is
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generic( MAX_MWD_PWR : natural);
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Port (rst : in STD_LOGIC;
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clk : in STD_LOGIC;
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enable : in STD_LOGIC;
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program : in std_logic;
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mwd_pwr_in : in std_logic_vector(7 downto 0);
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data_in : in STD_LOGIC_VECTOR;
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correction_in : in STD_LOGIC_VECTOR;
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data_out : out STD_LOGIC_VECTOR
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);
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end mwd_programmable;
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architecture Behavioral of mwd_programmable is
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constant WIDTH : natural := data_in'length;
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constant M_WIDTH : natural := 18; -- Multiplier width ; xilinx MULT18x18_SIO
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component window_subtractor_programmable
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generic( FORWARD : boolean;
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MAX_MWD_PWR : natural);
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Port (rst : in STD_LOGIC;
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clk : in STD_LOGIC;
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enable : IN STD_LOGIC ;
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program : in STD_LOGIC;
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window_pwr_in : in STD_LOGIC_VECTOR(7 downto 0);
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data_in : in STD_LOGIC_VECTOR;
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data_out : out STD_LOGIC_VECTOR
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);
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end component;
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component moving_average_programmable
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generic(MEM_PWR : natural);
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port (rst : in std_logic;
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clk : in std_logic;
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enable : in std_logic;
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program : in std_logic;
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avg_pwr_in : in std_logic_vector(7 downto 0);
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data_in : in std_logic_vector;
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data_out : out std_logic_vector
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);
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end component;
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----------------------------------------------------------------------------------------------------------
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--The calculations of and with correction factor introduce interesting problems combined with
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--the fact that the dedicated hardware multipliers in Xilinx Spartan III are 18/36bit wide(fixed)
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--
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--(1) As we have to multiply with a sum over (2^WINDOW_PWR) samples, the sum should be
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--(WIDTH+WINDOW_PWR)-bits wide. However if this width exceeds 18bit we will have to truncate the result,
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--effectively dividing by (2^(lost#bits)). We can identify 3 situations where (WIDTH+WINDOW_PWR)<18,
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--(WIDTH+WINDOW_PWR)=18 and (WIDTH+WINDOW_PWR)>18 that require different approaches making a generic and
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--scalable solution all but impossible.
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--
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--(2) The correction factor on the other hand is a real number <1 which we want to convert to a usefull
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--integer value in order to be able to do a cost-effective multiplication. In the given example/situation
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--correction_factor = 0.69314718/tau = 0.69314718 / 1250 ~ 0.554517e-3. This allows for a multiplication
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--by 2^28 while still remaining within 18bits (as 262143 is the max int in 18bit); result: 148852
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--
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----------------------------------------------------------------------------------------------------------
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--
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--Example for 16-bit data and a WINDOW_PWR of 6 (64 sample window):
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--** ((WIDTH+WINDOW_PWR)= 16 + 6 = 22bit, fitting into 18bit means a loss of 4-bit equals a division by 16 !!
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--** Correction factor multiplication (2) gives us a gain of 28-bit, thus effectively the PRODUCT will be 2^24 too high
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--
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--************************************************************
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--**** the lower 24 bits should therefore be discarded !! ****
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--************************************************************
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--
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----------------------------------------------------------------------------------------------------------
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-- constant Fsmp : real := 50.0e6; -- Sample frequency 50MHz
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-- constant tau : real := (0.0000125 * Fsmp); -- calculate time-constant
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-- constant ln2 : real := 0.69314718; -- natural log of 2
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-- constant correction_factor : integer range 0 to (2**18 - 1) := integer((ln2/tau) * real(2**24)); -- decay correction weight*(2^24)
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-- constant correction_factor : std_logic_vector(17 downto 0) := conv_std_logic_vector(signed(148852), 18);
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-- constant CORRECTION_FACTOR : std_logic_vector(17 downto 0) := conv_std_logic_vector(74426, 18); -- = (ln(2)/tau) * 2^26)
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-- this should give a integer value of correction_factor=18607 which still fits
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-- within the 18bit (2^18=262144)... 2^27 is max !!
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signal rst_S : std_logic := '1';
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signal clk_S : std_logic := '0';
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signal enable_S : std_logic := '0';
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signal data_in_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal program_S : std_logic := '0';
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signal mwd_pwr_S : std_logic_vector(7 downto 0) := x"05";
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signal diff_data_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal decay_corr_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal average_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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signal mult_sum_S : std_logic_vector(M_WIDTH - 1 downto 0) := (others => '0');
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signal factor_S : std_logic_vector(M_WIDTH - 1 downto 0) := conv_std_logic_vector(37213, M_WIDTH);
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signal product36 : std_logic_vector(35 downto 0) := (others => '0');
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signal data_out_S : std_logic_vector(WIDTH - 1 downto 0) := (others => '0');
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-----------------------------------------------------------------------
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begin
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rdif : window_subtractor_programmable
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generic map(FORWARD => true,
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MAX_MWD_PWR => MAX_MWD_PWR)
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Port map( rst => rst_S,
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clk => clk_S,
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enable => enable_S,
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program => program_S,
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window_pwr_in => mwd_pwr_S,
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data_in => data_in_S,
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data_out => diff_data_S
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);
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mwd_sample_sum : moving_average_programmable
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generic map(MEM_PWR => MAX_MWD_PWR)
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port map( rst => rst_S,
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clk => clk_S,
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enable => enable_S,
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program => program_S,
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avg_pwr_in => mwd_pwr_S,
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data_in => data_in_S,
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data_out => average_S
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);
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rst_S <= rst;
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clk_S <= clk;
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enable_S <= enable;
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mwd_pwr_S <= mwd_pwr_in;
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factor_S <= conv_std_logic_vector(conv_integer(correction_in), factor_S'length);
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program_S <= program; -- allready synced and single clock by flowcontrol
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data_in_S <= data_in;
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data_out <= data_out_S;
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-- program_proc : process (clk_S)
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-- begin
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-- if rising_edge(clk_S) then
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---- program_S <= program;
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-- if (rst_S = '1') then
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-- mwd_pwr_S <= x"05";
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-- else
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-- if (program = '1') then
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-- if (mwd_pwr_in >= 2) and (mwd_pwr_in <= 6) then
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-- mwd_pwr_S <= mwd_pwr_in;
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-- else
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-- mwd_pwr_S <= x"05";
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-- end if;
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-- factor_S <= conv_std_logic_vector(conv_integer(correction_in), factor_S'length);
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-- end if;
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-- end if;
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-- end if;
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-- end process;
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-- all averages should be multiplied by 2^mwd_pwr (we really need a sum) but this generates overflows
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-- instead we take the average and map it on 18 bit then we choose the fitting correction factor
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mult_sum_S <= conv_std_logic_vector(conv_integer(average_S), M_WIDTH);
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-- READ explanation above !!
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decay_corr_S(15 downto 0) <= product36(35 downto 20); -- WATCH IT !! 36bits !! not 32 !! scale it down 24 bits
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decay_corr_S(decay_corr_S'high downto 16) <= (others => '0'); --
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decay_correction_proc : process(clk_S, rst_S)
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begin
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if (clk_S'event and clk_S = '1') then
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if (rst_S = '1') then
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product36 <= (others => '0');
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data_out_S <= (others => '0');
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else
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if (enable_S = '1') then
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product36 <= mult_sum_S * factor_S;
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data_out_S <= diff_data_S + decay_corr_S;
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end if;
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end if;
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end if;
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end process;
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end Behavioral;
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