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[/] [quad_decoder/] [trunk/] [c_src/] [quad_decoder.c] - Blame information for rev 4

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1 4 scottnortm 
/*-----------------------------------------------------------------------------
2 
*   File:   quad_decoder.c
3 
*   Desc:   Test suite for functional verification of the quadrature
4 
*           decoder module.
5 
*   Date:   Initiated Oct. 2009
6 
*   Auth:   Scott Nortman, Bridge Electronic Design LLC
7 
*
8 
*   Current Version: v1.0.0
9 
*
10 
*   Revision History
11 
*
12 
*
13 
*   When        Who                 What
14 
*   ---------------------------------------------------------------------------
15 
*   10/2009     S. Nortman          Initial development started.
16 
*   7/2010      S. Nortman          Added comments, clean code, release v1.0.0
17 
*
18 
*----------------------------------------------------------------------------*/
19 
 
20 
#include <stdint.h>
21 
#include <stdio.h>
22 
#include <stdlib.h>
23 
#include <drv_ioport.h>
24 
#include "devices.h"
25 
#include "hardware.h"
26 
#include "quad_decoder.h"
27 
 
28 
#ifndef ABS
29 
#define ABS( x )                ( (x < 0)?(0-x):(x) )
30 
#endif
31 
 
32 
/* Number of counts when performing random count test */
33 
#define NUM_CNTS ( 1000 )
34 
 
35 
extern uint8_t quad_irq_flag;
36 
extern uint32_t quad_irq_qsr;
37 
static ioport_t *ioport;
38 
 
39 
#define QUAD_IOPORT_ID  WB_PRTIO_1
40 
 
41 
void quad_dcdr_test( uint32_t base_add )
42 
{
43 
    int32_t temp = 0;
44 
    int32_t delta, count, a, error_count;
45 
    volatile uint32_t *ptr = (volatile uint32_t *)base_add;
46 
    uint8_t errFlag = FALSE;
47 
 
48 
    // Test QCR after reset; we expect 0
49 
    printf("\nTesting reset value of QCR register...\n");
50 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
51 
    if(  temp != 0 )
52 
        printf("QCR register [ FAILED ], value is 0x%08X.\n", temp);
53 
    else
54 
        printf("QCR register [ PASSED ], value is 0x%08X.\n", temp);
55 
 
56 
    //Test QSR after reset; we expect a 0
57 
    printf("\nTesting reset value of QSR register...\n");
58 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
59 
    if(  temp != 0 )
60 
        printf("QSR register [ FAILED ], value is 0x%08X.\n", temp);
61 
    else
62 
        printf("QSR register [ PASSED ], value is 0x%08X.\n", temp);
63 
 
64 
    //Test QRW want 0
65 
    printf("\nTesting reset value of QRW register...\n");
66 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
67 
    if(  temp != 0 )
68 
        printf("QRW register [ FAILED ], value is 0x%08X.\n", temp);
69 
    else
70 
        printf("QRW register [ PASSED ], value is 0x%08X.\n", temp);
71 
 
72 
    printf("Writing all zeros...\n");
73 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) = 0;
74 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) = 0;
75 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0;
76 
 
77 
    printf("\nTesting zero value of QCR register...\n");
78 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
79 
    if(  temp != 0 )
80 
        printf("QCR register [ FAILED ], value is 0x%08X.\n", temp);
81 
    else
82 
        printf("QCR register [ PASSED ], value is 0x%08X.\n", temp);
83 
 
84 
    printf("\nTesting zero value of QSR register...\n");
85 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
86 
    if(  temp != 0 )
87 
        printf("QSR register [ FAILED ], value is 0x%08X.\n", temp);
88 
    else
89 
        printf("QSR register [ PASSED ], value is 0x%08X.\n", temp);
90 
 
91 
    printf("\nTesting zero value of QRW register...\n");
92 
    //temp = QUAD_DCDR_QRW_REG( ptr );
93 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
94 
    if(  temp != 0 )
95 
        printf("QRW register [ FAILED ], value is 0x%08X.\n", temp);
96 
    else
97 
        printf("QRW register [ PASSED ], value is 0x%08X.\n", temp);
98 
 
99 
 
100 
    printf("\nWriting to bit locations in QCR register...\n");
101 
    printf("Writing 1 to bit 0...\n");
102 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_ECNT);
103 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
104 
    if( temp != (1<<QCR_ECNT) )
105 
        printf("QCR bit 0 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<QCR_ECNT), temp );
106 
    else
107 
        printf("QCR bit 0 [ PASSED ], got 0x%08X.\n", temp );
108 
 
109 
    printf("Writing 0 again...\n");
110 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<QCR_ECNT);
111 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
112 
    if( temp )
113 
        printf("QCR bit 0 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<QCR_ECNT), temp );
114 
    else
115 
        printf("QCR bit 0 [ PASSED ], got 0x%08X.\n", temp );
116 
 
117 
    printf("Writing 1 to bit 1...\n");
118 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<1);
119 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
120 
    if( temp != (1<<QCR_CTDR) )
121 
        printf("QCR bit 1 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<QCR_CTDR), temp );
122 
    else
123 
        printf("QCR bit 1 [ PASSED ], got 0x%08X.\n", temp );
124 
 
125 
    printf("Writing 0 again...\n");
126 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<1);
127 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
128 
    if( temp )
129 
        printf("QCR bit 1 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<1), temp );
130 
    else
131 
        printf("QCR bit 1 [ PASSED ], got 0x%08X.\n", temp );
132 
 
133 
    printf("Writing 1 to bit 2...\n");
134 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<2);
135 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
136 
    if( temp != (1<<QCR_INEN) )
137 
        printf("QCR bit 2 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<QCR_INEN), temp );
138 
    else
139 
        printf("QCR bit 2 [ PASSED ], got 0x%08X.\n", temp );
140 
 
141 
    printf("Writing 0 again...\n");
142 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<2);
143 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
144 
    if( temp )
145 
        printf("QCR bit 2 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<2), temp );
146 
    else
147 
        printf("QCR bit 2 [ PASSED ], got 0x%08X.\n", temp );
148 
 
149 
    printf("Writing 1 to bit 3...\n");
150 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<3);
151 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
152 
    if( temp != (1<<3) )
153 
        printf("QCR bit 3 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<3), temp );
154 
    else
155 
        printf("QCR bit 3 [ PASSED ], got 0x%08X.\n", temp );
156 
 
157 
    printf("Writing 0 again...\n");
158 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<3);
159 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
160 
    if( temp )
161 
        printf("QCR bit 3 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<3), temp );
162 
    else
163 
        printf("QCR bit 3 [ PASSED ], got 0x%08X.\n", temp );
164 
 
165 
 
166 
    printf("Writing 1 to bit 4...\n");
167 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<4);
168 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
169 
    if( temp != (1<<4) )
170 
        printf("QCR bit 4 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<4), temp );
171 
    else
172 
        printf("QCR bit 4 [ PASSED ], got 0x%08X.\n", temp );
173 
 
174 
    printf("Writing 0 again...\n");
175 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<4);
176 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
177 
    if( temp )
178 
        printf("QCR bit 4 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<4), temp );
179 
    else
180 
        printf("QCR bit 4 [ PASSED ], got 0x%08X.\n", temp );
181 
 
182 
    printf("Writing 1 to bit 5...\n");
183 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<5);
184 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
185 
    //This bit is auto-cleared, so we want it to read 0 (PLAT)
186 
    if( temp == (1<<5) )
187 
        printf("QCR bit 5 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<5), temp );
188 
    else//zero
189 
        printf("QCR bit 5 [ PASSED ], got 0x%08X.\n", temp );
190 
 
191 
    printf("Writing 0 again...\n");
192 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<5);
193 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
194 
    if( temp )
195 
        printf("QCR bit 5 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<5), temp );
196 
    else
197 
        printf("QCR bit 5 [ PASSED ], got 0x%08X.\n", temp );
198 
 
199 
    printf("Writing 1 to bit 6...\n");
200 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<6);
201 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
202 
    if( temp != (1<<6) )
203 
        printf("QCR bit 6 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", 0, temp );
204 
    else
205 
        printf("QCR bit 6 [ PASSED ], got 0x%08X.\n", temp );
206 
 
207 
    printf("Writing 0 again...\n");
208 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<6);
209 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
210 
    if( temp )
211 
        printf("QCR bit 6 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<6), temp );
212 
    else
213 
        printf("QCR bit 6 [ PASSED ], got 0x%08X.\n", temp );
214 
 
215 
 
216 
    printf("Writing 1 to bit 7...\n");
217 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<7);
218 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
219 
    if( temp != (1<<7) )
220 
        printf("QCR bit 7 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<7), temp );
221 
    else
222 
        printf("QCR bit 7 [ PASSED ], got 0x%08X.\n", temp );
223 
 
224 
    printf("Writing 0 again...\n");
225 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<7);
226 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
227 
    if( temp )
228 
        printf("QCR bit 7 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<7), temp );
229 
    else
230 
        printf("QCR bit 7 [ PASSED ], got 0x%08X.\n", temp );
231 
 
232 
    //Bit 8 is auto cleared (QLAT)
233 
    printf("Writing 1 to bit 8...\n");
234 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<8);
235 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
236 
    if( temp == (1<<8) )
237 
        printf("QCR bit 8 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (0<<8), temp );
238 
    else
239 
        printf("QCR bit 8 [ PASSED ], got 0x%08X.\n", temp );
240 
 
241 
    printf("Writing 1 to bit 9...\n");
242 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<9);
243 
    temp = QUAD_DCDR_QCR_REG( Base_QUAD_DECODER);
244 
    if( temp != (1<<9) )
245 
        printf("QCR bit 9 [ FAILED ], wanted 0x%08X, got 0x%08X.\n", (1<<9), temp );
246 
    else
247 
        printf("QCR bit 9 [ PASSED ], got 0x%08X.\n", temp );
248 
 
249 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) = 0;
250 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) = 0;
251 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0;
252 
 
253 
    // test QRW register by writing and reading a value
254 
    printf("Writing 0x55555555 to QRW...\n");
255 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0x55555555;
256 
 
257 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
258 
    if( temp != 0x55555555 )
259 
        printf("QRW [ FAILED ], wanted 0x55555555, got 0x%08X.\n", temp );
260 
    else
261 
        printf("QRW [ PASSED ], got 0x55555555.\n");
262 
 
263 
    printf("Writing 0xAAAAAAAA to QRW...\n");
264 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0xAAAAAAAA;
265 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
266 
    if( temp != 0xAAAAAAAA )
267 
        printf("QRW [FAILED ], wanted 0xAAAAAAAA, got 0x%08X.\n", temp );
268 
    else
269 
        printf("QRW [PASSED ], got 0xAAAAAAAA.\n");
270 
 
271 
    printf("Latching current quad_count (0x00000000) into QRW...\n");
272 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
273 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
274 
    if( temp )
275 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
276 
    else
277 
        printf("QRW [ PASSED ], got 0x00000000.\n");
278 
 
279 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0;
280 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
281 
    if( temp )
282 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
283 
    else
284 
        printf("QRW [ PASSED ], got 0x00000000.\n");
285 
 
286 
    //stimulate quad signals 1 count; confirm couting is disabled
287 
    printf("Stimulating Quadrature Signals 1 count (disabled)...\n");
288 
    quad_dcdr_sim( 1, 0 );
289 
    //Latch count, confirm 0 reading
290 
    printf("Latching current quad_count (0x00000000) into QRW...\n");
291 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
292 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
293 
    if( temp )
294 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
295 
    else
296 
        printf("QRW [ PASSED ], got 0x00000000.\n");
297 
 
298 
    printf("Enabling counting...\n");
299 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_ECNT);
300 
    quad_dcdr_sim( 1, 0 );
301 
    //Latch count, confirm 0 reading
302 
    printf("Latching current quad_count (0x00000001) into QRW...\n");
303 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
304 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
305 
    if( temp != 1 )
306 
        printf("QRW [ FAILED ], wanted 0x00000001, got 0x%08X.\n", temp );
307 
    else
308 
        printf("QRW [ PASSED ], wanted 0x00000001, got 0x%08X.\n", temp );
309 
 
310 
    printf("Counting back to 0...\n");
311 
    quad_dcdr_sim( -1, 0 );
312 
    printf("Latching current quad_count (0x00000000) into QRW...\n");
313 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
314 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
315 
    if( temp )
316 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
317 
    else
318 
        printf("QRW [ PASSED ], wanted 0x00000000, got 0x%08X.\n", temp );
319 
 
320 
 
321 
    //trigger underflow
322 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER) |= 0x0F; //clear all status bits
323 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
324 
    if( temp )
325 
        printf("QSR [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
326 
    else
327 
        printf("QSR [ PASSED ], wanted 0x00000000, got 0x%08X.\n", temp );
328 
 
329 
    //Quad count is still zero
330 
    printf("Counting back to 0xFFFFFFFF...\n");
331 
    quad_dcdr_sim( -1, 0 );
332 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
333 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
334 
    if( temp != 0xFFFFFFFF )
335 
        printf("QRW [ FAILED ], wanted 0xFFFFFFFF, got 0x%08X.\n", temp );
336 
    else
337 
        printf("QRW [ PASSED ], wanted 0xFFFFFFFF, got 0x%08X.\n", temp );
338 
 
339 
    printf("checking status bit...\n");
340 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
341 
    if( temp == (1<<QSR_CTUN) )
342 
        printf("QSR [ PASSED ], QSR_CTUN SET, got 0x%02X.\n", temp);
343 
    else
344 
        printf("QSR [ FAILED ], wanted 0x%02X, got 0x%02X.\n", (1<<QSR_CTUN), temp);
345 
 
346 
    // Clear bit by writing a 1 to the correspoding location
347 
    printf("Clearing status bit, rechecking...\n");
348 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER) |= (1<<QSR_CTUN);
349 
 
350 
    printf("Rechecking status bit...\n");
351 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
352 
    if( temp == (1<<QSR_CTUN) )
353 
        printf("QSR [ FAILED ], QSR_CTUN SET, 0x00, got 0x%02X\n", temp);
354 
    else
355 
        printf("QSR [ PASSED ] QSR_CTUN CLEARED.\n");
356 
 
357 
    //Count is now at 0xFFFFFFFF
358 
    printf("Generating overflow event...\n");
359 
    quad_dcdr_sim( 1, 0 );
360 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
361 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
362 
    if( temp )
363 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
364 
    else
365 
        printf("QRW [ PASSED ], got 0x00000000.\n");
366 
 
367 
    //check bit
368 
    printf("Checking status bit...\n");
369 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
370 
    if( temp == (1<<QSR_CTOV) )
371 
        printf("QSR [ PASSED ], QSR_CTOV SET.\n");
372 
    else
373 
        printf("QSR [ FAILED ], wanted 0x00, got 0x%02X.\n", temp);
374 
 
375 
    printf("Clearing status bit QSR_CTOV...\n");
376 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER) |= (1<<QSR_CTOV);
377 
 
378 
    printf("Rechecking status bit...\n");
379 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
380 
    if( temp == (1<<QSR_CTOV) )
381 
        printf("QSR [ FAILED ], QSR_CTOV SET, 0x00, got 0x%02X\n", temp);
382 
    else
383 
        printf("QSR [ PASSED ] QSR_CTOV CLEARED, 0x%02X\n", temp);
384 
 
385 
    //generate error
386 
    printf("Generating quadrature signal error...\n");
387 
    quad_dcdr_sim( 0, 1 ); //generate error
388 
    //check qsr
389 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
390 
    if( temp == (1<<QSR_QERR) )
391 
        printf("QSR [ PASSED ], QSR_QERR SET.\n");
392 
    else
393 
        printf("QSR [ FAILED ], wanted 0x00, got 0x%02X.\n", temp);
394 
 
395 
    printf("Clearing error bit...\n");
396 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_QERR);
397 
    printf("Rechecking status bit...\n");
398 
    temp = QUAD_DCDR_QSR_REG( Base_QUAD_DECODER );
399 
    if( temp == (1<<QSR_QERR) )
400 
        printf("QSR [ FAILED ], QSR_QERR SET, 0x00, got 0x%02X\n", temp);
401 
    else
402 
        printf("QSR [ PASSED ] QSR_QERR CLEARED, 0x%02X\n", temp);
403 
 
404 
    printf("Confirming no count change...\n");
405 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
406 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
407 
    if( temp )
408 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
409 
    else
410 
        printf("QRW [ PASSED ], wanted 0x00000000, got 0x%08X.\n", temp );
411 
 
412 
    printf("Testing direction change...\n");
413 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_CTDR);
414 
    printf("Counting..\n");
415 
    quad_dcdr_sim( -1, 0 );
416 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
417 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
418 
    if( temp != 1 )
419 
        printf("QRW [ FAILED ], wanted 0x00000001, got 0x%08X.\n", temp );
420 
    else
421 
        printf("QRW [ PASSED ], wanted 0x00000001, got 0x%08X.\n", temp );
422 
 
423 
    printf("Back to 0...\n");
424 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &= ~(1<<QCR_CTDR);
425 
    quad_dcdr_sim( -1, 0 );
426 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
427 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
428 
    if( temp )
429 
        printf("QRW [ FAILED ], wanted 0x00000000, got 0x%08X.\n", temp );
430 
    else
431 
        printf("QRW [ PASSED ], got 0x00000000.\n");
432 
 
433 
    //Check ISR
434 
    printf("Checking ISR for QERR...\n");
435 
    temp = ioport_get_value( ioport, 0 );
436 
    if( (temp&(1<<7))>>7 ){
437 
        printf("IRQ error, expected flag to be false...\n");
438 
        quad_irq_flag = 0;
439 
    }
440 
    else
441 
        printf("IRQ flag FALSE, triggering error...\n");
442 
 
443 
 
444 
    //enable int
445 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |=  (1<<QCR_QEIE);
446 
    quad_dcdr_sim( 0, 1 );
447 
    printf("Rechecking...\n");
448 
    temp = ioport_get_value( ioport, 0 );
449 
    if( (temp&(1<<7))>>7 ){
450 
        printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
451 
    }
452 
    else
453 
        printf("IRQ [ FAILED ], flag false...\n");
454 
 
455 
    //clear int
456 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_QERR);
457 
    printf("Rechecking after clear...\n");
458 
    temp = ioport_get_value( ioport, 0 );
459 
    if( (temp&(1<<7))>>7 ){
460 
        printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
461 
    }
462 
    else
463 
        printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
464 
 
465 
    //gen underflow interrupt
466 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |=  (1<<QCR_UNIE);
467 
    quad_dcdr_sim( -1,0 );
468 
    printf("Checking ISR for CTUN...\n");
469 
    temp = ioport_get_value( ioport, 0 );
470 
    if( (temp&(1<<7))>>7 ){
471 
        printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
472 
 
473 
    }
474 
    else
475 
       printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
476 
 
477 
    //clear int
478 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_CTUN);
479 
    printf("Rechecking after clear...\n");
480 
    temp = ioport_get_value( ioport, 0 );
481 
    if( (temp&(1<<7))>>7 ){
482 
        printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
483 
    }
484 
    else
485 
        printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
486 
 
487 
    //gen over interrupt
488 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |=  (1<<QCR_OVIE);
489 
    quad_dcdr_sim( 1,0 );
490 
    printf("Checking ISR for CTOV...\n");
491 
    temp = ioport_get_value( ioport, 0 );
492 
    if( (temp&(1<<7))>>7 ){
493 
        printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
494 
 
495 
    }
496 
    else
497 
       printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
498 
 
499 
    //clear int
500 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_CTOV);
501 
    printf("Rechecking after clear...\n");
502 
    temp = ioport_get_value( ioport, 0 );
503 
    if( (temp&(1<<7))>>7 ){
504 
        printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
505 
    }
506 
    else
507 
        printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
508 
 
509 
//test index input
510 
    //set value manually
511 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) &=  ~( (1<<QCR_ICHA) | (1<<QCR_ICHB) );
512 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= ( (1<<QCR_IDXL)|(1<<QCR_INIE)|(1<<QCR_INEN) );
513 
    printf("Asserting IDX...\n");
514 
    ioport_set_value( ioport, 0, 0x04 );//chb=0, cha=0, idx=1
515 
    printf("QSR: 0x%02X\n", QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) );
516 
    //printf("Checking ISR for INEV...\n");
517 
    temp = ioport_get_value( ioport, 0 );
518 
    if( (temp&(1<<7))>>7 )
519 
       printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
520 
    else
521 
       printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
522 
 
523 
    //leave idx asserted, clear flag, bit should still be set
524 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_INEV);
525 
    printf("Rechecking ISR for INEV...\n");
526 
    temp = ioport_get_value( ioport, 0 );
527 
    if( (temp&(1<<7))>>7 )
528 
       printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
529 
    else
530 
       printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
531 
 
532 
    //Now disable index enable bit, clear the status register, and confirm that the IRQ
533 
    //  is deasserted.
534 
    printf("Turn idx off...\n");
535 
    ioport_set_value( ioport, 0, 0x00 );
536 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_INEV);
537 
    printf("Rechecking ISR for INEV...\n");
538 
    temp = ioport_get_value( ioport, 0 );
539 
    if( (temp&(1<<7))>>7 )
540 
       printf("IRQ [ FAILED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
541 
    else
542 
       printf("IRQ [ PASSED ], QSR: 0x%02X.\n",  QUAD_DCDR_QSR_REG( Base_QUAD_DECODER));
543 
 
544 
    printf("Preloading count 0x55555555...\n");
545 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0x55555555;        //Write to QRW
546 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_PLCT);    //Latch QRW to internal count
547 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0xDEADDEAD;        //Write different data into QRW
548 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);     //Latch internal count into QRW
549 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
550 
    if( temp != 0x55555555 )
551 
        printf("QRW [ FAILED ], wanted 0x55555555, got 0x%08X.\n", temp );
552 
    else
553 
        printf("QRW [ PASSED ], wanted 0x55555555, got 0x%08X.\n", temp );
554 
 
555 
    printf("Preloading count 0xAAAAAAAA...\n");
556 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0xAAAAAAAA;
557 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_PLCT);
558 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0xDEADDEAD;        //Write different data into QRW
559 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER) |= (1<<QCR_QLAT);
560 
    temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
561 
    if( temp != 0xAAAAAAAA )
562 
        printf("QRW [ FAILED ], wanted 0xAAAAAAAA, got 0x%08X.\n", temp );
563 
    else
564 
        printf("QRW [ PASSED ], wanted 0xAAAAAAAA, got 0x%08X.\n", temp );
565 
///////////////////////////////////////////////////////////////////////////////////////////////
566 
 
567 
    //Test CCME
568 
    printf("Testing CCME...\n");
569 
    temp = (QUAD_DCDR_QSR_REG( Base_QUAD_DECODER )&(1<<QSR_CCME))>>QSR_CCME;
570 
    printf("Checking QSR, pre testing...\n");
571 
    if( temp )
572 
        printf("CCME [ FAILED ], wanted 0, got %d\n", temp );
573 
    else
574 
        printf("CCME [ PASSED ], wanted 0, got %d\n", temp );
575 
    printf("CCME=0, CMIE=0, Asserting QLAT\n");
576 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_QLAT);
577 
    temp = (QUAD_DCDR_QSR_REG( Base_QUAD_DECODER )&(1<<QSR_CCME))>>QSR_CCME;
578 
    printf("Checking QSR...\n");
579 
    if( temp )
580 
        printf("CCME [ FAILED ], wanted 0, got %d\n", temp );
581 
    else
582 
        printf("CCME [ PASSED ], wanted 0, got %d\n", temp );
583 
    printf("Checking IRQ...\n");
584 
    temp = ioport_get_value( ioport, 0 );
585 
    if( (temp&(1<<7))>>7 )
586 
        printf("IRQ [ FAILED ], wanted 0, got 1\n");
587 
    else
588 
        printf("IRQ [ PASSED ], wanted 0, got 0\n");
589 
 
590 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0xDEADDEAD;
591 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_PLCT);
592 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0;
593 
 
594 
    printf("Enabling CCME...\n");
595 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= ( (1<<QCR_CCME) | (1<<QCR_CMIE) );
596 
    temp = (QUAD_DCDR_QSR_REG( Base_QUAD_DECODER )&(1<<QSR_CCME))>>QSR_CCME;
597 
    printf("Checking QSR...\n");
598 
    if( temp )
599 
        printf("CCME [ FAILED ], wanted 0, got %d\n", temp );
600 
    else
601 
        printf("CCME [ PASSED ], wanted 0, got %d\n", temp );
602 
 
603 
    printf("Quad Count =/= QRW, Checking IRQ...\n");
604 
    temp = ioport_get_value( ioport, 0 );
605 
    if( (temp&(1<<7))>>7 )
606 
        printf("IRQ [ FAILED ], wanted 0, got 1\n");
607 
    else
608 
        printf("IRQ [ PASSED ], wanted 0, got 0\n");
609 
 
610 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_QLAT);
611 
 
612 
    temp = (QUAD_DCDR_QSR_REG( Base_QUAD_DECODER )&(1<<QSR_CCME))>>QSR_CCME;
613 
    printf("Quad Count == QRW, Checking QSR...\n");
614 
    if( temp )
615 
        printf("CCME [ PASSED ], wanted 1, got %d\n", temp );
616 
    else
617 
        printf("CCME [ FAILED ], wanted 1, got %d\n", temp );
618 
 
619 
    printf("Quad Count == QRW, Checking IRQ...\n");
620 
    temp = ioport_get_value( ioport, 0 );
621 
    if( (temp&(1<<7))>>7 )
622 
        printf("IRQ [ PASSED ], wanted 1, got 1\n");
623 
    else
624 
        printf("IRQ [ FAILED ], wanted 0, got 0\n");
625 
 
626 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = 0x01234567;
627 
 
628 
    QUAD_DCDR_QSR_REG( Base_QUAD_DECODER ) |= (1<<QSR_CCME);
629 
 
630 
    temp = (QUAD_DCDR_QSR_REG( Base_QUAD_DECODER )&(1<<QSR_CCME))>>QSR_CCME;
631 
    printf("Quad Count =/= QRW, cleared QSR, Checking QSR...\n");
632 
    if( temp )
633 
        printf("CCME [ FAILED ], wanted 0, got %d\n", temp );
634 
    else
635 
        printf("CCME [ PASSED ], wanted 0, got %d\n", temp );
636 
 
637 
    printf("Quad Count =/= QRW, cleared QSR, Checking IRQ...\n");
638 
    temp = ioport_get_value( ioport, 0 );
639 
    if( (temp&(1<<7))>>7 )
640 
        printf("IRQ [ FAILED ], wanted 0, got 1\n");
641 
    else
642 
        printf("IRQ [ PASSED ], wanted 0, got 0\n");
643 
 
644 
 
645 
 
646 
 
647 
 
648 
#endif
649 
 
650 
    count = 0;
651 
    error_count = 0;
652 
    QUAD_DCDR_QRW_REG( Base_QUAD_DECODER ) = count;
653 
    QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_PLCT);
654 
     QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) &= ~(1<<QCR_INEN);
655 
 
656 
 
657 
 
658 
    printf("Starting random count test...\n");
659 
    for(a=0;a<NUM_CNTS;a++)
660 
    {
661 
 
662 
        //printf("%d\n", a);
663 
        delta = rand();
664 
 
665 
        if( delta%2 )
666 
            delta = 0-delta;
667 
 
668 
        //track absolute count
669 
        count += delta;
670 
 
671 
        quad_dcdr_sim( delta, 0 );
672 
 
673 
        //verufy change
674 
       QUAD_DCDR_QCR_REG( Base_QUAD_DECODER ) |= (1<<QCR_QLAT);
675 
 #if 0
676 
        temp = ioport_get_value( ioport, 0 );
677 
        temp |= (1<<7);
678 
        ioport_set_value( ioport, 0, temp );
679 
        temp &= ~(1<<7);
680 
        ioport_set_value( ioport, 0, temp );
681 
#endif
682 
        temp = QUAD_DCDR_QRW_REG( Base_QUAD_DECODER );
683 
 
684 
 
685 
        if( temp != count ){
686 
            printf("[ FAILED ], wanted 0x%08X, got 0x%08X.\n", count, temp );
687 
            error_count++;
688 
        }
689 
        //else
690 
        //    printf("[ PASSED ], got 0x%08X.\n", temp );
691 
 
692 
 
693 
    }
694 
 
695 
    printf("Finished random count test, %d errors.\n", error_count );
696 
 
697 
}
698 
 
699 
int8_t quad_dcdr_ioinit( void )
700 
{
701 
    //init dio
702 
    ioport = ioport_open( QUAD_IOPORT_ID );
703 
 
704 
    if( ioport )
705 
        return 0;
706 
    else
707 
        return -1;
708 
}
709 
 
710 
//assume port0 => ch A, port1 => ch b, port2 => index
711 
uint8_t quad_dcdr_sim( int32_t steps, int8_t error )
712 
{
713 
    uint32_t num_steps = ABS( steps );
714 
    int8_t  direction = 0;
715 
    uint32_t current_step = 0;
716 
    uint32_t current_state = 0;
717 
 
718 
 
719 
    //See if we want to create an intentional error
720 
    if( error ){
721 
        current_state = ioport_get_value( ioport, 0 );
722 
        //Cause changes in both bits simultaneously for error
723 
        ioport_set_value( ioport, 0, (current_state^0x03)&0x03 );
724 
    }
725 
    else{
726 
 
727 
        if (steps < 0)
728 
            direction = -1;
729 
        else
730 
            direction = 1;
731 
 
732 
        for( current_step = 0; current_step < num_steps; current_step++)
733 
        {
734 
 
735 
 
736 
            //get current state
737 
            current_state = ioport_get_value( ioport, 0 );
738 
 
739 
            switch( current_state & 0x00000003 ){
740 
 
741 
                case 0x00:
742 
                    if( direction == 1 )
743 
                        ioport_set_value( ioport, 0, 0x01);
744 
                    else
745 
                        ioport_set_value( ioport, 0, 0x02);
746 
                    break;
747 
 
748 
                case 0x01:
749 
                    if( direction == 1 )
750 
                        ioport_set_value( ioport, 0, 0x03);
751 
                    else
752 
                        ioport_set_value( ioport, 0, 0x00);
753 
                    break;
754 
 
755 
                case 0x03:
756 
                    if( direction == 1 )
757 
                        ioport_set_value( ioport, 0, 0x02);
758 
                    else
759 
                        ioport_set_value( ioport, 0, 0x01);
760 
                    break;
761 
 
762 
                case 0x02:
763 
                    if( direction == 1 )
764 
                        ioport_set_value( ioport, 0, 0x00);
765 
                    else
766 
                        ioport_set_value( ioport, 0, 0x03);
767 
                    break;
768 
            }
769 
        }
770 
    }
771 
 
772 
    return( ioport_get_value( ioport, 0 ) & 0x03 );
773 
 
774 
}//end quad_dcdr_sim
775 
 

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