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[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [cpu_sysc_plugin/] [riverlib/] [core/] [arith/] [int_mul.cpp] - Blame information for rev 2

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1 2 sergeykhbr 
/**
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 * @file
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 * @copyright  Copyright 2016 GNSS Sensor Ltd. All right reserved.
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 * @author     Sergey Khabarov - sergeykhbr@gmail.com
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 * @brief      Integer multiplier.
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 * @details    Implemented algorithm provides 4 clocks per instruction
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 */
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#include "int_mul.h"
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#include "api_utils.h"
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namespace debugger {
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IntMul::IntMul(sc_module_name name_) : sc_module(name_) {
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    SC_METHOD(comb);
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    sensitive << i_nrst;
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    sensitive << i_ena;
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    sensitive << i_unsigned;
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    sensitive << i_rv32;
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    sensitive << i_high;
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    sensitive << i_a1;
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    sensitive << i_a2;
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    sensitive << r.result;
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    sensitive << r.ena;
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    sensitive << r.busy;
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    SC_METHOD(registers);
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    sensitive << i_clk.pos();
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};
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void IntMul::generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd) {
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#if 0
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    vcd = sc_create_vcd_trace_file("intmul");
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    vcd->set_time_unit(1, SC_PS);
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    sc_trace(vcd, i_clk, "i_clk");
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    sc_trace(vcd, i_nrst, "i_nrst");
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    sc_trace(vcd, i_ena, "i_ena");
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    sc_trace(vcd, i_unsigned, "i_unsigned");
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    sc_trace(vcd, i_rv32, "i_rv32");
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    sc_trace(vcd, i_high, "i_high");
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    sc_trace(vcd, i_a1, "i_a1");
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    sc_trace(vcd, i_a2, "i_a2");
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#endif
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    if (o_vcd) {
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        sc_trace(o_vcd, i_a1, "/top/proc0/exec0/mul0/i_a1");
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        sc_trace(o_vcd, i_a2, "/top/proc0/exec0/mul0/i_a2");
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        sc_trace(o_vcd, i_ena, "/top/proc0/exec0/mul0/i_ena");
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        sc_trace(o_vcd, o_res, "/top/proc0/exec0/mul0/o_res");
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        sc_trace(o_vcd, o_valid, "/top/proc0/exec0/mul0/o_valid");
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        sc_trace(o_vcd, o_busy, "/top/proc0/exec0/mul0/o_busy");
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        sc_trace(o_vcd, r.ena, "/top/proc0/exec0/mul0/r_ena");
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    }
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}
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void IntMul::comb() {
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    sc_uint<2> wb_mux_lvl0;
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    Level0Type wb_lvl0;
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    Level2Type wb_lvl2;
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    Level4Type wb_lvl4;
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    sc_biguint<128> wb_lvl5;
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    sc_biguint<128> wb_res32;
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    sc_uint<64> wb_res;
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    v = r;
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    v.ena = (r.ena.read() << 1) | (i_ena & !r.busy);
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    if (i_ena.read()) {
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        v.busy = 1;
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        if (i_rv32.read()) {
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            v.a1 = i_a1.read()(31, 0);
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            if (!i_unsigned.read() && i_a1.read()[31]) {
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                v.a1(63, 32) = ~0;
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            }
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            v.a2 = i_a2.read()(31, 0);
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            if (!i_unsigned.read() && i_a2.read()[31]) {
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                v.a2(63, 32) = ~0;
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            }
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        } else {
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            v.a1 = i_a1;
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            v.a2 = i_a2;
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        }
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        v.rv32 = i_rv32;
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        v.unsign = i_unsigned;
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        v.high = i_high;
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        // Just for run-rime control (not for VHDL)
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        v.a1_dbg = i_a1;
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        v.a2_dbg = i_a2;
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        v.reference_mul = compute_reference(i_unsigned.read(),
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                                            i_rv32.read(),
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                                            i_a1.read(),
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                                            i_a2.read());
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    }
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    if (r.ena.read()[0]) {
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        for (int i = 0; i < 32; i++) {
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            wb_mux_lvl0 = r.a2(2*i + 1, 2*i);
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            if (wb_mux_lvl0 == 0) {
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                wb_lvl0.arr[i] = 0;
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            } else if (wb_mux_lvl0 == 1) {
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                wb_lvl0.arr[i] = sc_biguint<66>(r.a1);
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            } else if (wb_mux_lvl0 == 2) {
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                wb_lvl0.arr[i] = sc_biguint<66>(r.a1) << 1;
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            } else {
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                wb_lvl0.arr[i] = sc_biguint<66>(r.a1)
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                              + (sc_biguint<66>(r.a1) << 1);
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            }
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        }
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        for (int i = 0; i < 16; i++) {
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            v.lvl1.arr[i] = (sc_biguint<69>(wb_lvl0.arr[2*i + 1]) << 2)
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                          + sc_biguint<69>(wb_lvl0.arr[2*i]);
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        }
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    }
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    if (r.ena.read()[1]) {
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        for (int i = 0; i < 8; i++) {
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            wb_lvl2.arr[i] = (sc_biguint<74>(r.lvl1.arr[2*i + 1]) << 4)
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                       + sc_biguint<74>(r.lvl1.arr[2*i]);
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        }
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        for (int i = 0; i < 4; i++) {
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            v.lvl3.arr[i] = (sc_biguint<83>(wb_lvl2.arr[2*i + 1]) << 8)
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                          + sc_biguint<83>(wb_lvl2.arr[2*i]);
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        }
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    }
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    if (r.ena.read()[2]) {
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        v.busy = 0;
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        for (int i = 0; i < 2; i++) {
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            wb_lvl4.arr[i] = (sc_biguint<100>(r.lvl3.arr[2*i + 1]) << 16)
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                           + sc_biguint<100>(r.lvl3.arr[2*i]);
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        }
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137 
        wb_lvl5 = (sc_biguint<128>(wb_lvl4.arr[1]) << 32)
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                        + sc_biguint<128>(wb_lvl4.arr[0]);
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        if (r.rv32.read()) {
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            wb_res32(31, 0) = wb_lvl5(31, 0);
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            if (r.unsign.read() || wb_lvl5[31] == 0) {
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                wb_res32(127, 32) = 0;
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            } else {
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                wb_res32(127, 32) = ~0;
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            }
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            v.result = wb_res32;
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        } else {
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            v.result = wb_lvl5;
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        }
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    }
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    wb_res = r.result.read()(63, 0);
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    if (r.high.read()) {
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        wb_res = r.result.read()(127, 64);  // not tested yet
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    }
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157 
    if (i_nrst.read() == 0) {
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        v.busy = 0;
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        v.result = 0;
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        v.ena = 0;
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        v.a1 = 0;
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        v.a2 = 0;
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        v.rv32 = 0;
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        v.unsign = 0;
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        v.high = 0;
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        v.reference_mul = 0;
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    }
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    o_res = wb_res;
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    o_valid = r.ena.read()[3];
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    o_busy = r.busy;
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}
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174 
void IntMul::registers() {
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    // Debug purpose only"
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    if (r.ena.read()[2]) {
177 
        uint64_t t1 = v.result.read()(63,0).to_uint64();
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        uint64_t t2 = r.reference_mul.to_uint64();
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        if (t1 != t2) {
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            char tstr[512];
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            RISCV_sprintf(tstr, sizeof(tstr),
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                "IntMul error: unsigned=%d, rv32=%d, high=%d,  "
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                "(%016" RV_PRI64 "x/%016" RV_PRI64 "x) => "
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                "%016" RV_PRI64 "x != %016" RV_PRI64 "x\n",
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                r.unsign.read(), r.rv32.read(), r.high.read(),
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                r.a1_dbg.to_uint64(), r.a2_dbg.to_uint64(), t1, t2);
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            cout << tstr;
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            cout.flush();
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        }
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    }
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    r = v;
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}
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uint64_t IntMul::compute_reference(bool unsign, bool rv32, uint64_t a1, uint64_t a2) {
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    uint64_t ret;
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    if (rv32) {
197 
        if (unsign) {
198 
            ret = (uint32_t)a1 * (uint32_t)a2;
199 
        } else {
200 
            ret = (uint64_t)((int64_t)((int32_t)a1 * (int32_t)a2));
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        }
202 
    } else {
203 
        // The results are the same but just for clearence
204 
        if (unsign) {
205 
            ret = a1 * a2;
206 
        } else {
207 
            ret = (int64_t)a1 * (int64_t)a2;
208 
        }
209 
    }
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    return ret;
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}
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}  // namespace debugger
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