| 1 |
35 |
TobiasJ |
| Period Count |
|
| 2 |
|
|
-------------------------------------
|
| 3 |
|
|
Baud rate | bit period | 50Mhz | 100Mhz | 200Mhz |
|
| 4 |
|
|
-----------------------------------------------------------------
|
| 5 |
|
|
2400 | 416.66 mSec | 20833 | 41667 | X |
|
| 6 |
|
|
4800 | 208.33 mSec | 10417 | 20833 | 41667 |
|
| 7 |
|
|
9600 | 104.16 mSec | 5208 | 10417 | 20833 |
|
| 8 |
|
|
14400 |
|
| 9 |
|
|
19200 |
|
| 10 |
|
|
28800 |
|
| 11 |
|
|
38400 |
|
| 12 |
|
|
57600 |
|
| 13 |
|
|
76800 |
|
| 14 |
|
|
115200 | 8.68 mSec | 434 | 868 | 1736 |
|
| 15 |
|
|
230400 | 4.34 mSec | 217 | 434 | 868 |
|
| 16 |
|
|
|
| 17 |
|
|
|
| 18 |
|
|
Signals/Interrupts
|
| 19 |
|
|
RX Buffer empty
|
| 20 |
|
|
RX Buffer full
|
| 21 |
|
|
TX Buffer empty
|
| 22 |
|
|
TX Buffer full
|
| 23 |
|
|
TX Sending
|
| 24 |
|
|
|
| 25 |
|
|
Buffers
|
| 26 |
|
|
RX FIFO Buffer 0-64 Word buffer
|
| 27 |
|
|
TX FIFO Buffer 0-64 Word buffer
|
| 28 |
|
|
|
| 29 |
|
|
After Reset
|
| 30 |
45 |
TobiasJ |
50MHz 2400bps, 100MHz 4800bps, 200MHz 9600bps
|
| 31 |
35 |
TobiasJ |
1 start bit, 8 data bit, 1 stop bit
|
| 32 |
|
|
|
| 33 |
|
|
Componenter
|
| 34 |
45 |
TobiasJ |
uart_top : top entity
|
| 35 |
|
|
uart_rx : rs232 complient reciever
|
| 36 |
|
|
uart_tx : rs232 complient tranmitter
|
| 37 |
|
|
uart_rx_fifo : buffer for revieved data
|
| 38 |
|
|
uart_tx_fifo : buffer for data to be transmitted
|
| 39 |
|
|
uart_wb : WISHBONE interface
|
| 40 |
35 |
TobiasJ |
|
| 41 |
|
|
Addresses
|
| 42 |
|
|
00000000 = rx_fifo(r)(rx_fifo_rst.u) / write tx_fifo(w)(tx_fifo_rst.u)
|
| 43 |
|
|
00000001 = |xxxxxxx|rx enable(r/w)(setup_rst.0)|
|
| 44 |
|
|
|
| 45 |
|
|
00000010 = rx_fifo_entries_back(r)(fifo_rst.fifo_size)
|
| 46 |
|
|
00000011 = tx_fifo_entries_back(r)(fifo_rst.fifo_size)
|
| 47 |
|
|
|
| 48 |
|
|
00000100 = |rx_idle_line_lvl(r/w)(setup_rst.1)|use_parity_bit(r/w)(setup_rst.0)|parity_type(r/w)(setup_rst.0)|rx_stop_bits(r/w)(setup_rst.01)|word_width(r/w)(setup_rst.000)|
|
| 49 |
|
|
|
| 50 |
|
|
00000101 = |start_sample(r/w)(setup_rst.0110)|sample_line(r/w)(setup_rst.0100)|
|
| 51 |
|
|
|
| 52 |
|
|
00000110 = period low LSB ( 7 downto 0) (Baud / Frequenzy, min 32, max 655??)
|
| 53 |
|
|
|
| 54 |
|
|
00000111 = period high MSB (15 downto 8)
|
| 55 |
|
|
|
| 56 |
|
|
00001000 = |uuu|rst_rx(r/w)(setup_rst.0)|rst_rx_fifo(r/w)(setup_rst.0)|rst_tx(r/w)(setup_rst.0)|rst_fifo_tx(r/w)(setup_rst.0)|rst_setup(r/w)(setup_rst.0)|
|
| 57 |
|
|
|
| 58 |
|
|
00001001 = |uuu|rst_rx_if_rst_wb(r/w)(setup_rst.0)|rst_rx_fifo_if_rst_wb(r/w)(setup_rst.0)|rst_tx_if_rst_wb(r/w)(setup_rst.0)|rst_fifo_tx_if_rst_wb(r/w)(setup_rst.0)|rst_setup_if_rst_wb(r/w)(setup_rst.0)|
|
| 59 |
|
|
|
| 60 |
|
|
rst_wb.x, Reset of WishBone interface with the following value
|
| 61 |
|
|
rst_rx_fifo.x, ReSeT of RX_FIFO with the following value
|
| 62 |
|
|
rst_tx_fifo.x, ReSeT of TX_FIFO with the following value
|
| 63 |
|
|
u is unknown
|
