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[/] [rtea/] [trunk/] [rtl/] [rtea.vhdl] - Blame information for rev 2

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1 2 strijar
-- Copyright © 2009 Belousov Oleg <belousov.oleg@gmail.com>
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--
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-- This program is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- 
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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-- GNU General Public License for more details.
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-- 
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-- You should have received a copy of the GNU General Public License
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-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity rtea is
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    generic (
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        KEY_SIZE        : in integer := 128                     -- 128 or 256 only
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    );
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    port (
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        clk             : in std_logic;
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        start           : in std_logic;
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        mode            : in std_logic;                         -- 0 = encode, 1 = decode
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        din             : in std_logic_vector(63 downto 0);
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        key             : in std_logic_vector(KEY_SIZE-1 downto 0);
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        dout            : out std_logic_vector(63 downto 0);
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        busy            : out std_logic);
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end entity rtea;
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architecture behave of rtea is
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    signal max_round    : unsigned(5 downto 0);
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    signal round        : unsigned(5 downto 0);
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    signal l            : unsigned(31 downto 0);
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    signal r            : unsigned(31 downto 0);
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    signal key_slice    : unsigned(31 downto 0);
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    signal f_r          : unsigned(31 downto 0);
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    signal f_l          : unsigned(31 downto 0);
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    signal run          : std_logic := '0';
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    signal mode_reg     : std_logic;
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begin
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    key256: if KEY_SIZE = 256 generate
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        max_round <= "111111";
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        key_slice <=
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            unsigned(key(31 downto 0)) when round(2 downto 0) = "000" else
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            unsigned(key(63 downto 32)) when round(2 downto 0) = "001" else
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            unsigned(key(95 downto 64)) when round(2 downto 0) = "010" else
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            unsigned(key(127 downto 96)) when round(2 downto 0) = "011" else
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            unsigned(key(159 downto 128)) when round(2 downto 0) = "100" else
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            unsigned(key(191 downto 160)) when round(2 downto 0) = "101" else
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            unsigned(key(223 downto 192)) when round(2 downto 0) = "110" else
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            unsigned(key(255 downto 224));
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    end generate;
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    key128: if KEY_SIZE = 128 generate
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        max_round <= "101111";
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        key_slice <=
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            unsigned(key(31 downto 0)) when round(1 downto 0) = "00" else
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            unsigned(key(63 downto 32)) when round(1 downto 0) = "01" else
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            unsigned(key(95 downto 64)) when round(1 downto 0) = "10" else
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            unsigned(key(127 downto 96));
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    end generate;
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    busy <= run;
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    f_r <= (r + round + key_slice) + ((r(25 downto 0) & "000000") xor ("00000000" & r(31 downto 8)));
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    f_l <= (l + round + key_slice) + ((l(25 downto 0) & "000000") xor ("00000000" & l(31 downto 8)));
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    process (clk) begin
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        if rising_edge(clk) then
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            if start = '0' then
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                l <= unsigned(din(31 downto 0));
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                r <= unsigned(din(63 downto 32));
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                mode_reg <= mode;
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                run <= '1';
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                if mode = '0' then
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                    round <= "000000";
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                else
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                    round <= max_round;
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                end if;
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            else
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                if run = '1' then
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                    if mode_reg = '0' then
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                        r <= l + f_r;
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                        l <= r;
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                    else
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                        l <= r - f_l;
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                        r <= l;
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                    end if;
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                else
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                    dout(31 downto 0) <= std_logic_vector(l);
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                    dout(63 downto 32) <= std_logic_vector(r);
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                end if;
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                if mode_reg = '0' then
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                    if round = max_round then
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                        run <= '0';
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                    else
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                        round <= round + 1;
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                    end if;
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                else
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                    if round = "000000" then
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                        run <= '0';
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                    else
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                        round <= round - 1;
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                    end if;
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                end if;
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            end if;
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        end if;
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    end process;
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end behave;

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