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[/] [rtf65002/] [trunk/] [rtl/] [verilog/] [misc_task.v] - Blame information for rev 41

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Line No. Rev Author Line
1 41 robfinch
task set_sp;
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begin
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        if (m816) begin
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                radr <= {spage[31:24],8'h00,sp[15:2]};
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                radr2LSB <= sp[1:0];
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                wadr <= {spage[31:24],8'h00,sp[15:2]};
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                wadr2LSB <= sp[1:0];
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                sp <= sp_dec;
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        end
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        else begin
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                radr <= {spage[31:16],8'h01,sp[7:2]};
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                radr2LSB <= sp[1:0];
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                wadr <= {spage[31:16],8'h01,sp[7:2]};
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                wadr2LSB <= sp[1:0];
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                sp[7:0] <= sp[7:0] - 8'd1;
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                sp[15:8] <= 8'h1;
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        end
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end
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endtask
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task inc_sp;
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begin
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        if (m816) begin
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                radr <= {spage[31:24],8'h00,sp_inc[15:2]};
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                radr2LSB <= sp_inc[1:0];
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                sp <= sp_inc;
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        end
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        else begin
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                radr <= {spage[31:16],8'h01,sp_inc[7:2]};
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                radr2LSB <= sp_inc[1:0];
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                sp <= {8'h1,sp_inc[7:0]};
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        end
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end
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endtask
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task tsk_push;
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input [5:0] SW8;
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input [5:0] SW16;
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input szFlg;
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begin
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        if (m816) begin
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                if (szFlg) begin
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                        radr <= {spage[31:24],8'h00,sp_dec[15:2]};
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                        radr2LSB <= sp_dec[1:0];
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                        wadr <= {spage[31:24],8'h00,sp_dec[15:2]};
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                        wadr2LSB <= sp_dec[1:0];
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                        store_what <= SW16;
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                        sp <= sp_dec2;
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                end
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                else begin
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                        radr <= {spage[31:24],8'h00,sp[15:2]};
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                        radr2LSB <= sp[1:0];
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                        wadr <= {spage[31:24],8'h00,sp[15:2]};
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                        wadr2LSB <= sp[1:0];
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                        store_what <= SW8;
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                        sp <= sp_dec;
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                end
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        end
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        else begin
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                radr <= {spage[31:16],8'h01,sp[7:2]};
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                radr2LSB <= sp[1:0];
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                wadr <= {spage[31:16],8'h01,sp[7:2]};
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                wadr2LSB <= sp[1:0];
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                store_what <= SW8;
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                sp[7:0] <= sp[7:0] - 8'd1;
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                sp[15:8] <= 8'h1;
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        end
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        state <= STORE1;
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end
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endtask

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