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[/] [rtf65002/] [trunk/] [software/] [asm/] [serial.asm] - Blame information for rev 40

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; ============================================================================
;        __
;   \\__/ o\    (C) 2014  Robert Finch, Stratford
;    \  __ /    All rights reserved.
;     \/_//     robfinch@opencores.org
;       ||
;
;
; This source file is free software: you can redistribute it and/or modify
; it under the terms of the GNU Lesser General Public License as published
; by the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This source file is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program.  If not, see .
;
; ============================================================================
;
UART            EQU             0xFFDC0A00
UART_LS         EQU             0xFFDC0A01
UART_MS         EQU             0xFFDC0A02
UART_IS         EQU             0xFFDC0A03
UART_IE         EQU             0xFFDC0A04
UART_MC         EQU             0xFFDC0A06
UART_CM1        EQU             0xFFDC0A09
UART_CM2        EQU             0xFFDC0A0A
UART_CM3        EQU             0xFFDC0A0B
txempty         EQU             0x40
rxfull          EQU             0x01
 
                        bss
                        org             0x01FBC000
Uart_rxfifo             fill.b  512,0
                        org             0x7D0
Uart_rxhead             db              0
Uart_rxtail             db              0
Uart_ms                 db              0
Uart_rxrts              db              0
Uart_rxdtr              db              0
Uart_rxxon              db              0
Uart_rxflow             db              0
Uart_fon                db              0
Uart_foff               db              0
Uart_txrts              db              0
Uart_txdtr              db              0
Uart_txxon              db              0
Uart_txxonoff   db              0
 
;==============================================================================
; Serial port
;==============================================================================
        code
;------------------------------------------------------------------------------
; Initialize the serial port
; r1 = low 28 bits = baud rate
; r2 = other settings
; The desired baud rate must fit in 28 bits or less.
;------------------------------------------------------------------------------
;
public SerialInit:
;       asl             r1,r1,#4                        ; * 16
;       shlui   r1,r1,#32                       ; * 2^32
;       inhu    r2,CR_CLOCK                     ; get clock frequency from config record
;       divu    r1,r1,r2                        ; / clock frequency
 
        lsr             r1,r1,#8                        ; drop the lowest 8 bits
        sta             UART_CM1                        ; set LSB
        lsr             r1,r1,#8
        sta             UART_CM2                        ; set middle bits
        lsr             r1,r1,#8
        sta             UART_CM3                        ; set MSB
        stz             Uart_rxhead                     ; reset buffer indexes
        stz             Uart_rxtail
        lda             #0x1f0
        sta             Uart_foff                       ; set threshold for XOFF
        lda             #0x010
        sta             Uart_fon                        ; set threshold for XON
        lda             #1
        sta             UART_IE                         ; enable receive interrupt only
        stz             Uart_rxrts                      ; no RTS/CTS signals available
        stz             Uart_txrts                      ; no RTS/CTS signals available
        stz             Uart_txdtr                      ; no DTR signals available
        stz             Uart_rxdtr                      ; no DTR signals available
        lda             #1
        sta             Uart_txxon                      ; for now
        lda             #1
        sta             SERIAL_SEMA
        rts
 
;---------------------------------------------------------------------------------
; Get character directly from serial port. Blocks until a character is available.
;---------------------------------------------------------------------------------
;
public SerialGetCharDirect:
sgc1:
        lda             UART_LS         ; uart status
        and             #rxfull         ; is there a char available ?
        beq             sgc1
        lda             UART
        rts
 
;------------------------------------------------
; Check for a character at the serial port
; returns r1 = 1 if char available, 0 otherwise
;------------------------------------------------
;
public SerialCheckForCharDirect:
        lda             UART_LS                 ; uart status
        and             #rxfull                 ; is there a char available ?
        rts
 
;-----------------------------------------
; Put character to serial port
; r1 = char to put
;-----------------------------------------
;
public SerialPutChar:
        phx
        phy
        push    r4
        push    r5
 
        ldx             UART_MC
        or              r2,r2,#3                ; assert DTR / RTS
        stx             UART_MC
        ldx             Uart_txrts
        beq             spcb1
        ld              r4,Milliseconds
        ldy             #1000                   ; delay count (1 s)
spcb3:
        ldx             UART_MS
        and             r2,r2,#$10              ; is CTS asserted ?
        bne             spcb1
        ld              r5,Milliseconds
        cmp             r4,r5
        beq             spcb3
        ld              r4,r5
        dey
        bne             spcb3
        bra             spcabort
spcb1:
        ldx             Uart_txdtr
        beq             spcb2
        ld              r4,Milliseconds
        ldy             #1000                   ; delay count
spcb4:
        ldx             UART_MS
        and             r2,r2,#$20              ; is DSR asserted ?
        bne             spcb2
        ld              r5,Milliseconds
        cmp             r4,r5
        beq             spcb4
        ld              r4,r5
        dey
        bne             spcb4
        bra             spcabort
spcb2:
        ldx             Uart_txxon
        beq             spcb5
spcb6:
        ldx             Uart_txxonoff
        beq             spcb5
        ld              r4,UART_MS
        and             r4,r4,#0x80                     ; DCD ?
        bne             spcb6
spcb5:
        ld              r4,Milliseconds
        ldy             #1000                           ; wait up to 1s
spcb8:
        ldx             UART_LS
        and             r2,r2,#0x20                     ; tx not full ?
        bne             spcb7
        ld              r5,Milliseconds
        cmp             r4,r5
        beq             spcb8
        ld              r4,r5
        dey
        bne             spcb8
        bra             spcabort
spcb7:
        sta             UART
spcabort:
        pop             r5
        pop             r4
        ply
        plx
        rts
 
;-------------------------------------------------
; Compute number of characters in recieve buffer.
; r4 = number of chars
;-------------------------------------------------
CharsInRxBuf:
        ld              r4,Uart_rxhead
        ldx             Uart_rxtail
        sub             r4,r4,r2
        bpl             cirxb1
        ld              r4,#0x200
        add             r4,r4,r2
        ldx             Uart_rxhead
        sub             r4,r4,r2
cirxb1:
        rts
 
;----------------------------------------------
; Get character from rx fifo
; If the fifo is empty enough then send an XON
;----------------------------------------------
;
public SerialGetChar:
        phx
        phy
        push    r4
 
        ldy             Uart_rxhead
        ldx             Uart_rxtail
        cmp             r2,r3
        beq             sgcfifo1                ; is there a char available ?
        lda             Uart_rxfifo,x   ; get the char from the fifo into r1
        inx                                             ; increment the fifo pointer
        and             r2,r2,#$1ff
        stx             Uart_rxtail
        ldx             Uart_rxflow             ; using flow control ?
        beq             sgcfifo2
        ldy             Uart_fon                ; enough space in Rx buffer ?
        jsr             CharsInRxBuf
        cmp             r4,r3
        bpl             sgcfifo2
        stz             Uart_rxflow             ; flow off
        ld              r4,Uart_rxrts
        beq             sgcfifo3
        ld              r4,UART_MC              ; set rts bit in MC
        or              r4,r4,#2
        st              r4,UART_MC
sgcfifo3:
        ld              r4,Uart_rxdtr
        beq             sgcfifo4
        ld              r4,UART_MC              ; set DTR
        or              r4,r4,#1
        st              r4,UART_MC
sgcfifo4:
        ld              r4,Uart_rxxon
        beq             sgcfifo5
        ld              r4,#XON
        st              r4,UART
sgcfifo5:
sgcfifo2:                                       ; return with char in r1
        pop             r4
        ply
        plx
        rts
sgcfifo1:
        lda             #-1                             ; no char available
        pop             r4
        ply
        plx
        rts
 
 
;-----------------------------------------
; Serial port IRQ
;-----------------------------------------
;
public SerialIRQ:
        pha
        phx
        phy
        push    r4
 
        lda             UART_IS                 ; get interrupt status
        bpl             sirq1                   ; no interrupt
        and             #0x7f                   ; switch on interrupt type
        cmp             #4
        beq             srxirq
        cmp             #$0C
        beq             stxirq
        cmp             #$10
        beq             smsirq
        ; unknown IRQ type
sirq1:
        pop             r4
        ply
        plx
        pla
        rti
 
 
; Get the modem status and record it
smsirq:
        lda             UART_MS
        sta             Uart_ms
        bra             sirq1
 
stxirq:
        bra             sirq1
 
; Get a character from the uart and store it in the rx fifo
srxirq:
srxirq1:
        lda             UART                            ; get the char (clears interrupt)
        ldx             Uart_txxon
        beq             srxirq3
        cmp             #XOFF
        bne             srxirq2
        lda             #1
        sta             Uart_txxonoff
        bra             srxirq5
srxirq2:
        cmp             #XON
        bne             srxirq3
        stz             Uart_txxonoff
        bra             srxirq5
srxirq3:
        stz             Uart_txxonoff
        ldx             Uart_rxhead
        sta             Uart_rxfifo,x           ; store in buffer
        inx
        and             r2,r2,#$1ff
        stx             Uart_rxhead
srxirq5:
        lda             UART_LS                         ; check for another ready character
        and             #rxfull
        bne             srxirq1
        lda             Uart_rxflow                     ; are we using flow controls?
        bne             srxirq8
        jsr             CharsInRxBuf
        lda             Uart_foff
        cmp             r4,r1
        bmi             srxirq8
        lda             #1
        sta             Uart_rxflow
        lda             Uart_rxrts
        beq             srxirq6
        lda             UART_MC
        and             #$FD                    ; turn off RTS
        sta             UART_MC
srxirq6:
        lda             Uart_rxdtr
        beq             srxirq7
        lda             UART_MC
        and             #$FE                    ; turn off DTR
        sta             UART_MC
srxirq7:
        lda             Uart_rxxon
        beq             srxirq8
        lda             #XOFF
        sta             UART
srxirq8:
        bra             sirq1
 
 

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Subversion Repositories rtf65002

[/] [rtf65002/] [trunk/] [software/] [asm/] [serial.asm] - Blame information for rev 40

Line No.	Rev	Author	Line
1	40	robfinch
2			`; ============================================================================`
3			`; __`
4			`; \\__/ o\ (C) 2014 Robert Finch, Stratford`
5			`; \ __ / All rights reserved.`
6			`; \/_// robfinch@opencores.org`
7			`; \|\|`
8			`;`
9			`;`
10			`; This source file is free software: you can redistribute it and/or modify`
11			`; it under the terms of the GNU Lesser General Public License as published`
12			`; by the Free Software Foundation, either version 3 of the License, or`
13			`; (at your option) any later version.`
14			`;`
15			`; This source file is distributed in the hope that it will be useful,`
16			`; but WITHOUT ANY WARRANTY; without even the implied warranty of`
17			`; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
18			`; GNU General Public License for more details.`
19			`;`
20			`; You should have received a copy of the GNU General Public License`
21			`; along with this program. If not, see .`
22			`;`
23			`; ============================================================================`
24			`;`
25			`UART EQU 0xFFDC0A00`
26			`UART_LS EQU 0xFFDC0A01`
27			`UART_MS EQU 0xFFDC0A02`
28			`UART_IS EQU 0xFFDC0A03`
29			`UART_IE EQU 0xFFDC0A04`
30			`UART_MC EQU 0xFFDC0A06`
31			`UART_CM1 EQU 0xFFDC0A09`
32			`UART_CM2 EQU 0xFFDC0A0A`
33			`UART_CM3 EQU 0xFFDC0A0B`
34			`txempty EQU 0x40`
35			`rxfull EQU 0x01`
36
37			`bss`
38			`org 0x01FBC000`
39			`Uart_rxfifo fill.b 512,0`
40			`org 0x7D0`
41			`Uart_rxhead db 0`
42			`Uart_rxtail db 0`
43			`Uart_ms db 0`
44			`Uart_rxrts db 0`
45			`Uart_rxdtr db 0`
46			`Uart_rxxon db 0`
47			`Uart_rxflow db 0`
48			`Uart_fon db 0`
49			`Uart_foff db 0`
50			`Uart_txrts db 0`
51			`Uart_txdtr db 0`
52			`Uart_txxon db 0`
53			`Uart_txxonoff db 0`
54
55			`;==============================================================================`
56			`; Serial port`
57			`;==============================================================================`
58			`code`
59			`;------------------------------------------------------------------------------`
60			`; Initialize the serial port`
61			`; r1 = low 28 bits = baud rate`
62			`; r2 = other settings`
63			`; The desired baud rate must fit in 28 bits or less.`
64			`;------------------------------------------------------------------------------`
65			`;`
66			`public SerialInit:`
67			`; asl r1,r1,#4 ; * 16`
68			`; shlui r1,r1,#32 ; * 2^32`
69			`; inhu r2,CR_CLOCK ; get clock frequency from config record`
70			`; divu r1,r1,r2 ; / clock frequency`
71
72			`lsr r1,r1,#8 ; drop the lowest 8 bits`
73			`sta UART_CM1 ; set LSB`
74			`lsr r1,r1,#8`
75			`sta UART_CM2 ; set middle bits`
76			`lsr r1,r1,#8`
77			`sta UART_CM3 ; set MSB`
78			`stz Uart_rxhead ; reset buffer indexes`
79			`stz Uart_rxtail`
80			`lda #0x1f0`
81			`sta Uart_foff ; set threshold for XOFF`
82			`lda #0x010`
83			`sta Uart_fon ; set threshold for XON`
84			`lda #1`
85			`sta UART_IE ; enable receive interrupt only`
86			`stz Uart_rxrts ; no RTS/CTS signals available`
87			`stz Uart_txrts ; no RTS/CTS signals available`
88			`stz Uart_txdtr ; no DTR signals available`
89			`stz Uart_rxdtr ; no DTR signals available`
90			`lda #1`
91			`sta Uart_txxon ; for now`
92			`lda #1`
93			`sta SERIAL_SEMA`
94			`rts`
95
96			`;---------------------------------------------------------------------------------`
97			`; Get character directly from serial port. Blocks until a character is available.`
98			`;---------------------------------------------------------------------------------`
99			`;`
100			`public SerialGetCharDirect:`
101			`sgc1:`
102			`lda UART_LS ; uart status`
103			`and #rxfull ; is there a char available ?`
104			`beq sgc1`
105			`lda UART`
106			`rts`
107
108			`;------------------------------------------------`
109			`; Check for a character at the serial port`
110			`; returns r1 = 1 if char available, 0 otherwise`
111			`;------------------------------------------------`
112			`;`
113			`public SerialCheckForCharDirect:`
114			`lda UART_LS ; uart status`
115			`and #rxfull ; is there a char available ?`
116			`rts`
117
118			`;-----------------------------------------`
119			`; Put character to serial port`
120			`; r1 = char to put`
121			`;-----------------------------------------`
122			`;`
123			`public SerialPutChar:`
124			`phx`
125			`phy`
126			`push r4`
127			`push r5`
128
129			`ldx UART_MC`
130			`or r2,r2,#3 ; assert DTR / RTS`
131			`stx UART_MC`
132			`ldx Uart_txrts`
133			`beq spcb1`
134			`ld r4,Milliseconds`
135			`ldy #1000 ; delay count (1 s)`
136			`spcb3:`
137			`ldx UART_MS`
138			`and r2,r2,#$10 ; is CTS asserted ?`
139			`bne spcb1`
140			`ld r5,Milliseconds`
141			`cmp r4,r5`
142			`beq spcb3`
143			`ld r4,r5`
144			`dey`
145			`bne spcb3`
146			`bra spcabort`
147			`spcb1:`
148			`ldx Uart_txdtr`
149			`beq spcb2`
150			`ld r4,Milliseconds`
151			`ldy #1000 ; delay count`
152			`spcb4:`
153			`ldx UART_MS`
154			`and r2,r2,#$20 ; is DSR asserted ?`
155			`bne spcb2`
156			`ld r5,Milliseconds`
157			`cmp r4,r5`
158			`beq spcb4`
159			`ld r4,r5`
160			`dey`
161			`bne spcb4`
162			`bra spcabort`
163			`spcb2:`
164			`ldx Uart_txxon`
165			`beq spcb5`
166			`spcb6:`
167			`ldx Uart_txxonoff`
168			`beq spcb5`
169			`ld r4,UART_MS`
170			`and r4,r4,#0x80 ; DCD ?`
171			`bne spcb6`
172			`spcb5:`
173			`ld r4,Milliseconds`
174			`ldy #1000 ; wait up to 1s`
175			`spcb8:`
176			`ldx UART_LS`
177			`and r2,r2,#0x20 ; tx not full ?`
178			`bne spcb7`
179			`ld r5,Milliseconds`
180			`cmp r4,r5`
181			`beq spcb8`
182			`ld r4,r5`
183			`dey`
184			`bne spcb8`
185			`bra spcabort`
186			`spcb7:`
187			`sta UART`
188			`spcabort:`
189			`pop r5`
190			`pop r4`
191			`ply`
192			`plx`
193			`rts`
194
195			`;-------------------------------------------------`
196			`; Compute number of characters in recieve buffer.`
197			`; r4 = number of chars`
198			`;-------------------------------------------------`
199			`CharsInRxBuf:`
200			`ld r4,Uart_rxhead`
201			`ldx Uart_rxtail`
202			`sub r4,r4,r2`
203			`bpl cirxb1`
204			`ld r4,#0x200`
205			`add r4,r4,r2`
206			`ldx Uart_rxhead`
207			`sub r4,r4,r2`
208			`cirxb1:`
209			`rts`
210
211			`;----------------------------------------------`
212			`; Get character from rx fifo`
213			`; If the fifo is empty enough then send an XON`
214			`;----------------------------------------------`
215			`;`
216			`public SerialGetChar:`
217			`phx`
218			`phy`
219			`push r4`
220
221			`ldy Uart_rxhead`
222			`ldx Uart_rxtail`
223			`cmp r2,r3`
224			`beq sgcfifo1 ; is there a char available ?`
225			`lda Uart_rxfifo,x ; get the char from the fifo into r1`
226			`inx ; increment the fifo pointer`
227			`and r2,r2,#$1ff`
228			`stx Uart_rxtail`
229			`ldx Uart_rxflow ; using flow control ?`
230			`beq sgcfifo2`
231			`ldy Uart_fon ; enough space in Rx buffer ?`
232			`jsr CharsInRxBuf`
233			`cmp r4,r3`
234			`bpl sgcfifo2`
235			`stz Uart_rxflow ; flow off`
236			`ld r4,Uart_rxrts`
237			`beq sgcfifo3`
238			`ld r4,UART_MC ; set rts bit in MC`
239			`or r4,r4,#2`
240			`st r4,UART_MC`
241			`sgcfifo3:`
242			`ld r4,Uart_rxdtr`
243			`beq sgcfifo4`
244			`ld r4,UART_MC ; set DTR`
245			`or r4,r4,#1`
246			`st r4,UART_MC`
247			`sgcfifo4:`
248			`ld r4,Uart_rxxon`
249			`beq sgcfifo5`
250			`ld r4,#XON`
251			`st r4,UART`
252			`sgcfifo5:`
253			`sgcfifo2: ; return with char in r1`
254			`pop r4`
255			`ply`
256			`plx`
257			`rts`
258			`sgcfifo1:`
259			`lda #-1 ; no char available`
260			`pop r4`
261			`ply`
262			`plx`
263			`rts`
264
265
266			`;-----------------------------------------`
267			`; Serial port IRQ`
268			`;-----------------------------------------`
269			`;`
270			`public SerialIRQ:`
271			`pha`
272			`phx`
273			`phy`
274			`push r4`
275
276			`lda UART_IS ; get interrupt status`
277			`bpl sirq1 ; no interrupt`
278			`and #0x7f ; switch on interrupt type`
279			`cmp #4`
280			`beq srxirq`
281			`cmp #$0C`
282			`beq stxirq`
283			`cmp #$10`
284			`beq smsirq`
285			`; unknown IRQ type`
286			`sirq1:`
287			`pop r4`
288			`ply`
289			`plx`
290			`pla`
291			`rti`
292
293
294			`; Get the modem status and record it`
295			`smsirq:`
296			`lda UART_MS`
297			`sta Uart_ms`
298			`bra sirq1`
299
300			`stxirq:`
301			`bra sirq1`
302
303			`; Get a character from the uart and store it in the rx fifo`
304			`srxirq:`
305			`srxirq1:`
306			`lda UART ; get the char (clears interrupt)`
307			`ldx Uart_txxon`
308			`beq srxirq3`
309			`cmp #XOFF`
310			`bne srxirq2`
311			`lda #1`
312			`sta Uart_txxonoff`
313			`bra srxirq5`
314			`srxirq2:`
315			`cmp #XON`
316			`bne srxirq3`
317			`stz Uart_txxonoff`
318			`bra srxirq5`
319			`srxirq3:`
320			`stz Uart_txxonoff`
321			`ldx Uart_rxhead`
322			`sta Uart_rxfifo,x ; store in buffer`
323			`inx`
324			`and r2,r2,#$1ff`
325			`stx Uart_rxhead`
326			`srxirq5:`
327			`lda UART_LS ; check for another ready character`
328			`and #rxfull`
329			`bne srxirq1`
330			`lda Uart_rxflow ; are we using flow controls?`
331			`bne srxirq8`
332			`jsr CharsInRxBuf`
333			`lda Uart_foff`
334			`cmp r4,r1`
335			`bmi srxirq8`
336			`lda #1`
337			`sta Uart_rxflow`
338			`lda Uart_rxrts`
339			`beq srxirq6`
340			`lda UART_MC`
341			`and #$FD ; turn off RTS`
342			`sta UART_MC`
343			`srxirq6:`
344			`lda Uart_rxdtr`
345			`beq srxirq7`
346			`lda UART_MC`
347			`and #$FE ; turn off DTR`
348			`sta UART_MC`
349			`srxirq7:`
350			`lda Uart_rxxon`
351			`beq srxirq8`
352			`lda #XOFF`
353			`sta UART`
354			`srxirq8:`
355			`bra sirq1`
356
357