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[/] [rtf8088/] [trunk/] [rtl/] [verilog/] [CALLF.v] - Blame information for rev 2

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//=============================================================================
//  CALL FAR and CALL FAR indirect
//
//
//  2009-2012 Robert Finch
//  Stratford
//  robfinch<remove>@opencores.org
//
//
// This source file is free software: you can redistribute it and/or modify 
// it under the terms of the GNU Lesser General Public License as published 
// by the Free Software Foundation, either version 3 of the License, or     
// (at your option) any later version.                                      
//                                                                          
// This source file is distributed in the hope that it will be useful,      
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
// GNU General Public License for more details.                             
//                                                                          
// You should have received a copy of the GNU General Public License        
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
//
//
//=============================================================================
//
CALLF:
        begin
                `INITIATE_STACK_WRITE
                lock_o <= 1'b1;
                dat_o <= cs[15:8];
                state <= CALLF1;
        end
CALLF1:
        if (ack_i) begin
                `PAUSE_STACK_WRITE
                state <= CALLF2;
        end
CALLF2:
        begin
                `INITIATE_STACK_WRITE
                dat_o <= cs[7:0];
                state <= CALLF3;
        end
CALLF3:
        if (ack_i) begin
                `PAUSE_STACK_WRITE
                state <= CALLF4;
        end
CALLF4:
        begin
                `INITIATE_STACK_WRITE
                dat_o <= ip[15:8];
                state <= CALLF5;
        end
CALLF5:
        if (ack_i) begin
                `PAUSE_STACK_WRITE
                state <= CALLF6;
        end
CALLF6:
        begin
                `INITIATE_STACK_WRITE
                dat_o <= ip[7:0];
                state <= CALLF7;
        end
CALLF7:
        if (ack_i) begin
                `TERMINATE_CYCLE
                if (ir==8'hFF && rrr==3'b011)   // CALL FAR indirect
                        state <= JUMP_VECTOR1;
                else begin
                        cs <= selector;
                        ip <= offset;
                        state <= IFETCH;
                end
        end

Line No.	Rev	Author	Line
1	2	robfinch	`//=============================================================================`
2			`// CALL FAR and CALL FAR indirect`
3			`//`
4			`//`
5			`// 2009-2012 Robert Finch`
6			`// Stratford`
7			`// robfinch<remove>@opencores.org`
8			`//`
9			`//`
10			`// This source file is free software: you can redistribute it and/or modify`
11			`// it under the terms of the GNU Lesser General Public License as published`
12			`// by the Free Software Foundation, either version 3 of the License, or`
13			`// (at your option) any later version.`
14			`//`
15			`// This source file is distributed in the hope that it will be useful,`
16			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
17			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
18			`// GNU General Public License for more details.`
19			`//`
20			`// You should have received a copy of the GNU General Public License`
21			`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
22			`//`
23			`//`
24			`//=============================================================================`
25			`//`
26			`CALLF:`
27			`begin`
28			`INITIATE_STACK_WRITE
29			`lock_o <= 1'b1;`
30			`dat_o <= cs[15:8];`
31			`state <= CALLF1;`
32			`end`
33			`CALLF1:`
34			`if (ack_i) begin`
35			`PAUSE_STACK_WRITE
36			`state <= CALLF2;`
37			`end`
38			`CALLF2:`
39			`begin`
40			`INITIATE_STACK_WRITE
41			`dat_o <= cs[7:0];`
42			`state <= CALLF3;`
43			`end`
44			`CALLF3:`
45			`if (ack_i) begin`
46			`PAUSE_STACK_WRITE
47			`state <= CALLF4;`
48			`end`
49			`CALLF4:`
50			`begin`
51			`INITIATE_STACK_WRITE
52			`dat_o <= ip[15:8];`
53			`state <= CALLF5;`
54			`end`
55			`CALLF5:`
56			`if (ack_i) begin`
57			`PAUSE_STACK_WRITE
58			`state <= CALLF6;`
59			`end`
60			`CALLF6:`
61			`begin`
62			`INITIATE_STACK_WRITE
63			`dat_o <= ip[7:0];`
64			`state <= CALLF7;`
65			`end`
66			`CALLF7:`
67			`if (ack_i) begin`
68			`TERMINATE_CYCLE
69			`if (ir==8'hFF && rrr==3'b011) // CALL FAR indirect`
70			`state <= JUMP_VECTOR1;`
71			`else begin`
72			`cs <= selector;`
73			`ip <= offset;`
74			`state <= IFETCH;`
75			`end`
76			`end`

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[/] [rtf8088/] [trunk/] [rtl/] [verilog/] [CALLF.v] - Blame information for rev 2