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[/] [rtfbitmapcontroller/] [trunk/] [rtl/] [verilog/] [gfx_CalcAddress.v] - Blame information for rev 16

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1 16 robfinch
// ============================================================================
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//        __
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//   \\__/ o\    (C) 2015  Robert Finch, Stratford
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch<remove>@finitron.ca
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//       ||
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//
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//
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// This source file is free software: you can redistribute it and/or modify 
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// it under the terms of the GNU Lesser General Public License as published 
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// by the Free Software Foundation, either version 3 of the License, or     
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// (at your option) any later version.                                      
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//                                                                          
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// This source file is distributed in the hope that it will be useful,      
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// but WITHOUT ANY WARRANTY; without even the implied warranty of           
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
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// GNU General Public License for more details.                             
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//                                                                          
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// You should have received a copy of the GNU General Public License        
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// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
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//                                                                          
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//      Verilog 1995
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//
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// ref: XC7a100t-1CSG324
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// ============================================================================
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//
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// Compute the graphics address
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//
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module gfx_CalcAddress(base_address_i, color_depth_i, hdisplayed_i, x_coord_i, y_coord_i,
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        address_o, mb_o, me_o);
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input [31:0] base_address_i;
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input [2:0] color_depth_i;
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input [11:0] hdisplayed_i;       // pixel per line
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input [11:0] x_coord_i;
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input [11:0] y_coord_i;
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output [31:0] address_o;
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output [6:0] mb_o;
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output [6:0] me_o;
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parameter BPP6 = 3'd0;
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parameter BPP8 = 3'd1;
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parameter BPP9 = 3'd2;
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parameter BPP12 = 3'd3;
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parameter BPP15 = 3'd4;
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parameter BPP16 = 3'd5;
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parameter BPP24 = 3'd6;
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parameter BPP32 = 3'd7;
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reg [15:0] coeff;
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always @(color_depth_i)
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case(color_depth_i)
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BPP6:   coeff = 3121;   // 1/21 * 65536
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BPP8:   coeff = 4096;   // 1/16 * 65536
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BPP9:   coeff = 4681;   // 1/14 * 65536
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BPP12:  coeff = 6554;   // 1/10 * 65536
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BPP15:  coeff = 8192;   // 1/8 * 65536
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BPP16:  coeff = 8192;   // 1/8 * 65536
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BPP24:  coeff = 13107;  // 1/5 * 65536
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BPP32:  coeff = 16384;  // 1/4 * 65536
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endcase
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reg [5:0] bpp;
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always @(color_depth_i)
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case(color_depth_i)
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BPP6:   bpp = 5;
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BPP8:   bpp = 7;
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BPP9:   bpp = 8;
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BPP12:  bpp = 11;
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BPP15:  bpp = 15;
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BPP16:  bpp = 15;
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BPP24:  bpp = 23;
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BPP32:  bpp = 31;
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endcase
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reg [6:0] coeff2;
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always @(color_depth_i)
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case(color_depth_i)
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BPP6:   coeff2 = 126;
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BPP8:   coeff2 = 128;
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BPP9:   coeff2 = 126;
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BPP12:  coeff2 = 120;
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BPP15:  coeff2 = 128;
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BPP16:  coeff2 = 128;
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BPP24:  coeff2 = 120;
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BPP32:  coeff2 = 128;
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endcase
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wire [25:0] strip_num65k = x_coord_i * coeff;
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wire [15:0] strip_fract = strip_num65k[15:0];
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wire [13:0] ndx = strip_fract[15:9] * coeff2;
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assign mb_o = ndx[13:7];
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assign me_o = mb_o + bpp;
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wire [25:0] strip_num65kr = strip_num65k + 26'hFFFF;
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wire [25:0] num_strips65k = hdisplayed_i * coeff + 26'hFFFF;
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wire [9:0] strip_num = strip_num65kr[25:16];
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wire [9:0] num_strips = num_strips65k[25:16];
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wire [31:0] offset = {num_strips * y_coord_i + strip_num,4'h0};
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assign address_o = base_address_i + offset;
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endmodule

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