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[/] [rxaui_interface_and_xaui_to_rxaui_interface_adapter/] [RxPath/] [sip_xpcs_comma_detect.v] - Blame information for rev 2

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1 2 tsahidanie 
//-----------------------------------------------------------------------------
2 
// Title         : sip_xpcs_comma_detect
3 
// Project       : SIP
4 
//-----------------------------------------------------------------------------
5 
// File          : sip_xpcs_comma_detect.v
6 
// Author        : Lior Valency
7 
// Created       : 19/02/2008
8 
// Last modified : 19/02/2008
9 
//-----------------------------------------------------------------------------
10 
// Description : This block is the comma detect block. It search for comma
11 
// for data received from serdes, after comma is found offset is locked
12 
// and correct data is forwarded to next block.
13 
//-----------------------------------------------------------------------------
14 
// Copyright (c) 2007  Marvell International Ltd.
15 
//
16 
// THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL SEMICONDUCTOR, INC.
17 
// NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT
18 
// OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE
19 
// DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL.
20 
// THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESS,
21 
// IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE.
22 
//
23 
//------------------------------------------------------------------------------
24 
// Modification history :
25 
// 12/12/2007  : created
26 
//-----------------------------------------------------------------------------
27 
module sip_xpcs_comma_detect (/*AUTOARG*/
28 
   // Outputs
29 
   lock, rout,
30 
   // Inputs
31 
   bypass, clk, comma_valid0, comma_valid1, commaa, commab,
32 
   data_special_valid0, data_special_valid1, reset, rin, sel_comma,
33 
   sigdet, en_comma_align_glob, rf_en_2sync
34 
   );
35 
 
36 
 
37 
 
38 
   output               lock;                   // From cd_ssm of cd_ssm.v
39 
   output [19:0] rout;                   // From cd_mux of cd_mux.v
40 
 
41 
   input                bypass;                 // To cd_7bit of cd_7bit.v, ...
42 
   input                clk;                    // To cd_7bit of cd_7bit.v, ...
43 
   input                comma_valid0;           // To cd_ssm of cd_ssm.v
44 
   input                comma_valid1;           // To cd_ssm of cd_ssm.v
45 
   input [9:0]           commaa;                 // To cd_10bit of cd_10bit.v
46 
   input [9:0]           commab;                 // To cd_10bit of cd_10bit.v
47 
   input                data_special_valid0;    // To cd_ssm of cd_ssm.v
48 
   input                data_special_valid1;    // To cd_ssm of cd_ssm.v
49 
   input                reset;                  // To cd_7bit of cd_7bit.v, ...
50 
   input [19:0]          rin;                    // To cd_7bit of cd_7bit.v, ...
51 
   input                sel_comma;              // To cd_7bit of cd_7bit.v, ...
52 
   input                sigdet;                 // To cd_ssm of cd_ssm.v
53 
   input                en_comma_align_glob;    // To cd_ssm. Added by Erez Reches 21Oct01
54 
   input                rf_en_2sync;          // Skip Synch FSM
55 
   /*AUTOWIRE*/
56 
   // Beginning of automatic wires (for undeclared instantiated-module outputs)
57 
   wire                 bypass_sync;            // From cd_sync of cd_sync.v
58 
   wire [9:0]            commaa_sync;            // From cd_sync of cd_sync.v
59 
   wire [9:0]            commab_sync;            // From cd_sync of cd_sync.v
60 
   wire                 enable_cgalign;         // From cd_ssm of cd_ssm.v
61 
   wire [4:0]            position_10bit;         // From cd_10bit of cd_10bit.v
62 
   wire [4:0]            position_7bit;          // From cd_7bit of cd_7bit.v
63 
   wire                 reset_sync;             // From cd_sync of cd_sync.v
64 
   wire                 sel_comma_sync;         // From cd_sync of cd_sync.v
65 
   wire                 sigdet_sync;            // From cd_sync of cd_sync.v
66 
   wire [10:0]           sync_state;             // From cd_ssm of cd_ssm.v
67 
   wire [10:0]           sync_state_z;           // From cd_ssm of cd_ssm.v
68 
   // End of automatics
69 
 
70 
   wire                 rf_en_2sync_sync;
71 
 
72 
/*
73 
   cd_ssm AUTO_TEMPLATE (
74 
                  // Outputs
75 
                  .sync_status          (lock));
76 
*/
77 
 
78 
 
79 
// drorb: Sample input signals
80 
   sip_xpcs_cd_sync cd_sync (/*AUTOINST*/
81 
                    // Outputs
82 
                    .bypass_sync        (bypass_sync),
83 
                    .commaa_sync        (commaa_sync[9:0]),
84 
                    .commab_sync        (commab_sync[9:0]),
85 
                    .reset_sync         (reset_sync),
86 
                    .sel_comma_sync     (sel_comma_sync),
87 
                    .sigdet_sync        (sigdet_sync),
88 
                    .rf_en_2sync_sync(rf_en_2sync_sync),
89 
                    // Inputs
90 
                    .bypass             (bypass),
91 
                    .clk                (clk),
92 
                    .commaa             (commaa[9:0]),
93 
                    .commab             (commab[9:0]),
94 
                    .reset              (reset),
95 
                    .sel_comma          (sel_comma),
96 
                    .sigdet             (sigdet),
97 
                    .rf_en_2sync           (rf_en_2sync));
98 
 
99 
 
100 
// drorb: Find comma index
101 
   sip_xpcs_cd_7bit cd_7bit (/*AUTOINST*/
102 
                    // Outputs
103 
                    .position_7bit      (position_7bit[4:0]),
104 
                    // Inputs
105 
                    .bypass_sync        (bypass_sync),
106 
                    .clk                (clk),
107 
                    .enable_cgalign     (enable_cgalign),
108 
                    .reset_sync         (reset_sync),
109 
                    .rin                (rin[19:0]),
110 
                    .sel_comma_sync     (sel_comma_sync));
111 
 
112 
 
113 
// drorb: This block is not used.
114 
   sip_xpcs_cd_10bit cd_10bit (/*AUTOINST*/
115 
                      // Outputs
116 
                      .position_10bit   (position_10bit[4:0]),
117 
                      // Inputs
118 
                      .bypass_sync      (bypass_sync),
119 
                      .clk              (clk),
120 
                      .commaa_sync      (commaa_sync[9:0]),
121 
                      .commab_sync      (commab_sync[9:0]),
122 
                      .enable_cgalign   (enable_cgalign),
123 
                      .reset_sync       (reset_sync),
124 
                      .rin              (rin[19:0]),
125 
                      .sel_comma_sync   (sel_comma_sync));
126 
 
127 
 
128 
 
129 
// drorb: The 'cd_ssm' is the standard Synch FSM (Figure 48-7, 802.3ae)
130 
 
131 
   sip_xpcs_cd_ssm cd_ssm (/*AUTOINST*/
132 
                  // Outputs
133 
                  .enable_cgalign       (enable_cgalign),
134 
                  .sync_status          (lock),                  // Templated
135 
                  .sync_state           (sync_state[10:0]),
136 
                  .sync_state_z         (sync_state_z[10:0]),
137 
                  // Inputs
138 
                  .bypass_sync          (bypass_sync),
139 
                  .clk                  (clk),
140 
                  .comma_valid0         (comma_valid0),
141 
                  .comma_valid1         (comma_valid1),
142 
                  .data_special_valid0  (data_special_valid0),
143 
                  .data_special_valid1  (data_special_valid1),
144 
                  .reset_sync           (reset_sync),
145 
                  .sigdet_sync          (sigdet_sync),
146 
                  .en_comma_align_glob  (en_comma_align_glob),
147 
                  .rf_en_2sync_sync   (rf_en_2sync_sync));
148 
 
149 
 
150 
// drorb: 'sel_comma_sync' is always 1 (at Top level), which means only position_7bit is used.
151 
 
152 
   sip_xpcs_cd_mux cd_mux (/*AUTOINST*/
153 
                  // Outputs
154 
                  .rout                 (rout[19:0]),
155 
                  // Inputs
156 
                  .bypass_sync          (bypass_sync),
157 
                  .clk                  (clk),
158 
                  .position_7bit        (position_7bit[4:0]),
159 
                  .position_10bit       (position_10bit[4:0]),
160 
                  .rin                  (rin[19:0]),
161 
                  .sel_comma_sync       (sel_comma_sync));
162 
 
163 
endmodule // comma_detect
164 
 
165 
 
166 
module sip_xpcs_cd_sync (/*AUTOARG*/
167 
   // Outputs
168 
   bypass_sync, commaa_sync, commab_sync, reset_sync, sel_comma_sync,
169 
   sigdet_sync, rf_en_2sync_sync,
170 
   // Inputs
171 
   bypass, clk, commaa, commab, reset, sel_comma, sigdet, rf_en_2sync
172 
   );
173 
 
174 
   output bypass_sync;
175 
   output [9:0] commaa_sync;
176 
   output [9:0] commab_sync;
177 
   output reset_sync;
178 
   output sel_comma_sync;
179 
   output sigdet_sync;
180 
   output rf_en_2sync_sync;
181 
 
182 
   input bypass;
183 
   input clk;
184 
   input [9:0] commaa;
185 
   input [9:0] commab;
186 
   input reset;
187 
   input sel_comma;
188 
   input sigdet;
189 
   input rf_en_2sync;
190 
 
191 
   reg bypass_sync;
192 
   reg [9:0] commaa_sync;
193 
   reg [9:0] commab_sync;
194 
   reg reset_sync;
195 
   reg sel_comma_sync;
196 
   reg sigdet_sync;
197 
   reg rf_en_2sync_sync;
198 
 
199 
   always @(posedge clk)
200 
    begin
201 
     bypass_sync <= #1 bypass;
202 
     commaa_sync <= #1 commaa;
203 
     commab_sync <= #1 commab;
204 
     reset_sync <= #1 reset;
205 
     sel_comma_sync <= #1 sel_comma;
206 
     sigdet_sync <= #1 sigdet;
207 
     rf_en_2sync_sync <= #1 rf_en_2sync;
208 
    end
209 
 
210 
endmodule // cd_sync
211 
 
212 
 
213 
module sip_xpcs_cd_7bit (/*AUTOARG*/
214 
   // Outputs
215 
   position_7bit,
216 
   // Inputs
217 
   bypass_sync, clk, enable_cgalign, reset_sync, rin, sel_comma_sync
218 
   );
219 
 
220 
   output [4:0] position_7bit;
221 
 
222 
   input bypass_sync;
223 
   input clk;
224 
   input enable_cgalign;
225 
   input reset_sync;
226 
   input [19:0] rin;
227 
   input sel_comma_sync;
228 
 
229 
   parameter COMMA_N = 7'b1111100;
230 
   parameter COMMA_P = 7'b0000011;
231 
   parameter POSITION_0 = 5'd0;
232 
   parameter POSITION_1 = 5'd1;
233 
   parameter POSITION_2 = 5'd2;
234 
   parameter POSITION_3 = 5'd3;
235 
   parameter POSITION_4 = 5'd4;
236 
   parameter POSITION_5 = 5'd5;
237 
   parameter POSITION_6 = 5'd6;
238 
   parameter POSITION_7 = 5'd7;
239 
   parameter POSITION_8 = 5'd8;
240 
   parameter POSITION_9 = 5'd9;
241 
   parameter POSITION_10 = 5'd10;
242 
   parameter POSITION_11 = 5'd11;
243 
   parameter POSITION_12 = 5'd12;
244 
   parameter POSITION_13 = 5'd13;
245 
   parameter POSITION_14 = 5'd14;
246 
   parameter POSITION_15 = 5'd15;
247 
   parameter POSITION_16 = 5'd16;
248 
   parameter POSITION_17 = 5'd17;
249 
   parameter POSITION_18 = 5'd18;
250 
   parameter POSITION_19 = 5'd19;
251 
 
252 
   reg comma_found;
253 
   //reg [19:0] comma_pos;
254 
   reg [4:0] position_7bit;
255 
   reg [4:0] position;
256 
   reg [19:0] rin_z;
257 
 
258 
   reg comma_pos_0;
259 
   reg comma_pos_1;
260 
   reg comma_pos_2;
261 
   reg comma_pos_3;
262 
   reg comma_pos_4;
263 
   reg comma_pos_5;
264 
   reg comma_pos_6;
265 
   reg comma_pos_7;
266 
   reg comma_pos_8;
267 
   reg comma_pos_9;
268 
   reg comma_pos_10;
269 
   reg comma_pos_11;
270 
   reg comma_pos_12;
271 
   reg comma_pos_13;
272 
   reg comma_pos_14;
273 
   reg comma_pos_15;
274 
   reg comma_pos_16;
275 
   reg comma_pos_17;
276 
   reg comma_pos_18;
277 
   reg comma_pos_19;
278 
 
279 
 
280 
   wire [19:0] comma_pos;
281 
 
282 
   assign comma_pos = {comma_pos_19,
283 
                       comma_pos_18,
284 
                       comma_pos_17,
285 
                       comma_pos_16,
286 
                       comma_pos_15,
287 
                       comma_pos_14,
288 
                       comma_pos_13,
289 
                       comma_pos_12,
290 
                       comma_pos_11,
291 
                       comma_pos_10,
292 
                       comma_pos_9,
293 
                       comma_pos_8,
294 
                       comma_pos_7,
295 
                       comma_pos_6,
296 
                       comma_pos_5,
297 
                       comma_pos_4,
298 
                       comma_pos_3,
299 
                       comma_pos_2,
300 
                       comma_pos_1,
301 
                       comma_pos_0};
302 
 
303 
   wire [25:0] datain;
304 
   wire reset_7bit_det;
305 
 
306 
   assign reset_7bit_det = reset_sync | bypass_sync | ~sel_comma_sync;
307 
   assign datain = {rin[5:0],rin_z};
308 
 
309 
   always @(posedge clk)
310 
    begin
311 
     rin_z <= #1 rin;
312 
    end
313 
 
314 
   always @(posedge clk)
315 
    begin
316 
     if (reset_7bit_det)
317 
      begin
318 
       comma_pos_0 <= 1'b0;
319 
      end
320 
     else if ((datain[6:0] == COMMA_N) | (datain[6:0] == COMMA_P))
321 
      begin
322 
       comma_pos_0 <= 1'b1;
323 
      end
324 
     else
325 
      begin
326 
       comma_pos_0 <= 1'b0;
327 
      end
328 
    end
329 
 
330 
   always @(posedge clk)
331 
    begin
332 
     if (reset_7bit_det)
333 
      begin
334 
       comma_pos_1 <= 1'b0;
335 
      end
336 
     else if ((datain[7:1] == COMMA_N) | (datain[7:1] == COMMA_P))
337 
      begin
338 
       comma_pos_1 <= 1'b1;
339 
      end
340 
     else
341 
      begin
342 
       comma_pos_1 <= 1'b0;
343 
      end
344 
    end
345 
 
346 
   always @(posedge clk)
347 
    begin
348 
     if (reset_7bit_det)
349 
      begin
350 
       comma_pos_2 <= 1'b0;
351 
      end
352 
     else if ((datain[8:2] == COMMA_N) | (datain[8:2] == COMMA_P))
353 
      begin
354 
       comma_pos_2 <= 1'b1;
355 
      end
356 
     else
357 
      begin
358 
       comma_pos_2 <= 1'b0;
359 
      end
360 
    end
361 
 
362 
   always @(posedge clk)
363 
    begin
364 
     if (reset_7bit_det)
365 
      begin
366 
       comma_pos_3 <= 1'b0;
367 
      end
368 
     else if ((datain[9:3] == COMMA_N) | (datain[9:3] == COMMA_P))
369 
      begin
370 
       comma_pos_3 <= 1'b1;
371 
      end
372 
     else
373 
      begin
374 
       comma_pos_3 <= 1'b0;
375 
      end
376 
    end
377 
 
378 
   always @(posedge clk)
379 
    begin
380 
     if (reset_7bit_det)
381 
      begin
382 
       comma_pos_4 <= 1'b0;
383 
      end
384 
     else if ((datain[10:4] == COMMA_N) | (datain[10:4] == COMMA_P))
385 
      begin
386 
       comma_pos_4 <= 1'b1;
387 
      end
388 
     else
389 
      begin
390 
       comma_pos_4 <= 1'b0;
391 
      end
392 
    end
393 
 
394 
   always @(posedge clk)
395 
    begin
396 
     if (reset_7bit_det)
397 
      begin
398 
       comma_pos_5 <= 1'b0;
399 
      end
400 
     else if ((datain[11:5] == COMMA_N) | (datain[11:5] == COMMA_P))
401 
      begin
402 
       comma_pos_5 <= 1'b1;
403 
      end
404 
     else
405 
      begin
406 
       comma_pos_5 <= 1'b0;
407 
      end
408 
    end
409 
 
410 
   always @(posedge clk)
411 
    begin
412 
     if (reset_7bit_det)
413 
      begin
414 
       comma_pos_6 <= 1'b0;
415 
      end
416 
     else if ((datain[12:6] == COMMA_N) | (datain[12:6] == COMMA_P))
417 
      begin
418 
       comma_pos_6 <= 1'b1;
419 
      end
420 
     else
421 
      begin
422 
       comma_pos_6 <= 1'b0;
423 
      end
424 
    end
425 
 
426 
   always @(posedge clk)
427 
    begin
428 
     if (reset_7bit_det)
429 
      begin
430 
       comma_pos_7 <= 1'b0;
431 
      end
432 
     else if ((datain[13:7] == COMMA_N) | (datain[13:7] == COMMA_P))
433 
      begin
434 
       comma_pos_7 <= 1'b1;
435 
      end
436 
     else
437 
      begin
438 
       comma_pos_7 <= 1'b0;
439 
      end
440 
    end
441 
 
442 
   always @(posedge clk)
443 
    begin
444 
     if (reset_7bit_det)
445 
      begin
446 
       comma_pos_8 <= 1'b0;
447 
      end
448 
     else if ((datain[14:8] == COMMA_N) | (datain[14:8] == COMMA_P))
449 
      begin
450 
       comma_pos_8 <= 1'b1;
451 
      end
452 
     else
453 
      begin
454 
       comma_pos_8 <= 1'b0;
455 
      end
456 
    end
457 
 
458 
   always @(posedge clk)
459 
    begin
460 
     if (reset_7bit_det)
461 
      begin
462 
       comma_pos_9 <= 1'b0;
463 
      end
464 
     else if ((datain[15:9] == COMMA_N) | (datain[15:9] == COMMA_P))
465 
      begin
466 
       comma_pos_9 <= 1'b1;
467 
      end
468 
     else
469 
      begin
470 
       comma_pos_9 <= 1'b0;
471 
      end
472 
    end
473 
 
474 
   always @(posedge clk)
475 
    begin
476 
     if (reset_7bit_det)
477 
      begin
478 
       comma_pos_10 <= 1'b0;
479 
      end
480 
     else if ((datain[16:10] == COMMA_N) | (datain[16:10] == COMMA_P))
481 
      begin
482 
       comma_pos_10 <= 1'b1;
483 
      end
484 
     else
485 
      begin
486 
       comma_pos_10 <= 1'b0;
487 
      end
488 
    end
489 
 
490 
   always @(posedge clk)
491 
    begin
492 
     if (reset_7bit_det)
493 
      begin
494 
       comma_pos_11 <= 1'b0;
495 
      end
496 
     else if ((datain[17:11] == COMMA_N) | (datain[17:11] == COMMA_P))
497 
      begin
498 
       comma_pos_11 <= 1'b1;
499 
      end
500 
     else
501 
      begin
502 
       comma_pos_11 <= 1'b0;
503 
      end
504 
    end
505 
 
506 
   always @(posedge clk)
507 
    begin
508 
     if (reset_7bit_det)
509 
      begin
510 
       comma_pos_12 <= 1'b0;
511 
      end
512 
     else if ((datain[18:12] == COMMA_N) | (datain[18:12] == COMMA_P))
513 
      begin
514 
       comma_pos_12 <= 1'b1;
515 
      end
516 
     else
517 
      begin
518 
       comma_pos_12 <= 1'b0;
519 
      end
520 
    end
521 
 
522 
   always @(posedge clk)
523 
    begin
524 
     if (reset_7bit_det)
525 
      begin
526 
       comma_pos_13 <= 1'b0;
527 
      end
528 
     else if ((datain[19:13] == COMMA_N) | (datain[19:13] == COMMA_P))
529 
      begin
530 
       comma_pos_13 <= 1'b1;
531 
      end
532 
     else
533 
      begin
534 
       comma_pos_13 <= 1'b0;
535 
      end
536 
    end
537 
 
538 
   always @(posedge clk)
539 
    begin
540 
     if (reset_7bit_det)
541 
      begin
542 
       comma_pos_14 <= 1'b0;
543 
      end
544 
     else if ((datain[20:14] == COMMA_N) | (datain[20:14] == COMMA_P))
545 
      begin
546 
       comma_pos_14 <= 1'b1;
547 
      end
548 
     else
549 
      begin
550 
       comma_pos_14 <= 1'b0;
551 
      end
552 
    end
553 
 
554 
   always @(posedge clk)
555 
    begin
556 
     if (reset_7bit_det)
557 
      begin
558 
       comma_pos_15 <= 1'b0;
559 
      end
560 
     else if ((datain[21:15] == COMMA_N) | (datain[21:15] == COMMA_P))
561 
      begin
562 
       comma_pos_15 <= 1'b1;
563 
      end
564 
     else
565 
      begin
566 
       comma_pos_15 <= 1'b0;
567 
      end
568 
    end
569 
 
570 
   always @(posedge clk)
571 
    begin
572 
     if (reset_7bit_det)
573 
      begin
574 
       comma_pos_16 <= 1'b0;
575 
      end
576 
     else if ((datain[22:16] == COMMA_N) | (datain[22:16] == COMMA_P))
577 
      begin
578 
       comma_pos_16 <= 1'b1;
579 
      end
580 
     else
581 
      begin
582 
       comma_pos_16 <= 1'b0;
583 
      end
584 
    end
585 
 
586 
   always @(posedge clk)
587 
    begin
588 
     if (reset_7bit_det)
589 
      begin
590 
       comma_pos_17 <= 1'b0;
591 
      end
592 
     else if ((datain[23:17] == COMMA_N) | (datain[23:17] == COMMA_P))
593 
      begin
594 
       comma_pos_17 <= 1'b1;
595 
      end
596 
     else
597 
      begin
598 
       comma_pos_17 <= 1'b0;
599 
      end
600 
    end
601 
 
602 
   always @(posedge clk)
603 
    begin
604 
     if (reset_7bit_det)
605 
      begin
606 
       comma_pos_18 <= 1'b0;
607 
      end
608 
     else if ((datain[24:18] == COMMA_N) | (datain[24:18] == COMMA_P))
609 
      begin
610 
       comma_pos_18 <= 1'b1;
611 
      end
612 
     else
613 
      begin
614 
       comma_pos_18 <= 1'b0;
615 
      end
616 
    end
617 
 
618 
   always @(posedge clk)
619 
    begin
620 
     if (reset_7bit_det)
621 
      begin
622 
       comma_pos_19 <= 1'b0;
623 
      end
624 
     else if ((datain[25:19] == COMMA_N) | (datain[25:19] == COMMA_P))
625 
      begin
626 
       comma_pos_19 <= 1'b1;
627 
      end
628 
     else
629 
      begin
630 
       comma_pos_19 <= 1'b0;
631 
      end
632 
    end
633 
 
634 
   always @(posedge clk)
635 
    begin
636 
     if (reset_7bit_det)
637 
      begin
638 
       position_7bit <= #1 POSITION_0;
639 
      end
640 
     else if (~enable_cgalign)
641 
      begin
642 
       position_7bit <= #1 position_7bit;
643 
      end
644 
     else if (comma_found)
645 
      begin
646 
       position_7bit <= #1 position;
647 
      end
648 
     else
649 
      begin
650 
       position_7bit <= #1 position_7bit;
651 
      end
652 
    end
653 
 
654 
   always @(/*AUTOSENSE*/comma_pos or reset_7bit_det)
655 
    begin
656 
     if (reset_7bit_det)
657 
      begin
658 
       position = POSITION_0;
659 
       comma_found = 1'b0;
660 
      end // if (reset_7bit_det)
661 
     else
662 
      begin
663 
       case (comma_pos)
664 
        20'b00000000000000000001, 20'b00000000010000000001:
665 
         begin
666 
          comma_found = 1'b1;
667 
          position = POSITION_0;
668 
         end
669 
        20'b00000000000000000010, 20'b00000000100000000010:
670 
         begin
671 
          comma_found = 1'b1;
672 
          position = POSITION_1;
673 
         end
674 
        20'b00000000000000000100, 20'b00000001000000000100:
675 
         begin
676 
          comma_found = 1'b1;
677 
          position = POSITION_2;
678 
         end
679 
        20'b00000000000000001000, 20'b00000010000000001000:
680 
         begin
681 
          comma_found = 1'b1;
682 
          position = POSITION_3;
683 
         end
684 
        20'b00000000000000010000, 20'b00000100000000010000:
685 
         begin
686 
          comma_found = 1'b1;
687 
          position = POSITION_4;
688 
         end
689 
        20'b00000000000000100000, 20'b00001000000000100000:
690 
         begin
691 
          comma_found = 1'b1;
692 
          position = POSITION_5;
693 
         end
694 
        20'b00000000000001000000, 20'b00010000000001000000:
695 
         begin
696 
          comma_found = 1'b1;
697 
          position = POSITION_6;
698 
         end
699 
        20'b00000000000010000000, 20'b00100000000010000000:
700 
         begin
701 
          comma_found = 1'b1;
702 
          position = POSITION_7;
703 
         end
704 
        20'b00000000000100000000, 20'b01000000000100000000:
705 
         begin
706 
          comma_found = 1'b1;
707 
          position = POSITION_8;
708 
         end
709 
        20'b00000000001000000000, 20'b10000000001000000000:
710 
         begin
711 
          comma_found = 1'b1;
712 
          position = POSITION_9;
713 
         end
714 
        20'b00000000010000000000:
715 
         begin
716 
          comma_found = 1'b1;
717 
          position = POSITION_10;
718 
         end
719 
        20'b00000000100000000000:
720 
         begin
721 
          comma_found = 1'b1;
722 
          position = POSITION_11;
723 
         end
724 
        20'b00000001000000000000:
725 
         begin
726 
          comma_found = 1'b1;
727 
          position = POSITION_12;
728 
         end
729 
        20'b00000010000000000000:
730 
         begin
731 
          comma_found = 1'b1;
732 
          position = POSITION_13;
733 
         end
734 
        20'b00000100000000000000:
735 
         begin
736 
          comma_found = 1'b1;
737 
          position = POSITION_14;
738 
         end
739 
        20'b00001000000000000000:
740 
         begin
741 
          comma_found = 1'b1;
742 
          position = POSITION_15;
743 
         end
744 
        20'b00010000000000000000:
745 
         begin
746 
          comma_found = 1'b1;
747 
          position = POSITION_16;
748 
         end
749 
        20'b00100000000000000000:
750 
         begin
751 
          comma_found = 1'b1;
752 
          position = POSITION_17;
753 
         end
754 
        20'b01000000000000000000:
755 
         begin
756 
          comma_found = 1'b1;
757 
          position = POSITION_18;
758 
         end
759 
        20'b10000000000000000000:
760 
         begin
761 
          comma_found = 1'b1;
762 
          position = POSITION_19;
763 
         end
764 
        default:
765 
         begin
766 
          comma_found = 1'b0;
767 
          position = POSITION_0;
768 
         end
769 
       endcase
770 
      end
771 
    end
772 
 
773 
endmodule // cd_7bit
774 
 
775 
 
776 
module sip_xpcs_cd_10bit (/*AUTOARG*/
777 
   // Outputs
778 
   position_10bit,
779 
   // Inputs
780 
   bypass_sync, clk, commaa_sync, commab_sync, enable_cgalign,
781 
   reset_sync, rin, sel_comma_sync
782 
   );
783 
 
784 
   output [4:0] position_10bit;
785 
 
786 
   input bypass_sync;
787 
   input clk;
788 
   input [9:0] commaa_sync;
789 
   input [9:0] commab_sync;
790 
   input enable_cgalign;
791 
   input reset_sync;
792 
   input [19:0] rin;
793 
   input sel_comma_sync;
794 
 
795 
   parameter COMMA_N = 7'b1111100;
796 
   parameter COMMA_P = 7'b0000011;
797 
   parameter POSITION_0 = 5'd0;
798 
   parameter POSITION_1 = 5'd1;
799 
   parameter POSITION_2 = 5'd2;
800 
   parameter POSITION_3 = 5'd3;
801 
   parameter POSITION_4 = 5'd4;
802 
   parameter POSITION_5 = 5'd5;
803 
   parameter POSITION_6 = 5'd6;
804 
   parameter POSITION_7 = 5'd7;
805 
   parameter POSITION_8 = 5'd8;
806 
   parameter POSITION_9 = 5'd9;
807 
   parameter POSITION_10 = 5'd10;
808 
   parameter POSITION_11 = 5'd11;
809 
   parameter POSITION_12 = 5'd12;
810 
   parameter POSITION_13 = 5'd13;
811 
   parameter POSITION_14 = 5'd14;
812 
   parameter POSITION_15 = 5'd15;
813 
   parameter POSITION_16 = 5'd16;
814 
   parameter POSITION_17 = 5'd17;
815 
   parameter POSITION_18 = 5'd18;
816 
   parameter POSITION_19 = 5'd19;
817 
 
818 
   reg comma_found;
819 
   //reg [19:0] comma_pos;
820 
   reg [4:0] position_10bit;
821 
   reg [4:0] position;
822 
   reg [19:0] rin_z;
823 
 
824 
   reg comma_pos_0;
825 
   reg comma_pos_1;
826 
   reg comma_pos_2;
827 
   reg comma_pos_3;
828 
   reg comma_pos_4;
829 
   reg comma_pos_5;
830 
   reg comma_pos_6;
831 
   reg comma_pos_7;
832 
   reg comma_pos_8;
833 
   reg comma_pos_9;
834 
   reg comma_pos_10;
835 
   reg comma_pos_11;
836 
   reg comma_pos_12;
837 
   reg comma_pos_13;
838 
   reg comma_pos_14;
839 
   reg comma_pos_15;
840 
   reg comma_pos_16;
841 
   reg comma_pos_17;
842 
   reg comma_pos_18;
843 
   reg comma_pos_19;
844 
 
845 
   wire [19:0] comma_pos;
846 
   assign comma_pos = {comma_pos_19,
847 
                       comma_pos_18,
848 
                       comma_pos_17,
849 
                       comma_pos_16,
850 
                       comma_pos_15,
851 
                       comma_pos_14,
852 
                       comma_pos_13,
853 
                       comma_pos_12,
854 
                       comma_pos_11,
855 
                       comma_pos_10,
856 
                       comma_pos_9,
857 
                       comma_pos_8,
858 
                       comma_pos_7,
859 
                       comma_pos_6,
860 
                       comma_pos_5,
861 
                       comma_pos_4,
862 
                       comma_pos_3,
863 
                       comma_pos_2,
864 
                       comma_pos_1,
865 
                       comma_pos_0};
866 
 
867 
   wire [28:0] datain;
868 
   wire reset_10bit_det;
869 
 
870 
   assign reset_10bit_det = reset_sync | bypass_sync | sel_comma_sync;
871 
   assign datain = {rin[8:0],rin_z};
872 
 
873 
   always @(posedge clk)
874 
    begin
875 
     rin_z <= #1 rin;
876 
    end
877 
 
878 
   always @(posedge clk)
879 
    begin
880 
     if (reset_10bit_det)
881 
      begin
882 
       comma_pos_0 <= 1'b0;
883 
      end
884 
     else if ((datain[9:0] == commaa_sync) | (datain[9:0] == commab_sync))
885 
      begin
886 
       comma_pos_0 <= 1'b1;
887 
      end
888 
     else
889 
      begin
890 
       comma_pos_0 <= 1'b0;
891 
      end
892 
    end
893 
 
894 
   always @(posedge clk)
895 
    begin
896 
     if (reset_10bit_det)
897 
      begin
898 
       comma_pos_1 <= 1'b0;
899 
      end
900 
     else if ((datain[10:1] == commaa_sync) | (datain[10:1] == commab_sync))
901 
      begin
902 
       comma_pos_1 <= 1'b1;
903 
      end
904 
     else
905 
      begin
906 
       comma_pos_1 <= 1'b0;
907 
      end
908 
    end
909 
 
910 
   always @(posedge clk)
911 
    begin
912 
     if (reset_10bit_det)
913 
      begin
914 
       comma_pos_2 <= 1'b0;
915 
      end
916 
     else if ((datain[11:2] == commaa_sync) | (datain[11:2] == commab_sync))
917 
      begin
918 
       comma_pos_2 <= 1'b1;
919 
      end
920 
     else
921 
      begin
922 
       comma_pos_2 <= 1'b0;
923 
      end
924 
    end
925 
 
926 
   always @(posedge clk)
927 
    begin
928 
     if (reset_10bit_det)
929 
      begin
930 
       comma_pos_3 <= 1'b0;
931 
      end
932 
     else if ((datain[12:3] == commaa_sync) | (datain[12:3] == commab_sync))
933 
      begin
934 
       comma_pos_3 <= 1'b1;
935 
      end
936 
     else
937 
      begin
938 
       comma_pos_3 <= 1'b0;
939 
      end
940 
    end
941 
 
942 
   always @(posedge clk)
943 
    begin
944 
     if (reset_10bit_det)
945 
      begin
946 
       comma_pos_4 <= 1'b0;
947 
      end
948 
     else if ((datain[13:4] == commaa_sync) | (datain[13:4] == commab_sync))
949 
      begin
950 
       comma_pos_4 <= 1'b1;
951 
      end
952 
     else
953 
      begin
954 
       comma_pos_4 <= 1'b0;
955 
      end
956 
    end
957 
 
958 
   always @(posedge clk)
959 
    begin
960 
     if (reset_10bit_det)
961 
      begin
962 
       comma_pos_5 <= 1'b0;
963 
      end
964 
     else if ((datain[14:5] == commaa_sync) | (datain[14:5] == commab_sync))
965 
      begin
966 
       comma_pos_5 <= 1'b1;
967 
      end
968 
     else
969 
      begin
970 
       comma_pos_5 <= 1'b0;
971 
      end
972 
    end
973 
 
974 
   always @(posedge clk)
975 
    begin
976 
     if (reset_10bit_det)
977 
      begin
978 
       comma_pos_6 <= 1'b0;
979 
      end
980 
     else if ((datain[15:6] == commaa_sync) | (datain[15:6] == commab_sync))
981 
      begin
982 
       comma_pos_6 <= 1'b1;
983 
      end
984 
     else
985 
      begin
986 
       comma_pos_6 <= 1'b0;
987 
      end
988 
    end
989 
 
990 
   always @(posedge clk)
991 
    begin
992 
     if (reset_10bit_det)
993 
      begin
994 
       comma_pos_7 <= 1'b0;
995 
      end
996 
     else if ((datain[16:7] == commaa_sync) | (datain[16:7] == commab_sync))
997 
      begin
998 
       comma_pos_7 <= 1'b1;
999 
      end
1000 
     else
1001 
      begin
1002 
       comma_pos_7 <= 1'b0;
1003 
      end
1004 
    end
1005 
 
1006 
   always @(posedge clk)
1007 
    begin
1008 
     if (reset_10bit_det)
1009 
      begin
1010 
       comma_pos_8 <= 1'b0;
1011 
      end
1012 
     else if ((datain[17:8] == commaa_sync) | (datain[17:8] == commab_sync))
1013 
      begin
1014 
       comma_pos_8 <= 1'b1;
1015 
      end
1016 
     else
1017 
      begin
1018 
       comma_pos_8 <= 1'b0;
1019 
      end
1020 
    end
1021 
 
1022 
   always @(posedge clk)
1023 
    begin
1024 
     if (reset_10bit_det)
1025 
      begin
1026 
       comma_pos_9 <= 1'b0;
1027 
      end
1028 
     else if ((datain[18:9] == commaa_sync) | (datain[18:9] == commab_sync))
1029 
      begin
1030 
       comma_pos_9 <= 1'b1;
1031 
      end
1032 
     else
1033 
      begin
1034 
       comma_pos_9 <= 1'b0;
1035 
      end
1036 
    end
1037 
 
1038 
   always @(posedge clk)
1039 
    begin
1040 
     if (reset_10bit_det)
1041 
      begin
1042 
       comma_pos_10 <= 1'b0;
1043 
      end
1044 
     else if ((datain[19:10] == commaa_sync) | (datain[19:10] == commab_sync))
1045 
      begin
1046 
       comma_pos_10 <= 1'b1;
1047 
      end
1048 
     else
1049 
      begin
1050 
       comma_pos_10 <= 1'b0;
1051 
      end
1052 
    end
1053 
 
1054 
   always @(posedge clk)
1055 
    begin
1056 
     if (reset_10bit_det)
1057 
      begin
1058 
       comma_pos_11 <= 1'b0;
1059 
      end
1060 
     else if ((datain[20:11] == commaa_sync) | (datain[20:11] == commab_sync))
1061 
      begin
1062 
       comma_pos_11 <= 1'b1;
1063 
      end
1064 
     else
1065 
      begin
1066 
       comma_pos_11 <= 1'b0;
1067 
      end
1068 
    end
1069 
 
1070 
   always @(posedge clk)
1071 
    begin
1072 
     if (reset_10bit_det)
1073 
      begin
1074 
       comma_pos_12 <= 1'b0;
1075 
      end
1076 
     else if ((datain[21:12] == commaa_sync) | (datain[21:12] == commab_sync))
1077 
      begin
1078 
       comma_pos_12 <= 1'b1;
1079 
      end
1080 
     else
1081 
      begin
1082 
       comma_pos_12 <= 1'b0;
1083 
      end
1084 
    end
1085 
 
1086 
   always @(posedge clk)
1087 
    begin
1088 
     if (reset_10bit_det)
1089 
      begin
1090 
       comma_pos_13 <= 1'b0;
1091 
      end
1092 
     else if ((datain[22:13] == commaa_sync) | (datain[22:13] == commab_sync))
1093 
      begin
1094 
       comma_pos_13 <= 1'b1;
1095 
      end
1096 
     else
1097 
      begin
1098 
       comma_pos_13 <= 1'b0;
1099 
      end
1100 
    end
1101 
 
1102 
   always @(posedge clk)
1103 
    begin
1104 
     if (reset_10bit_det)
1105 
      begin
1106 
       comma_pos_14 <= 1'b0;
1107 
      end
1108 
     else if ((datain[23:14] == commaa_sync) | (datain[23:14] == commab_sync))
1109 
      begin
1110 
       comma_pos_14 <= 1'b1;
1111 
      end
1112 
     else
1113 
      begin
1114 
       comma_pos_14 <= 1'b0;
1115 
      end
1116 
    end
1117 
 
1118 
   always @(posedge clk)
1119 
    begin
1120 
     if (reset_10bit_det)
1121 
      begin
1122 
       comma_pos_15 <= 1'b0;
1123 
      end
1124 
     else if ((datain[24:15] == commaa_sync) | (datain[24:15] == commab_sync))
1125 
      begin
1126 
       comma_pos_15 <= 1'b1;
1127 
      end
1128 
     else
1129 
      begin
1130 
       comma_pos_15 <= 1'b0;
1131 
      end
1132 
    end
1133 
 
1134 
   always @(posedge clk)
1135 
    begin
1136 
     if (reset_10bit_det)
1137 
      begin
1138 
       comma_pos_16 <= 1'b0;
1139 
      end
1140 
     else if ((datain[25:16] == commaa_sync) | (datain[25:16] == commab_sync))
1141 
      begin
1142 
       comma_pos_16 <= 1'b1;
1143 
      end
1144 
     else
1145 
      begin
1146 
       comma_pos_16 <= 1'b0;
1147 
      end
1148 
    end
1149 
 
1150 
   always @(posedge clk)
1151 
    begin
1152 
     if (reset_10bit_det)
1153 
      begin
1154 
       comma_pos_17 <= 1'b0;
1155 
      end
1156 
     else if ((datain[26:17] == commaa_sync) | (datain[26:17] == commab_sync))
1157 
      begin
1158 
       comma_pos_17 <= 1'b1;
1159 
      end
1160 
     else
1161 
      begin
1162 
       comma_pos_17 <= 1'b0;
1163 
      end
1164 
    end
1165 
 
1166 
   always @(posedge clk)
1167 
    begin
1168 
     if (reset_10bit_det)
1169 
      begin
1170 
       comma_pos_18 <= 1'b0;
1171 
      end
1172 
     else if ((datain[27:18] == commaa_sync) | (datain[27:18] == commab_sync))
1173 
      begin
1174 
       comma_pos_18 <= 1'b1;
1175 
      end
1176 
     else
1177 
      begin
1178 
       comma_pos_18 <= 1'b0;
1179 
      end
1180 
    end
1181 
 
1182 
   always @(posedge clk)
1183 
    begin
1184 
     if (reset_10bit_det)
1185 
      begin
1186 
       comma_pos_19 <= 1'b0;
1187 
      end
1188 
     else if ((datain[28:19] == commaa_sync) | (datain[28:19] == commab_sync))
1189 
      begin
1190 
       comma_pos_19 <= 1'b1;
1191 
      end
1192 
     else
1193 
      begin
1194 
       comma_pos_19 <= 1'b0;
1195 
      end
1196 
    end
1197 
 
1198 
   always @(posedge clk)
1199 
    begin
1200 
     if (reset_10bit_det)
1201 
      begin
1202 
       position_10bit <= #1 POSITION_0;
1203 
      end
1204 
     else if (~enable_cgalign)
1205 
      begin
1206 
       position_10bit <= #1 position_10bit;
1207 
      end
1208 
     else if (comma_found)
1209 
      begin
1210 
       position_10bit <= #1 position;
1211 
      end
1212 
     else
1213 
      begin
1214 
       position_10bit <= #1 position_10bit;
1215 
      end
1216 
    end
1217 
 
1218 
   always @(/*AUTOSENSE*/comma_pos or reset_10bit_det)
1219 
    begin
1220 
     if (reset_10bit_det)
1221 
      begin
1222 
       comma_found = 1'b0;
1223 
       position = POSITION_0;
1224 
      end
1225 
     else
1226 
      begin
1227 
       case (comma_pos)
1228 
        20'b00000000000000000001, 20'b00000000010000000001:
1229 
         begin
1230 
          comma_found = 1'b1;
1231 
          position = POSITION_0;
1232 
         end
1233 
        20'b00000000000000000010, 20'b00000000100000000010:
1234 
         begin
1235 
          comma_found = 1'b1;
1236 
          position = POSITION_1;
1237 
         end
1238 
        20'b00000000000000000100, 20'b00000001000000000100:
1239 
         begin
1240 
          comma_found = 1'b1;
1241 
          position = POSITION_2;
1242 
         end
1243 
        20'b00000000000000001000, 20'b00000010000000001000:
1244 
         begin
1245 
          comma_found = 1'b1;
1246 
          position = POSITION_3;
1247 
         end
1248 
        20'b00000000000000010000, 20'b00000100000000010000:
1249 
         begin
1250 
          comma_found = 1'b1;
1251 
          position = POSITION_4;
1252 
         end
1253 
        20'b00000000000000100000, 20'b00001000000000100000:
1254 
         begin
1255 
          comma_found = 1'b1;
1256 
          position = POSITION_5;
1257 
         end
1258 
        20'b00000000000001000000, 20'b00010000000001000000:
1259 
         begin
1260 
          comma_found = 1'b1;
1261 
          position = POSITION_6;
1262 
         end
1263 
        20'b00000000000010000000, 20'b00100000000010000000:
1264 
         begin
1265 
          comma_found = 1'b1;
1266 
          position = POSITION_7;
1267 
         end
1268 
        20'b00000000000100000000, 20'b01000000000100000000:
1269 
         begin
1270 
          comma_found = 1'b1;
1271 
          position = POSITION_8;
1272 
         end
1273 
        20'b00000000001000000000, 20'b10000000001000000000:
1274 
         begin
1275 
          comma_found = 1'b1;
1276 
          position = POSITION_9;
1277 
         end
1278 
        20'b00000000010000000000:
1279 
         begin
1280 
          comma_found = 1'b1;
1281 
          position = POSITION_10;
1282 
         end
1283 
        20'b00000000100000000000:
1284 
         begin
1285 
          comma_found = 1'b1;
1286 
          position = POSITION_11;
1287 
         end
1288 
        20'b00000001000000000000:
1289 
         begin
1290 
          comma_found = 1'b1;
1291 
          position = POSITION_12;
1292 
         end
1293 
        20'b00000010000000000000:
1294 
         begin
1295 
          comma_found = 1'b1;
1296 
          position = POSITION_13;
1297 
         end
1298 
        20'b00000100000000000000:
1299 
         begin
1300 
          comma_found = 1'b1;
1301 
          position = POSITION_14;
1302 
         end
1303 
        20'b00001000000000000000:
1304 
         begin
1305 
          comma_found = 1'b1;
1306 
          position = POSITION_15;
1307 
         end
1308 
        20'b00010000000000000000:
1309 
         begin
1310 
          comma_found = 1'b1;
1311 
          position = POSITION_16;
1312 
         end
1313 
        20'b00100000000000000000:
1314 
         begin
1315 
          comma_found = 1'b1;
1316 
          position = POSITION_17;
1317 
         end
1318 
        20'b01000000000000000000:
1319 
         begin
1320 
          comma_found = 1'b1;
1321 
          position = POSITION_18;
1322 
         end
1323 
        20'b10000000000000000000:
1324 
         begin
1325 
          comma_found = 1'b1;
1326 
          position = POSITION_19;
1327 
         end
1328 
        default:
1329 
         begin
1330 
          comma_found = 1'b0;
1331 
          position = POSITION_0;
1332 
         end
1333 
       endcase
1334 
      end
1335 
    end
1336 
 
1337 
endmodule // cd_10bit
1338 
 
1339 
 
1340 
module sip_xpcs_cd_ssm (/*AUTOARG*/
1341 
   // Outputs
1342 
   enable_cgalign, sync_status, sync_state, sync_state_z,
1343 
   // Inputs
1344 
   bypass_sync, clk, comma_valid0, comma_valid1, data_special_valid0,
1345 
   data_special_valid1, reset_sync, sigdet_sync, en_comma_align_glob,
1346 
   rf_en_2sync_sync
1347 
   );
1348 
 
1349 
   output enable_cgalign;
1350 
   output sync_status;
1351 
   output [10:0] sync_state;
1352 
   output [10:0] sync_state_z;
1353 
 
1354 
   input bypass_sync;
1355 
   input clk;
1356 
   input comma_valid0;
1357 
   input comma_valid1;
1358 
   input data_special_valid0;
1359 
   input data_special_valid1;
1360 
   input reset_sync;
1361 
   input sigdet_sync;
1362 
   input en_comma_align_glob;  //Added by Erez Reches 21Oct01
1363 
   input rf_en_2sync_sync;   // drorb
1364 
 
1365 
 
1366 
   // comma code groups
1367 
   //parameter K28_7 = 8'b1111_1100;
1368 
   parameter K28_5 = 8'b1011_1100; // sync K code group
1369 
   //parameter K28_1 = 8'b0011_1100;
1370 
 
1371 
   parameter K28_3 = 8'b0111_1100; // align code group
1372 
 
1373 
   parameter FALSE = 1'b0;
1374 
   parameter TRUE  = 1'b1;
1375 
 
1376 
   parameter SYNC_FAIL = 1'b0;
1377 
   parameter SYNC_OK   = 1'b1;
1378 
 
1379 
   parameter LOSS_OF_SYNC     = 11'b00000000001;
1380 
   parameter COMMA_DETECT_1   = 11'b00000000010;
1381 
   parameter COMMA_DETECT_2   = 11'b00000000100;
1382 
   parameter COMMA_DETECT_3   = 11'b00000001000;
1383 
   parameter SYNC_ACQUIRED_1  = 11'b00000010000;
1384 
   parameter SYNC_ACQUIRED_2  = 11'b00000100000;
1385 
   parameter SYNC_ACQUIRED_2A = 11'b00001000000;
1386 
   parameter SYNC_ACQUIRED_3  = 11'b00010000000;
1387 
   parameter SYNC_ACQUIRED_3A = 11'b00100000000;
1388 
   parameter SYNC_ACQUIRED_4  = 11'b01000000000;
1389 
   parameter SYNC_ACQUIRED_4A = 11'b10000000000;
1390 
 
1391 
   reg sigdet_z;
1392 
   wire sigdet_change;
1393 
 
1394 
   wire reset_ssm;
1395 
 
1396 
   reg enable_cgalign;
1397 
   reg enable_cgalign_wire;
1398 
   reg [1:0] good_cgs;
1399 
   reg [1:0] good_cgs_wire;
1400 
   reg [10:0] sync_state;
1401 
   reg [10:0] sync_state_z;
1402 
   reg sync_status;
1403 
   reg sync_status_wire;
1404 
 
1405 
   assign reset_ssm = reset_sync | bypass_sync;
1406 
 
1407 
   assign sigdet_change = sigdet_sync ^ sigdet_z;
1408 
 
1409 
   always @(posedge clk)
1410 
    sigdet_z <= #1 sigdet_sync;
1411 
 
1412 
 
1413 
 
1414 
 
1415 
 
1416 
  always @(posedge clk)
1417 
    begin
1418 
       sync_state_z <= #1 sync_state;
1419 
 
1420 
 
1421 
       // drorb: 21Nov05
1422 
       // When the Comma_detect Sync FSM is disabled (when rf_en_2sync_sync=0) , force sync_status
1423 
       // to '1', which enables the external FSM work immediately after reset.
1424 
       //sync_status <= #1 sync_status_wire;
1425 
       sync_status <= #1 (sync_status_wire | ~rf_en_2sync_sync);
1426 
 
1427 
 
1428 
       // drorb: 21Nov05
1429 
       // 'en_comma_align_glob' comes from extrenal Synch FSM
1430 
       // 'enable_cgalign_wire' comes from internal Sync FSM
1431 
       // To be std compatible, only one Synch FSM should be used, therefore the
1432 
       //  internal Sync FSM will be skipped.
1433 
 
1434 
       // Erez Reches 21Oct01
1435 
       //  enable_cgalign <= #1 enable_cgalign_wire;
1436 
       // enable_cgalign <= #1 enable_cgalign_wire && en_comma_align_glob;
1437 
 
1438 
        enable_cgalign <= #1 ( enable_cgalign_wire | ~rf_en_2sync_sync)&& en_comma_align_glob;
1439 
 
1440 
       good_cgs <= #1 good_cgs_wire;
1441 
    end
1442 
 
1443 
 
1444 
 
1445 
 
1446 
 
1447 
   always @(/*AUTOSENSE*/comma_valid0 or comma_valid1
1448 
            or data_special_valid0 or data_special_valid1 or good_cgs
1449 
            or reset_ssm or sigdet_change or sigdet_sync
1450 
            or sync_state_z)
1451 
    begin
1452 
     if (reset_ssm | sigdet_change)
1453 
      begin
1454 
       sync_state = LOSS_OF_SYNC;
1455 
       sync_status_wire = SYNC_FAIL;
1456 
       enable_cgalign_wire = TRUE;
1457 
       good_cgs_wire = 2'b00;
1458 
      end
1459 
     else
1460 
      case (sync_state_z)
1461 
       LOSS_OF_SYNC:
1462 
        begin
1463 
         if (sigdet_sync & comma_valid0 & comma_valid1)
1464 
          begin
1465 
           sync_state = COMMA_DETECT_2;
1466 
           sync_status_wire = SYNC_FAIL;
1467 
           enable_cgalign_wire = FALSE;
1468 
           good_cgs_wire = 2'b00;
1469 
          end
1470 
         else if (sigdet_sync & comma_valid0 & data_special_valid1)
1471 
          begin
1472 
           sync_state = COMMA_DETECT_1;
1473 
           sync_status_wire = SYNC_FAIL;
1474 
           enable_cgalign_wire = FALSE;
1475 
           good_cgs_wire = 2'b00;
1476 
          end
1477 
         else if (sigdet_sync & comma_valid1)
1478 
          begin
1479 
           sync_state = COMMA_DETECT_1;
1480 
           sync_status_wire = SYNC_FAIL;
1481 
           enable_cgalign_wire = FALSE;
1482 
           good_cgs_wire = 2'b00;
1483 
          end
1484 
         else
1485 
          begin
1486 
           sync_state = LOSS_OF_SYNC;
1487 
           sync_status_wire = SYNC_FAIL;
1488 
           enable_cgalign_wire = TRUE;
1489 
           good_cgs_wire = 2'b00;
1490 
          end
1491 
        end
1492 
       COMMA_DETECT_1:
1493 
        begin
1494 
         if (comma_valid0 & comma_valid1)
1495 
          begin
1496 
           sync_state = COMMA_DETECT_3;
1497 
           sync_status_wire = SYNC_FAIL;
1498 
           enable_cgalign_wire = FALSE;
1499 
           good_cgs_wire = 2'b00;
1500 
          end
1501 
         else if (comma_valid0 & data_special_valid1)
1502 
          begin
1503 
           sync_state = COMMA_DETECT_2;
1504 
           sync_status_wire = SYNC_FAIL;
1505 
           enable_cgalign_wire = FALSE;
1506 
           good_cgs_wire = 2'b00;
1507 
          end
1508 
         else if (data_special_valid0 & comma_valid1)
1509 
          begin
1510 
           sync_state = COMMA_DETECT_2;
1511 
           sync_status_wire = SYNC_FAIL;
1512 
           enable_cgalign_wire = FALSE;
1513 
           good_cgs_wire = 2'b00;
1514 
          end
1515 
         else if (sigdet_sync & ~data_special_valid0 & comma_valid1)
1516 
          begin
1517 
           sync_state = COMMA_DETECT_1;
1518 
           sync_status_wire = SYNC_FAIL;
1519 
           enable_cgalign_wire = FALSE;
1520 
           good_cgs_wire = 2'b00;
1521 
          end
1522 
         else if (data_special_valid0 & data_special_valid1)
1523 
          begin
1524 
           sync_state = COMMA_DETECT_1;
1525 
           sync_status_wire = SYNC_FAIL;
1526 
           enable_cgalign_wire = FALSE;
1527 
           good_cgs_wire = 2'b00;
1528 
          end
1529 
         else
1530 
          begin
1531 
           sync_state = LOSS_OF_SYNC;
1532 
           sync_status_wire = SYNC_FAIL;
1533 
           enable_cgalign_wire = TRUE;
1534 
           good_cgs_wire = 2'b00;
1535 
          end
1536 
        end
1537 
       COMMA_DETECT_2:
1538 
        begin
1539 
         if (comma_valid0 & comma_valid1)
1540 
          begin
1541 
           sync_state = SYNC_ACQUIRED_1;
1542 
           sync_status_wire = SYNC_OK;
1543 
           enable_cgalign_wire = FALSE;
1544 
           good_cgs_wire = 2'b00;
1545 
          end
1546 
         else if (comma_valid0 & data_special_valid1)
1547 
          begin
1548 
           sync_state = COMMA_DETECT_3;
1549 
           sync_status_wire = SYNC_FAIL;
1550 
           enable_cgalign_wire = FALSE;
1551 
           good_cgs_wire = 2'b00;
1552 
          end
1553 
         else if (data_special_valid0 & comma_valid1)
1554 
          begin
1555 
           sync_state = COMMA_DETECT_3;
1556 
           sync_status_wire = SYNC_FAIL;
1557 
           enable_cgalign_wire = FALSE;
1558 
           good_cgs_wire = 2'b00;
1559 
          end
1560 
         else if (data_special_valid0 & data_special_valid1)
1561 
          begin
1562 
           sync_state = COMMA_DETECT_2;
1563 
           sync_status_wire = SYNC_FAIL;
1564 
           enable_cgalign_wire = FALSE;
1565 
           good_cgs_wire = 2'b00;
1566 
          end
1567 
         else if (sigdet_sync & ~data_special_valid0 & comma_valid1)
1568 
          begin
1569 
           sync_state = COMMA_DETECT_1;
1570 
           sync_status_wire = SYNC_FAIL;
1571 
           enable_cgalign_wire = FALSE;
1572 
           good_cgs_wire = 2'b00;
1573 
          end
1574 
         else
1575 
          begin
1576 
           sync_state = LOSS_OF_SYNC;
1577 
           sync_status_wire = SYNC_FAIL;
1578 
           enable_cgalign_wire = TRUE;
1579 
           good_cgs_wire = 2'b00;
1580 
          end
1581 
        end
1582 
       COMMA_DETECT_3:
1583 
        begin
1584 
         if (comma_valid0 & data_special_valid1)
1585 
          begin
1586 
           sync_state = SYNC_ACQUIRED_1;
1587 
           sync_status_wire = SYNC_OK;
1588 
           enable_cgalign_wire = FALSE;
1589 
           good_cgs_wire = 2'b00;
1590 
          end
1591 
         else if (data_special_valid0 & comma_valid1)
1592 
          begin
1593 
           sync_state = SYNC_ACQUIRED_1;
1594 
           sync_status_wire = SYNC_OK;
1595 
           enable_cgalign_wire = FALSE;
1596 
           good_cgs_wire = 2'b00;
1597 
          end
1598 
         else if (comma_valid0 & ~data_special_valid1)
1599 
          begin
1600 
           sync_state = SYNC_ACQUIRED_2;
1601 
           sync_status_wire = SYNC_OK;
1602 
           enable_cgalign_wire = FALSE;
1603 
           good_cgs_wire = 2'b00;
1604 
          end
1605 
         else if (data_special_valid0 & data_special_valid1)
1606 
          begin
1607 
           sync_state = COMMA_DETECT_3;
1608 
           sync_status_wire = SYNC_FAIL;
1609 
           enable_cgalign_wire = FALSE;
1610 
           good_cgs_wire = 2'b00;
1611 
          end
1612 
         else if (sigdet_sync & ~data_special_valid0 & comma_valid1)
1613 
          begin
1614 
           sync_state = COMMA_DETECT_1;
1615 
           sync_status_wire = SYNC_FAIL;
1616 
           enable_cgalign_wire = FALSE;
1617 
           good_cgs_wire = 2'b00;
1618 
          end
1619 
         else
1620 
          begin
1621 
           sync_state = LOSS_OF_SYNC;
1622 
           sync_status_wire = SYNC_FAIL;
1623 
           enable_cgalign_wire = TRUE;
1624 
           good_cgs_wire = 2'b00;
1625 
          end
1626 
        end
1627 
       SYNC_ACQUIRED_1:
1628 
        begin
1629 
         if (~data_special_valid0 & ~data_special_valid1)
1630 
          begin
1631 
           sync_state = SYNC_ACQUIRED_3;
1632 
           sync_status_wire = SYNC_OK;
1633 
           enable_cgalign_wire = FALSE;
1634 
           good_cgs_wire = 2'b00;
1635 
          end
1636 
         else if (~data_special_valid0 & data_special_valid1)
1637 
          begin
1638 
           sync_state = SYNC_ACQUIRED_2A;
1639 
           sync_status_wire = SYNC_OK;
1640 
           enable_cgalign_wire = FALSE;
1641 
           good_cgs_wire = good_cgs + 2'b01;
1642 
          end
1643 
         else if (data_special_valid0 & ~data_special_valid1)
1644 
          begin
1645 
           sync_state = SYNC_ACQUIRED_2;
1646 
           sync_status_wire = SYNC_OK;
1647 
           enable_cgalign_wire = FALSE;
1648 
           good_cgs_wire = 2'b00;
1649 
          end
1650 
         else // if (data_special_valid0 & data_special_valid1)
1651 
          begin
1652 
           sync_state = SYNC_ACQUIRED_1;
1653 
           sync_status_wire = SYNC_OK;
1654 
           enable_cgalign_wire = FALSE;
1655 
           good_cgs_wire = 2'b00;
1656 
          end
1657 
        end
1658 
       SYNC_ACQUIRED_2:
1659 
        begin
1660 
         if (~data_special_valid0 & ~data_special_valid1)
1661 
          begin
1662 
           sync_state = SYNC_ACQUIRED_4;
1663 
           sync_status_wire = SYNC_OK;
1664 
           enable_cgalign_wire = FALSE;
1665 
           good_cgs_wire = 2'b00;
1666 
          end
1667 
         else if (~data_special_valid0 & data_special_valid1)
1668 
          begin
1669 
           sync_state = SYNC_ACQUIRED_3A;
1670 
           sync_status_wire = SYNC_OK;
1671 
           enable_cgalign_wire = FALSE;
1672 
           good_cgs_wire = good_cgs + 2'b01;
1673 
          end
1674 
         else if (data_special_valid0 & ~data_special_valid1)
1675 
          begin
1676 
           sync_state = SYNC_ACQUIRED_3;
1677 
           sync_status_wire = SYNC_OK;
1678 
           enable_cgalign_wire = FALSE;
1679 
           good_cgs_wire = 2'b00;
1680 
          end
1681 
         else // if (data_special_valid0 & data_special_valid1)
1682 
          begin
1683 
           sync_state = SYNC_ACQUIRED_2A;
1684 
           sync_status_wire = SYNC_OK;
1685 
           enable_cgalign_wire = FALSE;
1686 
           good_cgs_wire = good_cgs + 2'b10;
1687 
          end
1688 
        end
1689 
       SYNC_ACQUIRED_2A:
1690 
        begin
1691 
         if (~data_special_valid0 & ~data_special_valid1)
1692 
          begin
1693 
           sync_state = SYNC_ACQUIRED_4;
1694 
           sync_status_wire = SYNC_OK;
1695 
           enable_cgalign_wire = FALSE;
1696 
           good_cgs_wire = 2'b00;
1697 
          end
1698 
         else if (~data_special_valid0 & data_special_valid1)
1699 
          begin
1700 
           sync_state = SYNC_ACQUIRED_3A;
1701 
           sync_status_wire = SYNC_OK;
1702 
           enable_cgalign_wire = FALSE;
1703 
           good_cgs_wire = 2'b01;
1704 
          end
1705 
         else if (data_special_valid0 & ~data_special_valid1)
1706 
          begin
1707 
           if (good_cgs == 2'b01)
1708 
            begin
1709 
             sync_state = SYNC_ACQUIRED_3;
1710 
             sync_status_wire = SYNC_OK;
1711 
             enable_cgalign_wire = FALSE;
1712 
             good_cgs_wire = 2'b00;
1713 
            end
1714 
           else if (good_cgs == 2'b10)
1715 
            begin
1716 
             sync_state = SYNC_ACQUIRED_3;
1717 
             sync_status_wire = SYNC_OK;
1718 
             enable_cgalign_wire = FALSE;
1719 
             good_cgs_wire = 2'b00;
1720 
            end
1721 
           else // if (good_cgs == 2'b11))
1722 
            begin
1723 
             sync_state = SYNC_ACQUIRED_2;
1724 
             sync_status_wire = SYNC_OK;
1725 
             enable_cgalign_wire = FALSE;
1726 
             good_cgs_wire = 2'b00;
1727 
            end
1728 
          end
1729 
         else // if (data_special_valid0 & data_special_valid1)
1730 
          begin
1731 
           if (good_cgs == 2'b01)
1732 
            begin
1733 
             sync_state = SYNC_ACQUIRED_2A;
1734 
             sync_status_wire = SYNC_OK;
1735 
             enable_cgalign_wire = FALSE;
1736 
             good_cgs_wire = good_cgs + 2'b10;
1737 
            end
1738 
           else if (good_cgs == 2'b10)
1739 
            begin
1740 
             sync_state = SYNC_ACQUIRED_1;
1741 
             sync_status_wire = SYNC_OK;
1742 
             enable_cgalign_wire = FALSE;
1743 
             good_cgs_wire = 2'b00;
1744 
            end
1745 
           else // if (good_cgs == 2'b11)
1746 
            begin
1747 
             sync_state = SYNC_ACQUIRED_1;
1748 
             sync_status_wire = SYNC_OK;
1749 
             enable_cgalign_wire = FALSE;
1750 
             good_cgs_wire = 2'b00;
1751 
            end
1752 
          end
1753 
        end
1754 
       SYNC_ACQUIRED_3:
1755 
        begin
1756 
         if (~data_special_valid0 & ~data_special_valid1)
1757 
          begin
1758 
           sync_state = LOSS_OF_SYNC;
1759 
           sync_status_wire = SYNC_FAIL;
1760 
           enable_cgalign_wire = TRUE;
1761 
           good_cgs_wire = 2'b00;
1762 
          end
1763 
         else if (~data_special_valid0 & data_special_valid1)
1764 
          begin
1765 
           sync_state = SYNC_ACQUIRED_4A;
1766 
           sync_status_wire = SYNC_OK;
1767 
           enable_cgalign_wire = FALSE;
1768 
           good_cgs_wire = good_cgs + 2'b01;
1769 
          end
1770 
         else if (data_special_valid0 & ~data_special_valid1)
1771 
          begin
1772 
           sync_state = SYNC_ACQUIRED_4;
1773 
           sync_status_wire = SYNC_OK;
1774 
           enable_cgalign_wire = FALSE;
1775 
           good_cgs_wire = 2'b00;
1776 
          end
1777 
         else // if (data_special_valid0 & data_special_valid1)
1778 
          begin
1779 
           sync_state = SYNC_ACQUIRED_3A;
1780 
           sync_status_wire = SYNC_OK;
1781 
           enable_cgalign_wire = FALSE;
1782 
           good_cgs_wire = good_cgs + 2'b10;
1783 
          end
1784 
        end
1785 
       SYNC_ACQUIRED_3A:
1786 
        begin
1787 
         if (~data_special_valid0 & ~data_special_valid1)
1788 
          begin
1789 
           sync_state = LOSS_OF_SYNC;
1790 
           sync_status_wire = SYNC_FAIL;
1791 
           enable_cgalign_wire = TRUE;
1792 
           good_cgs_wire = 2'b00;
1793 
          end
1794 
         else if (~data_special_valid0 & data_special_valid1)
1795 
          begin
1796 
           sync_state = SYNC_ACQUIRED_4A;
1797 
           sync_status_wire = SYNC_OK;
1798 
           enable_cgalign_wire = FALSE;
1799 
           good_cgs_wire = 2'b01;
1800 
          end
1801 
         else if (data_special_valid0 & ~data_special_valid1)
1802 
          begin
1803 
           if (good_cgs == 2'b01)
1804 
            begin
1805 
             sync_state = SYNC_ACQUIRED_4;
1806 
             sync_status_wire = SYNC_OK;
1807 
             enable_cgalign_wire = FALSE;
1808 
             good_cgs_wire = 2'b00;
1809 
            end
1810 
           else if (good_cgs == 2'b10)
1811 
            begin
1812 
             sync_state = SYNC_ACQUIRED_4;
1813 
             sync_status_wire = SYNC_OK;
1814 
             enable_cgalign_wire = FALSE;
1815 
             good_cgs_wire = 2'b00;
1816 
            end
1817 
           else // if (good_cgs == 2'b11)
1818 
            begin
1819 
             sync_state = SYNC_ACQUIRED_3;
1820 
             sync_status_wire = SYNC_OK;
1821 
             enable_cgalign_wire = FALSE;
1822 
             good_cgs_wire = 2'b00;
1823 
            end
1824 
          end
1825 
         else // if (data_special_valid0 & data_special_valid1)
1826 
          begin
1827 
           if (good_cgs == 2'b01)
1828 
            begin
1829 
             sync_state = SYNC_ACQUIRED_3A;
1830 
             sync_status_wire = SYNC_OK;
1831 
             enable_cgalign_wire = FALSE;
1832 
             good_cgs_wire = good_cgs + 2'b10;
1833 
            end
1834 
           else if (good_cgs == 2'b10)
1835 
            begin
1836 
             sync_state = SYNC_ACQUIRED_2;
1837 
             sync_status_wire = SYNC_OK;
1838 
             enable_cgalign_wire = FALSE;
1839 
             good_cgs_wire = 2'b00;
1840 
            end
1841 
           else // if (good_cgs == 2'b11)
1842 
            begin
1843 
             sync_state = SYNC_ACQUIRED_2A;
1844 
             sync_status_wire = SYNC_OK;
1845 
             enable_cgalign_wire = FALSE;
1846 
             good_cgs_wire = 2'b01;
1847 
            end
1848 
          end
1849 
        end
1850 
       SYNC_ACQUIRED_4:
1851 
        begin
1852 
         if (data_special_valid0 & data_special_valid1)
1853 
          begin
1854 
           sync_state = SYNC_ACQUIRED_4A;
1855 
           sync_status_wire = SYNC_OK;
1856 
           enable_cgalign_wire = FALSE;
1857 
           good_cgs_wire = good_cgs + 2'b10;
1858 
          end
1859 
         else if (sigdet_sync & ~data_special_valid0 & comma_valid1)
1860 
          begin
1861 
           sync_state = COMMA_DETECT_1;
1862 
           sync_status_wire = SYNC_FAIL;
1863 
           enable_cgalign_wire = FALSE;
1864 
           good_cgs_wire = 2'b00;
1865 
          end
1866 
         else
1867 
          begin
1868 
           sync_state = LOSS_OF_SYNC;
1869 
           sync_status_wire = SYNC_FAIL;
1870 
           enable_cgalign_wire = TRUE;
1871 
           good_cgs_wire = 2'b00;
1872 
          end
1873 
        end
1874 
       SYNC_ACQUIRED_4A:
1875 
        begin
1876 
         if (data_special_valid0 & data_special_valid1)
1877 
          begin
1878 
           if (good_cgs == 2'b01)
1879 
            begin
1880 
             sync_state = SYNC_ACQUIRED_4A;
1881 
             sync_status_wire = SYNC_OK;
1882 
             enable_cgalign_wire = FALSE;
1883 
             good_cgs_wire = good_cgs + 2'b10;
1884 
            end
1885 
           else if (good_cgs == 2'b10)
1886 
            begin
1887 
             sync_state = SYNC_ACQUIRED_3;
1888 
             sync_status_wire = SYNC_OK;
1889 
             enable_cgalign_wire = FALSE;
1890 
             good_cgs_wire = 2'b00;
1891 
            end
1892 
           else // if (good_cgs == 2'b11)
1893 
            begin
1894 
             sync_state = SYNC_ACQUIRED_3A;
1895 
             sync_status_wire = SYNC_OK;
1896 
             enable_cgalign_wire = FALSE;
1897 
             good_cgs_wire = 2'b01;
1898 
            end
1899 
          end
1900 
         else if (data_special_valid0 & ~data_special_valid1)
1901 
          begin
1902 
           if (good_cgs == 2'b01)
1903 
            begin
1904 
             sync_state = LOSS_OF_SYNC;
1905 
             sync_status_wire = SYNC_FAIL;
1906 
             enable_cgalign_wire = TRUE;
1907 
             good_cgs_wire = 2'b00;
1908 
            end
1909 
           else if (good_cgs == 2'b10)
1910 
            begin
1911 
             sync_state = LOSS_OF_SYNC;
1912 
             sync_status_wire = SYNC_FAIL;
1913 
             enable_cgalign_wire = TRUE;
1914 
             good_cgs_wire = 2'b00;
1915 
            end
1916 
           else // if (good_cgs == 2'b11)
1917 
            begin
1918 
             sync_state = SYNC_ACQUIRED_4;
1919 
             sync_status_wire = SYNC_OK;
1920 
             enable_cgalign_wire = FALSE;
1921 
             good_cgs_wire = 2'b00;
1922 
            end
1923 
          end
1924 
         else if (sigdet_sync & ~data_special_valid0 & comma_valid1)
1925 
          begin
1926 
           sync_state = COMMA_DETECT_1;
1927 
           sync_status_wire = SYNC_FAIL;
1928 
           enable_cgalign_wire = FALSE;
1929 
           good_cgs_wire = 2'b00;
1930 
          end
1931 
         else
1932 
          begin
1933 
           sync_state = LOSS_OF_SYNC;
1934 
           sync_status_wire = SYNC_FAIL;
1935 
           enable_cgalign_wire = TRUE;
1936 
           good_cgs_wire = 2'b00;
1937 
          end
1938 
        end
1939 
       default:
1940 
        begin
1941 
         sync_state = LOSS_OF_SYNC;
1942 
         sync_status_wire = SYNC_FAIL;
1943 
         enable_cgalign_wire = TRUE;
1944 
         good_cgs_wire = 2'b00;
1945 
        end
1946 
      endcase
1947 
    end
1948 
 
1949 
endmodule // cd_ssm
1950 
 
1951 
 
1952 
module sip_xpcs_cd_mux (/*AUTOARG*/
1953 
   // Outputs
1954 
   rout,
1955 
   // Inputs
1956 
   bypass_sync, clk, position_7bit, position_10bit, rin,
1957 
   sel_comma_sync
1958 
   );
1959 
 
1960 
   output [19:0] rout;
1961 
 
1962 
   input bypass_sync;
1963 
   input clk;
1964 
   input [4:0] position_7bit;
1965 
   input [4:0] position_10bit;
1966 
   input [19:0] rin;
1967 
   input sel_comma_sync;
1968 
 
1969 
   reg [19:0] aligned;
1970 
   reg [19:0] rin_z;
1971 
 
1972 
   reg  [19:0] rout;
1973 
   wire [19:0] rout_pre;
1974 
   wire [4:0] shift;
1975 
 
1976 
   assign rout_pre = bypass_sync ? rin : aligned;
1977 
   assign shift = sel_comma_sync ? position_7bit : position_10bit;
1978 
 
1979 
   always @(posedge clk)
1980 
    begin
1981 
     rin_z <= #1 rin;
1982 
    end
1983 
 
1984 
    // drorb: 26-Jan-06: add sample for timing
1985 
    always @(posedge clk)
1986 
     begin
1987 
      rout <= #1 rout_pre;
1988 
     end
1989 
 
1990 
 
1991 
   always @(/*AUTOSENSE*/rin or rin_z or shift)
1992 
    begin
1993 
     case (shift)
1994 
      5'd0:
1995 
       begin
1996 
        aligned = rin;
1997 
       end
1998 
      5'd1:
1999 
       begin
2000 
        aligned = {rin[0],rin_z[19:1]};
2001 
       end
2002 
      5'd2:
2003 
       begin
2004 
        aligned = {rin[1:0],rin_z[19:2]};
2005 
       end
2006 
      5'd3:
2007 
       begin
2008 
        aligned = {rin[2:0],rin_z[19:3]};
2009 
       end
2010 
      5'd4:
2011 
       begin
2012 
        aligned = {rin[3:0],rin_z[19:4]};
2013 
       end
2014 
      5'd5:
2015 
       begin
2016 
        aligned = {rin[4:0],rin_z[19:5]};
2017 
       end
2018 
      5'd6:
2019 
       begin
2020 
        aligned = {rin[5:0],rin_z[19:6]};
2021 
       end
2022 
      5'd7:
2023 
       begin
2024 
        aligned = {rin[6:0],rin_z[19:7]};
2025 
       end
2026 
      5'd8:
2027 
       begin
2028 
        aligned = {rin[7:0],rin_z[19:8]};
2029 
       end
2030 
      5'd9:
2031 
       begin
2032 
        aligned = {rin[8:0],rin_z[19:9]};
2033 
       end
2034 
      5'd10:
2035 
       begin
2036 
        aligned = {rin[9:0],rin_z[19:10]};
2037 
       end
2038 
      5'd11:
2039 
       begin
2040 
        aligned = {rin[10:0],rin_z[19:11]};
2041 
       end
2042 
      5'd12:
2043 
       begin
2044 
        aligned = {rin[11:0],rin_z[19:12]};
2045 
       end
2046 
      5'd13:
2047 
       begin
2048 
        aligned = {rin[12:0],rin_z[19:13]};
2049 
       end
2050 
      5'd14:
2051 
       begin
2052 
        aligned = {rin[13:0],rin_z[19:14]};
2053 
       end
2054 
      5'd15:
2055 
       begin
2056 
        aligned = {rin[14:0],rin_z[19:15]};
2057 
       end
2058 
      5'd16:
2059 
       begin
2060 
        aligned = {rin[15:0],rin_z[19:16]};
2061 
       end
2062 
      5'd17:
2063 
       begin
2064 
        aligned = {rin[16:0],rin_z[19:17]};
2065 
       end
2066 
      5'd18:
2067 
       begin
2068 
        aligned = {rin[17:0],rin_z[19:18]};
2069 
       end
2070 
      5'd19:
2071 
       begin
2072 
        aligned = {rin[18:0],rin_z[19]};
2073 
       end
2074 
      default:
2075 
       begin
2076 
        aligned = rin;
2077 
       end
2078 
     endcase
2079 
    end
2080 
 
2081 
endmodule // cd_mux

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